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We build a MIMO-OFDM system using WARPLab 7.4.0.
When implementing Multi-User Beamforming on top of the system, we use 1st transmission to estimate channel and 2nd transmission to send payload adjusted by using beamforming weights.
We find there is a large delay over 200ms between the two transmissions. This means, when calculating the beamforming weights and sending payload, we are actually using the channel estimate from 200ms ago, or even earlier.
As a result, our Multi-User Beamforming doesn't have a very good performance.
Now, we are trying to work on FPGA to move part of the baseband processing from PC-MatLab into WARPv3-FPGA.
Our questions are:
(1) Does anyone have the same problem?
(2) Will our FPGA-related work be able to reduce the inter-transmission delay significantly?
(3) Is there any recommendation on how to partition the processing between PC-MatLab and WARPv3-FPGA?
(4) Is there anything else that we can do to reduce the inter-transmission delay?
Thank you.
Xuewei Tan
University of Sydney
Last edited by Xuewei_Tan (2014-Nov-27 17:56:04)
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(2) Will our FPGA-related work be able to reduce the inter-transmission delay significantly?
Yes- any processing you can implement in the FPGA will reduce the amount of data you must send via Ethernet. Our real-time reference designs (802.11, OFDM) demonstrate this with the full MAC+PHY design implemented in the FPGA, capable of Tx/Rx turnarounds of 10's of usec.
(3) Is there any recommendation on how to partition the processing between PC-MatLab and WARPv3-FPGA?
There is no universal "best" answer here, as the architecture depends entirely on your PHY design and MAC protocol.
One common approach is to implement channel estimation in the FPGA. Channel estimates typically occupy less space than the raw samples from which the estimates are computed, especially if many training symbols are averaged to compute the estimates. You can then transfer the channel estimates to MATLAB for further processing. Alternatively you can implement the computation that uses the estimates in the FPGA, further reducing the amount of data exchanged with MATLAB.
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Thanks for your answers, Patrick.
Last edited by Xuewei_Tan (2014-Nov-27 17:55:18)
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(4) Is there anything else that we can do to reduce the inter-transmission delay?
I forgot to mention above- be sure you're using the mex transport option with WARPLab 7 and jumbo frames if your PC+NIC+switch support them. Also consider whether you need to transfer the full 2^15 samples per Tx/Rx cycle. The read_iq/write_iq commands support transferring smaller waveforms.
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