source: Documentation/ReferenceDesigns/InterruptRef_xps_8_2/system.mhs

Last change on this file was 485, checked in by chunter, 17 years ago

Interrupt reference design demonstrates the correct way to initialize and configure interrupts with the interrupt controller.

File size: 6.9 KB
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1# ##############################################################################
2# Created by Base System Builder Wizard for Xilinx EDK 8.2.01 Build EDK_Im_Sp1.3
3# Wed Jan 24 09:12:18 2007
4# Target Board:  Rice University - WARP Project WARP FPGA and Radio Boards Rev FPGA 1.2  &   Radio 1.4
5# Family:    virtex2p
6# Device:    XC2VP70
7# Package:   FF1517
8# Speed Grade:   -6
9# Processor: PPC 405
10# Processor clock frequency: 200.000000 MHz
11# Bus clock frequency: 50.000000 MHz
12# Debug interface: FPGA JTAG
13# On Chip Memory : 320 KB
14# ##############################################################################
15
16
17 PARAMETER VERSION = 2.1.0
18
19
20 PORT fpga_0_LEDs_4Bit_GPIO_d_out_pin = fpga_0_LEDs_4Bit_GPIO_d_out, DIR = O, VEC = [0:3]
21 PORT fpga_0_Push_Buttons_4bit_GPIO_in_pin = fpga_0_Push_Buttons_4bit_GPIO_in, DIR = I, VEC = [0:3]
22 PORT fpga_0_RS232_RX_pin = fpga_0_RS232_RX, DIR = I
23 PORT fpga_0_RS232_TX_pin = fpga_0_RS232_TX, DIR = O
24 PORT sys_clk_pin = dcm_clk_s, DIR = I, SIGIS = CLK, CLK_FREQ = 100000000
25 PORT sys_rst_pin = sys_rst_s, DIR = I, RST_POLARITY = 1, SIGIS = RST
26
27
28BEGIN ppc405
29 PARAMETER INSTANCE = ppc405_0
30 PARAMETER HW_VER = 2.00.c
31 BUS_INTERFACE JTAGPPC = jtagppc_0_0
32 BUS_INTERFACE ISOCM = iocm
33 BUS_INTERFACE DSOCM = docm
34 BUS_INTERFACE IPLB = plb
35 BUS_INTERFACE DPLB = plb
36 PORT PLBCLK = sys_clk_s
37 PORT C405RSTCHIPRESETREQ = C405RSTCHIPRESETREQ
38 PORT C405RSTCORERESETREQ = C405RSTCORERESETREQ
39 PORT C405RSTSYSRESETREQ = C405RSTSYSRESETREQ
40 PORT RSTC405RESETCHIP = RSTC405RESETCHIP
41 PORT RSTC405RESETCORE = RSTC405RESETCORE
42 PORT RSTC405RESETSYS = RSTC405RESETSYS
43 PORT BRAMISOCMCLK = sys_clk_s
44 PORT BRAMDSOCMCLK = sys_clk_s
45 PORT EICC405EXTINPUTIRQ = EICC405EXTINPUTIRQ
46 PORT CPMC405CLOCK = proc_clk_s
47END
48
49BEGIN ppc405
50 PARAMETER INSTANCE = ppc405_1
51 PARAMETER HW_VER = 2.00.c
52 BUS_INTERFACE JTAGPPC = jtagppc_0_1
53END
54
55BEGIN jtagppc_cntlr
56 PARAMETER INSTANCE = jtagppc_0
57 PARAMETER HW_VER = 2.00.a
58 BUS_INTERFACE JTAGPPC0 = jtagppc_0_0
59 BUS_INTERFACE JTAGPPC1 = jtagppc_0_1
60END
61
62BEGIN proc_sys_reset
63 PARAMETER INSTANCE = reset_block
64 PARAMETER HW_VER = 1.00.a
65 PARAMETER C_EXT_RESET_HIGH = 1
66 PORT Ext_Reset_In = sys_rst_s
67 PORT Slowest_sync_clk = sys_clk_s
68 PORT Chip_Reset_Req = C405RSTCHIPRESETREQ
69 PORT Core_Reset_Req = C405RSTCORERESETREQ
70 PORT System_Reset_Req = C405RSTSYSRESETREQ
71 PORT Rstc405resetchip = RSTC405RESETCHIP
72 PORT Rstc405resetcore = RSTC405RESETCORE
73 PORT Rstc405resetsys = RSTC405RESETSYS
74 PORT Bus_Struct_Reset = sys_bus_reset
75 PORT Dcm_locked = dcm_0_lock
76END
77
78BEGIN isocm_v10
79 PARAMETER INSTANCE = iocm
80 PARAMETER HW_VER = 2.00.a
81 PARAMETER C_ISCNTLVALUE = 0x87
82 PORT ISOCM_Clk = sys_clk_s
83 PORT sys_rst = sys_bus_reset
84END
85
86BEGIN isbram_if_cntlr
87 PARAMETER INSTANCE = iocm_cntlr
88 PARAMETER HW_VER = 3.00.a
89 PARAMETER C_BASEADDR = 0x00000000
90 PARAMETER C_HIGHADDR = 0x0001ffff
91 BUS_INTERFACE ISOCM = iocm
92 BUS_INTERFACE DCR_WRITE_PORT = isocm_porta
93 BUS_INTERFACE INSTRN_READ_PORT = isocm_portb
94END
95
96BEGIN bram_block
97 PARAMETER INSTANCE = isocm_bram
98 PARAMETER HW_VER = 1.00.a
99 BUS_INTERFACE PORTA = isocm_porta
100 BUS_INTERFACE PORTB = isocm_portb
101END
102
103BEGIN dsocm_v10
104 PARAMETER INSTANCE = docm
105 PARAMETER HW_VER = 2.00.a
106 PARAMETER C_DSCNTLVALUE = 0x87
107 PORT DSOCM_Clk = sys_clk_s
108 PORT sys_rst = sys_bus_reset
109END
110
111BEGIN dsbram_if_cntlr
112 PARAMETER INSTANCE = docm_cntlr
113 PARAMETER HW_VER = 3.00.a
114 PARAMETER C_BASEADDR = 0x21800000
115 PARAMETER C_HIGHADDR = 0x2180ffff
116 BUS_INTERFACE DSOCM = docm
117 BUS_INTERFACE PORTA = dsocm_porta
118END
119
120BEGIN bram_block
121 PARAMETER INSTANCE = dsocm_bram
122 PARAMETER HW_VER = 1.00.a
123 BUS_INTERFACE PORTA = dsocm_porta
124END
125
126BEGIN plb_v34
127 PARAMETER INSTANCE = plb
128 PARAMETER HW_VER = 1.02.a
129 PARAMETER C_DCR_INTFCE = 0
130 PARAMETER C_EXT_RESET_HIGH = 1
131 PORT SYS_Rst = sys_bus_reset
132 PORT PLB_Clk = sys_clk_s
133END
134
135BEGIN opb_v20
136 PARAMETER INSTANCE = opb
137 PARAMETER HW_VER = 1.10.c
138 PARAMETER C_EXT_RESET_HIGH = 1
139 PORT SYS_Rst = sys_bus_reset
140 PORT OPB_Clk = sys_clk_s
141END
142
143BEGIN plb2opb_bridge
144 PARAMETER INSTANCE = plb2opb
145 PARAMETER HW_VER = 1.01.a
146 PARAMETER C_DCR_INTFCE = 0
147 PARAMETER C_RNG0_BASEADDR = 0x40000000
148 PARAMETER C_RNG0_HIGHADDR = 0x7fffffff
149 PARAMETER C_NUM_ADDR_RNG = 1
150 BUS_INTERFACE SPLB = plb
151 BUS_INTERFACE MOPB = opb
152END
153
154BEGIN opb_gpio
155 PARAMETER INSTANCE = LEDs_4Bit
156 PARAMETER HW_VER = 3.01.b
157 PARAMETER C_GPIO_WIDTH = 4
158 PARAMETER C_IS_DUAL = 0
159 PARAMETER C_IS_BIDIR = 0
160 PARAMETER C_ALL_INPUTS = 0
161 PARAMETER C_BASEADDR = 0x40020000
162 PARAMETER C_HIGHADDR = 0x4002ffff
163 BUS_INTERFACE SOPB = opb
164 PORT GPIO_d_out = fpga_0_LEDs_4Bit_GPIO_d_out
165END
166
167BEGIN opb_gpio
168 PARAMETER INSTANCE = Push_Buttons_4bit
169 PARAMETER HW_VER = 3.01.b
170 PARAMETER C_INTERRUPT_PRESENT = 1
171 PARAMETER C_GPIO_WIDTH = 4
172 PARAMETER C_IS_DUAL = 0
173 PARAMETER C_IS_BIDIR = 0
174 PARAMETER C_ALL_INPUTS = 1
175 PARAMETER C_BASEADDR = 0x40000000
176 PARAMETER C_HIGHADDR = 0x4000ffff
177 BUS_INTERFACE SOPB = opb
178 PORT IP2INTC_Irpt = Push_Buttons_4bit_IP2INTC_Irpt
179 PORT GPIO_in = fpga_0_Push_Buttons_4bit_GPIO_in
180END
181
182BEGIN opb_uartlite
183 PARAMETER INSTANCE = RS232
184 PARAMETER HW_VER = 1.00.b
185 PARAMETER C_BAUDRATE = 57600
186 PARAMETER C_DATA_BITS = 8
187 PARAMETER C_ODD_PARITY = 0
188 PARAMETER C_USE_PARITY = 0
189 PARAMETER C_CLK_FREQ = 50000000
190 PARAMETER C_BASEADDR = 0x40600000
191 PARAMETER C_HIGHADDR = 0x4060ffff
192 BUS_INTERFACE SOPB = opb
193 PORT RX = fpga_0_RS232_RX
194 PORT TX = fpga_0_RS232_TX
195END
196
197BEGIN plb_bram_if_cntlr
198 PARAMETER INSTANCE = plb_bram_if_cntlr_1
199 PARAMETER HW_VER = 1.00.b
200 PARAMETER c_plb_clk_period_ps = 20000
201 PARAMETER c_baseaddr = 0xfffe0000
202 PARAMETER c_highaddr = 0xffffffff
203 BUS_INTERFACE SPLB = plb
204 BUS_INTERFACE PORTA = plb_bram_if_cntlr_1_port
205END
206
207BEGIN bram_block
208 PARAMETER INSTANCE = plb_bram_if_cntlr_1_bram
209 PARAMETER HW_VER = 1.00.a
210 BUS_INTERFACE PORTA = plb_bram_if_cntlr_1_port
211END
212
213BEGIN opb_intc
214 PARAMETER INSTANCE = opb_intc_0
215 PARAMETER HW_VER = 1.00.c
216 PARAMETER C_BASEADDR = 0x41200000
217 PARAMETER C_HIGHADDR = 0x4120ffff
218 BUS_INTERFACE SOPB = opb
219 PORT Irq = EICC405EXTINPUTIRQ
220 PORT Intr = Push_Buttons_4bit_IP2INTC_Irpt&opb_timer_0_Interrupt
221END
222
223BEGIN dcm_module
224 PARAMETER INSTANCE = dcm_0
225 PARAMETER HW_VER = 1.00.a
226 PARAMETER C_CLK0_BUF = TRUE
227 PARAMETER C_CLK2X_BUF = TRUE
228 PARAMETER C_CLKDV_BUF = TRUE
229 PARAMETER C_CLKDV_DIVIDE = 2.000000
230 PARAMETER C_CLKIN_PERIOD = 10.000000
231 PARAMETER C_CLK_FEEDBACK = 1X
232 PARAMETER C_DLL_FREQUENCY_MODE = LOW
233 PARAMETER C_EXT_RESET_HIGH = 1
234 PORT CLKIN = dcm_clk_s
235 PORT CLK2X = proc_clk_s
236 PORT CLKDV = sys_clk_s
237 PORT CLK0 = dcm_0_FB
238 PORT CLKFB = dcm_0_FB
239 PORT RST = net_gnd
240 PORT LOCKED = dcm_0_lock
241END
242
243BEGIN opb_timer
244 PARAMETER INSTANCE = opb_timer_0
245 PARAMETER HW_VER = 1.00.b
246 PARAMETER C_BASEADDR = 0x41c00000
247 PARAMETER C_HIGHADDR = 0x41c0ffff
248 BUS_INTERFACE SOPB = opb
249 PORT Interrupt = opb_timer_0_Interrupt
250END
251
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