source: Hardware/WARP_v3/Rev1.1/Config_CPLD/src/spi_boot_OpenCores_src/rtl/vhdl/chip-sd-c.vhd

Last change on this file was 1799, checked in by murphpo, 12 years ago

Adding WARP v3 hardware files (schematics, FPGA pinout, configuration CPLD source)

File size: 411 bytes
Line 
1-------------------------------------------------------------------------------
2--
3-- SD/MMC Bootloader
4--
5-- $Id: chip-sd-c.vhd 77 2009-04-01 19:53:14Z arniml $
6--
7-------------------------------------------------------------------------------
8
9configuration chip_sd_c0 of chip is
10
11  for sd
12
13    for spi_boot_b : spi_boot
14      use configuration work.spi_boot_rtl_c0;
15    end for;
16
17  end for;
18
19end chip_sd_c0;
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