source:
PlatformSupport/CustomPeripherals/pcores/radio_controller_v1_30_a/hdl/verilog
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| radio_controller_TxTiming.v | 3.7 KB | 891 | 16 years | murphpo | updated radio controller 1.20 for better compatibility with faster PLB46 |
| spi_clgen.v | 5.0 KB | 889 | 16 years | murphpo | adding PLB46 version of radio controller |
| spi_shift.v | 5.9 KB | 889 | 16 years | murphpo | adding PLB46 version of radio controller |
| spi_top.v | 6.2 KB | 889 | 16 years | murphpo | adding PLB46 version of radio controller |
| user_logic.v | 36.7 KB | 1711 | 12 years | murphpo | Iterating on radio_bridge and radio_controller custom bus spec |
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