source: PlatformSupport/CustomPeripherals/pcores/radio_controller_v1_30_a/src/radio_prototypes.h

Last change on this file was 891, checked in by murphpo, 16 years ago

updated radio controller 1.20 for better compatibility with faster PLB46
File size: 15.1 KB
Line 
1// Copyright (c) 2006 Rice University
2// All Rights Reserved
3// This code is covered by the Rice-WARP license
4// See http://warp.rice.edu/license/ for details
5
6/**
7 * \file radio_prototypes.h
8 * \brief Header file containing macros and defines for all radio controller drivers.
9 *
10 * @version 1.09
11 * @author Siddharth Gupta
12 *
13 * This header file contains all the macros responsible for writing to the
14 * radio controller hardware registers. It also has the external definitions
15 * of the local copies of the radio registers.
16 */
17
18
19#ifndef RADIO_PROTOTYPES_H
20#define RADIO_PROTOTYPES_H
21
22/***************************** Include Files *******************************/
23
24#include "xbasic_types.h"
25#include "xstatus.h"
26#include "xio.h"
27
28/************************** Constant Definitions ***************************/
29
30
31/*
32 * User Logic Slave Space Offsets
33 * -- SLAVE_REG0 : user logic slave module register 0
34 * -- SLAVE_REG1 : user logic slave module register 1
35 * -- SLAVE_REG2 : user logic slave module register 2
36 * -- SLAVE_REG3 : user logic slave module register 3
37 * -- SLAVE_REG4 : user logic slave module register 4
38 * -- SLAVE_REG5 : user logic slave module register 5
39 * -- SLAVE_REG6 : user logic slave module register 6
40 * -- SLAVE_REG7 : user logic slave module register 7
41 * -- SLAVE_REG8 : user logic slave module register 8
42 * -- SLAVE_REG9 : user logic slave module register 9
43 * -- SLAVE_REG10 : user logic slave module register 10
44 * -- SLAVE_REG11 : user logic slave module register 11
45 * -- SLAVE_REG12 : user logic slave module register 12
46 * -- SLAVE_REG13 : user logic slave module register 13
47 * -- SLAVE_REG14 : user logic slave module register 14
48 * -- SLAVE_REG15 : user logic slave module register 15
49 * -- SLAVE_REG16 : user logic slave module register 16
50 */
51#define RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET (0x00000000)
52#define RADIO_CONTROLLER_SLAVE_REG0_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000000)
53#define RADIO_CONTROLLER_SLAVE_REG1_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000004)
54#define RADIO_CONTROLLER_SLAVE_REG2_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000008)
55#define RADIO_CONTROLLER_SLAVE_REG3_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x0000000C)
56#define RADIO_CONTROLLER_SLAVE_REG4_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000010)
57#define RADIO_CONTROLLER_SLAVE_REG5_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000014)
58#define RADIO_CONTROLLER_SLAVE_REG6_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000018)
59#define RADIO_CONTROLLER_SLAVE_REG7_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x0000001C)
60#define RADIO_CONTROLLER_SLAVE_REG8_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000020)
61#define RADIO_CONTROLLER_SLAVE_REG9_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000024)
62#define RADIO_CONTROLLER_SLAVE_REG10_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000028)
63#define RADIO_CONTROLLER_SLAVE_REG11_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x0000002C)
64#define RADIO_CONTROLLER_SLAVE_REG12_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000030)
65#define RADIO_CONTROLLER_SLAVE_REG13_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000034)
66#define RADIO_CONTROLLER_SLAVE_REG14_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000038)
67#define RADIO_CONTROLLER_SLAVE_REG15_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x0000003C)
68#define RADIO_CONTROLLER_SLAVE_REG16_OFFSET (RADIO_CONTROLLER_USER_SLAVE_SPACE_OFFSET + 0x00000040)
69
70/**************************** Type Definitions *****************************/
71
72
73/***************** Macros (Inline Functions) Definitions *******************/
74
75/*
76 *
77 * Write a value to a RADIO_CONTROLLER register. A 32 bit write is performed.
78 * If the component is implemented in a smaller width, only the least
79 * significant data is written.
80 *
81 * @param   BaseAddress is the base address of the RADIO_CONTROLLER device.
82 * @param   RegOffset is the register offset from the base to write to.
83 * @param   Data is the data written to the register.
84 *
85 * @return  None.
86 *
87 * @note
88 * C-style signature:
89 *  void RADIO_CONTROLLER_mWriteReg(Xuint32 BaseAddress, unsigned RegOffset, Xuint32 Data)
90 *
91 */
92#define RADIO_CONTROLLER_mWriteReg(BaseAddress, RegOffset, Data) \
93    XIo_Out32((BaseAddress) + (RegOffset), (Xuint32)(Data))
94
95/*
96 *
97 * Read a value from a RADIO_CONTROLLER register. A 32 bit read is performed.
98 * If the component is implemented in a smaller width, only the least
99 * significant data is read from the register. The most significant data
100 * will be read as 0.
101 *
102 * @param   BaseAddress is the base address of the RADIO_CONTROLLER device.
103 * @param   RegOffset is the register offset from the base to write to.
104 *
105 * @return  Data is the data from the register.
106 *
107 * @note
108 * C-style signature:
109 *  Xuint32 RADIO_CONTROLLER_mReadReg(Xuint32 BaseAddress, unsigned RegOffset)
110 *
111 */
112#define RADIO_CONTROLLER_mReadReg(BaseAddress, RegOffset) \
113    XIo_In32((BaseAddress) + (RegOffset))
114
115
116/*
117 *
118 * Write/Read value to/from RADIO_CONTROLLER user logic slave registers.
119 *
120 * @param   BaseAddress is the base address of the RADIO_CONTROLLER device.
121 * @param   Value is the data written to the register.
122 *
123 * @return  Data is the data from the user logic slave register.
124 *
125 * @note
126 * C-style signature:
127 *  Xuint32 RADIO_CONTROLLER_mReadSlaveRegn(Xuint32 BaseAddress)
128 *
129 */
130#define RADIO_CONTROLLER_mWriteSlaveReg0(BaseAddress, Value) \
131    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG0_OFFSET), (Xuint32)(Value))
132#define RADIO_CONTROLLER_mWriteSlaveReg1(BaseAddress, Value) \
133    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG1_OFFSET), (Xuint32)(Value))
134#define RADIO_CONTROLLER_mWriteSlaveReg2(BaseAddress, Value) \
135    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG2_OFFSET), (Xuint32)(Value))
136#define RADIO_CONTROLLER_mWriteSlaveReg3(BaseAddress, Value) \
137    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG3_OFFSET), (Xuint32)(Value))
138#define RADIO_CONTROLLER_mWriteSlaveReg4(BaseAddress, Value) \
139    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG4_OFFSET), (Xuint32)(Value))
140#define RADIO_CONTROLLER_mWriteSlaveReg5(BaseAddress, Value) \
141    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG5_OFFSET), (Xuint32)(Value))
142#define RADIO_CONTROLLER_mWriteSlaveReg6(BaseAddress, Value) \
143    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG6_OFFSET), (Xuint32)(Value))
144#define RADIO_CONTROLLER_mWriteSlaveReg7(BaseAddress, Value) \
145    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG7_OFFSET), (Xuint32)(Value))
146#define RADIO_CONTROLLER_mWriteSlaveReg8(BaseAddress, Value) \
147    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG8_OFFSET), (Xuint32)(Value))
148#define RADIO_CONTROLLER_mWriteSlaveReg9(BaseAddress, Value) \
149    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG9_OFFSET), (Xuint32)(Value))
150#define RADIO_CONTROLLER_mWriteSlaveReg10(BaseAddress, Value) \
151    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG10_OFFSET), (Xuint32)(Value))
152#define RADIO_CONTROLLER_mWriteSlaveReg11(BaseAddress, Value) \
153    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG11_OFFSET), (Xuint32)(Value))
154#define RADIO_CONTROLLER_mWriteSlaveReg12(BaseAddress, Value) \
155    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG12_OFFSET), (Xuint32)(Value))
156#define RADIO_CONTROLLER_mWriteSlaveReg13(BaseAddress, Value) \
157    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG13_OFFSET), (Xuint32)(Value))
158#define RADIO_CONTROLLER_mWriteSlaveReg14(BaseAddress, Value) \
159    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG14_OFFSET), (Xuint32)(Value))
160#define RADIO_CONTROLLER_mWriteSlaveReg15(BaseAddress, Value) \
161    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG15_OFFSET), (Xuint32)(Value))
162#define RADIO_CONTROLLER_mWriteSlaveReg16(BaseAddress, Value) \
163    XIo_Out32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG16_OFFSET), (Xuint32)(Value))
164
165#define RADIO_CONTROLLER_mReadSlaveReg0(BaseAddress) \
166    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG0_OFFSET))
167#define RADIO_CONTROLLER_mReadSlaveReg1(BaseAddress) \
168    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG1_OFFSET))
169#define RADIO_CONTROLLER_mReadSlaveReg2(BaseAddress) \
170    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG2_OFFSET))
171#define RADIO_CONTROLLER_mReadSlaveReg3(BaseAddress) \
172    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG3_OFFSET))
173#define RADIO_CONTROLLER_mReadSlaveReg4(BaseAddress) \
174    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG4_OFFSET))
175#define RADIO_CONTROLLER_mReadSlaveReg5(BaseAddress) \
176    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG5_OFFSET))
177#define RADIO_CONTROLLER_mReadSlaveReg6(BaseAddress) \
178    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG6_OFFSET))
179#define RADIO_CONTROLLER_mReadSlaveReg7(BaseAddress) \
180    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG7_OFFSET))
181#define RADIO_CONTROLLER_mReadSlaveReg8(BaseAddress) \
182    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG8_OFFSET))
183#define RADIO_CONTROLLER_mReadSlaveReg9(BaseAddress) \
184    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG9_OFFSET))
185#define RADIO_CONTROLLER_mReadSlaveReg10(BaseAddress) \
186    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG10_OFFSET))
187#define RADIO_CONTROLLER_mReadSlaveReg11(BaseAddress) \
188    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG11_OFFSET))
189#define RADIO_CONTROLLER_mReadSlaveReg12(BaseAddress) \
190    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG12_OFFSET))
191#define RADIO_CONTROLLER_mReadSlaveReg13(BaseAddress) \
192    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG13_OFFSET))
193#define RADIO_CONTROLLER_mReadSlaveReg14(BaseAddress) \
194    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG14_OFFSET))
195#define RADIO_CONTROLLER_mReadSlaveReg15(BaseAddress) \
196    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG15_OFFSET))
197#define RADIO_CONTROLLER_mReadSlaveReg16(BaseAddress) \
198    XIo_In32((BaseAddress) + (RADIO_CONTROLLER_SLAVE_REG16_OFFSET))
199
200/********************** Radio Controller Definitions ***********************/
201
202/// Use to apply any function to radio in slot 1 ('radios' input).
203#define RADIO1_ADDR 0x11111111
204/// Use to apply any function to radio in slot 2 ('radios' input).
205#define RADIO2_ADDR 0x22222222
206/// Use to apply any function to radio in slot 3 ('radios' input).
207#define RADIO3_ADDR 0x44444444
208/// Use to apply any function to radio in slot 4 ('radios' input).
209#define RADIO4_ADDR 0x88888888
210
211#define RAD1MASK 0x0001
212#define RAD2MASK 0x0002
213#define RAD3MASK 0x0004
214#define RAD4MASK 0x0008
215#define SLAVEMASK 0x000F
216#define SLVREGRDMSK 0x002063EF
217#define DAC1MASK 0x0010
218#define DAC2MASK 0x0020
219#define DAC3MASK 0x0040
220#define DAC4MASK 0x0080
221#define SLAVEMASKDAC 0x00F0
222
223/// Return value from a function if successful completion.
224#define WARP_SUCCESS 0
225#define NOT_IN_CALIBRATION -2
226/// Return value from a function if input gain value invalid.
227#define INVALID_GAIN -1
228/// Return value from a function if input frequency invalid.
229#define INVALID_FREQ -1
230/// Return value from a function if input mode invalid.
231#define INVALID_MODE -1
232/// Return value from a function if value given is out of range.
233#define OUT_OF_RANGE -2
234/// Use if function applies to I channel of DAC.
235#define ICHAN 1
236/// Use if function applies to Q channel of DAC.
237#define QCHAN 2
238
239/*-- Masks for all slave register bit locations --*/
240
241#define RAD_SHDN_MASK               0x0000000F
242#define RAD_SHDN_CON_MASK           0x000000F0
243#define RAD_TXEN_MASK               0x00000F00
244#define RAD_TXEN_CON_MASK           0x0000F000
245#define RAD_RXEN_MASK               0x000F0000
246#define RAD_RXEN_CON_MASK           0x00F00000
247#define RAD_RXHP_MASK               0x0F000000
248#define RAD_RXHP_CON_MASK           0xF0000000
249#define RAD_24PA_MASK               0x0000000F
250#define RAD_5PA_MASK                0x000000F0
251#define RAD_LD_MASK                 0x00000F00
252#define RAD_ANTSW_MASK              0x000F0000
253#define RAD_TX_DAC_RESET_MASK       0x00F00000
254#define RAD_ADC_RX_DCS_MASK         0x0F000000
255#define RAD_ADC_RX_DFS_MASK         0xF0000000
256#define RAD_ADC_RX_OTRA_MASK        0x0000000F
257#define RAD_ADC_RX_OTRB_MASK        0x000000F0
258#define RAD_ADC_RX_PWDNA_MASK       0x00000F00
259#define RAD_ADC_RX_PWDNB_MASK       0x0000F000
260#define RAD_RSSI_ADC_SLEEP_MASK     0x000F0000
261#define RAD_RSSI_ADC_OTR_MASK       0x00F00000
262#define RAD_RSSI_ADC_HIZ_MASK       0x0F000000
263#define RAD_RSSI_ADC_CLAMP_MASK     0xF0000000
264#define RAD_DIPSW_L_MASK            0x00003C00
265#define RAD_DIPSW_H_MASK            0x3C000000
266#define RAD_TX_DAC_PLL_LOCK_MASK    0x80008000
267#define RAD_RSSI_ADC_D_L_MASK       0x000003FF
268#define RAD_RSSI_ADC_D_H_MASK       0x03FF0000
269
270/*-- Local copies of radio registers --*/
271
272// RADIO 1
273extern unsigned short REG_RAD1_REGISTER_0;
274extern unsigned short REG_RAD1_REGISTER_1;
275extern unsigned short REG_RAD1_STANDBY;
276extern unsigned short REG_RAD1_INTEGER_DIVIDER_RATIO;
277extern unsigned short REG_RAD1_FRACTIONAL_DIVIDER_RATIO;
278extern unsigned short REG_RAD1_BAND_SELECT;
279extern unsigned short REG_RAD1_CALIBRATION;
280extern unsigned short REG_RAD1_LOWPASS_FILTER;
281extern unsigned short REG_RAD1_RX_CONTROL;
282extern unsigned short REG_RAD1_TX_LINEARITY;
283extern unsigned short REG_RAD1_PA_BIAS_DAC;
284extern unsigned short REG_RAD1_RX_GAIN;
285extern unsigned short REG_RAD1_TX_VGA_GAIN;
286
287// RADIO 2
288extern unsigned short REG_RAD2_REGISTER_0;
289extern unsigned short REG_RAD2_REGISTER_1;
290extern unsigned short REG_RAD2_STANDBY;
291extern unsigned short REG_RAD2_INTEGER_DIVIDER_RATIO;
292extern unsigned short REG_RAD2_FRACTIONAL_DIVIDER_RATIO;
293extern unsigned short REG_RAD2_BAND_SELECT;
294extern unsigned short REG_RAD2_CALIBRATION;
295extern unsigned short REG_RAD2_LOWPASS_FILTER;
296extern unsigned short REG_RAD2_RX_CONTROL;
297extern unsigned short REG_RAD2_TX_LINEARITY;
298extern unsigned short REG_RAD2_PA_BIAS_DAC;
299extern unsigned short REG_RAD2_RX_GAIN;
300extern unsigned short REG_RAD2_TX_VGA_GAIN;
301
302// RADIO 3
303extern unsigned short REG_RAD3_REGISTER_0;
304extern unsigned short REG_RAD3_REGISTER_1;
305extern unsigned short REG_RAD3_STANDBY;
306extern unsigned short REG_RAD3_INTEGER_DIVIDER_RATIO;
307extern unsigned short REG_RAD3_FRACTIONAL_DIVIDER_RATIO;
308extern unsigned short REG_RAD3_BAND_SELECT;
309extern unsigned short REG_RAD3_CALIBRATION;
310extern unsigned short REG_RAD3_LOWPASS_FILTER;
311extern unsigned short REG_RAD3_RX_CONTROL;
312extern unsigned short REG_RAD3_TX_LINEARITY;
313extern unsigned short REG_RAD3_PA_BIAS_DAC;
314extern unsigned short REG_RAD3_RX_GAIN;
315extern unsigned short REG_RAD3_TX_VGA_GAIN;
316
317// RADIO 4
318extern unsigned short REG_RAD4_REGISTER_0;
319extern unsigned short REG_RAD4_REGISTER_1;
320extern unsigned short REG_RAD4_STANDBY;
321extern unsigned short REG_RAD4_INTEGER_DIVIDER_RATIO;
322extern unsigned short REG_RAD4_FRACTIONAL_DIVIDER_RATIO;
323extern unsigned short REG_RAD4_BAND_SELECT;
324extern unsigned short REG_RAD4_CALIBRATION;
325extern unsigned short REG_RAD4_LOWPASS_FILTER;
326extern unsigned short REG_RAD4_RX_CONTROL;
327extern unsigned short REG_RAD4_TX_LINEARITY;
328extern unsigned short REG_RAD4_PA_BIAS_DAC;
329extern unsigned short REG_RAD4_RX_GAIN;
330extern unsigned short REG_RAD4_TX_VGA_GAIN;
331
332unsigned int* radio_controller_baseaddr;
333
334void transmit(int val);
335
336void transRadio(int ssval, unsigned int val);
337
338void transmitdac(int val);
339
340#endif
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