Last change
on this file was
1782,
checked in by murphpo, 12 years ago
|
adding ad_bridge g, with separate sys_samp_clk ports for Tx/Rx to support different ADC and DAC rates
|
File size:
338 bytes
|
Rev | Line | |
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[1766] | 1 | ################################################################### |
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| 2 | # Copyright (c) 2006 Rice University |
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| 3 | # All Rights Reserved |
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| 4 | # This code is covered by the Rice-WARP license |
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| 5 | # See http://warp.rice.edu/license/ for details |
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| 6 | ################################################################### |
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| 7 | |
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[1782] | 8 | lib w3_ad_bridge_v3_00_g w3_ad_bridge verilog |
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