source:
PlatformSupport/CustomPeripherals/pcores/w3_ad_bridge_v3_03_a/hdl
Name | Size | Rev | Age | Author | Last Change |
---|---|---|---|---|---|
../ | |||||
verilog | 5050 | 8 years | murphpo | Used TRXIQ to qualify I/Q data; still see difference in I/Q timing in … |
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