source: PlatformSupport/CustomPeripherals/pcores/w3_boot_io_mux_v1_00_a/data/w3_boot_io_mux_v2_1_0.pao

Last change on this file was 4298, checked in by murphpo, 9 years ago

New boot_io_mux core (muxes IIC/UART between clock config core (pre-boot) and AXi peripherals (post-boot)) and eeprom core with explicit I/O/T signals for external IOBUTFs
File size: 51 bytes
Line 
1lib w3_boot_io_mux_v1_00_a w3_boot_io_mux verilog
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