source: PlatformSupport/CustomPeripherals/pcores/w3_clock_controller_axi_v4_00_a/hdl/verilog/picoblaze_src/prog_clk_config_boot.psc

Last change on this file was 4325, checked in by murphpo, 5 years ago

adding pseudo code for picoblaze program

File size: 3.0 KB
Line 
1/***************************************************************
2* Pseudo-code for PicoBlaze program in w3_clock_controller_axi
3*
4* IMPORTANT: This pseudo code is for reference only. The actual
5*  PicoBlaze program is *not* compiled from this code. The program
6*  is written directly in assembly. The code below illustrates the
7*  basic operation of the assembly program but does not represent
8*  the assembly program routine-by-routine.
9*
10*  Refer to the w3_clock_controller_axi user guide for more details:
11*   http://warpproject.org/trac/wiki/cores/w3_clock_controller
12*
13****************************************************************/
14
15main() {
16
17    if(no_clock_module_mounted) {
18        load_configuration(DEV_RF_REF, CFG_NOCM)
19        load_configuration(DEV_SAMP, CFG_NOCM)
20        load_configuration(DEV_PLL, CFG_NOCM)
21        config_complete()
22    }
23
24    if(cm_mmcx_mounted) {
25      sw = read_cm_mmcx_sip_sw() //Read SIP switch
26 
27        if(sw == off_off) {
28            //Up-Up switches -> ignore clock module
29            load_configuration(DEV_RF_REF, CFG_NOCM)
30            load_configuration(DEV_SAMP, CFG_NOCM)
31            load_configuration(DEV_PLL, CFG_NOCM)
32        } else if(sw == off_on) {
33            //Up-Down switches -> Config A
34            load_configuration(DEV_RF_REF, CFG_CMMMCX_A)
35            load_configuration(DEV_SAMP, CFG_CMMMCX_A)
36        } else if(sw == on_off) {
37            //Down-Up switches -> Config B
38            load_configuration(DEV_RF_REF, CFG_CMMMCX_B)
39            load_configuration(DEV_SAMP, CFG_CMMMCX_B)
40        } else if(sw == on_on) {
41            //Down-Up switches -> Config C
42            load_configuration(DEV_RF_REF, CFG_CMMMCX_C)
43            load_configuration(DEV_SAMP, CFG_CMMMCX_C)
44        }
45 
46      config_complete()
47    }
48
49    if(cm_pll_mounted) {
50        sw = read_cm_pll_dip_sw() //Read 2 LSB of DIP switch
51
52        if(sw == off_off) {
53            //Down-Down switches -> ignore clock module
54            load_configuration(DEV_RF_REF, CFG_NOCM)
55            load_configuration(DEV_SAMP, CFG_NOCM)
56            load_configuration(DEV_PLL, CFG_NOCM)
57            config_complete()
58        }
59   
60        wait_for_pll_refclk()
61   
62        if(sw == off_on) {
63            //Down-Up switches -> Config A
64            load_configuration(DEV_RF_REF, CFG_CMPLL_A)
65            load_configuration(DEV_SAMP, CFG_CMPLL_A)
66            load_configuration(DEV_PLL, CFG_CMPLL_A)
67        } else if(sw == on_off) {
68            //Up-Down switches -> Config B
69            load_configuration(DEV_RF_REF, CFG_CMPLL_B)
70            load_configuration(DEV_SAMP, CFG_CMPLL_B)
71            load_configuration(DEV_PLL, CFG_CMPLL_B)
72        } else if(sw == on_on) {
73            //Up-Up switches -> Config C
74            load_configuration(DEV_RF_REF, CFG_CMPLL_C)
75            load_configuration(DEV_SAMP, CFG_CMPLL_C)
76            load_configuration(DEV_PLL, CFG_CMPLL_C)
77        }
78
79        wait_for_pll_lock()
80
81        config_complete()
82    }
83}
84
85load_configuration(req_device, req_cfg) {
86    if(eeprom[15000] == 0xA5 && eeprom[15001] == 0xCD) {
87        cfg_data = copy_cfg_from_eeprom(req_device, req_cfg)
88    } else {
89        cfg_data = copy_cfg_from_rom(req_device, req_cfg)
90    }
91
92    write_cfg_to_device(req_device, cfg_data)
93}
94
95wait_for_pll_refclk() {
96    while(read_pll_refclk_status != TOGGLING) {}
97}
98
99wait_for_pll_lock() {
100    while(read_pll_lock_status != LOCKED) {}
101}
102
103config_complete() {
104  clear_mmcm_reset() //Starts clocks to FPGA, allows MicroBlaze subsystem to boot
105  halt()
106}
Note: See TracBrowser for help on using the repository browser.