1 | /***************************************************************** |
---|
2 | * File: w3_iic_eeprom.h |
---|
3 | * Copyright (c) 2012 Mango Communications, all rights reseved |
---|
4 | * Released under the WARP License |
---|
5 | * See http://warp.rice.edu/license for details |
---|
6 | *****************************************************************/ |
---|
7 | |
---|
8 | /// @cond EXCLUDE_FROM_DOCS |
---|
9 | //User code never uses the #define's from this header, so exclude them from the API docs |
---|
10 | |
---|
11 | #ifndef W3_iic_eeprom_H |
---|
12 | #define W3_iic_eeprom_H |
---|
13 | |
---|
14 | #include "xil_io.h" |
---|
15 | |
---|
16 | // Address offset for each slave register; exclude from docs, as users never use these directly |
---|
17 | #define W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET (0x00000000) |
---|
18 | #define W3_IIC_EEPROM_SLV_REG0_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000000) |
---|
19 | #define W3_IIC_EEPROM_SLV_REG1_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000004) |
---|
20 | #define W3_IIC_EEPROM_SLV_REG2_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000008) |
---|
21 | #define W3_IIC_EEPROM_SLV_REG3_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x0000000C) |
---|
22 | #define W3_IIC_EEPROM_SLV_REG4_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000010) |
---|
23 | #define W3_IIC_EEPROM_SLV_REG5_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000014) |
---|
24 | #define W3_IIC_EEPROM_SLV_REG6_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000018) |
---|
25 | #define W3_IIC_EEPROM_SLV_REG7_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x0000001C) |
---|
26 | |
---|
27 | #define IIC_EEPROM_REG_CONFIG_STATUS W3_IIC_EEPROM_SLV_REG0_OFFSET |
---|
28 | #define IIC_EEPROM_REG_CMD W3_IIC_EEPROM_SLV_REG1_OFFSET |
---|
29 | #define IIC_EEPROM_REG_TX W3_IIC_EEPROM_SLV_REG2_OFFSET |
---|
30 | #define IIC_EEPROM_REG_RX W3_IIC_EEPROM_SLV_REG3_OFFSET |
---|
31 | |
---|
32 | //Masks for config/status register |
---|
33 | #define IIC_EEPROM_REGMASK_CLKDIV 0x000000FF |
---|
34 | #define IIC_EEPROM_REGMASK_COREEN 0x00000100 |
---|
35 | #define IIC_EEPROM_REGMASK_RXACK 0x00010000 |
---|
36 | #define IIC_EEPROM_REGMASK_BUSY 0x00020000 |
---|
37 | #define IIC_EEPROM_REGMASK_AL 0x00040000 |
---|
38 | #define IIC_EEPROM_REGMASK_TIP 0x00080000 |
---|
39 | |
---|
40 | //Masks for command register |
---|
41 | #define IIC_EEPROM_REGMASK_START 0x00000001 |
---|
42 | #define IIC_EEPROM_REGMASK_STOP 0x00000002 |
---|
43 | #define IIC_EEPROM_REGMASK_READ 0x00000004 |
---|
44 | #define IIC_EEPROM_REGMASK_WRITE 0x00000008 |
---|
45 | #define IIC_EEPROM_REGMASK_ACK 0x00000010 |
---|
46 | |
---|
47 | #define IIC_EEPROM_CONTROL_WORD_RD 0xA1 |
---|
48 | #define IIC_EEPROM_CONTROL_WORD_WR 0xA0 |
---|
49 | |
---|
50 | void iic_eeprom_init(u32 ba, u8 clkDiv); |
---|
51 | inline int iic_eeprom_waitForRxACK(u32 ba); |
---|
52 | int iic_eeprom_writeByte(u32 ba, u16 addrToWrite, u8 byteToWrite); |
---|
53 | int iic_eeprom_readByte(u32 ba, u16 addrToRead); |
---|
54 | u32 w3_eeprom_readSerialNum(u32 ba); |
---|
55 | u32 w3_eeprom_read_fpga_dna(u32 ba, int lo_hi); |
---|
56 | void w3_eeprom_readEthAddr(u32 ba, u8 addrSel, u8* addrBuf); |
---|
57 | |
---|
58 | #endif /** W3_iic_eeprom_H */ |
---|
59 | /// @endcond |
---|