source: PlatformSupport/CustomPeripherals/pcores/w3_iic_eeprom_axi_v1_02_a/opencores_src/doc/i2c_specs.pdf

Last change on this file was 5058, checked in by welsh, 8 years ago

EEPROM core v 1.02.a: Added support for multi-cpu environment; Caching of WARP data (SN, FPGA DNA, MAC addresses) on init.
File size: 206.5 KB

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