source:
PlatformSupport/CustomPeripherals/pcores/w3_iic_eeprom_v1_00_b/opencores_src/rtl/verilog
Name | Size | Rev | Age | Author | Last Change |
---|---|---|---|---|---|
../ | |||||
timescale.v | 23 bytes | 1766 | 12 years | murphpo | |
i2c_master_top.v | 9.8 KB | 1766 | 12 years | murphpo | |
i2c_master_defines.v | 2.9 KB | 1766 | 12 years | murphpo | |
i2c_master_byte_ctrl.v | 10.3 KB | 1766 | 12 years | murphpo | |
i2c_master_bit_ctrl.v | 20.6 KB | 1766 | 12 years | murphpo |
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