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warp_timer.mdl

Last change on this file was 1042, checked in by kwilhelm, 16 years ago
adding warp_timer
File size: 440.7 KB

Line
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3	Version 6.6
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42	Creator "CMC"
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695	"box evaluate=\"true\" name=\"deprecated_control\" default=\"off\" label=\"Sho"
696	"w deprecated controls\" />\n <hiddenvar evaluate=\"true\" name=\"eval_field"
697	"\" default=\"0\" />\n </blockgui>\n</sysgenblock>\n"
698	}
699	Block {
700	BlockType Reference
701	Name "Concat"
702	Ports [4, 1]
703	Position [740, 320, 925, 350]
704	Orientation "down"
705	NamePlacement "alternate"
706	SourceBlock "xbsIndex_r4/Concat"
707	SourceType "Xilinx Bus Concatenator Block"
708	infoedit "Concatenates two or more inputs. Output will b"
709	"e cast to an unsigned value with the binary point at zero."
710	num_inputs "4"
711	dbl_ovrd off
712	has_advanced_control "0"
713	sggui_pos "-1,-1,-1,-1"
714	block_type "concat"
715	block_version "9.1.01"
716	sg_icon_stat "185,30,4,1,white,blue,0,ad63c393,down"
717	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
718	"tch([0 185 185 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([85 80 87 80 85 93 "
719	"95 97 105 98 92 87 93 87 92 98 105 97 95 93 85 ],[3 8 15 22 27 27 25 27 27 20"
720	" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 185 185 0 0 ],[0 0 3"
721	"0 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
722	"egin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black')"
723	";port_label('input',4,'lo');\nfprintf('','COMMENT: end icon text');\n"
724	}
725	Block {
726	BlockType Reference
727	Name "Concat1"
728	Ports [3, 1]
729	Position [889, 230, 911, 255]
730	Orientation "down"
731	NamePlacement "alternate"
732	SourceBlock "xbsIndex_r4/Concat"
733	SourceType "Xilinx Bus Concatenator Block"
734	infoedit "Concatenates two or more inputs. Output will b"
735	"e cast to an unsigned value with the binary point at zero."
736	num_inputs "3"
737	dbl_ovrd off
738	has_advanced_control "0"
739	sggui_pos "20,20,336,165"
740	block_type "concat"
741	block_version "9.1.01"
742	sg_icon_stat "22,25,1,1,white,blue,0,97cf21e1,right"
743	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
744	"tch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 3"
745	"8 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 4"
746	"5 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 "
747	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
748	"icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port"
749	"_label('input',3,'lo');\nfprintf('','COMMENT: end icon text');\n"
750	}
751	Block {
752	BlockType Reference
753	Name "Concat2"
754	Ports [3, 1]
755	Position [844, 230, 866, 255]
756	Orientation "down"
757	NamePlacement "alternate"
758	SourceBlock "xbsIndex_r4/Concat"
759	SourceType "Xilinx Bus Concatenator Block"
760	infoedit "Concatenates two or more inputs. Output will b"
761	"e cast to an unsigned value with the binary point at zero."
762	num_inputs "3"
763	dbl_ovrd off
764	has_advanced_control "0"
765	sggui_pos "20,20,336,165"
766	block_type "concat"
767	block_version "9.1.01"
768	sg_icon_stat "22,25,1,1,white,blue,0,97cf21e1,right"
769	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
770	"tch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 3"
771	"8 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 4"
772	"5 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 "
773	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
774	"icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port"
775	"_label('input',3,'lo');\nfprintf('','COMMENT: end icon text');\n"
776	}
777	Block {
778	BlockType Reference
779	Name "Concat3"
780	Ports [3, 1]
781	Position [799, 230, 821, 255]
782	Orientation "down"
783	NamePlacement "alternate"
784	SourceBlock "xbsIndex_r4/Concat"
785	SourceType "Xilinx Bus Concatenator Block"
786	infoedit "Concatenates two or more inputs. Output will b"
787	"e cast to an unsigned value with the binary point at zero."
788	num_inputs "3"
789	dbl_ovrd off
790	has_advanced_control "0"
791	sggui_pos "20,20,336,165"
792	block_type "concat"
793	block_version "9.1.01"
794	sg_icon_stat "22,25,1,1,white,blue,0,97cf21e1,right"
795	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
796	"tch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 3"
797	"8 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 4"
798	"5 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 "
799	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
800	"icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port"
801	"_label('input',3,'lo');\nfprintf('','COMMENT: end icon text');\n"
802	}
803	Block {
804	BlockType Reference
805	Name "Concat4"
806	Ports [3, 1]
807	Position [754, 230, 776, 255]
808	Orientation "down"
809	NamePlacement "alternate"
810	SourceBlock "xbsIndex_r4/Concat"
811	SourceType "Xilinx Bus Concatenator Block"
812	infoedit "Concatenates two or more inputs. Output will b"
813	"e cast to an unsigned value with the binary point at zero."
814	num_inputs "3"
815	dbl_ovrd off
816	has_advanced_control "0"
817	sggui_pos "20,20,336,165"
818	block_type "concat"
819	block_version "9.1.01"
820	sg_icon_stat "22,25,1,1,white,blue,0,97cf21e1,right"
821	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
822	"tch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 3"
823	"8 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 4"
824	"5 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 "
825	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
826	"icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port"
827	"_label('input',3,'lo');\nfprintf('','COMMENT: end icon text');\n"
828	}
829	Block {
830	BlockType Constant
831	Name "Constant"
832	Position [15, 191, 35, 209]
833	Value "0"
834	}
835	Block {
836	BlockType Reference
837	Name "Constant1"
838	Ports [0, 1]
839	Position [410, 205, 445, 225]
840	SourceBlock "xbsIndex_r4/Constant"
841	SourceType "Xilinx Constant Block Block"
842	arith_type "Boolean"
843	const "1"
844	n_bits "1"
845	bin_pt "0"
846	explicit_period off
847	period "1"
848	dsp48_infoedit "The use of this block for DSP48 instructions is"
849	" deprecated. Please use the Opmode block."
850	equ "P=C"
851	opselect "C"
852	inp2 "PCIN>>17"
853	opr "+"
854	inp1 "P"
855	carry "CIN"
856	dbl_ovrd off
857	has_advanced_control "0"
858	sggui_pos "20,20,400,346"
859	block_type "constant"
860	block_version "8.2"
861	sg_icon_stat "35,20,0,1,white,blue,0,06094819,right"
862	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
863	"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
864	" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
865	"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
866	"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
867	"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
868	"end icon text');\n"
869	}
870	Block {
871	BlockType Reference
872	Name "Constant2"
873	Ports [0, 1]
874	Position [410, 420, 445, 440]
875	SourceBlock "xbsIndex_r4/Constant"
876	SourceType "Xilinx Constant Block Block"
877	arith_type "Boolean"
878	const "1"
879	n_bits "1"
880	bin_pt "0"
881	explicit_period off
882	period "1"
883	dsp48_infoedit "The use of this block for DSP48 instructions is"
884	" deprecated. Please use the Opmode block."
885	equ "P=C"
886	opselect "C"
887	inp2 "PCIN>>17"
888	opr "+"
889	inp1 "P"
890	carry "CIN"
891	dbl_ovrd off
892	has_advanced_control "0"
893	sggui_pos "-1,-1,-1,-1"
894	block_type "constant"
895	block_version "8.2"
896	sg_icon_stat "35,20,0,1,white,blue,0,06094819,right"
897	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
898	"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
899	" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
900	"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
901	"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
902	"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
903	"end icon text');\n"
904	}
905	Block {
906	BlockType Reference
907	Name "Constant3"
908	Ports [0, 1]
909	Position [410, 635, 445, 655]
910	SourceBlock "xbsIndex_r4/Constant"
911	SourceType "Xilinx Constant Block Block"
912	arith_type "Boolean"
913	const "1"
914	n_bits "1"
915	bin_pt "0"
916	explicit_period off
917	period "1"
918	dsp48_infoedit "The use of this block for DSP48 instructions is"
919	" deprecated. Please use the Opmode block."
920	equ "P=C"
921	opselect "C"
922	inp2 "PCIN>>17"
923	opr "+"
924	inp1 "P"
925	carry "CIN"
926	dbl_ovrd off
927	has_advanced_control "0"
928	sggui_pos "-1,-1,-1,-1"
929	block_type "constant"
930	block_version "8.2"
931	sg_icon_stat "35,20,0,1,white,blue,0,06094819,right"
932	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
933	"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
934	" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
935	"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
936	"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
937	"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
938	"end icon text');\n"
939	}
940	Block {
941	BlockType Reference
942	Name "Constant4"
943	Ports [0, 1]
944	Position [410, 850, 445, 870]
945	SourceBlock "xbsIndex_r4/Constant"
946	SourceType "Xilinx Constant Block Block"
947	arith_type "Boolean"
948	const "1"
949	n_bits "1"
950	bin_pt "0"
951	explicit_period off
952	period "1"
953	dsp48_infoedit "The use of this block for DSP48 instructions is"
954	" deprecated. Please use the Opmode block."
955	equ "P=C"
956	opselect "C"
957	inp2 "PCIN>>17"
958	opr "+"
959	inp1 "P"
960	carry "CIN"
961	dbl_ovrd off
962	has_advanced_control "0"
963	sggui_pos "-1,-1,-1,-1"
964	block_type "constant"
965	block_version "8.2"
966	sg_icon_stat "35,20,0,1,white,blue,0,06094819,right"
967	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
968	"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
969	" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
970	"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
971	"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
972	"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
973	"end icon text');\n"
974	}
975	Block {
976	BlockType Reference
977	Name "Constant5"
978	Ports [0, 1]
979	Position [810, 395, 845, 415]
980	SourceBlock "xbsIndex_r4/Constant"
981	SourceType "Xilinx Constant Block Block"
982	arith_type "Boolean"
983	const "1"
984	n_bits "1"
985	bin_pt "0"
986	explicit_period off
987	period "1"
988	dsp48_infoedit "The use of this block for DSP48 instructions is"
989	" deprecated. Please use the Opmode block."
990	equ "P=C"
991	opselect "C"
992	inp2 "PCIN>>17"
993	opr "+"
994	inp1 "P"
995	carry "CIN"
996	dbl_ovrd off
997	has_advanced_control "0"
998	sggui_pos "20,20,400,346"
999	block_type "constant"
1000	block_version "8.2"
1001	sg_icon_stat "35,20,0,1,white,blue,0,06094819,right"
1002	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
1003	"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
1004	" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
1005	"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
1006	"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
1007	"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
1008	"end icon text');\n"
1009	}
1010	Block {
1011	BlockType Reference
1012	Name "Convert"
1013	Ports [1, 1]
1014	Position [889, 270, 911, 300]
1015	Orientation "down"
1016	NamePlacement "alternate"
1017	SourceBlock "xbsIndex_r4/Convert"
1018	SourceType "Xilinx Type Converter Block"
1019	infoedit "Hardware notes: rounding and saturating require"
1020	" hardware resources; truncating and wrapping do not."
1021	arith_type "Unsigned"
1022	n_bits "8"
1023	bin_pt "0"
1024	quantization "Truncate"
1025	overflow "Wrap"
1026	latency "0"
1027	dbl_ovrd off
1028	pipeline off
1029	xl_use_area off
1030	xl_area "[0,0,0,0,0,0,0]"
1031	has_advanced_control "0"
1032	sggui_pos "20,20,374,375"
1033	block_type "convert"
1034	block_version "9.1.01"
1035	sg_icon_stat "22,30,1,1,white,blue,0,74901e60,right"
1036	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
1037	"tch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25"
1038	" 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 "
1039	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0"
1040	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
1041	"con text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMME"
1042	"NT: end icon text');\n"
1043	}
1044	Block {
1045	BlockType Reference
1046	Name "Convert1"
1047	Ports [1, 1]
1048	Position [844, 270, 866, 300]
1049	Orientation "down"
1050	NamePlacement "alternate"
1051	SourceBlock "xbsIndex_r4/Convert"
1052	SourceType "Xilinx Type Converter Block"
1053	infoedit "Hardware notes: rounding and saturating require"
1054	" hardware resources; truncating and wrapping do not."
1055	arith_type "Unsigned"
1056	n_bits "8"
1057	bin_pt "0"
1058	quantization "Truncate"
1059	overflow "Wrap"
1060	latency "0"
1061	dbl_ovrd off
1062	pipeline off
1063	xl_use_area off
1064	xl_area "[0,0,0,0,0,0,0]"
1065	has_advanced_control "0"
1066	sggui_pos "20,20,374,375"
1067	block_type "convert"
1068	block_version "9.1.01"
1069	sg_icon_stat "22,30,1,1,white,blue,0,74901e60,right"
1070	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
1071	"tch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25"
1072	" 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 "
1073	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0"
1074	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
1075	"con text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMME"
1076	"NT: end icon text');\n"
1077	}
1078	Block {
1079	BlockType Reference
1080	Name "Convert2"
1081	Ports [1, 1]
1082	Position [799, 270, 821, 300]
1083	Orientation "down"
1084	NamePlacement "alternate"
1085	SourceBlock "xbsIndex_r4/Convert"
1086	SourceType "Xilinx Type Converter Block"
1087	infoedit "Hardware notes: rounding and saturating require"
1088	" hardware resources; truncating and wrapping do not."
1089	arith_type "Unsigned"
1090	n_bits "8"
1091	bin_pt "0"
1092	quantization "Truncate"
1093	overflow "Wrap"
1094	latency "0"
1095	dbl_ovrd off
1096	pipeline off
1097	xl_use_area off
1098	xl_area "[0,0,0,0,0,0,0]"
1099	has_advanced_control "0"
1100	sggui_pos "20,20,374,375"
1101	block_type "convert"
1102	block_version "9.1.01"
1103	sg_icon_stat "22,30,1,1,white,blue,0,74901e60,right"
1104	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
1105	"tch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25"
1106	" 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 "
1107	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0"
1108	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
1109	"con text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMME"
1110	"NT: end icon text');\n"
1111	}
1112	Block {
1113	BlockType Reference
1114	Name "Convert3"
1115	Ports [1, 1]
1116	Position [754, 270, 776, 300]
1117	Orientation "down"
1118	NamePlacement "alternate"
1119	SourceBlock "xbsIndex_r4/Convert"
1120	SourceType "Xilinx Type Converter Block"
1121	infoedit "Hardware notes: rounding and saturating require"
1122	" hardware resources; truncating and wrapping do not."
1123	arith_type "Unsigned"
1124	n_bits "8"
1125	bin_pt "0"
1126	quantization "Truncate"
1127	overflow "Wrap"
1128	latency "0"
1129	dbl_ovrd off
1130	pipeline off
1131	xl_use_area off
1132	xl_area "[0,0,0,0,0,0,0]"
1133	has_advanced_control "0"
1134	sggui_pos "20,20,374,375"
1135	block_type "convert"
1136	block_version "9.1.01"
1137	sg_icon_stat "22,30,1,1,white,blue,0,74901e60,right"
1138	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
1139	"tch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25"
1140	" 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 "
1141	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0"
1142	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
1143	"con text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMME"
1144	"NT: end icon text');\n"
1145	}
1146	Block {
1147	BlockType SubSystem
1148	Name "EDK Processor"
1149	Ports []
1150	Position [15, 98, 64, 149]
1151	CopyFcn "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallba"
1152	"ck(gcbh);"
1153	DeleteFcn "xlDestroyGui(gcbh);"
1154	LoadFcn "xlBlockLoadCallback(gcbh);"
1155	ModelCloseFcn "xlDestroyGui(gcbh);"
1156	PreSaveFcn "xlBlockPreSaveCallback(gcbh);"
1157	PostSaveFcn "xlBlockPostSaveCallback(gcbh);"
1158	DestroyFcn "xlDestroyGui(gcbh);"
1159	OpenFcn "bh=gcbh;xlProcBlockCallbacks('populatesharedmem"
1160	"orylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.xml', @xlProcBlockEnablement,"
1161	" @xlProcBlockAction)"
1162	CloseFcn "xlDestroyGui(gcbh);"
1163	MoveFcn "xlBlockMoveCallback(gcbh);"
1164	MinAlgLoopOccurrences off
1165	RTWSystemCode "Auto"
1166	FunctionWithSeparateData off
1167	MaskHideContents off
1168	MaskType "Xilinx EDK Processor Block"
1169	MaskDescription "Xilinx EDK Processor"
1170	MaskHelp "eval('');xlDoc('-book','sysgen','-topic','EDK_P"
1171	"rocessor');"
1172	MaskPromptString "Configure Processor for\|EDK Project\| \|Available"
1173	" Memories\| \| \|Bus Type\|Base Address\| \|Lock\| \|Dual Clocks\|Constraint file\| \|In"
1174	"herit Device Type\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| "
1175	MaskStyleString "popup(EDK pcore generation\|HDL netlisting),edit"
1176	",edit,popup(<empty>),edit,edit,popup(PLB\|FSL),edit,edit,checkbox,edit,checkbo"
1177	"x,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,e"
1178	"dit,edit,edit,edit,edit,edit,edit"
1179	MaskTunableValueString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
1180	",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
1181	MaskCallbackString "\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|"
1182	MaskEnableString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
1183	",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
1184	MaskVisibilityString "on,on,off,on,on,off,on,on,off,on,off,on,on,off,"
1185	"on,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off"
1186	MaskToolTipString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
1187	",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
1188	MaskVarAliasString ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
1189	MaskVariables "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemorie"
1190	"s=&4;portInterfaceTable=&5;bus_type_sgadvanced=&6;bus_type=@7;baseaddr=&8;bas"
1191	"eaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clo"
1192	"ck=@12;ucf_file=&13;inheritDeviceType_sgadvanced=&14;inheritDeviceType=@15;cl"
1193	"ock_name=&16;internalPortList=&17;resetPolarity=&18;memxtable=&19;procinfo=&2"
1194	"0;fslifaceports=&21;memmapdirty=&22;blockname=&23;xpsintstyle=&24;proc=&25;ha"
1195	"s_advanced_control=@26;sggui_pos=&27;block_type=&28;block_version=&29;sg_icon"
1196	"_stat=&30;sg_mask_display=&31;sg_list_contents=&32;sg_blockgui_xml=&33;"
1197	MaskInitialization "try\n tmp_gcb = gcb;\n tmp_gcbh = gcbh;\n if"
1198	" (strcmp('SysGenIndex',get_param(bdroot(tmp_gcbh),'tag')) && ~isempty(regexp("
1199	"bdroot(tmp_gcb), '^xbs', 'once')))\n return;\n end;\n xlMungeMaskParams;"
1200	"\n serialized_declarations = '{}';\n xledkprocessor_init();\n ptable_ = xl"
1201	"blockprep(get_param(tmp_gcb, 'MaskWSVariables'));\ncatch\n global dbgsysgen;"
1202	"\n if(~isempty(dbgsysgen) && dbgsysgen)\n e = regexprep(lasterr, '\\n', '"
1203	"\\nError: ');\n disp(['Error: While running MaskInit code on block ' tmp_g"
1204	"cb ': ' e]);\n error(e);\n end\nend\n"
1205	MaskDisplay "fprintf('','COMMENT: begin icon graphics');\npa"
1206	"tch([0 49 49 0 ],[0 0 51 51 ],[0.77 0.82 0.91]);\npatch([11 3 14 3 11 24 28 3"
1207	"2 46 35 25 17 27 17 25 35 46 32 28 24 11 ],[6 14 25 36 44 44 40 44 44 33 43 3"
1208	"5 25 15 7 17 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 49 49 0 0 ],[0 0 51 51 "
1209	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
1210	"icon text');\ndisp('MicroBlaze');\n\nfprintf('','COMMENT: end icon text');\n"
1211	MaskSelfModifiable on
1212	MaskIconFrame off
1213	MaskIconOpaque on
1214	MaskIconRotate "none"
1215	MaskIconUnits "autoscale"
1216	MaskValueString "EDK pcore generation\|\|<qt bgcolor=\"#FFFFFF\"><"
1217	"div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\"
1218	"images\\registerplus.gif\"> <<timer0_countTo>><br></div><div><img"
1219	" src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\"
1220	"registerplus.gif\"> <<timer0_timeLeft>><br></div><div><img src=\""
1221	"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registe"
1222	"rplus.gif\"> <<timer1_countTo>><br></div><div><img src=\"C:\\Xili"
1223	"nx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gi"
1224	"f\"> <<timer1_timeLeft>><br></div><div><img src=\"C:\\Xilinx_101"
1225	"\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> &"
1226	"lt;<timer2_countTo>><br></div><div><img src=\"C:\\Xilinx_101\\DSP_To"
1227	"ols\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<t"
1228	"imer2_timeLeft>><br></div><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\co"
1229	"mmon\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<timer3_c"
1230	"ountTo>><br></div><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bi"
1231	"n\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<timer3_timeLeft&"
1232	"gt;><br></div><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\"
1233	"..\\sysgen\\data\\images\\registerplus.gif\"> <<timer_control_r>>"
1234	"<br></div><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sys"
1235	"gen\\data\\images\\registerplus.gif\"> <<timer_control_w>><br></d"
1236	"iv><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\da"
1237	"ta\\images\\registerplus.gif\"> <<timer_status>><br></div></qt>\|<"
1238	"empty>\|{'exposed'=>[],'portdir'=>[],'portname'=>[],'shortname'=>[]}\|\|PLB\|0x80"
1239	"000000\|\|off\|\|off\|\|\|off\|plb\|{}\|0\|{'mlist'=>['warp_timer/From Register1','warp_"
1240	"timer/To Register','warp_timer/From Register3','warp_timer/To Register1','war"
1241	"p_timer/From Register4','warp_timer/To Register2','warp_timer/From Register5'"
1242	",'warp_timer/To Register3','warp_timer/timer_control/To Register5','warp_time"
1243	"r/timer_control/From Register2','warp_timer/To Register4'],'mlname'=>['\\'tim"
1244	"er0_countTo\\'','\\'timer0_timeLeft\\'','\\'timer1_countTo\\'','\\'timer1_tim"
1245	"eLeft\\'','\\'timer2_countTo\\'','\\'timer2_timeLeft\\'','\\'timer3_countTo\\"
1246	"'','\\'timer3_timeLeft\\'','\\'timer_control_r\\'','\\'timer_control_w\\'','"
1247	"\\'timer_status\\''],'mlstate'=>[0.00000000000000000,0.00000000000000000,0.00"
1248	"000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0"
1249	".00000000000000000,0.00000000000000000,0.00000000000000000,0.0000000000000000"
1250	"0,0.00000000000000000]}\|{'xmliface'=>'Xilinx//microblaze//iface.xml'}\|[0,0]\|o"
1251	"ff\|\|default\|\|0\|35,24,383,441\|edkprocessor\|2.4\|49,51,-1,-1,white,blue,0,07734,"
1252	"right\|fprintf('','COMMENT: begin icon graphics');\npatch([0 49 49 0 ],[0 0 51"
1253	" 51 ],[0.77 0.82 0.91]);\npatch([11 3 14 3 11 24 28 32 46 35 25 17 27 17 25 3"
1254	"5 46 32 28 24 11 ],[6 14 25 36 44 44 40 44 44 33 43 35 25 15 7 17 6 6 10 6 6 "
1255	"],[0.98 0.96 0.92]);\nplot([0 49 49 0 0 ],[0 0 51 51 0 ]);\nfprintf('','COMME"
1256	"NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf(''"
1257	",'COMMENT: end icon text');\n\|{'table'=>{'AvailableMemories'=>'popup(<empty>)"
1258	"','userSelections'=>{'AvailableMemories'=>'<empty>'}}}\|"
1259	MaskTabNameString ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
1260	System {
1261	Name "EDK Processor"
1262	Location [514, 109, 754, 491]
1263	Open off
1264	ModelBrowserVisibility off
1265	ModelBrowserWidth 200
1266	ScreenColor "white"
1267	PaperOrientation "landscape"
1268	PaperPositionMode "auto"
1269	PaperType "usletter"
1270	PaperUnits "inches"
1271	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
1272	TiledPageScale 1
1273	ShowPageBoundaries off
1274	ZoomFactor "100"
1275	Block {
1276	BlockType Constant
1277	Name "Constant"
1278	Position [40, 100, 60, 120]
1279	}
1280	Block {
1281	BlockType Constant
1282	Name "Constant1"
1283	Position [40, 160, 60, 180]
1284	}
1285	Block {
1286	BlockType Constant
1287	Name "Constant2"
1288	Position [40, 220, 60, 240]
1289	}
1290	Block {
1291	BlockType Constant
1292	Name "Constant3"
1293	Position [40, 280, 60, 300]
1294	}
1295	Block {
1296	BlockType Constant
1297	Name "Constant4"
1298	Position [40, 335, 60, 355]
1299	}
1300	Block {
1301	BlockType Reference
1302	Name "Constant5"
1303	Ports [0, 1]
1304	Position [20, 32, 75, 58]
1305	ShowName off
1306	SourceBlock "xbsIndex_r4/Constant"
1307	SourceType "Xilinx Constant Block Block"
1308	arith_type "Unsigned"
1309	const "0"
1310	n_bits "1"
1311	bin_pt "0"
1312	explicit_period "on"
1313	period "xlGetSimulinkPeriod(gcb)"
1314	dsp48_infoedit "The use of this block for DSP48 instruction"
1315	"s is deprecated. Please use the Opmode block."
1316	equ "P=C"
1317	opselect "C"
1318	inp2 "PCIN>>17"
1319	opr "+"
1320	inp1 "P"
1321	carry "CIN"
1322	dbl_ovrd "off"
1323	has_advanced_control "0"
1324	sggui_pos "-1,-1,-1,-1"
1325	block_type "constant"
1326	block_version "10.1.2"
1327	sg_icon_stat "55,26,1,1,white,blue,0,72d575a1,right"
1328	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1329	"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
1330	"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
1331	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
1332	"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1333	"n icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMME"
1334	"NT: end icon text');\n"
1335	Port {
1336	PortNumber 1
1337	Name "Sl_wait"
1338	RTWStorageClass "Auto"
1339	DataLoggingNameMode "SignalName"
1340	}
1341	}
1342	Block {
1343	BlockType Constant
1344	Name "Constant6"
1345	Position [40, 455, 60, 475]
1346	}
1347	Block {
1348	BlockType Reference
1349	Name "From Register"
1350	Ports [0, 1]
1351	Position [260, 522, 320, 578]
1352	AttributesFormatString "<< %<shared_memory_name> >>"
1353	SourceBlock "xbsIndex_r4/From Register"
1354	SourceType "Xilinx Shared Memory Based From Register Bl"
1355	"ock"
1356	infoedit "Register block that reads data to a shared "
1357	"memory register. Delay of one sample period."
1358	shared_memory_name "'timer0_timeLeft'"
1359	init "0"
1360	period "xlGetSimulinkPeriod(gcb)"
1361	ownership "Owned and initialized elsewhere"
1362	arith_type "Unsigned"
1363	n_bits "32"
1364	bin_pt "0"
1365	dbl_ovrd "off"
1366	xl_use_area "off"
1367	xl_area "[0,0,0,0,0,0,0]"
1368	has_advanced_control "0"
1369	sggui_pos "-1,-1,-1,-1"
1370	block_type "fromreg"
1371	block_version "10.1.2"
1372	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1373	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1374	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
1375	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
1376	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
1377	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
1378	"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
1379	"COMMENT: end icon text');\n"
1380	Port {
1381	PortNumber 1
1382	Name "timer0_timeLeft_dout"
1383	RTWStorageClass "Auto"
1384	DataLoggingNameMode "SignalName"
1385	}
1386	}
1387	Block {
1388	BlockType Reference
1389	Name "From Register1"
1390	Ports [0, 1]
1391	Position [260, 612, 320, 668]
1392	AttributesFormatString "<< %<shared_memory_name> >>"
1393	SourceBlock "xbsIndex_r4/From Register"
1394	SourceType "Xilinx Shared Memory Based From Register Bl"
1395	"ock"
1396	infoedit "Register block that reads data to a shared "
1397	"memory register. Delay of one sample period."
1398	shared_memory_name "'timer1_timeLeft'"
1399	init "0"
1400	period "xlGetSimulinkPeriod(gcb)"
1401	ownership "Owned and initialized elsewhere"
1402	arith_type "Unsigned"
1403	n_bits "32"
1404	bin_pt "0"
1405	dbl_ovrd "off"
1406	xl_use_area "off"
1407	xl_area "[0,0,0,0,0,0,0]"
1408	has_advanced_control "0"
1409	sggui_pos "-1,-1,-1,-1"
1410	block_type "fromreg"
1411	block_version "10.1.2"
1412	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1413	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1414	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
1415	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
1416	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
1417	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
1418	"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
1419	"COMMENT: end icon text');\n"
1420	Port {
1421	PortNumber 1
1422	Name "timer1_timeLeft_dout"
1423	RTWStorageClass "Auto"
1424	DataLoggingNameMode "SignalName"
1425	}
1426	}
1427	Block {
1428	BlockType Reference
1429	Name "From Register2"
1430	Ports [0, 1]
1431	Position [260, 697, 320, 753]
1432	AttributesFormatString "<< %<shared_memory_name> >>"
1433	SourceBlock "xbsIndex_r4/From Register"
1434	SourceType "Xilinx Shared Memory Based From Register Bl"
1435	"ock"
1436	infoedit "Register block that reads data to a shared "
1437	"memory register. Delay of one sample period."
1438	shared_memory_name "'timer2_timeLeft'"
1439	init "0"
1440	period "xlGetSimulinkPeriod(gcb)"
1441	ownership "Owned and initialized elsewhere"
1442	arith_type "Unsigned"
1443	n_bits "32"
1444	bin_pt "0"
1445	dbl_ovrd "off"
1446	xl_use_area "off"
1447	xl_area "[0,0,0,0,0,0,0]"
1448	has_advanced_control "0"
1449	sggui_pos "-1,-1,-1,-1"
1450	block_type "fromreg"
1451	block_version "10.1.2"
1452	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1453	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1454	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
1455	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
1456	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
1457	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
1458	"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
1459	"COMMENT: end icon text');\n"
1460	Port {
1461	PortNumber 1
1462	Name "timer2_timeLeft_dout"
1463	RTWStorageClass "Auto"
1464	DataLoggingNameMode "SignalName"
1465	}
1466	}
1467	Block {
1468	BlockType Reference
1469	Name "From Register3"
1470	Ports [0, 1]
1471	Position [260, 782, 320, 838]
1472	AttributesFormatString "<< %<shared_memory_name> >>"
1473	SourceBlock "xbsIndex_r4/From Register"
1474	SourceType "Xilinx Shared Memory Based From Register Bl"
1475	"ock"
1476	infoedit "Register block that reads data to a shared "
1477	"memory register. Delay of one sample period."
1478	shared_memory_name "'timer3_timeLeft'"
1479	init "0"
1480	period "xlGetSimulinkPeriod(gcb)"
1481	ownership "Owned and initialized elsewhere"
1482	arith_type "Unsigned"
1483	n_bits "32"
1484	bin_pt "0"
1485	dbl_ovrd "off"
1486	xl_use_area "off"
1487	xl_area "[0,0,0,0,0,0,0]"
1488	has_advanced_control "0"
1489	sggui_pos "-1,-1,-1,-1"
1490	block_type "fromreg"
1491	block_version "10.1.2"
1492	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1493	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1494	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
1495	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
1496	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
1497	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
1498	"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
1499	"COMMENT: end icon text');\n"
1500	Port {
1501	PortNumber 1
1502	Name "timer3_timeLeft_dout"
1503	RTWStorageClass "Auto"
1504	DataLoggingNameMode "SignalName"
1505	}
1506	}
1507	Block {
1508	BlockType Reference
1509	Name "From Register4"
1510	Ports [0, 1]
1511	Position [260, 872, 320, 928]
1512	AttributesFormatString "<< %<shared_memory_name> >>"
1513	SourceBlock "xbsIndex_r4/From Register"
1514	SourceType "Xilinx Shared Memory Based From Register Bl"
1515	"ock"
1516	infoedit "Register block that reads data to a shared "
1517	"memory register. Delay of one sample period."
1518	shared_memory_name "'timer_control_r'"
1519	init "0"
1520	period "xlGetSimulinkPeriod(gcb)"
1521	ownership "Owned and initialized elsewhere"
1522	arith_type "Unsigned"
1523	n_bits "32"
1524	bin_pt "0"
1525	dbl_ovrd "off"
1526	xl_use_area "off"
1527	xl_area "[0,0,0,0,0,0,0]"
1528	has_advanced_control "0"
1529	sggui_pos "-1,-1,-1,-1"
1530	block_type "fromreg"
1531	block_version "10.1.2"
1532	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1533	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1534	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
1535	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
1536	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
1537	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
1538	"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
1539	"COMMENT: end icon text');\n"
1540	Port {
1541	PortNumber 1
1542	Name "timer_control_r_dout"
1543	RTWStorageClass "Auto"
1544	DataLoggingNameMode "SignalName"
1545	}
1546	}
1547	Block {
1548	BlockType Reference
1549	Name "From Register5"
1550	Ports [0, 1]
1551	Position [260, 957, 320, 1013]
1552	AttributesFormatString "<< %<shared_memory_name> >>"
1553	SourceBlock "xbsIndex_r4/From Register"
1554	SourceType "Xilinx Shared Memory Based From Register Bl"
1555	"ock"
1556	infoedit "Register block that reads data to a shared "
1557	"memory register. Delay of one sample period."
1558	shared_memory_name "'timer_status'"
1559	init "0"
1560	period "xlGetSimulinkPeriod(gcb)"
1561	ownership "Owned and initialized elsewhere"
1562	arith_type "Unsigned"
1563	n_bits "32"
1564	bin_pt "0"
1565	dbl_ovrd "off"
1566	xl_use_area "off"
1567	xl_area "[0,0,0,0,0,0,0]"
1568	has_advanced_control "0"
1569	sggui_pos "-1,-1,-1,-1"
1570	block_type "fromreg"
1571	block_version "10.1.2"
1572	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1573	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1574	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
1575	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
1576	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
1577	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
1578	"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
1579	"COMMENT: end icon text');\n"
1580	Port {
1581	PortNumber 1
1582	Name "timer_status_dout"
1583	RTWStorageClass "Auto"
1584	DataLoggingNameMode "SignalName"
1585	}
1586	}
1587	Block {
1588	BlockType Reference
1589	Name "PLB_ABus"
1590	Ports [1, 1]
1591	Position [110, 160, 175, 180]
1592	SourceBlock "xbsIndex_r4/Gateway In"
1593	SourceType "Xilinx Gateway In Block"
1594	infoedit "Gateway in block. Converts inputs of type "
1595	"Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Ha"
1596	"rdware notes: In hardware these blocks become top level input ports."
1597	arith_type "Unsigned"
1598	n_bits "32"
1599	bin_pt "0"
1600	quantization "Round (unbiased: +/- Inf)"
1601	overflow "Saturate"
1602	period "xlGetSimulinkPeriod(gcb)"
1603	dbl_ovrd "off"
1604	timing_constraint "None"
1605	locs_specified "off"
1606	LOCs "{}"
1607	xl_use_area "off"
1608	xl_area "[0,0,0,0,0,0,0]"
1609	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1610	"ped_port'=>'PLB_ABus'}},'iopad'=>{'constraint'=>'#'}}"
1611	has_advanced_control "0"
1612	sggui_pos "-1,-1,-1,-1"
1613	block_type "gatewayin"
1614	block_version "10.1.2"
1615	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1616	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1617	"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
1618	"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
1619	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
1620	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1621	"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
1622	"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
1623	"OMMENT: end icon text');\n"
1624	Port {
1625	PortNumber 1
1626	Name "PLB_ABus"
1627	RTWStorageClass "Auto"
1628	DataLoggingNameMode "SignalName"
1629	}
1630	}
1631	Block {
1632	BlockType Reference
1633	Name "PLB_PAValid"
1634	Ports [1, 1]
1635	Position [110, 220, 175, 240]
1636	SourceBlock "xbsIndex_r4/Gateway In"
1637	SourceType "Xilinx Gateway In Block"
1638	infoedit "Gateway in block. Converts inputs of type "
1639	"Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Ha"
1640	"rdware notes: In hardware these blocks become top level input ports."
1641	arith_type "Unsigned"
1642	n_bits "1"
1643	bin_pt "0"
1644	quantization "Round (unbiased: +/- Inf)"
1645	overflow "Saturate"
1646	period "xlGetSimulinkPeriod(gcb)"
1647	dbl_ovrd "off"
1648	timing_constraint "None"
1649	locs_specified "off"
1650	LOCs "{}"
1651	xl_use_area "off"
1652	xl_area "[0,0,0,0,0,0,0]"
1653	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1654	"ped_port'=>'PLB_PAValid'}},'iopad'=>{'constraint'=>'#'}}"
1655	has_advanced_control "0"
1656	sggui_pos "-1,-1,-1,-1"
1657	block_type "gatewayin"
1658	block_version "10.1.2"
1659	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1660	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1661	"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
1662	"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
1663	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
1664	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1665	"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
1666	"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
1667	"OMMENT: end icon text');\n"
1668	Port {
1669	PortNumber 1
1670	Name "PLB_PAValid"
1671	RTWStorageClass "Auto"
1672	DataLoggingNameMode "SignalName"
1673	}
1674	}
1675	Block {
1676	BlockType Reference
1677	Name "PLB_RNW"
1678	Ports [1, 1]
1679	Position [110, 280, 175, 300]
1680	SourceBlock "xbsIndex_r4/Gateway In"
1681	SourceType "Xilinx Gateway In Block"
1682	infoedit "Gateway in block. Converts inputs of type "
1683	"Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Ha"
1684	"rdware notes: In hardware these blocks become top level input ports."
1685	arith_type "Unsigned"
1686	n_bits "1"
1687	bin_pt "0"
1688	quantization "Round (unbiased: +/- Inf)"
1689	overflow "Saturate"
1690	period "xlGetSimulinkPeriod(gcb)"
1691	dbl_ovrd "off"
1692	timing_constraint "None"
1693	locs_specified "off"
1694	LOCs "{}"
1695	xl_use_area "off"
1696	xl_area "[0,0,0,0,0,0,0]"
1697	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1698	"ped_port'=>'PLB_RNW'}},'iopad'=>{'constraint'=>'#'}}"
1699	has_advanced_control "0"
1700	sggui_pos "-1,-1,-1,-1"
1701	block_type "gatewayin"
1702	block_version "10.1.2"
1703	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1704	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1705	"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
1706	"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
1707	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
1708	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1709	"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
1710	"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
1711	"OMMENT: end icon text');\n"
1712	Port {
1713	PortNumber 1
1714	Name "PLB_RNW"
1715	RTWStorageClass "Auto"
1716	DataLoggingNameMode "SignalName"
1717	}
1718	}
1719	Block {
1720	BlockType Reference
1721	Name "PLB_wrDBus"
1722	Ports [1, 1]
1723	Position [110, 335, 175, 355]
1724	SourceBlock "xbsIndex_r4/Gateway In"
1725	SourceType "Xilinx Gateway In Block"
1726	infoedit "Gateway in block. Converts inputs of type "
1727	"Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Ha"
1728	"rdware notes: In hardware these blocks become top level input ports."
1729	arith_type "Unsigned"
1730	n_bits "32"
1731	bin_pt "0"
1732	quantization "Round (unbiased: +/- Inf)"
1733	overflow "Saturate"
1734	period "xlGetSimulinkPeriod(gcb)"
1735	dbl_ovrd "off"
1736	timing_constraint "None"
1737	locs_specified "off"
1738	LOCs "{}"
1739	xl_use_area "off"
1740	xl_area "[0,0,0,0,0,0,0]"
1741	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1742	"ped_port'=>'PLB_wrDBus'}},'iopad'=>{'constraint'=>'#'}}"
1743	has_advanced_control "0"
1744	sggui_pos "-1,-1,-1,-1"
1745	block_type "gatewayin"
1746	block_version "10.1.2"
1747	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1748	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1749	"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
1750	"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
1751	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
1752	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1753	"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
1754	"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
1755	"OMMENT: end icon text');\n"
1756	Port {
1757	PortNumber 1
1758	Name "PLB_wrDBus"
1759	RTWStorageClass "Auto"
1760	DataLoggingNameMode "SignalName"
1761	}
1762	}
1763	Block {
1764	BlockType Reference
1765	Name "SPLB_Rst"
1766	Ports [1, 1]
1767	Position [110, 100, 175, 120]
1768	SourceBlock "xbsIndex_r4/Gateway In"
1769	SourceType "Xilinx Gateway In Block"
1770	infoedit "Gateway in block. Converts inputs of type "
1771	"Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Ha"
1772	"rdware notes: In hardware these blocks become top level input ports."
1773	arith_type "Unsigned"
1774	n_bits "1"
1775	bin_pt "0"
1776	quantization "Round (unbiased: +/- Inf)"
1777	overflow "Saturate"
1778	period "xlGetSimulinkPeriod(gcb)"
1779	dbl_ovrd "off"
1780	timing_constraint "None"
1781	locs_specified "off"
1782	LOCs "{}"
1783	xl_use_area "off"
1784	xl_area "[0,0,0,0,0,0,0]"
1785	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1786	"ped_port'=>'SPLB_Rst'}},'iopad'=>{'constraint'=>'#'}}"
1787	has_advanced_control "0"
1788	sggui_pos "-1,-1,-1,-1"
1789	block_type "gatewayin"
1790	block_version "10.1.2"
1791	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1792	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1793	"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
1794	"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
1795	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
1796	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1797	"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
1798	"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
1799	"OMMENT: end icon text');\n"
1800	Port {
1801	PortNumber 1
1802	Name "SPLB_Rst"
1803	RTWStorageClass "Auto"
1804	DataLoggingNameMode "SignalName"
1805	}
1806	}
1807	Block {
1808	BlockType Reference
1809	Name "Sl_addrAck"
1810	Ports [1, 1]
1811	Position [460, 135, 520, 155]
1812	SourceBlock "xbsIndex_r4/Gateway Out"
1813	SourceType "Xilinx Gateway Out Block"
1814	infoedit "Gateway out block. Converts Xilinx fixed p"
1815	"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
1816	"P>Hardware notes: In hardware these blocks become top level output ports or "
1817	"are discarded, depending on how they are configured."
1818	hdl_port "on"
1819	timing_constraint "None"
1820	locs_specified "off"
1821	LOCs "{}"
1822	xl_use_area "off"
1823	xl_area "[0,0,0,0,0,0,0]"
1824	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1825	"ped_port'=>'Sl_addrAck'}},'iopad'=>{'constraint'=>'#'}}"
1826	has_advanced_control "0"
1827	sggui_pos "-1,-1,-1,-1"
1828	block_type "gatewayout"
1829	block_version "10.1.2"
1830	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1831	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1832	"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
1833	"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
1834	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
1835	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1836	"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
1837	"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
1838	"COMMENT: end icon text');\n"
1839	}
1840	Block {
1841	BlockType Reference
1842	Name "Sl_rdComp"
1843	Ports [1, 1]
1844	Position [460, 185, 520, 205]
1845	SourceBlock "xbsIndex_r4/Gateway Out"
1846	SourceType "Xilinx Gateway Out Block"
1847	infoedit "Gateway out block. Converts Xilinx fixed p"
1848	"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
1849	"P>Hardware notes: In hardware these blocks become top level output ports or "
1850	"are discarded, depending on how they are configured."
1851	hdl_port "on"
1852	timing_constraint "None"
1853	locs_specified "off"
1854	LOCs "{}"
1855	xl_use_area "off"
1856	xl_area "[0,0,0,0,0,0,0]"
1857	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1858	"ped_port'=>'Sl_rdComp'}},'iopad'=>{'constraint'=>'#'}}"
1859	has_advanced_control "0"
1860	sggui_pos "-1,-1,-1,-1"
1861	block_type "gatewayout"
1862	block_version "10.1.2"
1863	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1864	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1865	"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
1866	"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
1867	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
1868	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1869	"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
1870	"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
1871	"COMMENT: end icon text');\n"
1872	}
1873	Block {
1874	BlockType Reference
1875	Name "Sl_rdDAck"
1876	Ports [1, 1]
1877	Position [460, 350, 520, 370]
1878	SourceBlock "xbsIndex_r4/Gateway Out"
1879	SourceType "Xilinx Gateway Out Block"
1880	infoedit "Gateway out block. Converts Xilinx fixed p"
1881	"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
1882	"P>Hardware notes: In hardware these blocks become top level output ports or "
1883	"are discarded, depending on how they are configured."
1884	hdl_port "on"
1885	timing_constraint "None"
1886	locs_specified "off"
1887	LOCs "{}"
1888	xl_use_area "off"
1889	xl_area "[0,0,0,0,0,0,0]"
1890	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1891	"ped_port'=>'Sl_rdDAck'}},'iopad'=>{'constraint'=>'#'}}"
1892	has_advanced_control "0"
1893	sggui_pos "-1,-1,-1,-1"
1894	block_type "gatewayout"
1895	block_version "10.1.2"
1896	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1897	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1898	"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
1899	"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
1900	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
1901	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1902	"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
1903	"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
1904	"COMMENT: end icon text');\n"
1905	}
1906	Block {
1907	BlockType Reference
1908	Name "Sl_rdDBus"
1909	Ports [1, 1]
1910	Position [460, 410, 520, 430]
1911	SourceBlock "xbsIndex_r4/Gateway Out"
1912	SourceType "Xilinx Gateway Out Block"
1913	infoedit "Gateway out block. Converts Xilinx fixed p"
1914	"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
1915	"P>Hardware notes: In hardware these blocks become top level output ports or "
1916	"are discarded, depending on how they are configured."
1917	hdl_port "on"
1918	timing_constraint "None"
1919	locs_specified "off"
1920	LOCs "{}"
1921	xl_use_area "off"
1922	xl_area "[0,0,0,0,0,0,0]"
1923	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1924	"ped_port'=>'Sl_rdDBus'}},'iopad'=>{'constraint'=>'#'}}"
1925	has_advanced_control "0"
1926	sggui_pos "-1,-1,-1,-1"
1927	block_type "gatewayout"
1928	block_version "10.1.2"
1929	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1930	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1931	"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
1932	"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
1933	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
1934	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1935	"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
1936	"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
1937	"COMMENT: end icon text');\n"
1938	}
1939	Block {
1940	BlockType Reference
1941	Name "Sl_wait"
1942	Ports [1, 1]
1943	Position [110, 30, 170, 50]
1944	SourceBlock "xbsIndex_r4/Gateway Out"
1945	SourceType "Xilinx Gateway Out Block"
1946	infoedit "Gateway out block. Converts Xilinx fixed p"
1947	"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
1948	"P>Hardware notes: In hardware these blocks become top level output ports or "
1949	"are discarded, depending on how they are configured."
1950	hdl_port "on"
1951	timing_constraint "None"
1952	locs_specified "off"
1953	LOCs "{}"
1954	xl_use_area "off"
1955	xl_area "[0,0,0,0,0,0,0]"
1956	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1957	"ped_port'=>'Sl_wait'}},'iopad'=>{'constraint'=>'#'}}"
1958	has_advanced_control "0"
1959	sggui_pos "-1,-1,-1,-1"
1960	block_type "gatewayout"
1961	block_version "10.1.2"
1962	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1963	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1964	"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
1965	"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
1966	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
1967	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
1968	"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
1969	"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
1970	"COMMENT: end icon text');\n"
1971	}
1972	Block {
1973	BlockType Reference
1974	Name "Sl_wrComp"
1975	Ports [1, 1]
1976	Position [460, 285, 520, 305]
1977	SourceBlock "xbsIndex_r4/Gateway Out"
1978	SourceType "Xilinx Gateway Out Block"
1979	infoedit "Gateway out block. Converts Xilinx fixed p"
1980	"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
1981	"P>Hardware notes: In hardware these blocks become top level output ports or "
1982	"are discarded, depending on how they are configured."
1983	hdl_port "on"
1984	timing_constraint "None"
1985	locs_specified "off"
1986	LOCs "{}"
1987	xl_use_area "off"
1988	xl_area "[0,0,0,0,0,0,0]"
1989	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
1990	"ped_port'=>'Sl_wrComp'}},'iopad'=>{'constraint'=>'#'}}"
1991	has_advanced_control "0"
1992	sggui_pos "-1,-1,-1,-1"
1993	block_type "gatewayout"
1994	block_version "10.1.2"
1995	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1996	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
1997	"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
1998	"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
1999	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
2000	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
2001	"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
2002	"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
2003	"COMMENT: end icon text');\n"
2004	}
2005	Block {
2006	BlockType Reference
2007	Name "Sl_wrDAck"
2008	Ports [1, 1]
2009	Position [460, 235, 520, 255]
2010	SourceBlock "xbsIndex_r4/Gateway Out"
2011	SourceType "Xilinx Gateway Out Block"
2012	infoedit "Gateway out block. Converts Xilinx fixed p"
2013	"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
2014	"P>Hardware notes: In hardware these blocks become top level output ports or "
2015	"are discarded, depending on how they are configured."
2016	hdl_port "on"
2017	timing_constraint "None"
2018	locs_specified "off"
2019	LOCs "{}"
2020	xl_use_area "off"
2021	xl_area "[0,0,0,0,0,0,0]"
2022	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
2023	"ped_port'=>'Sl_wrDAck'}},'iopad'=>{'constraint'=>'#'}}"
2024	has_advanced_control "0"
2025	sggui_pos "-1,-1,-1,-1"
2026	block_type "gatewayout"
2027	block_version "10.1.2"
2028	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
2029	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2030	"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
2031	"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
2032	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
2033	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
2034	"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
2035	"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
2036	"COMMENT: end icon text');\n"
2037	}
2038	Block {
2039	BlockType Terminator
2040	Name "Terminator"
2041	Position [630, 135, 650, 155]
2042	ShowName off
2043	}
2044	Block {
2045	BlockType Terminator
2046	Name "Terminator1"
2047	Position [630, 185, 650, 205]
2048	ShowName off
2049	}
2050	Block {
2051	BlockType Terminator
2052	Name "Terminator2"
2053	Position [630, 350, 650, 370]
2054	ShowName off
2055	}
2056	Block {
2057	BlockType Terminator
2058	Name "Terminator3"
2059	Position [630, 400, 650, 420]
2060	ShowName off
2061	}
2062	Block {
2063	BlockType Terminator
2064	Name "Terminator4"
2065	Position [280, 30, 300, 50]
2066	ShowName off
2067	}
2068	Block {
2069	BlockType Terminator
2070	Name "Terminator5"
2071	Position [630, 235, 650, 255]
2072	ShowName off
2073	}
2074	Block {
2075	BlockType Terminator
2076	Name "Terminator6"
2077	Position [630, 285, 650, 305]
2078	ShowName off
2079	}
2080	Block {
2081	BlockType Reference
2082	Name "To Register"
2083	Ports [2, 1]
2084	Position [610, 452, 670, 508]
2085	AttributesFormatString "<< %<shared_memory_name> >>"
2086	SourceBlock "xbsIndex_r4/To Register"
2087	SourceType "Xilinx Shared Memory Based To Register Bloc"
2088	"k"
2089	infoedit "Register block that writes data to a shared"
2090	" memory register. Delay of one sample period."
2091	shared_memory_name "'timer0_countTo'"
2092	init "0"
2093	ownership "Owned and initialized elsewhere"
2094	explicit_data_type "on"
2095	arith_type "Unsigned"
2096	n_bits "32"
2097	bin_pt "0"
2098	dbl_ovrd "off"
2099	xl_use_area "off"
2100	xl_area "[0,0,0,0,0,0,0]"
2101	has_advanced_control "0"
2102	sggui_pos "-1,-1,-1,-1"
2103	block_type "toreg"
2104	block_version "10.1.2"
2105	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2106	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2107	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
2108	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
2109	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
2110	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
2111	"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
2112	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
2113	"fprintf('','COMMENT: end icon text');\n"
2114	Port {
2115	PortNumber 1
2116	Name "timer0_countTo_dout"
2117	RTWStorageClass "Auto"
2118	DataLoggingNameMode "SignalName"
2119	}
2120	}
2121	Block {
2122	BlockType Reference
2123	Name "To Register1"
2124	Ports [2, 1]
2125	Position [610, 537, 670, 593]
2126	AttributesFormatString "<< %<shared_memory_name> >>"
2127	SourceBlock "xbsIndex_r4/To Register"
2128	SourceType "Xilinx Shared Memory Based To Register Bloc"
2129	"k"
2130	infoedit "Register block that writes data to a shared"
2131	" memory register. Delay of one sample period."
2132	shared_memory_name "'timer1_countTo'"
2133	init "0"
2134	ownership "Owned and initialized elsewhere"
2135	explicit_data_type "on"
2136	arith_type "Unsigned"
2137	n_bits "32"
2138	bin_pt "0"
2139	dbl_ovrd "off"
2140	xl_use_area "off"
2141	xl_area "[0,0,0,0,0,0,0]"
2142	has_advanced_control "0"
2143	sggui_pos "-1,-1,-1,-1"
2144	block_type "toreg"
2145	block_version "10.1.2"
2146	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2147	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2148	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
2149	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
2150	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
2151	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
2152	"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
2153	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
2154	"fprintf('','COMMENT: end icon text');\n"
2155	Port {
2156	PortNumber 1
2157	Name "timer1_countTo_dout"
2158	RTWStorageClass "Auto"
2159	DataLoggingNameMode "SignalName"
2160	}
2161	}
2162	Block {
2163	BlockType Reference
2164	Name "To Register2"
2165	Ports [2, 1]
2166	Position [610, 627, 670, 683]
2167	AttributesFormatString "<< %<shared_memory_name> >>"
2168	SourceBlock "xbsIndex_r4/To Register"
2169	SourceType "Xilinx Shared Memory Based To Register Bloc"
2170	"k"
2171	infoedit "Register block that writes data to a shared"
2172	" memory register. Delay of one sample period."
2173	shared_memory_name "'timer2_countTo'"
2174	init "0"
2175	ownership "Owned and initialized elsewhere"
2176	explicit_data_type "on"
2177	arith_type "Unsigned"
2178	n_bits "32"
2179	bin_pt "0"
2180	dbl_ovrd "off"
2181	xl_use_area "off"
2182	xl_area "[0,0,0,0,0,0,0]"
2183	has_advanced_control "0"
2184	sggui_pos "-1,-1,-1,-1"
2185	block_type "toreg"
2186	block_version "10.1.2"
2187	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2188	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2189	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
2190	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
2191	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
2192	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
2193	"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
2194	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
2195	"fprintf('','COMMENT: end icon text');\n"
2196	Port {
2197	PortNumber 1
2198	Name "timer2_countTo_dout"
2199	RTWStorageClass "Auto"
2200	DataLoggingNameMode "SignalName"
2201	}
2202	}
2203	Block {
2204	BlockType Reference
2205	Name "To Register3"
2206	Ports [2, 1]
2207	Position [610, 712, 670, 768]
2208	AttributesFormatString "<< %<shared_memory_name> >>"
2209	SourceBlock "xbsIndex_r4/To Register"
2210	SourceType "Xilinx Shared Memory Based To Register Bloc"
2211	"k"
2212	infoedit "Register block that writes data to a shared"
2213	" memory register. Delay of one sample period."
2214	shared_memory_name "'timer3_countTo'"
2215	init "0"
2216	ownership "Owned and initialized elsewhere"
2217	explicit_data_type "on"
2218	arith_type "Unsigned"
2219	n_bits "32"
2220	bin_pt "0"
2221	dbl_ovrd "off"
2222	xl_use_area "off"
2223	xl_area "[0,0,0,0,0,0,0]"
2224	has_advanced_control "0"
2225	sggui_pos "-1,-1,-1,-1"
2226	block_type "toreg"
2227	block_version "10.1.2"
2228	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2229	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2230	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
2231	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
2232	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
2233	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
2234	"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
2235	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
2236	"fprintf('','COMMENT: end icon text');\n"
2237	Port {
2238	PortNumber 1
2239	Name "timer3_countTo_dout"
2240	RTWStorageClass "Auto"
2241	DataLoggingNameMode "SignalName"
2242	}
2243	}
2244	Block {
2245	BlockType Reference
2246	Name "To Register4"
2247	Ports [2, 1]
2248	Position [610, 797, 670, 853]
2249	AttributesFormatString "<< %<shared_memory_name> >>"
2250	SourceBlock "xbsIndex_r4/To Register"
2251	SourceType "Xilinx Shared Memory Based To Register Bloc"
2252	"k"
2253	infoedit "Register block that writes data to a shared"
2254	" memory register. Delay of one sample period."
2255	shared_memory_name "'timer_control_w'"
2256	init "0"
2257	ownership "Owned and initialized elsewhere"
2258	explicit_data_type "on"
2259	arith_type "Unsigned"
2260	n_bits "32"
2261	bin_pt "0"
2262	dbl_ovrd "off"
2263	xl_use_area "off"
2264	xl_area "[0,0,0,0,0,0,0]"
2265	has_advanced_control "0"
2266	sggui_pos "-1,-1,-1,-1"
2267	block_type "toreg"
2268	block_version "10.1.2"
2269	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2270	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2271	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
2272	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
2273	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
2274	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
2275	"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
2276	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
2277	"fprintf('','COMMENT: end icon text');\n"
2278	Port {
2279	PortNumber 1
2280	Name "timer_control_w_dout"
2281	RTWStorageClass "Auto"
2282	DataLoggingNameMode "SignalName"
2283	}
2284	}
2285	Block {
2286	BlockType Reference
2287	Name "plb_decode"
2288	Ports [7, 9]
2289	Position [205, 84, 375, 496]
2290	SourceBlock "xbsIndex_r4/MCode"
2291	SourceType "Xilinx MCode Block Block"
2292	infoedit "Pass input values to a MATLAB function for "
2293	"evaluation in Xilinx fixed-point type. The input ports of the block are input"
2294	" arguments of the function. The output ports of the block are output argument"
2295	"s of the function."
2296	mfname "xlmax"
2297	explicit_period "off"
2298	period "1"
2299	dbl_ovrd "off"
2300	enable_stdout "off"
2301	enable_debug "off"
2302	xl_use_area "off"
2303	xl_area "[0,0,0,0,0,0,0]"
2304	mfilecontent "function [wrDBusReg, addrAck, rdComp, wrDAc"
2305	"k, bankAddr, RNWReg, rdDAck, rdDBus, linearAddr] = ...\n plb_bus_decode(pl"
2306	"bRst, plbABus, plbPAValid, plbRNW, plbWrDBus, rdData, addrPref)\n\n% constant"
2307	" variables (TODO: should pass from outside)\nADDRPREF_LEN = 20;\nBANKADDR_LEN"
2308	" = 2;\nLINEARADDR_LEN = 8;\nABUS_LEN = 32;\nDBUS_LEN = 32;\n\n% declare and i"
2309	"nitialize persistent variables\n% register input bus signals\npersistent plbR"
2310	"stReg_, plbRstReg_ = xl_state(0, {xlBoolean});\npersistent plbABusReg_, plbAB"
2311	"usReg_ = xl_state(0, {xlUnsigned, ABUS_LEN, 0});\npersistent plbPAValidReg_, "
2312	"plbPAValidReg_ = xl_state(0, {xlBoolean});\npersistent plbRNWReg_, plbRNWReg_"
2313	" = xl_state(0, {xlUnsigned, 1, 0});\npersistent plbWrDBusReg_, plbWrDBusReg_ "
2314	"= xl_state(0, {xlUnsigned, DBUS_LEN, 0});\n\n% ===== rest of the outputs ===="
2315	"=\n\nbankAddr = xl_slice(plbABusReg_, 2+BANKADDR_LEN+LINEARADDR_LEN-1, 2+LI"
2316	"NEARADDR_LEN);\nlinearAddr = xl_slice(plbABusReg_, 2+LINEARADDR_LEN-1, 2);\nR"
2317	"NWReg = plbRNWReg_;\nwrDBusReg = plbWrDBusReg_;\n\n% ===== p_select =====\n\n"
2318	"% register PAValid\npersistent aValidReg, aValidReg = xl_state(0, {xlBoolean}"
2319	");\naValidReg = plbPAValidReg_;\n\n% extract and register the address prefix"
2320	"\naddrPref_in = xl_slice(plbABusReg_, xl_nbits(plbABusReg_)-1, xl_nbits(plbAB"
2321	"usReg_)-ADDRPREF_LEN);\nif addrPref_in == addrPref\n ps1 = true;\nelse \n "
2322	" ps1 = false;\nend \n\npersistent ps1Reg, ps1Reg = xl_state(0, ps1);\nps1Re"
2323	"g = ps1;\n\nps = xl_and(ps1Reg, aValidReg);\n\n% ===== addrAck =====\n\n% reg"
2324	"ister ps\npersistent psReg, psReg = xl_state(0, ps);\n\naddrAck = xfix({xlUns"
2325	"igned, 1, 0}, xl_and(xl_not(plbRstReg_), ps, xl_not(psReg)));\n\npsReg = ps;"
2326	"\n\n% ===== rdComp, rd/wr DAck =====\n \nrdComp1 = xfix({xlUnsigned, 1, 0}, x"
2327	"l_and(addrAck, RNWReg));\n\nNUM_rdCompDelay = 3;\npersistent rdCompDelay, rdC"
2328	"ompDelay = xl_state(zeros(1, NUM_rdCompDelay), rdComp1, NUM_rdCompDelay);\nrd"
2329	"Comp2 = rdCompDelay.back;\nrdCompDelay.push_front_pop_back(rdComp1);\n\npersi"
2330	"stent rdCompReg, rdCompReg = xl_state(0, rdComp1);\nrdComp = rdCompReg;\nrdCo"
2331	"mpReg = rdComp2;\n\npersistent rdDAckReg, rdDAckReg = xl_state(0, rdComp1);\n"
2332	"rdDAck = rdDAckReg;\nrdDAckReg = rdComp;\n\npersistent wrDAckReg, wrDAckReg ="
2333	" xl_state(0, addrAck);\nwrDAck = wrDAckReg;\nwrDAckReg = xl_and(addrAck, xl_n"
2334	"ot(RNWReg));\n\n% ===== rdDBus =====\n\nrdSel = xl_or(rdComp2, rdComp);\n\nif"
2335	" rdSel == 1\n rdDBus1 = rdData;\nelse\n rdDBus1 = 0;\nend % if\n\npersi"
2336	"stent rdDBusReg, rdDBusReg = xl_state(0, rdDBus1);\nrdDBus = rdDBusReg;\nrdDB"
2337	"usReg = rdDBus1;\n\n% rdDBus = xl_concat(rdDBus32, rdDBus32);\n% rdDBus = rdD"
2338	"Bus32;\n\n% ===== update the persistent variables =====\n\nplbRstReg_ = plbRs"
2339	"t;\nplbABusReg_ = plbABus;\nplbPAValidReg_ = plbPAValid;\nplbRNWReg_ = plbRNW"
2340	";\nplbWrDBusReg_ = xl_slice(plbWrDBus, DBUS_LEN-1, 0);\n"
2341	suppress_output "1"
2342	defparams "{}"
2343	hide_port_list "{}"
2344	has_advanced_control "0"
2345	sggui_pos "-1,-1,-1,-1"
2346	block_type "mcode"
2347	block_version "10.1.2"
2348	sg_icon_stat "170,412,1,1,white,blue,0,8b15b975,right"
2349	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2350	"\npatch([0 170 170 0 ],[0 0 412 412 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 "
2351	"40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[139 167 207 247 2"
2352	"75 275 263 275 275 237 273 247 207 167 141 177 139 139 151 139 139 ],[0.98 0."
2353	"96 0.92]);\nplot([0 170 170 0 0 ],[0 0 412 412 0 ]);\nfprintf('','COMMENT: en"
2354	"d icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');p"
2355	"ort_label('input',1,'plbRst');\ncolor('black');port_label('input',2,'plbABus'"
2356	");\ncolor('black');port_label('input',3,'plbPAValid');\ncolor('black');port_l"
2357	"abel('input',4,'plbRNW');\ncolor('black');port_label('input',5,'plbWrDBus');"
2358	"\ncolor('black');port_label('input',6,'rdData');\ncolor('black');port_label('"
2359	"input',7,'addrPref');\ncolor('black');port_label('output',1,'wrDBusReg');\nco"
2360	"lor('black');port_label('output',2,'addrAck');\ncolor('black');port_label('ou"
2361	"tput',3,'rdComp');\ncolor('black');port_label('output',4,'wrDAck');\ncolor('b"
2362	"lack');port_label('output',5,'bankAddr');\ncolor('black');port_label('output'"
2363	",6,'RNWReg');\ncolor('black');port_label('output',7,'rdDAck');\ncolor('black'"
2364	");port_label('output',8,'rdDBus');\ncolor('black');port_label('output',9,'lin"
2365	"earAddr');\ncolor('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','C"
2366	"OMMENT: end icon text');\n"
2367	Port {
2368	PortNumber 1
2369	Name "wrDBusReg"
2370	RTWStorageClass "Auto"
2371	DataLoggingNameMode "SignalName"
2372	}
2373	Port {
2374	PortNumber 2
2375	Name "Sl_addrAck"
2376	RTWStorageClass "Auto"
2377	DataLoggingNameMode "SignalName"
2378	}
2379	Port {
2380	PortNumber 3
2381	Name "Sl_rdComp"
2382	RTWStorageClass "Auto"
2383	DataLoggingNameMode "SignalName"
2384	}
2385	Port {
2386	PortNumber 4
2387	Name "Sl_wrDAck"
2388	RTWStorageClass "Auto"
2389	DataLoggingNameMode "SignalName"
2390	}
2391	Port {
2392	PortNumber 5
2393	Name "bankAddr"
2394	RTWStorageClass "Auto"
2395	DataLoggingNameMode "SignalName"
2396	}
2397	Port {
2398	PortNumber 6
2399	Name "RNWReg"
2400	RTWStorageClass "Auto"
2401	DataLoggingNameMode "SignalName"
2402	}
2403	Port {
2404	PortNumber 7
2405	Name "Sl_rdDAck"
2406	RTWStorageClass "Auto"
2407	DataLoggingNameMode "SignalName"
2408	}
2409	Port {
2410	PortNumber 8
2411	Name "Sl_rdDBus"
2412	RTWStorageClass "Auto"
2413	DataLoggingNameMode "SignalName"
2414	}
2415	Port {
2416	PortNumber 9
2417	Name "linearAddr"
2418	RTWStorageClass "Auto"
2419	DataLoggingNameMode "SignalName"
2420	}
2421	}
2422	Block {
2423	BlockType Reference
2424	Name "plb_memmap"
2425	Ports [16, 11]
2426	Position [405, 477, 575, 728]
2427	SourceBlock "xbsIndex_r4/MCode"
2428	SourceType "Xilinx MCode Block Block"
2429	infoedit "Pass input values to a MATLAB function for "
2430	"evaluation in Xilinx fixed-point type. The input ports of the block are input"
2431	" arguments of the function. The output ports of the block are output argument"
2432	"s of the function."
2433	mfname "xlmax"
2434	explicit_period "off"
2435	period "1"
2436	dbl_ovrd "off"
2437	enable_stdout "off"
2438	enable_debug "off"
2439	xl_use_area "off"
2440	xl_area "[0,0,0,0,0,0,0]"
2441	mfilecontent "function [read_bank_out, sm_timer0_countTo_"
2442	"din, sm_timer0_countTo_en, sm_timer1_countTo_din, sm_timer1_countTo_en, sm_ti"
2443	"mer2_countTo_din, sm_timer2_countTo_en, sm_timer3_countTo_din, sm_timer3_coun"
2444	"tTo_en, sm_timer_control_w_din, sm_timer_control_w_en] = plb_memmap_select(wr"
2445	"DBus, bankAddr, linearAddr, RNWReg, addrAck, sm_timer0_timeLeft, sm_timer1_ti"
2446	"meLeft, sm_timer2_timeLeft, sm_timer3_timeLeft, sm_timer_control_r, sm_timer_"
2447	"status, sm_timer0_countTo, sm_timer1_countTo, sm_timer2_countTo, sm_timer3_co"
2448	"untTo, sm_timer_control_w)\n\n\n% connvert the input data to UFix_32_0 (the b"
2449	"us data type)\n% 'From Register' blocks\n% sm_timer0_timeLeft_bus = xfix({xlU"
2450	"nsigned, 32, 0}, 0);\nsm_timer0_timeLeft_bus = xl_force(sm_timer0_timeLeft, x"
2451	"lUnsigned, 0);\n\n% sm_timer1_timeLeft_bus = xfix({xlUnsigned, 32, 0}, 0);\ns"
2452	"m_timer1_timeLeft_bus = xl_force(sm_timer1_timeLeft, xlUnsigned, 0);\n\n% sm_"
2453	"timer2_timeLeft_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer2_timeLeft_bus ="
2454	" xl_force(sm_timer2_timeLeft, xlUnsigned, 0);\n\n% sm_timer3_timeLeft_bus = x"
2455	"fix({xlUnsigned, 32, 0}, 0);\nsm_timer3_timeLeft_bus = xl_force(sm_timer3_tim"
2456	"eLeft, xlUnsigned, 0);\n\n% sm_timer_control_r_bus = xfix({xlUnsigned, 32, 0}"
2457	", 0);\nsm_timer_control_r_bus = xl_force(sm_timer_control_r, xlUnsigned, 0);"
2458	"\n\n% sm_timer_status_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer_status_bu"
2459	"s = xl_force(sm_timer_status, xlUnsigned, 0);\n\n% 'To Register' blocks\n% sm"
2460	"_timer0_countTo_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer0_countTo_dout "
2461	"= xl_force(sm_timer0_countTo, xlUnsigned, 0);\n\n% sm_timer1_countTo_dout = x"
2462	"fix({xlUnsigned, 32, 0}, 0);\nsm_timer1_countTo_dout = xl_force(sm_timer1_cou"
2463	"ntTo, xlUnsigned, 0);\n\n% sm_timer2_countTo_dout = xfix({xlUnsigned, 32, 0},"
2464	" 0);\nsm_timer2_countTo_dout = xl_force(sm_timer2_countTo, xlUnsigned, 0);\n"
2465	"\n% sm_timer3_countTo_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer3_countTo"
2466	"_dout = xl_force(sm_timer3_countTo, xlUnsigned, 0);\n\n% sm_timer_control_w_d"
2467	"out = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer_control_w_dout = xl_force(sm_ti"
2468	"mer_control_w, xlUnsigned, 0);\n\n% 'From FIFO' blocks\n% 'To FIFO' blocks\n%"
2469	" 'Shared Memory' blocks\n\n% 'dout' ports of 'From Register' blocks\n\n% regi"
2470	"stered register mux output\npersistent reg_bank_out_reg; reg_bank_out_reg = x"
2471	"l_state(0, {xlUnsigned, 32, 0});\nreg_bank_out = reg_bank_out_reg;\n\nif line"
2472	"arAddr == 5\n reg_bank_out_reg = sm_timer0_timeLeft_bus;\nelseif linearAdd"
2473	"r == 6\n reg_bank_out_reg = sm_timer1_timeLeft_bus;\nelseif linearAddr == "
2474	"7\n reg_bank_out_reg = sm_timer2_timeLeft_bus;\nelseif linearAddr == 8\n "
2475	" reg_bank_out_reg = sm_timer3_timeLeft_bus;\nelseif linearAddr == 9\n reg"
2476	"_bank_out_reg = sm_timer_control_r_bus;\nelseif linearAddr == 10\n reg_ban"
2477	"k_out_reg = sm_timer_status_bus;\nelseif linearAddr == 0\n reg_bank_out_re"
2478	"g = sm_timer0_countTo_dout;\nelseif linearAddr == 1\n reg_bank_out_reg = s"
2479	"m_timer1_countTo_dout;\nelseif linearAddr == 2\n reg_bank_out_reg = sm_tim"
2480	"er2_countTo_dout;\nelseif linearAddr == 3\n reg_bank_out_reg = sm_timer3_c"
2481	"ountTo_dout;\nelseif linearAddr == 4\n reg_bank_out_reg = sm_timer_control"
2482	"_w_dout;\nend\n\n\n% 'From FIFO' and 'To FIFO' blocks\n\n\n\n\n\nopCode = xl_"
2483	"concat(addrAck, RNWReg, bankAddr, linearAddr);\n\n% 'Shared Memory' blocks\n"
2484	"\n\n\n\n\n% 'din' ports of 'Shared Memory' blocks\n\n\n% 'we' ports of 'Share"
2485	"d Memory' blocks\n\n\n% 'addr' ports of 'Shared Memory' blocks\n\n\n% 're' po"
2486	"rts of 'From FIFO' blocks\n\n\n% 'en' ports of 'To Register' blocks\nif opCod"
2487	"e == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix"
2488	"({xlUnsigned, xl_nbits(linearAddr), 0}, 0))\n sm_timer0_countTo_en = true;"
2489	"\nelse\n sm_timer0_countTo_en = false;\nend\nif opCode == xl_concat(xfix({"
2490	"xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbit"
2491	"s(linearAddr), 0}, 1))\n sm_timer1_countTo_en = true;\nelse\n sm_timer1"
2492	"_countTo_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10"
2493	"), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 2)"
2494	")\n sm_timer2_countTo_en = true;\nelse\n sm_timer2_countTo_en = false;"
2495	"\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n "
2496	" xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 3))\n sm_timer3_cou"
2497	"ntTo_en = true;\nelse\n sm_timer3_countTo_en = false;\nend\nif opCode == x"
2498	"l_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUn"
2499	"signed, xl_nbits(linearAddr), 0}, 4))\n sm_timer_control_w_en = true;\nels"
2500	"e\n sm_timer_control_w_en = false;\nend\n\n\n% 'din' ports of 'To FIFO' bl"
2501	"ocks\n\n\n% 'we' ports of 'To FIFO' blocks\n\n\n% 'din' ports of 'To Register"
2502	"' blocks\nsm_timer0_countTo_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n"
2503	" xlUnsigned, ...\n "
2504	" 0);\nsm_timer1_countTo_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ..."
2505	"\n xlUnsigned, ...\n "
2506	" 0);\nsm_timer2_countTo_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), .."
2507	".\n xlUnsigned, ...\n "
2508	" 0);\nsm_timer3_countTo_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ."
2509	"..\n xlUnsigned, ...\n "
2510	" 0);\nsm_timer_control_w_din = xl_force(xl_slice(wrDBus, 32 - 1, 0),"
2511	" ...\n xlUnsigned, ...\n "
2512	" 0);\n\n\npersistent read_bank_out_reg; read_bank_out_reg = xl_sta"
2513	"te(0, {xlUnsigned, 32, 0});\nread_bank_out = read_bank_out_reg;\n\npersistent"
2514	" bankAddr_reg; bankAddr_reg = xl_state(0, bankAddr);\n\nif bankAddr_reg == 0"
2515	"\n % Bank 0: Shared Memories\n read_bank_out_reg = 0;\nelseif bankAddr_"
2516	"reg == 1\n % Bank 1: From/To FIFOs\n read_bank_out_reg = 0;\nelseif ba"
2517	"nkAddr_reg == 2\n % Bank 1: From/To Registers\n read_bank_out_reg = reg"
2518	"_bank_out;\nelseif bankAddr_reg == 3\n % Bank 1: Configure Registers\n "
2519	"read_bank_out_reg = 0;\nend\n\nbankAddr_reg = bankAddr;\n"
2520	suppress_output "1"
2521	defparams "{}"
2522	hide_port_list "{}"
2523	has_advanced_control "0"
2524	sggui_pos "-1,-1,-1,-1"
2525	block_type "mcode"
2526	block_version "10.1.2"
2527	sg_icon_stat "170,251,1,1,white,blue,0,90fea270,right"
2528	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2529	"\npatch([0 170 170 0 ],[0 0 251 251 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 "
2530	"40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[59 87 127 167 195"
2531	" 195 183 195 195 157 193 167 127 87 61 97 59 59 71 59 59 ],[0.98 0.96 0.92]);"
2532	"\nplot([0 170 170 0 0 ],[0 0 251 251 0 ]);\nfprintf('','COMMENT: end icon gra"
2533	"phics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label("
2534	"'input',1,'wrDBus');\ncolor('black');port_label('input',2,'bankAddr');\ncolor"
2535	"('black');port_label('input',3,'linearAddr');\ncolor('black');port_label('inp"
2536	"ut',4,'RNWReg');\ncolor('black');port_label('input',5,'addrAck');\ncolor('bla"
2537	"ck');port_label('input',6,'sm_timer0_timeLeft');\ncolor('black');port_label('"
2538	"input',7,'sm_timer1_timeLeft');\ncolor('black');port_label('input',8,'sm_time"
2539	"r2_timeLeft');\ncolor('black');port_label('input',9,'sm_timer3_timeLeft');\nc"
2540	"olor('black');port_label('input',10,'sm_timer_control_r');\ncolor('black');po"
2541	"rt_label('input',11,'sm_timer_status');\ncolor('black');port_label('input',12"
2542	",'sm_timer0_countTo');\ncolor('black');port_label('input',13,'sm_timer1_count"
2543	"To');\ncolor('black');port_label('input',14,'sm_timer2_countTo');\ncolor('bla"
2544	"ck');port_label('input',15,'sm_timer3_countTo');\ncolor('black');port_label('"
2545	"input',16,'sm_timer_control_w');\ncolor('black');port_label('output',1,'read_"
2546	"bank_out');\ncolor('black');port_label('output',2,'sm_timer0_countTo_din');\n"
2547	"color('black');port_label('output',3,'sm_timer0_countTo_en');\ncolor('black')"
2548	";port_label('output',4,'sm_timer1_countTo_din');\ncolor('black');port_label('"
2549	"output',5,'sm_timer1_countTo_en');\ncolor('black');port_label('output',6,'sm_"
2550	"timer2_countTo_din');\ncolor('black');port_label('output',7,'sm_timer2_countT"
2551	"o_en');\ncolor('black');port_label('output',8,'sm_timer3_countTo_din');\ncolo"
2552	"r('black');port_label('output',9,'sm_timer3_countTo_en');\ncolor('black');por"
2553	"t_label('output',10,'sm_timer_control_w_din');\ncolor('black');port_label('ou"
2554	"tput',11,'sm_timer_control_w_en');\ncolor('black');disp('\\bf{xlmax}','texmod"
2555	"e','on');\nfprintf('','COMMENT: end icon text');\n"
2556	Port {
2557	PortNumber 1
2558	Name "rdData"
2559	RTWStorageClass "Auto"
2560	DataLoggingNameMode "SignalName"
2561	}
2562	Port {
2563	PortNumber 2
2564	Name "timer0_countTo_din"
2565	RTWStorageClass "Auto"
2566	DataLoggingNameMode "SignalName"
2567	}
2568	Port {
2569	PortNumber 3
2570	Name "timer0_countTo_en"
2571	RTWStorageClass "Auto"
2572	DataLoggingNameMode "SignalName"
2573	}
2574	Port {
2575	PortNumber 4
2576	Name "timer1_countTo_din"
2577	RTWStorageClass "Auto"
2578	DataLoggingNameMode "SignalName"
2579	}
2580	Port {
2581	PortNumber 5
2582	Name "timer1_countTo_en"
2583	RTWStorageClass "Auto"
2584	DataLoggingNameMode "SignalName"
2585	}
2586	Port {
2587	PortNumber 6
2588	Name "timer2_countTo_din"
2589	RTWStorageClass "Auto"
2590	DataLoggingNameMode "SignalName"
2591	}
2592	Port {
2593	PortNumber 7
2594	Name "timer2_countTo_en"
2595	RTWStorageClass "Auto"
2596	DataLoggingNameMode "SignalName"
2597	}
2598	Port {
2599	PortNumber 8
2600	Name "timer3_countTo_din"
2601	RTWStorageClass "Auto"
2602	DataLoggingNameMode "SignalName"
2603	}
2604	Port {
2605	PortNumber 9
2606	Name "timer3_countTo_en"
2607	RTWStorageClass "Auto"
2608	DataLoggingNameMode "SignalName"
2609	}
2610	Port {
2611	PortNumber 10
2612	Name "timer_control_w_din"
2613	RTWStorageClass "Auto"
2614	DataLoggingNameMode "SignalName"
2615	}
2616	Port {
2617	PortNumber 11
2618	Name "timer_control_w_en"
2619	RTWStorageClass "Auto"
2620	DataLoggingNameMode "SignalName"
2621	}
2622	}
2623	Block {
2624	BlockType Reference
2625	Name "sg_plb_addrpref"
2626	Ports [1, 1]
2627	Position [110, 455, 175, 475]
2628	SourceBlock "xbsIndex_r4/Gateway In"
2629	SourceType "Xilinx Gateway In Block"
2630	infoedit "Gateway in block. Converts inputs of type "
2631	"Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Ha"
2632	"rdware notes: In hardware these blocks become top level input ports."
2633	arith_type "Unsigned"
2634	n_bits "20"
2635	bin_pt "0"
2636	quantization "Round (unbiased: +/- Inf)"
2637	overflow "Saturate"
2638	period "xlGetSimulinkPeriod(gcb)"
2639	dbl_ovrd "off"
2640	timing_constraint "None"
2641	locs_specified "off"
2642	LOCs "{}"
2643	xl_use_area "off"
2644	xl_area "[0,0,0,0,0,0,0]"
2645	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
2646	"ped_port'=>'sg_plb_addrpref'}},'iopad'=>{'constraint'=>'#'}}"
2647	has_advanced_control "0"
2648	sggui_pos "-1,-1,-1,-1"
2649	block_type "gatewayin"
2650	block_version "10.1.2"
2651	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
2652	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
2653	"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
2654	"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
2655	" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
2656	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
2657	"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
2658	"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
2659	"OMMENT: end icon text');\n"
2660	Port {
2661	PortNumber 1
2662	Name "addrPref"
2663	RTWStorageClass "Auto"
2664	DataLoggingNameMode "SignalName"
2665	}
2666	}
2667	Line {
2668	Name "Sl_addrAck"
2669	SrcBlock "plb_decode"
2670	SrcPort 2
2671	Points [0, 0]
2672	Branch {
2673	Labels [1, 0]
2674	Points [5, 0; 0, 395]
2675	DstBlock "plb_memmap"
2676	DstPort 5
2677	}
2678	Branch {
2679	Labels [0, 0]
2680	Points [30, 0; 0, -10]
2681	DstBlock "Sl_addrAck"
2682	DstPort 1
2683	}
2684	}
2685	Line {
2686	Name "Sl_wrDAck"
2687	SrcBlock "plb_decode"
2688	SrcPort 4
2689	Points [0, 0]
2690	Branch {
2691	Labels [1, 0]
2692	DstBlock "Sl_wrDAck"
2693	DstPort 1
2694	}
2695	Branch {
2696	Labels [0, 0]
2697	Points [30, 0; 0, 50]
2698	DstBlock "Sl_wrComp"
2699	DstPort 1
2700	}
2701	}
2702	Line {
2703	Name "timer_control_w_en"
2704	Labels [0, 0]
2705	SrcBlock "plb_memmap"
2706	SrcPort 11
2707	Points [10, 0; 0, 135]
2708	DstBlock "To Register4"
2709	DstPort 2
2710	}
2711	Line {
2712	Name "timer_control_w_din"
2713	Labels [0, 0]
2714	SrcBlock "plb_memmap"
2715	SrcPort 10
2716	Points [10, 0; 0, 125]
2717	DstBlock "To Register4"
2718	DstPort 1
2719	}
2720	Line {
2721	Name "timer3_countTo_en"
2722	Labels [0, 0]
2723	SrcBlock "plb_memmap"
2724	SrcPort 9
2725	Points [10, 0; 0, 90]
2726	DstBlock "To Register3"
2727	DstPort 2
2728	}
2729	Line {
2730	Name "timer3_countTo_din"
2731	Labels [0, 0]
2732	SrcBlock "plb_memmap"
2733	SrcPort 8
2734	Points [10, 0; 0, 80]
2735	DstBlock "To Register3"
2736	DstPort 1
2737	}
2738	Line {
2739	Name "timer2_countTo_en"
2740	Labels [0, 0]
2741	SrcBlock "plb_memmap"
2742	SrcPort 7
2743	Points [10, 0; 0, 45]
2744	DstBlock "To Register2"
2745	DstPort 2
2746	}
2747	Line {
2748	Name "timer2_countTo_din"
2749	Labels [0, 0]
2750	SrcBlock "plb_memmap"
2751	SrcPort 6
2752	Points [15, 0]
2753	DstBlock "To Register2"
2754	DstPort 1
2755	}
2756	Line {
2757	Name "timer1_countTo_en"
2758	Labels [0, 0]
2759	SrcBlock "plb_memmap"
2760	SrcPort 5
2761	Points [15, 0]
2762	DstBlock "To Register1"
2763	DstPort 2
2764	}
2765	Line {
2766	Name "timer1_countTo_din"
2767	Labels [0, 0]
2768	SrcBlock "plb_memmap"
2769	SrcPort 4
2770	Points [15, 0]
2771	DstBlock "To Register1"
2772	DstPort 1
2773	}
2774	Line {
2775	Name "timer0_countTo_en"
2776	Labels [0, 0]
2777	SrcBlock "plb_memmap"
2778	SrcPort 3
2779	Points [10, 0; 0, -50]
2780	DstBlock "To Register"
2781	DstPort 2
2782	}
2783	Line {
2784	Name "timer0_countTo_din"
2785	Labels [0, 0]
2786	SrcBlock "plb_memmap"
2787	SrcPort 2
2788	Points [10, 0; 0, -60]
2789	DstBlock "To Register"
2790	DstPort 1
2791	}
2792	Line {
2793	Name "rdData"
2794	Labels [0, 0]
2795	SrcBlock "plb_memmap"
2796	SrcPort 1
2797	Points [0, -35; -195, 0; 0, 35; -200, 0; 0, -95]
2798	DstBlock "plb_decode"
2799	DstPort 6
2800	}
2801	Line {
2802	Name "timer_control_w_dout"
2803	Labels [0, 0]
2804	SrcBlock "To Register4"
2805	SrcPort 1
2806	Points [0, -50; -285, 0]
2807	DstBlock "plb_memmap"
2808	DstPort 16
2809	}
2810	Line {
2811	Name "timer3_countTo_dout"
2812	Labels [0, 0]
2813	SrcBlock "To Register3"
2814	SrcPort 1
2815	Points [0, -35; -90, 0; 0, 30; -200, 0; 0, -35]
2816	DstBlock "plb_memmap"
2817	DstPort 15
2818	}
2819	Line {
2820	Name "timer2_countTo_dout"
2821	Labels [0, 0]
2822	SrcBlock "To Register2"
2823	SrcPort 1
2824	Points [0, 50; -90, 0; 0, 30; -200, 0; 0, -50]
2825	DstBlock "plb_memmap"
2826	DstPort 14
2827	}
2828	Line {
2829	Name "timer1_countTo_dout"
2830	Labels [0, 0]
2831	SrcBlock "To Register1"
2832	SrcPort 1
2833	Points [0, 55; -90, 0; 0, 115; -200, 0; 0, -65]
2834	DstBlock "plb_memmap"
2835	DstPort 13
2836	}
2837	Line {
2838	Name "timer0_countTo_dout"
2839	Labels [0, 0]
2840	SrcBlock "To Register"
2841	SrcPort 1
2842	Points [0, -35; -290, 0; 0, 210]
2843	DstBlock "plb_memmap"
2844	DstPort 12
2845	}
2846	Line {
2847	Name "timer_status_dout"
2848	Labels [0, 0]
2849	SrcBlock "From Register5"
2850	SrcPort 1
2851	Points [60, 0; 0, -345]
2852	DstBlock "plb_memmap"
2853	DstPort 11
2854	}
2855	Line {
2856	Name "timer_control_r_dout"
2857	Labels [0, 0]
2858	SrcBlock "From Register4"
2859	SrcPort 1
2860	Points [60, 0; 0, -275]
2861	DstBlock "plb_memmap"
2862	DstPort 10
2863	}
2864	Line {
2865	Name "timer3_timeLeft_dout"
2866	Labels [0, 0]
2867	SrcBlock "From Register3"
2868	SrcPort 1
2869	Points [60, 0; 0, -200]
2870	DstBlock "plb_memmap"
2871	DstPort 9
2872	}
2873	Line {
2874	Name "timer2_timeLeft_dout"
2875	Labels [0, 0]
2876	SrcBlock "From Register2"
2877	SrcPort 1
2878	Points [60, 0; 0, -130]
2879	DstBlock "plb_memmap"
2880	DstPort 8
2881	}
2882	Line {
2883	Name "timer1_timeLeft_dout"
2884	Labels [0, 0]
2885	SrcBlock "From Register1"
2886	SrcPort 1
2887	Points [60, 0; 0, -60]
2888	DstBlock "plb_memmap"
2889	DstPort 7
2890	}
2891	Line {
2892	Name "timer0_timeLeft_dout"
2893	Labels [0, 0]
2894	SrcBlock "From Register"
2895	SrcPort 1
2896	Points [60, 0; 0, 15]
2897	DstBlock "plb_memmap"
2898	DstPort 6
2899	}
2900	Line {
2901	Name "RNWReg"
2902	Labels [0, 0]
2903	SrcBlock "plb_decode"
2904	SrcPort 6
2905	Points [5, 0; 0, 200]
2906	DstBlock "plb_memmap"
2907	DstPort 4
2908	}
2909	Line {
2910	Name "linearAddr"
2911	Labels [0, 0]
2912	SrcBlock "plb_decode"
2913	SrcPort 9
2914	Points [5, 0; 0, 50]
2915	DstBlock "plb_memmap"
2916	DstPort 3
2917	}
2918	Line {
2919	Name "bankAddr"
2920	Labels [0, 0]
2921	SrcBlock "plb_decode"
2922	SrcPort 5
2923	Points [5, 0; 0, 215]
2924	DstBlock "plb_memmap"
2925	DstPort 2
2926	}
2927	Line {
2928	Name "wrDBusReg"
2929	Labels [0, 0]
2930	SrcBlock "plb_decode"
2931	SrcPort 1
2932	Points [10, 0]
2933	DstBlock "plb_memmap"
2934	DstPort 1
2935	}
2936	Line {
2937	Name "Sl_rdDBus"
2938	Labels [0, 0]
2939	SrcBlock "plb_decode"
2940	SrcPort 8
2941	Points [65, 0]
2942	DstBlock "Sl_rdDBus"
2943	DstPort 1
2944	}
2945	Line {
2946	Name "Sl_rdDAck"
2947	Labels [0, 0]
2948	SrcBlock "plb_decode"
2949	SrcPort 7
2950	Points [65, 0]
2951	DstBlock "Sl_rdDAck"
2952	DstPort 1
2953	}
2954	Line {
2955	Name "Sl_rdComp"
2956	Labels [0, 0]
2957	SrcBlock "plb_decode"
2958	SrcPort 3
2959	Points [65, 0]
2960	DstBlock "Sl_rdComp"
2961	DstPort 1
2962	}
2963	Line {
2964	Name "addrPref"
2965	Labels [0, 0]
2966	SrcBlock "sg_plb_addrpref"
2967	SrcPort 1
2968	Points [10, 0]
2969	DstBlock "plb_decode"
2970	DstPort 7
2971	}
2972	Line {
2973	Name "PLB_wrDBus"
2974	Labels [0, 0]
2975	SrcBlock "PLB_wrDBus"
2976	SrcPort 1
2977	Points [5, 0; 0, 5]
2978	DstBlock "plb_decode"
2979	DstPort 5
2980	}
2981	Line {
2982	Name "PLB_RNW"
2983	Labels [0, 0]
2984	SrcBlock "PLB_RNW"
2985	SrcPort 1
2986	DstBlock "plb_decode"
2987	DstPort 4
2988	}
2989	Line {
2990	Name "PLB_PAValid"
2991	Labels [0, 0]
2992	SrcBlock "PLB_PAValid"
2993	SrcPort 1
2994	DstBlock "plb_decode"
2995	DstPort 3
2996	}
2997	Line {
2998	Name "PLB_ABus"
2999	Labels [0, 0]
3000	SrcBlock "PLB_ABus"
3001	SrcPort 1
3002	DstBlock "plb_decode"
3003	DstPort 2
3004	}
3005	Line {
3006	Name "SPLB_Rst"
3007	Labels [0, 0]
3008	SrcBlock "SPLB_Rst"
3009	SrcPort 1
3010	DstBlock "plb_decode"
3011	DstPort 1
3012	}
3013	Line {
3014	SrcBlock "Constant6"
3015	SrcPort 1
3016	DstBlock "sg_plb_addrpref"
3017	DstPort 1
3018	}
3019	Line {
3020	Name "Sl_wait"
3021	Labels [0, 0]
3022	SrcBlock "Constant5"
3023	SrcPort 1
3024	Points [5, 0; 0, -5]
3025	DstBlock "Sl_wait"
3026	DstPort 1
3027	}
3028	Line {
3029	SrcBlock "Constant4"
3030	SrcPort 1
3031	DstBlock "PLB_wrDBus"
3032	DstPort 1
3033	}
3034	Line {
3035	SrcBlock "Constant3"
3036	SrcPort 1
3037	DstBlock "PLB_RNW"
3038	DstPort 1
3039	}
3040	Line {
3041	SrcBlock "Constant2"
3042	SrcPort 1
3043	DstBlock "PLB_PAValid"
3044	DstPort 1
3045	}
3046	Line {
3047	SrcBlock "Constant1"
3048	SrcPort 1
3049	DstBlock "PLB_ABus"
3050	DstPort 1
3051	}
3052	Line {
3053	SrcBlock "Constant"
3054	SrcPort 1
3055	DstBlock "SPLB_Rst"
3056	DstPort 1
3057	}
3058	Line {
3059	SrcBlock "Sl_wrComp"
3060	SrcPort 1
3061	DstBlock "Terminator6"
3062	DstPort 1
3063	}
3064	Line {
3065	SrcBlock "Sl_wrDAck"
3066	SrcPort 1
3067	DstBlock "Terminator5"
3068	DstPort 1
3069	}
3070	Line {
3071	SrcBlock "Sl_wait"
3072	SrcPort 1
3073	DstBlock "Terminator4"
3074	DstPort 1
3075	}
3076	Line {
3077	SrcBlock "Sl_rdDBus"
3078	SrcPort 1
3079	Points [45, 0; 0, -10]
3080	DstBlock "Terminator3"
3081	DstPort 1
3082	}
3083	Line {
3084	SrcBlock "Sl_rdDAck"
3085	SrcPort 1
3086	DstBlock "Terminator2"
3087	DstPort 1
3088	}
3089	Line {
3090	SrcBlock "Sl_rdComp"
3091	SrcPort 1
3092	DstBlock "Terminator1"
3093	DstPort 1
3094	}
3095	Line {
3096	SrcBlock "Sl_addrAck"
3097	SrcPort 1
3098	DstBlock "Terminator"
3099	DstPort 1
3100	}
3101	}
3102	}
3103	Block {
3104	BlockType Reference
3105	Name "From Register1"
3106	Ports [0, 1]
3107	Position [235, 162, 260, 188]
3108	ShowName off
3109	AttributesFormatString "From Register\\n<< %<shared_memory_name> >>"
3110	SourceBlock "xbsIndex_r4/From Register"
3111	SourceType "Xilinx Shared Memory Based From Register Block"
3112	infoedit "Register block that reads data to a shared memo"
3113	"ry register. Delay of one sample period."
3114	shared_memory_name "'timer0_countTo'"
3115	init "500"
3116	period "1"
3117	ownership "Locally owned and initialized"
3118	arith_type "Unsigned"
3119	n_bits "32"
3120	bin_pt "0"
3121	dbl_ovrd off
3122	xl_use_area off
3123	xl_area "[0,0,0,0,0,0,0]"
3124	has_advanced_control "0"
3125	sggui_pos "514,418,383,246"
3126	block_type "fromreg"
3127	block_version "8.2"
3128	sg_icon_stat "25,26,0,1,white,blue,0,4b212927,right"
3129	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3130	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
3131	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
3132	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
3133	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
3134	"icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMM"
3135	"ENT: end icon text');\n"
3136	}
3137	Block {
3138	BlockType Reference
3139	Name "From Register3"
3140	Ports [0, 1]
3141	Position [235, 377, 260, 403]
3142	ShowName off
3143	AttributesFormatString "From Register\\n<< %<shared_memory_name> >>"
3144	SourceBlock "xbsIndex_r4/From Register"
3145	SourceType "Xilinx Shared Memory Based From Register Block"
3146	infoedit "Register block that reads data to a shared memo"
3147	"ry register. Delay of one sample period."
3148	shared_memory_name "'timer1_countTo'"
3149	init "500"
3150	period "1"
3151	ownership "Locally owned and initialized"
3152	arith_type "Unsigned"
3153	n_bits "32"
3154	bin_pt "0"
3155	dbl_ovrd off
3156	xl_use_area off
3157	xl_area "[0,0,0,0,0,0,0]"
3158	has_advanced_control "0"
3159	sggui_pos "514,418,383,246"
3160	block_type "fromreg"
3161	block_version "8.2"
3162	sg_icon_stat "25,26,0,1,white,blue,0,4b212927,right"
3163	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3164	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
3165	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
3166	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
3167	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
3168	"icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMM"
3169	"ENT: end icon text');\n"
3170	}
3171	Block {
3172	BlockType Reference
3173	Name "From Register4"
3174	Ports [0, 1]
3175	Position [235, 592, 260, 618]
3176	ShowName off
3177	AttributesFormatString "From Register\\n<< %<shared_memory_name> >>"
3178	SourceBlock "xbsIndex_r4/From Register"
3179	SourceType "Xilinx Shared Memory Based From Register Block"
3180	infoedit "Register block that reads data to a shared memo"
3181	"ry register. Delay of one sample period."
3182	shared_memory_name "'timer2_countTo'"
3183	init "500"
3184	period "1"
3185	ownership "Locally owned and initialized"
3186	arith_type "Unsigned"
3187	n_bits "32"
3188	bin_pt "0"
3189	dbl_ovrd off
3190	xl_use_area off
3191	xl_area "[0,0,0,0,0,0,0]"
3192	has_advanced_control "0"
3193	sggui_pos "514,418,383,246"
3194	block_type "fromreg"
3195	block_version "8.2"
3196	sg_icon_stat "25,26,0,1,white,blue,0,4b212927,right"
3197	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3198	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
3199	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
3200	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
3201	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
3202	"icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMM"
3203	"ENT: end icon text');\n"
3204	}
3205	Block {
3206	BlockType Reference
3207	Name "From Register5"
3208	Ports [0, 1]
3209	Position [235, 807, 260, 833]
3210	ShowName off
3211	AttributesFormatString "From Register\\n<< %<shared_memory_name> >>"
3212	SourceBlock "xbsIndex_r4/From Register"
3213	SourceType "Xilinx Shared Memory Based From Register Block"
3214	infoedit "Register block that reads data to a shared memo"
3215	"ry register. Delay of one sample period."
3216	shared_memory_name "'timer3_countTo'"
3217	init "500"
3218	period "1"
3219	ownership "Locally owned and initialized"
3220	arith_type "Unsigned"
3221	n_bits "32"
3222	bin_pt "0"
3223	dbl_ovrd off
3224	xl_use_area off
3225	xl_area "[0,0,0,0,0,0,0]"
3226	has_advanced_control "0"
3227	sggui_pos "514,418,383,246"
3228	block_type "fromreg"
3229	block_version "8.2"
3230	sg_icon_stat "25,26,0,1,white,blue,0,4b212927,right"
3231	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3232	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
3233	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
3234	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
3235	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
3236	"icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMM"
3237	"ENT: end icon text');\n"
3238	}
3239	Block {
3240	BlockType Reference
3241	Name "Gateway Out"
3242	Ports [1, 1]
3243	Position [1030, 385, 1090, 405]
3244	SourceBlock "xbsIndex_r4/Gateway Out"
3245	SourceType "Xilinx Gateway Out Block"
3246	infoedit "Gateway out block. Converts Xilinx fixed point"
3247	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
3248	"rdware notes: In hardware these blocks become top level output ports or are "
3249	"discarded, depending on how they are configured."
3250	hdl_port off
3251	timing_constraint "None"
3252	locs_specified off
3253	LOCs "{}"
3254	xl_use_area off
3255	xl_area "[0,0,0,0,0,0,0]"
3256	has_advanced_control "0"
3257	sggui_pos "20,20,336,386"
3258	block_type "gatewayout"
3259	block_version "10.1.2"
3260	sg_icon_stat "60,20,1,1,white,grey,0,b3a044a9,right"
3261	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3262	"tch([0 60 60 0 ],[0 0 20 20 ],[0.88 0.88 0.88]);\npatch([24 21 26 21 24 29 30"
3263	" 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 "
3264	"15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 "
3265	"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
3266	"on text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_la"
3267	"bel('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT:"
3268	" end icon text');\n"
3269	}
3270	Block {
3271	BlockType Reference
3272	Name "Gateway Out1"
3273	Ports [1, 1]
3274	Position [565, 784, 625, 796]
3275	SourceBlock "xbsIndex_r4/Gateway Out"
3276	SourceType "Xilinx Gateway Out Block"
3277	infoedit "Gateway out block. Converts Xilinx fixed point"
3278	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
3279	"rdware notes: In hardware these blocks become top level output ports or are "
3280	"discarded, depending on how they are configured."
3281	hdl_port off
3282	timing_constraint "None"
3283	locs_specified off
3284	LOCs "{}"
3285	xl_use_area off
3286	xl_area "[0,0,0,0,0,0,0]"
3287	has_advanced_control "0"
3288	sggui_pos "20,20,336,386"
3289	block_type "gatewayout"
3290	block_version "10.1.2"
3291	sg_icon_stat "60,12,1,1,white,grey,0,b3a044a9,right"
3292	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3293	"tch([0 60 60 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([27 25 28 25 27 30 31"
3294	" 32 35 32 29 27 30 27 29 32 35 32 31 30 27 ],[1 3 6 9 11 11 10 11 11 8 11 9 6"
3295	" 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 12 12 0 ]);\n"
3296	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
3297	"xt');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('"
3298	"output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end "
3299	"icon text');\n"
3300	}
3301	Block {
3302	BlockType Reference
3303	Name "Gateway Out2"
3304	Ports [1, 1]
3305	Position [565, 804, 625, 816]
3306	SourceBlock "xbsIndex_r4/Gateway Out"
3307	SourceType "Xilinx Gateway Out Block"
3308	infoedit "Gateway out block. Converts Xilinx fixed point"
3309	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
3310	"rdware notes: In hardware these blocks become top level output ports or are "
3311	"discarded, depending on how they are configured."
3312	hdl_port off
3313	timing_constraint "None"
3314	locs_specified off
3315	LOCs "{}"
3316	xl_use_area off
3317	xl_area "[0,0,0,0,0,0,0]"
3318	has_advanced_control "0"
3319	sggui_pos "20,20,336,386"
3320	block_type "gatewayout"
3321	block_version "10.1.2"
3322	sg_icon_stat "60,12,1,1,white,grey,0,b3a044a9,right"
3323	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3324	"tch([0 60 60 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([27 25 28 25 27 30 31"
3325	" 32 35 32 29 27 30 27 29 32 35 32 31 30 27 ],[1 3 6 9 11 11 10 11 11 8 11 9 6"
3326	" 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 12 12 0 ]);\n"
3327	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
3328	"xt');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('"
3329	"output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end "
3330	"icon text');\n"
3331	}
3332	Block {
3333	BlockType Reference
3334	Name "Gateway Out3"
3335	Ports [1, 1]
3336	Position [565, 824, 625, 836]
3337	SourceBlock "xbsIndex_r4/Gateway Out"
3338	SourceType "Xilinx Gateway Out Block"
3339	infoedit "Gateway out block. Converts Xilinx fixed point"
3340	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
3341	"rdware notes: In hardware these blocks become top level output ports or are "
3342	"discarded, depending on how they are configured."
3343	hdl_port off
3344	timing_constraint "None"
3345	locs_specified off
3346	LOCs "{}"
3347	xl_use_area off
3348	xl_area "[0,0,0,0,0,0,0]"
3349	has_advanced_control "0"
3350	sggui_pos "20,20,336,386"
3351	block_type "gatewayout"
3352	block_version "10.1.2"
3353	sg_icon_stat "60,12,1,1,white,grey,0,b3a044a9,right"
3354	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3355	"tch([0 60 60 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([27 25 28 25 27 30 31"
3356	" 32 35 32 29 27 30 27 29 32 35 32 31 30 27 ],[1 3 6 9 11 11 10 11 11 8 11 9 6"
3357	" 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 12 12 0 ]);\n"
3358	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
3359	"xt');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('"
3360	"output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end "
3361	"icon text');\n"
3362	}
3363	Block {
3364	BlockType Reference
3365	Name "Gateway Out4"
3366	Ports [1, 1]
3367	Position [565, 844, 625, 856]
3368	SourceBlock "xbsIndex_r4/Gateway Out"
3369	SourceType "Xilinx Gateway Out Block"
3370	infoedit "Gateway out block. Converts Xilinx fixed point"
3371	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
3372	"rdware notes: In hardware these blocks become top level output ports or are "
3373	"discarded, depending on how they are configured."
3374	hdl_port off
3375	timing_constraint "None"
3376	locs_specified off
3377	LOCs "{}"
3378	xl_use_area off
3379	xl_area "[0,0,0,0,0,0,0]"
3380	has_advanced_control "0"
3381	sggui_pos "20,20,336,386"
3382	block_type "gatewayout"
3383	block_version "10.1.2"
3384	sg_icon_stat "60,12,1,1,white,grey,0,b3a044a9,right"
3385	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3386	"tch([0 60 60 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([27 25 28 25 27 30 31"
3387	" 32 35 32 29 27 30 27 29 32 35 32 31 30 27 ],[1 3 6 9 11 11 10 11 11 8 11 9 6"
3388	" 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 12 12 0 ]);\n"
3389	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
3390	"xt');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('"
3391	"output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end "
3392	"icon text');\n"
3393	}
3394	Block {
3395	BlockType Reference
3396	Name "IDLEFORDIFS"
3397	Ports [1, 1]
3398	Position [55, 192, 120, 208]
3399	SourceBlock "xbsIndex_r4/Gateway In"
3400	SourceType "Xilinx Gateway In Block"
3401	infoedit "Gateway in block. Converts inputs of type Simu"
3402	"link integer, double and fixed point to Xilinx fixed point type.<P><P>Hardwa"
3403	"re notes: In hardware these blocks become top level input ports."
3404	arith_type "Unsigned"
3405	n_bits "1"
3406	bin_pt "0"
3407	quantization "Round (unbiased: +/- Inf)"
3408	overflow "Saturate"
3409	period "1"
3410	dbl_ovrd off
3411	timing_constraint "None"
3412	locs_specified off
3413	LOCs "{}"
3414	xl_use_area off
3415	xl_area "[0,0,0,0,0,0,0]"
3416	has_advanced_control "0"
3417	sggui_pos "20,20,356,432"
3418	block_type "gatewayin"
3419	block_version "8.2"
3420	sg_icon_stat "65,16,1,1,white,yellow,0,bc55d28f,right"
3421	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3422	"tch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33"
3423	" 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 "
3424	"15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 "
3425	"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
3426	"on text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','t"
3427	"exmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMME"
3428	"NT: end icon text');\n"
3429	}
3430	Block {
3431	BlockType Reference
3432	Name "Logical"
3433	Ports [4, 1]
3434	Position [940, 32, 980, 78]
3435	SourceBlock "xbsIndex_r4/Logical"
3436	SourceType "Xilinx Logical Block Block"
3437	logical_function "OR"
3438	inputs "4"
3439	en off
3440	latency "0"
3441	precision "Full"
3442	arith_type "Unsigned"
3443	n_bits "16"
3444	bin_pt "0"
3445	align_bp on
3446	dbl_ovrd off
3447	xl_use_area off
3448	xl_area "[0,0,0,0,0,0,0]"
3449	has_advanced_control "0"
3450	sggui_pos "-1,-1,-1,-1"
3451	block_type "logical"
3452	block_version "9.1.01"
3453	sg_icon_stat "40,46,4,1,white,blue,0,ad4bab34,right"
3454	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3455	"tch([0 40 40 0 ],[0 0 46 46 ],[0.77 0.82 0.91]);\npatch([10 3 12 3 10 21 24 2"
3456	"7 38 29 20 14 24 14 20 29 38 27 24 21 10 ],[7 14 23 32 39 39 36 39 39 30 39 3"
3457	"3 23 13 7 16 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 46 46 "
3458	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
3459	"icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on'"
3460	");\nfprintf('','COMMENT: end icon text');\n"
3461	}
3462	Block {
3463	BlockType Scope
3464	Name "Scope"
3465	Ports [6]
3466	Position [1140, 280, 1175, 410]
3467	Floating off
3468	Location [312, 172, 828, 965]
3469	Open off
3470	NumInputPorts "6"
3471	ZoomMode "xonly"
3472	List {
3473	ListType AxesTitles
3474	axes1 "%<SignalLabel>"
3475	axes2 "%<SignalLabel>"
3476	axes3 "%<SignalLabel>"
3477	axes4 "%<SignalLabel>"
3478	axes5 "%<SignalLabel>"
3479	axes6 "%<SignalLabel>"
3480	}
3481	YMin "-5~-5~-5~-5~-5~-5"
3482	YMax "5~5~5~5~5~5"
3483	SaveName "ScopeData2"
3484	DataFormat "StructureWithTime"
3485	SampleTime "0"
3486	}
3487	Block {
3488	BlockType Scope
3489	Name "Scope1"
3490	Ports [4]
3491	Position [700, 781, 750, 859]
3492	Floating off
3493	Location [548, 233, 1084, 926]
3494	Open off
3495	NumInputPorts "4"
3496	List {
3497	ListType AxesTitles
3498	axes1 "%<SignalLabel>"
3499	axes2 "%<SignalLabel>"
3500	axes3 "%<SignalLabel>"
3501	axes4 "%<SignalLabel>"
3502	}
3503	YMin "-5~-5~-5~-5"
3504	YMax "5~5~5~5"
3505	SaveName "ScopeData1"
3506	DataFormat "StructureWithTime"
3507	SampleTime "0"
3508	}
3509	Block {
3510	BlockType Reference
3511	Name "Slice"
3512	Ports [1, 1]
3513	Position [175, 15, 205, 35]
3514	SourceBlock "xbsIndex_r4/Slice"
3515	SourceType "Xilinx Bit Slice Extractor Block"
3516	infoedit "Extracts a given range of bits from each input "
3517	"sample and presents it at the output. The output type is ordinarily unsigned"
3518	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3519	".<P><P>Hardware notes: In hardware this block costs nothing."
3520	nbits "1"
3521	boolean_output on
3522	mode "Lower Bit Location + Width"
3523	bit1 "0"
3524	base1 "LSB of Input"
3525	bit0 "0"
3526	base0 "LSB of Input"
3527	dbl_ovrd off
3528	has_advanced_control "0"
3529	sggui_pos "20,20,442,407"
3530	block_type "slice"
3531	block_version "9.1.01"
3532	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3533	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3534	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3535	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3536	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3537	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3538	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3539	"ENT: end icon text');\n"
3540	}
3541	Block {
3542	BlockType Reference
3543	Name "Slice1"
3544	Ports [1, 1]
3545	Position [175, 40, 205, 60]
3546	SourceBlock "xbsIndex_r4/Slice"
3547	SourceType "Xilinx Bit Slice Extractor Block"
3548	infoedit "Extracts a given range of bits from each input "
3549	"sample and presents it at the output. The output type is ordinarily unsigned"
3550	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3551	".<P><P>Hardware notes: In hardware this block costs nothing."
3552	nbits "1"
3553	boolean_output on
3554	mode "Lower Bit Location + Width"
3555	bit1 "1"
3556	base1 "LSB of Input"
3557	bit0 "1"
3558	base0 "LSB of Input"
3559	dbl_ovrd off
3560	has_advanced_control "0"
3561	sggui_pos "20,20,442,407"
3562	block_type "slice"
3563	block_version "9.1.01"
3564	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3565	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3566	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3567	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3568	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3569	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3570	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3571	"ENT: end icon text');\n"
3572	}
3573	Block {
3574	BlockType Reference
3575	Name "Slice10"
3576	Ports [1, 1]
3577	Position [175, 330, 205, 350]
3578	SourceBlock "xbsIndex_r4/Slice"
3579	SourceType "Xilinx Bit Slice Extractor Block"
3580	infoedit "Extracts a given range of bits from each input "
3581	"sample and presents it at the output. The output type is ordinarily unsigned"
3582	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3583	".<P><P>Hardware notes: In hardware this block costs nothing."
3584	nbits "1"
3585	boolean_output on
3586	mode "Lower Bit Location + Width"
3587	bit1 "18"
3588	base1 "LSB of Input"
3589	bit0 "12"
3590	base0 "LSB of Input"
3591	dbl_ovrd off
3592	has_advanced_control "0"
3593	sggui_pos "20,20,442,407"
3594	block_type "slice"
3595	block_version "9.1.01"
3596	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3597	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3598	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3599	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3600	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3601	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3602	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3603	"ENT: end icon text');\n"
3604	}
3605	Block {
3606	BlockType Reference
3607	Name "Slice11"
3608	Ports [1, 1]
3609	Position [175, 355, 205, 375]
3610	SourceBlock "xbsIndex_r4/Slice"
3611	SourceType "Xilinx Bit Slice Extractor Block"
3612	infoedit "Extracts a given range of bits from each input "
3613	"sample and presents it at the output. The output type is ordinarily unsigned"
3614	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3615	".<P><P>Hardware notes: In hardware this block costs nothing."
3616	nbits "1"
3617	boolean_output on
3618	mode "Lower Bit Location + Width"
3619	bit1 "19"
3620	base1 "LSB of Input"
3621	bit0 "13"
3622	base0 "LSB of Input"
3623	dbl_ovrd off
3624	has_advanced_control "0"
3625	sggui_pos "20,20,442,407"
3626	block_type "slice"
3627	block_version "9.1.01"
3628	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3629	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3630	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3631	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3632	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3633	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3634	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3635	"ENT: end icon text');\n"
3636	}
3637	Block {
3638	BlockType Reference
3639	Name "Slice12"
3640	Ports [1, 1]
3641	Position [175, 445, 205, 465]
3642	SourceBlock "xbsIndex_r4/Slice"
3643	SourceType "Xilinx Bit Slice Extractor Block"
3644	infoedit "Extracts a given range of bits from each input "
3645	"sample and presents it at the output. The output type is ordinarily unsigned"
3646	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3647	".<P><P>Hardware notes: In hardware this block costs nothing."
3648	nbits "1"
3649	boolean_output on
3650	mode "Lower Bit Location + Width"
3651	bit1 "24"
3652	base1 "LSB of Input"
3653	bit0 "16"
3654	base0 "LSB of Input"
3655	dbl_ovrd off
3656	has_advanced_control "0"
3657	sggui_pos "20,20,442,407"
3658	block_type "slice"
3659	block_version "9.1.01"
3660	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3661	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3662	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3663	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3664	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3665	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3666	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3667	"ENT: end icon text');\n"
3668	}
3669	Block {
3670	BlockType Reference
3671	Name "Slice13"
3672	Ports [1, 1]
3673	Position [175, 470, 205, 490]
3674	SourceBlock "xbsIndex_r4/Slice"
3675	SourceType "Xilinx Bit Slice Extractor Block"
3676	infoedit "Extracts a given range of bits from each input "
3677	"sample and presents it at the output. The output type is ordinarily unsigned"
3678	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3679	".<P><P>Hardware notes: In hardware this block costs nothing."
3680	nbits "1"
3681	boolean_output on
3682	mode "Lower Bit Location + Width"
3683	bit1 "25"
3684	base1 "LSB of Input"
3685	bit0 "17"
3686	base0 "LSB of Input"
3687	dbl_ovrd off
3688	has_advanced_control "0"
3689	sggui_pos "20,20,442,407"
3690	block_type "slice"
3691	block_version "9.1.01"
3692	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3693	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3694	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3695	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3696	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3697	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3698	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3699	"ENT: end icon text');\n"
3700	}
3701	Block {
3702	BlockType Reference
3703	Name "Slice14"
3704	Ports [1, 1]
3705	Position [175, 495, 205, 515]
3706	SourceBlock "xbsIndex_r4/Slice"
3707	SourceType "Xilinx Bit Slice Extractor Block"
3708	infoedit "Extracts a given range of bits from each input "
3709	"sample and presents it at the output. The output type is ordinarily unsigned"
3710	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3711	".<P><P>Hardware notes: In hardware this block costs nothing."
3712	nbits "1"
3713	boolean_output on
3714	mode "Lower Bit Location + Width"
3715	bit1 "26"
3716	base1 "LSB of Input"
3717	bit0 "18"
3718	base0 "LSB of Input"
3719	dbl_ovrd off
3720	has_advanced_control "0"
3721	sggui_pos "20,20,442,407"
3722	block_type "slice"
3723	block_version "9.1.01"
3724	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3725	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3726	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3727	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3728	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3729	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3730	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3731	"ENT: end icon text');\n"
3732	}
3733	Block {
3734	BlockType Reference
3735	Name "Slice15"
3736	Ports [1, 1]
3737	Position [175, 520, 205, 540]
3738	SourceBlock "xbsIndex_r4/Slice"
3739	SourceType "Xilinx Bit Slice Extractor Block"
3740	infoedit "Extracts a given range of bits from each input "
3741	"sample and presents it at the output. The output type is ordinarily unsigned"
3742	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3743	".<P><P>Hardware notes: In hardware this block costs nothing."
3744	nbits "1"
3745	boolean_output on
3746	mode "Lower Bit Location + Width"
3747	bit1 "27"
3748	base1 "LSB of Input"
3749	bit0 "19"
3750	base0 "LSB of Input"
3751	dbl_ovrd off
3752	has_advanced_control "0"
3753	sggui_pos "20,20,442,407"
3754	block_type "slice"
3755	block_version "9.1.01"
3756	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3757	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3758	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3759	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3760	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3761	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3762	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3763	"ENT: end icon text');\n"
3764	}
3765	Block {
3766	BlockType Reference
3767	Name "Slice16"
3768	Ports [1, 1]
3769	Position [175, 545, 205, 565]
3770	SourceBlock "xbsIndex_r4/Slice"
3771	SourceType "Xilinx Bit Slice Extractor Block"
3772	infoedit "Extracts a given range of bits from each input "
3773	"sample and presents it at the output. The output type is ordinarily unsigned"
3774	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3775	".<P><P>Hardware notes: In hardware this block costs nothing."
3776	nbits "1"
3777	boolean_output on
3778	mode "Lower Bit Location + Width"
3779	bit1 "27"
3780	base1 "LSB of Input"
3781	bit0 "20"
3782	base0 "LSB of Input"
3783	dbl_ovrd off
3784	has_advanced_control "0"
3785	sggui_pos "20,20,442,407"
3786	block_type "slice"
3787	block_version "9.1.01"
3788	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3789	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3790	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3791	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3792	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3793	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3794	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3795	"ENT: end icon text');\n"
3796	}
3797	Block {
3798	BlockType Reference
3799	Name "Slice17"
3800	Ports [1, 1]
3801	Position [175, 570, 205, 590]
3802	SourceBlock "xbsIndex_r4/Slice"
3803	SourceType "Xilinx Bit Slice Extractor Block"
3804	infoedit "Extracts a given range of bits from each input "
3805	"sample and presents it at the output. The output type is ordinarily unsigned"
3806	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3807	".<P><P>Hardware notes: In hardware this block costs nothing."
3808	nbits "1"
3809	boolean_output on
3810	mode "Lower Bit Location + Width"
3811	bit1 "27"
3812	base1 "LSB of Input"
3813	bit0 "21"
3814	base0 "LSB of Input"
3815	dbl_ovrd off
3816	has_advanced_control "0"
3817	sggui_pos "20,20,442,407"
3818	block_type "slice"
3819	block_version "9.1.01"
3820	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3821	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3822	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3823	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3824	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3825	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3826	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3827	"ENT: end icon text');\n"
3828	}
3829	Block {
3830	BlockType Reference
3831	Name "Slice18"
3832	Ports [1, 1]
3833	Position [175, 660, 205, 680]
3834	SourceBlock "xbsIndex_r4/Slice"
3835	SourceType "Xilinx Bit Slice Extractor Block"
3836	infoedit "Extracts a given range of bits from each input "
3837	"sample and presents it at the output. The output type is ordinarily unsigned"
3838	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3839	".<P><P>Hardware notes: In hardware this block costs nothing."
3840	nbits "1"
3841	boolean_output on
3842	mode "Lower Bit Location + Width"
3843	bit1 "27"
3844	base1 "LSB of Input"
3845	bit0 "24"
3846	base0 "LSB of Input"
3847	dbl_ovrd off
3848	has_advanced_control "0"
3849	sggui_pos "20,20,442,407"
3850	block_type "slice"
3851	block_version "9.1.01"
3852	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3853	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3854	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3855	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3856	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3857	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3858	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3859	"ENT: end icon text');\n"
3860	}
3861	Block {
3862	BlockType Reference
3863	Name "Slice19"
3864	Ports [1, 1]
3865	Position [175, 685, 205, 705]
3866	SourceBlock "xbsIndex_r4/Slice"
3867	SourceType "Xilinx Bit Slice Extractor Block"
3868	infoedit "Extracts a given range of bits from each input "
3869	"sample and presents it at the output. The output type is ordinarily unsigned"
3870	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3871	".<P><P>Hardware notes: In hardware this block costs nothing."
3872	nbits "1"
3873	boolean_output on
3874	mode "Lower Bit Location + Width"
3875	bit1 "27"
3876	base1 "LSB of Input"
3877	bit0 "25"
3878	base0 "LSB of Input"
3879	dbl_ovrd off
3880	has_advanced_control "0"
3881	sggui_pos "20,20,442,407"
3882	block_type "slice"
3883	block_version "9.1.01"
3884	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3885	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3886	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3887	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3888	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3889	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3890	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3891	"ENT: end icon text');\n"
3892	}
3893	Block {
3894	BlockType Reference
3895	Name "Slice2"
3896	Ports [1, 1]
3897	Position [175, 65, 205, 85]
3898	SourceBlock "xbsIndex_r4/Slice"
3899	SourceType "Xilinx Bit Slice Extractor Block"
3900	infoedit "Extracts a given range of bits from each input "
3901	"sample and presents it at the output. The output type is ordinarily unsigned"
3902	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3903	".<P><P>Hardware notes: In hardware this block costs nothing."
3904	nbits "1"
3905	boolean_output on
3906	mode "Lower Bit Location + Width"
3907	bit1 "2"
3908	base1 "LSB of Input"
3909	bit0 "2"
3910	base0 "LSB of Input"
3911	dbl_ovrd off
3912	has_advanced_control "0"
3913	sggui_pos "20,20,442,407"
3914	block_type "slice"
3915	block_version "9.1.01"
3916	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3917	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3918	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3919	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3920	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3921	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3922	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3923	"ENT: end icon text');\n"
3924	}
3925	Block {
3926	BlockType Reference
3927	Name "Slice20"
3928	Ports [1, 1]
3929	Position [175, 710, 205, 730]
3930	SourceBlock "xbsIndex_r4/Slice"
3931	SourceType "Xilinx Bit Slice Extractor Block"
3932	infoedit "Extracts a given range of bits from each input "
3933	"sample and presents it at the output. The output type is ordinarily unsigned"
3934	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3935	".<P><P>Hardware notes: In hardware this block costs nothing."
3936	nbits "1"
3937	boolean_output on
3938	mode "Lower Bit Location + Width"
3939	bit1 "27"
3940	base1 "LSB of Input"
3941	bit0 "26"
3942	base0 "LSB of Input"
3943	dbl_ovrd off
3944	has_advanced_control "0"
3945	sggui_pos "20,20,442,407"
3946	block_type "slice"
3947	block_version "9.1.01"
3948	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3949	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3950	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3951	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3952	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3953	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3954	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3955	"ENT: end icon text');\n"
3956	}
3957	Block {
3958	BlockType Reference
3959	Name "Slice21"
3960	Ports [1, 1]
3961	Position [175, 735, 205, 755]
3962	SourceBlock "xbsIndex_r4/Slice"
3963	SourceType "Xilinx Bit Slice Extractor Block"
3964	infoedit "Extracts a given range of bits from each input "
3965	"sample and presents it at the output. The output type is ordinarily unsigned"
3966	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3967	".<P><P>Hardware notes: In hardware this block costs nothing."
3968	nbits "1"
3969	boolean_output on
3970	mode "Lower Bit Location + Width"
3971	bit1 "27"
3972	base1 "LSB of Input"
3973	bit0 "27"
3974	base0 "LSB of Input"
3975	dbl_ovrd off
3976	has_advanced_control "0"
3977	sggui_pos "20,20,442,407"
3978	block_type "slice"
3979	block_version "9.1.01"
3980	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
3981	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
3982	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
3983	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
3984	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
3985	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
3986	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
3987	"ENT: end icon text');\n"
3988	}
3989	Block {
3990	BlockType Reference
3991	Name "Slice22"
3992	Ports [1, 1]
3993	Position [175, 760, 205, 780]
3994	SourceBlock "xbsIndex_r4/Slice"
3995	SourceType "Xilinx Bit Slice Extractor Block"
3996	infoedit "Extracts a given range of bits from each input "
3997	"sample and presents it at the output. The output type is ordinarily unsigned"
3998	" with binary point at zero, but can be Boolean when the slice is one bit wide"
3999	".<P><P>Hardware notes: In hardware this block costs nothing."
4000	nbits "1"
4001	boolean_output on
4002	mode "Lower Bit Location + Width"
4003	bit1 "27"
4004	base1 "LSB of Input"
4005	bit0 "28"
4006	base0 "LSB of Input"
4007	dbl_ovrd off
4008	has_advanced_control "0"
4009	sggui_pos "20,20,442,407"
4010	block_type "slice"
4011	block_version "9.1.01"
4012	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4013	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4014	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4015	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4016	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4017	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4018	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4019	"ENT: end icon text');\n"
4020	}
4021	Block {
4022	BlockType Reference
4023	Name "Slice23"
4024	Ports [1, 1]
4025	Position [175, 785, 205, 805]
4026	SourceBlock "xbsIndex_r4/Slice"
4027	SourceType "Xilinx Bit Slice Extractor Block"
4028	infoedit "Extracts a given range of bits from each input "
4029	"sample and presents it at the output. The output type is ordinarily unsigned"
4030	" with binary point at zero, but can be Boolean when the slice is one bit wide"
4031	".<P><P>Hardware notes: In hardware this block costs nothing."
4032	nbits "1"
4033	boolean_output on
4034	mode "Lower Bit Location + Width"
4035	bit1 "27"
4036	base1 "LSB of Input"
4037	bit0 "29"
4038	base0 "LSB of Input"
4039	dbl_ovrd off
4040	has_advanced_control "0"
4041	sggui_pos "20,20,442,407"
4042	block_type "slice"
4043	block_version "9.1.01"
4044	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4045	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4046	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4047	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4048	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4049	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4050	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4051	"ENT: end icon text');\n"
4052	}
4053	Block {
4054	BlockType Reference
4055	Name "Slice3"
4056	Ports [1, 1]
4057	Position [175, 90, 205, 110]
4058	SourceBlock "xbsIndex_r4/Slice"
4059	SourceType "Xilinx Bit Slice Extractor Block"
4060	infoedit "Extracts a given range of bits from each input "
4061	"sample and presents it at the output. The output type is ordinarily unsigned"
4062	" with binary point at zero, but can be Boolean when the slice is one bit wide"
4063	".<P><P>Hardware notes: In hardware this block costs nothing."
4064	nbits "1"
4065	boolean_output on
4066	mode "Lower Bit Location + Width"
4067	bit1 "3"
4068	base1 "LSB of Input"
4069	bit0 "3"
4070	base0 "LSB of Input"
4071	dbl_ovrd off
4072	has_advanced_control "0"
4073	sggui_pos "439,299,442,407"
4074	block_type "slice"
4075	block_version "9.1.01"
4076	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4077	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4078	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4079	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4080	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4081	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4082	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4083	"ENT: end icon text');\n"
4084	}
4085	Block {
4086	BlockType Reference
4087	Name "Slice4"
4088	Ports [1, 1]
4089	Position [175, 115, 205, 135]
4090	SourceBlock "xbsIndex_r4/Slice"
4091	SourceType "Xilinx Bit Slice Extractor Block"
4092	infoedit "Extracts a given range of bits from each input "
4093	"sample and presents it at the output. The output type is ordinarily unsigned"
4094	" with binary point at zero, but can be Boolean when the slice is one bit wide"
4095	".<P><P>Hardware notes: In hardware this block costs nothing."
4096	nbits "1"
4097	boolean_output on
4098	mode "Lower Bit Location + Width"
4099	bit1 "8"
4100	base1 "LSB of Input"
4101	bit0 "4"
4102	base0 "LSB of Input"
4103	dbl_ovrd off
4104	has_advanced_control "0"
4105	sggui_pos "20,20,442,407"
4106	block_type "slice"
4107	block_version "9.1.01"
4108	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4109	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4110	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4111	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4112	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4113	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4114	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4115	"ENT: end icon text');\n"
4116	}
4117	Block {
4118	BlockType Reference
4119	Name "Slice5"
4120	Ports [1, 1]
4121	Position [175, 140, 205, 160]
4122	SourceBlock "xbsIndex_r4/Slice"
4123	SourceType "Xilinx Bit Slice Extractor Block"
4124	infoedit "Extracts a given range of bits from each input "
4125	"sample and presents it at the output. The output type is ordinarily unsigned"
4126	" with binary point at zero, but can be Boolean when the slice is one bit wide"
4127	".<P><P>Hardware notes: In hardware this block costs nothing."
4128	nbits "1"
4129	boolean_output on
4130	mode "Lower Bit Location + Width"
4131	bit1 "9"
4132	base1 "LSB of Input"
4133	bit0 "5"
4134	base0 "LSB of Input"
4135	dbl_ovrd off
4136	has_advanced_control "0"
4137	sggui_pos "20,20,442,407"
4138	block_type "slice"
4139	block_version "9.1.01"
4140	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4141	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4142	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4143	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4144	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4145	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4146	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4147	"ENT: end icon text');\n"
4148	}
4149	Block {
4150	BlockType Reference
4151	Name "Slice6"
4152	Ports [1, 1]
4153	Position [175, 230, 205, 250]
4154	SourceBlock "xbsIndex_r4/Slice"
4155	SourceType "Xilinx Bit Slice Extractor Block"
4156	infoedit "Extracts a given range of bits from each input "
4157	"sample and presents it at the output. The output type is ordinarily unsigned"
4158	" with binary point at zero, but can be Boolean when the slice is one bit wide"
4159	".<P><P>Hardware notes: In hardware this block costs nothing."
4160	nbits "1"
4161	boolean_output on
4162	mode "Lower Bit Location + Width"
4163	bit1 "10"
4164	base1 "LSB of Input"
4165	bit0 "8"
4166	base0 "LSB of Input"
4167	dbl_ovrd off
4168	has_advanced_control "0"
4169	sggui_pos "20,20,442,407"
4170	block_type "slice"
4171	block_version "9.1.01"
4172	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4173	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4174	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4175	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4176	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4177	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4178	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4179	"ENT: end icon text');\n"
4180	}
4181	Block {
4182	BlockType Reference
4183	Name "Slice7"
4184	Ports [1, 1]
4185	Position [175, 255, 205, 275]
4186	SourceBlock "xbsIndex_r4/Slice"
4187	SourceType "Xilinx Bit Slice Extractor Block"
4188	infoedit "Extracts a given range of bits from each input "
4189	"sample and presents it at the output. The output type is ordinarily unsigned"
4190	" with binary point at zero, but can be Boolean when the slice is one bit wide"
4191	".<P><P>Hardware notes: In hardware this block costs nothing."
4192	nbits "1"
4193	boolean_output on
4194	mode "Lower Bit Location + Width"
4195	bit1 "11"
4196	base1 "LSB of Input"
4197	bit0 "9"
4198	base0 "LSB of Input"
4199	dbl_ovrd off
4200	has_advanced_control "0"
4201	sggui_pos "20,20,442,407"
4202	block_type "slice"
4203	block_version "9.1.01"
4204	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4205	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4206	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4207	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4208	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4209	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4210	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4211	"ENT: end icon text');\n"
4212	}
4213	Block {
4214	BlockType Reference
4215	Name "Slice8"
4216	Ports [1, 1]
4217	Position [175, 280, 205, 300]
4218	SourceBlock "xbsIndex_r4/Slice"
4219	SourceType "Xilinx Bit Slice Extractor Block"
4220	infoedit "Extracts a given range of bits from each input "
4221	"sample and presents it at the output. The output type is ordinarily unsigned"
4222	" with binary point at zero, but can be Boolean when the slice is one bit wide"
4223	".<P><P>Hardware notes: In hardware this block costs nothing."
4224	nbits "1"
4225	boolean_output on
4226	mode "Lower Bit Location + Width"
4227	bit1 "16"
4228	base1 "LSB of Input"
4229	bit0 "10"
4230	base0 "LSB of Input"
4231	dbl_ovrd off
4232	has_advanced_control "0"
4233	sggui_pos "20,20,442,407"
4234	block_type "slice"
4235	block_version "9.1.01"
4236	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4237	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4238	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4239	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4240	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4241	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4242	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4243	"ENT: end icon text');\n"
4244	}
4245	Block {
4246	BlockType Reference
4247	Name "Slice9"
4248	Ports [1, 1]
4249	Position [175, 305, 205, 325]
4250	SourceBlock "xbsIndex_r4/Slice"
4251	SourceType "Xilinx Bit Slice Extractor Block"
4252	infoedit "Extracts a given range of bits from each input "
4253	"sample and presents it at the output. The output type is ordinarily unsigned"
4254	" with binary point at zero, but can be Boolean when the slice is one bit wide"
4255	".<P><P>Hardware notes: In hardware this block costs nothing."
4256	nbits "1"
4257	boolean_output on
4258	mode "Lower Bit Location + Width"
4259	bit1 "17"
4260	base1 "LSB of Input"
4261	bit0 "11"
4262	base0 "LSB of Input"
4263	dbl_ovrd off
4264	has_advanced_control "0"
4265	sggui_pos "20,20,442,407"
4266	block_type "slice"
4267	block_version "9.1.01"
4268	sg_icon_stat "30,20,1,1,white,blue,0,b1026674,right"
4269	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4270	"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
4271	" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
4272	"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
4273	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
4274	"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
4275	"ENT: end icon text');\n"
4276	}
4277	Block {
4278	BlockType Reference
4279	Name "TIMEREXPIRE"
4280	Ports [1, 1]
4281	Position [1000, 45, 1060, 65]
4282	SourceBlock "xbsIndex_r4/Gateway Out"
4283	SourceType "Xilinx Gateway Out Block"
4284	infoedit "Gateway out block. Converts Xilinx fixed point"
4285	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
4286	"rdware notes: In hardware these blocks become top level output ports or are "
4287	"discarded, depending on how they are configured."
4288	hdl_port on
4289	timing_constraint "None"
4290	locs_specified off
4291	LOCs "{}"
4292	xl_use_area off
4293	xl_area "[0,0,0,0,0,0,0]"
4294	has_advanced_control "0"
4295	sggui_pos "20,20,356,352"
4296	block_type "gatewayout"
4297	block_version "8.2"
4298	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
4299	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4300	"tch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30"
4301	" 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 "
4302	"15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 "
4303	"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
4304	"on text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_la"
4305	"bel('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMM"
4306	"ENT: end icon text');\n"
4307	}
4308	Block {
4309	BlockType Reference
4310	Name "To Register"
4311	Ports [2, 1]
4312	Position [465, 176, 520, 229]
4313	ShowName off
4314	AttributesFormatString "To Register\\n<< %<shared_memory_name> >>"
4315	SourceBlock "xbsIndex_r4/To Register"
4316	SourceType "Xilinx Shared Memory Based To Register Block"
4317	infoedit "Register block that writes data to a shared mem"
4318	"ory register. Delay of one sample period."
4319	shared_memory_name "'timer0_timeLeft'"
4320	init "0"
4321	ownership "Locally owned and initialized"
4322	explicit_data_type on
4323	arith_type "Unsigned"
4324	n_bits "32"
4325	bin_pt "0"
4326	dbl_ovrd off
4327	xl_use_area off
4328	xl_area "[0,0,0,0,0,0,0]"
4329	has_advanced_control "0"
4330	sggui_pos "20,20,383,270"
4331	block_type "toreg"
4332	block_version "8.2"
4333	sg_icon_stat "55,53,2,1,white,blue,0,77cabcdf,right"
4334	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4335	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
4336	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
4337	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
4338	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
4339	"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
4340	"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
4341	"ntf('','COMMENT: end icon text');\n"
4342	}
4343	Block {
4344	BlockType Reference
4345	Name "To Register1"
4346	Ports [2, 1]
4347	Position [465, 391, 520, 444]
4348	ShowName off
4349	AttributesFormatString "To Register\\n<< %<shared_memory_name> >>"
4350	SourceBlock "xbsIndex_r4/To Register"
4351	SourceType "Xilinx Shared Memory Based To Register Block"
4352	infoedit "Register block that writes data to a shared mem"
4353	"ory register. Delay of one sample period."
4354	shared_memory_name "'timer1_timeLeft'"
4355	init "0"
4356	ownership "Locally owned and initialized"
4357	explicit_data_type on
4358	arith_type "Unsigned"
4359	n_bits "32"
4360	bin_pt "0"
4361	dbl_ovrd off
4362	xl_use_area off
4363	xl_area "[0,0,0,0,0,0,0]"
4364	has_advanced_control "0"
4365	sggui_pos "20,20,383,270"
4366	block_type "toreg"
4367	block_version "8.2"
4368	sg_icon_stat "55,53,2,1,white,blue,0,77cabcdf,right"
4369	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4370	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
4371	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
4372	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
4373	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
4374	"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
4375	"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
4376	"ntf('','COMMENT: end icon text');\n"
4377	}
4378	Block {
4379	BlockType Reference
4380	Name "To Register2"
4381	Ports [2, 1]
4382	Position [465, 606, 520, 659]
4383	ShowName off
4384	AttributesFormatString "To Register\\n<< %<shared_memory_name> >>"
4385	SourceBlock "xbsIndex_r4/To Register"
4386	SourceType "Xilinx Shared Memory Based To Register Block"
4387	infoedit "Register block that writes data to a shared mem"
4388	"ory register. Delay of one sample period."
4389	shared_memory_name "'timer2_timeLeft'"
4390	init "0"
4391	ownership "Locally owned and initialized"
4392	explicit_data_type on
4393	arith_type "Unsigned"
4394	n_bits "32"
4395	bin_pt "0"
4396	dbl_ovrd off
4397	xl_use_area off
4398	xl_area "[0,0,0,0,0,0,0]"
4399	has_advanced_control "0"
4400	sggui_pos "20,20,383,270"
4401	block_type "toreg"
4402	block_version "8.2"
4403	sg_icon_stat "55,53,2,1,white,blue,0,77cabcdf,right"
4404	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4405	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
4406	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
4407	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
4408	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
4409	"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
4410	"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
4411	"ntf('','COMMENT: end icon text');\n"
4412	}
4413	Block {
4414	BlockType Reference
4415	Name "To Register3"
4416	Ports [2, 1]
4417	Position [465, 821, 520, 874]
4418	ShowName off
4419	AttributesFormatString "To Register\\n<< %<shared_memory_name> >>"
4420	SourceBlock "xbsIndex_r4/To Register"
4421	SourceType "Xilinx Shared Memory Based To Register Block"
4422	infoedit "Register block that writes data to a shared mem"
4423	"ory register. Delay of one sample period."
4424	shared_memory_name "'timer3_timeLeft'"
4425	init "0"
4426	ownership "Locally owned and initialized"
4427	explicit_data_type on
4428	arith_type "Unsigned"
4429	n_bits "32"
4430	bin_pt "0"
4431	dbl_ovrd off
4432	xl_use_area off
4433	xl_area "[0,0,0,0,0,0,0]"
4434	has_advanced_control "0"
4435	sggui_pos "20,20,383,270"
4436	block_type "toreg"
4437	block_version "8.2"
4438	sg_icon_stat "55,53,2,1,white,blue,0,77cabcdf,right"
4439	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4440	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
4441	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
4442	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
4443	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
4444	"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
4445	"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
4446	"ntf('','COMMENT: end icon text');\n"
4447	}
4448	Block {
4449	BlockType Reference
4450	Name "To Register4"
4451	Ports [2, 1]
4452	Position [865, 366, 920, 419]
4453	ShowName off
4454	AttributesFormatString "To Register\\n<< %<shared_memory_name> >>"
4455	SourceBlock "xbsIndex_r4/To Register"
4456	SourceType "Xilinx Shared Memory Based To Register Block"
4457	infoedit "Register block that writes data to a shared mem"
4458	"ory register. Delay of one sample period."
4459	shared_memory_name "'timer_status'"
4460	init "0"
4461	ownership "Locally owned and initialized"
4462	explicit_data_type on
4463	arith_type "Unsigned"
4464	n_bits "32"
4465	bin_pt "0"
4466	dbl_ovrd off
4467	xl_use_area off
4468	xl_area "[0,0,0,0,0,0,0]"
4469	has_advanced_control "0"
4470	sggui_pos "290,195,381,270"
4471	block_type "toreg"
4472	block_version "9.1.01"
4473	sg_icon_stat "55,53,2,1,white,blue,0,77cabcdf,right"
4474	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
4475	"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
4476	"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
4477	"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
4478	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
4479	"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
4480	"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
4481	"ntf('','COMMENT: end icon text');\n"
4482	}
4483	Block {
4484	BlockType SubSystem
4485	Name "timer"
4486	Ports [8, 4]
4487	Position [290, 12, 400, 213]
4488	MinAlgLoopOccurrences off
4489	RTWSystemCode "Auto"
4490	FunctionWithSeparateData off
4491	MaskHideContents off
4492	System {
4493	Name "timer"
4494	Location [573, 442, 1553, 899]
4495	Open off
4496	ModelBrowserVisibility off
4497	ModelBrowserWidth 200
4498	ScreenColor "white"
4499	PaperOrientation "landscape"
4500	PaperPositionMode "auto"
4501	PaperType "usletter"
4502	PaperUnits "inches"
4503	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
4504	TiledPageScale 1
4505	ShowPageBoundaries off
4506	ZoomFactor "100"
4507	Block {
4508	BlockType Inport
4509	Name "start"
4510	Position [15, 163, 45, 177]
4511	IconDisplay "Port number"
4512	}
4513	Block {
4514	BlockType Inport
4515	Name "stop"
4516	Position [15, 288, 45, 302]
4517	Port "2"
4518	IconDisplay "Port number"
4519	}
4520	Block {
4521	BlockType Inport
4522	Name "resume"
4523	Position [15, 188, 45, 202]
4524	Port "3"
4525	IconDisplay "Port number"
4526	}
4527	Block {
4528	BlockType Inport
4529	Name "pause"
4530	Position [15, 313, 45, 327]
4531	Port "4"
4532	IconDisplay "Port number"
4533	}
4534	Block {
4535	BlockType Inport
4536	Name "mode"
4537	Position [155, 23, 185, 37]
4538	Port "5"
4539	IconDisplay "Port number"
4540	}
4541	Block {
4542	BlockType Inport
4543	Name "interruptReset"
4544	Position [680, 178, 710, 192]
4545	Port "6"
4546	IconDisplay "Port number"
4547	}
4548	Block {
4549	BlockType Inport
4550	Name "countTo"
4551	Position [515, 83, 545, 97]
4552	Port "7"
4553	IconDisplay "Port number"
4554	}
4555	Block {
4556	BlockType Inport
4557	Name "idlefordifs_inp"
4558	Position [155, 93, 185, 107]
4559	Port "8"
4560	IconDisplay "Port number"
4561	}
4562	Block {
4563	BlockType Reference
4564	Name "AddSub"
4565	Ports [2, 1]
4566	Position [665, 234, 710, 281]
4567	SourceBlock "xbsIndex_r4/AddSub"
4568	SourceType "Xilinx Adder/Subtractor Block"
4569	mode "Subtraction"
4570	use_carryin off
4571	use_carryout off
4572	en off
4573	latency "0"
4574	precision "User Defined"
4575	arith_type "Unsigned"
4576	n_bits "32"
4577	bin_pt "0"
4578	quantization "Truncate"
4579	overflow "Wrap"
4580	dbl_ovrd off
4581	use_behavioral_HDL off
4582	pipelined off
4583	use_rpm on
4584	xl_use_area off
4585	xl_area "[0,0,0,0,0,0,0]"
4586	has_advanced_control "0"
4587	sggui_pos "-1,-1,-1,-1"
4588	block_type "addsub"
4589	block_version "8.2"
4590	sg_icon_stat "45,47,2,1,white,blue,0,46b4c804,right"
4591	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4592	"\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 "
4593	"34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 "
4594	"53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58"
4595	" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
4596	"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
4597	"ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}'"
4598	",'texmode','on');\nfprintf('','COMMENT: end icon text');\n"
4599	}
4600	Block {
4601	BlockType Reference
4602	Name "Constant"
4603	Ports [0, 1]
4604	Position [520, 349, 550, 361]
4605	SourceBlock "xbsIndex_r4/Constant"
4606	SourceType "Xilinx Constant Block Block"
4607	arith_type "Unsigned"
4608	const "0"
4609	n_bits "32"
4610	bin_pt "0"
4611	explicit_period off
4612	period "1"
4613	dsp48_infoedit "The use of this block for DSP48 instruction"
4614	"s is deprecated. Please use the Opmode block."
4615	equ "P=C"
4616	opselect "C"
4617	inp2 "PCIN>>17"
4618	opr "+"
4619	inp1 "P"
4620	carry "CIN"
4621	dbl_ovrd off
4622	has_advanced_control "0"
4623	sggui_pos "50,50,400,346"
4624	block_type "constant"
4625	block_version "10.1.2"
4626	sg_icon_stat "30,12,1,1,white,blue,0,72d575a1,right"
4627	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4628	"\npatch([0 30 30 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([12 10 13 10 12 1"
4629	"5 16 17 20 17 14 12 15 12 14 17 20 17 16 15 12 ],[1 3 6 9 11 11 10 11 11 8 11"
4630	" 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]"
4631	");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
4632	"n text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: e"
4633	"nd icon text');\n"
4634	}
4635	Block {
4636	BlockType Reference
4637	Name "Constant1"
4638	Ports [0, 1]
4639	Position [155, 57, 190, 73]
4640	SourceBlock "xbsIndex_r4/Constant"
4641	SourceType "Xilinx Constant Block Block"
4642	arith_type "Unsigned"
4643	const "1"
4644	n_bits "1"
4645	bin_pt "0"
4646	explicit_period off
4647	period "1"
4648	dsp48_infoedit "The use of this block for DSP48 instruction"
4649	"s is deprecated. Please use the Opmode block."
4650	equ "P=C"
4651	opselect "C"
4652	inp2 "PCIN>>17"
4653	opr "+"
4654	inp1 "P"
4655	carry "CIN"
4656	dbl_ovrd off
4657	has_advanced_control "0"
4658	sggui_pos "-1,-1,-1,-1"
4659	block_type "constant"
4660	block_version "8.2"
4661	sg_icon_stat "35,16,0,1,white,blue,0,06094819,right"
4662	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4663	"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
4664	"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
4665	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
4666	"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
4667	"n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME"
4668	"NT: end icon text');\n"
4669	}
4670	Block {
4671	BlockType Reference
4672	Name "Convert1"
4673	Ports [1, 1]
4674	Position [290, 55, 325, 75]
4675	SourceBlock "xbsIndex_r4/Convert"
4676	SourceType "Xilinx Type Converter Block"
4677	infoedit "Hardware notes: rounding and saturating req"
4678	"uire hardware resources; truncating and wrapping do not."
4679	arith_type "Boolean"
4680	n_bits "16"
4681	bin_pt "14"
4682	quantization "Truncate"
4683	overflow "Wrap"
4684	latency "0"
4685	dbl_ovrd off
4686	pipeline off
4687	xl_use_area off
4688	xl_area "[0,0,0,0,0,0,0]"
4689	has_advanced_control "0"
4690	sggui_pos "20,20,461,375"
4691	block_type "convert"
4692	block_version "8.2"
4693	sg_icon_stat "35,20,1,1,white,blue,0,74901e60,right"
4694	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4695	"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
4696	"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
4697	" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
4698	"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
4699	"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
4700	"OMMENT: end icon text');\n"
4701	}
4702	Block {
4703	BlockType Reference
4704	Name "Counter"
4705	Ports [2, 1]
4706	Position [485, 119, 545, 221]
4707	SourceBlock "xbsIndex_r4/Counter"
4708	SourceType "Xilinx Counter Block"
4709	infoedit "Hardware notes: Free running counters are t"
4710	"he least expensive in hardware. A count limited counter is implemented by co"
4711	"mbining a counter with a comparator."
4712	cnt_type "Free Running"
4713	cnt_to "Inf"
4714	operation "Up"
4715	start_count "0"
4716	cnt_by_val "1"
4717	arith_type "Unsigned"
4718	n_bits "32"
4719	bin_pt "0"
4720	load_pin off
4721	rst on
4722	en on
4723	explicit_period "on"
4724	period "1"
4725	dbl_ovrd off
4726	use_behavioral_HDL off
4727	use_rpm off
4728	xl_use_area off
4729	xl_area "[0,0,0,0,0,0,0]"
4730	has_advanced_control "0"
4731	sggui_pos "20,20,356,630"
4732	block_type "counter"
4733	block_version "8.2"
4734	sg_icon_stat "60,102,2,1,white,blue,0,46c73e85,right"
4735	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4736	"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
4737	"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
4738	"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
4739	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
4740	"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
4741	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
4742	"printf('','COMMENT: end icon text');\n"
4743	}
4744	Block {
4745	BlockType Reference
4746	Name "Inverter"
4747	Ports [1, 1]
4748	Position [660, 371, 705, 389]
4749	SourceBlock "xbsIndex_r4/Inverter"
4750	SourceType "Xilinx Inverter Block"
4751	infoedit "Bitwise logical negation (one's complement)"
4752	" operator."
4753	en off
4754	latency "0"
4755	dbl_ovrd off
4756	xl_use_area off
4757	xl_area "[0,0,0,0,0,0,0]"
4758	has_advanced_control "0"
4759	sggui_pos "-1,-1,-1,-1"
4760	block_type "inv"
4761	block_version "10.1.2"
4762	sg_icon_stat "45,18,1,1,white,blue,0,1ab4a85f,right"
4763	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4764	"\npatch([0 45 45 0 ],[0 0 18 18 ],[0.77 0.82 0.91]);\npatch([18 15 19 15 18 2"
4765	"3 24 25 30 26 22 19 23 19 22 26 30 25 24 23 18 ],[2 5 9 13 16 16 15 16 16 12 "
4766	"16 13 9 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 18 18 "
4767	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
4768	"icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text"
4769	"');\n"
4770	}
4771	Block {
4772	BlockType Reference
4773	Name "Logical"
4774	Ports [2, 1]
4775	Position [360, 174, 405, 216]
4776	SourceBlock "xbsIndex_r4/Logical"
4777	SourceType "Xilinx Logical Block Block"
4778	logical_function "AND"
4779	inputs "2"
4780	en off
4781	latency "0"
4782	precision "Full"
4783	arith_type "Unsigned"
4784	n_bits "16"
4785	bin_pt "0"
4786	align_bp on
4787	dbl_ovrd off
4788	xl_use_area off
4789	xl_area "[0,0,0,0,0,0,0]"
4790	has_advanced_control "0"
4791	sggui_pos "20,20,348,261"
4792	block_type "logical"
4793	block_version "8.2"
4794	sg_icon_stat "45,42,2,1,white,blue,0,087b5522,right"
4795	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4796	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
4797	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
4798	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
4799	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
4800	"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
4801	",'on');\nfprintf('','COMMENT: end icon text');\n"
4802	}
4803	Block {
4804	BlockType Reference
4805	Name "Logical1"
4806	Ports [3, 1]
4807	Position [430, 127, 465, 163]
4808	SourceBlock "xbsIndex_r4/Logical"
4809	SourceType "Xilinx Logical Block Block"
4810	logical_function "OR"
4811	inputs "3"
4812	en off
4813	latency "0"
4814	precision "Full"
4815	arith_type "Unsigned"
4816	n_bits "16"
4817	bin_pt "0"
4818	align_bp on
4819	dbl_ovrd off
4820	xl_use_area off
4821	xl_area "[0,0,0,0,0,0,0]"
4822	has_advanced_control "0"
4823	sggui_pos "-1,-1,-1,-1"
4824	block_type "logical"
4825	block_version "8.2"
4826	sg_icon_stat "35,36,3,1,white,blue,0,bd50cad4,right"
4827	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4828	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
4829	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
4830	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
4831	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
4832	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
4833	"'on');\nfprintf('','COMMENT: end icon text');\n"
4834	}
4835	Block {
4836	BlockType Reference
4837	Name "Logical2"
4838	Ports [3, 1]
4839	Position [187, 245, 223, 280]
4840	Orientation "up"
4841	SourceBlock "xbsIndex_r4/Logical"
4842	SourceType "Xilinx Logical Block Block"
4843	logical_function "OR"
4844	inputs "3"
4845	en off
4846	latency "0"
4847	precision "Full"
4848	arith_type "Unsigned"
4849	n_bits "16"
4850	bin_pt "0"
4851	align_bp on
4852	dbl_ovrd off
4853	xl_use_area off
4854	xl_area "[0,0,0,0,0,0,0]"
4855	has_advanced_control "0"
4856	sggui_pos "-1,-1,-1,-1"
4857	block_type "logical"
4858	block_version "8.2"
4859	sg_icon_stat "36,35,3,1,white,blue,0,bd50cad4,right"
4860	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4861	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
4862	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
4863	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
4864	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
4865	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
4866	"'on');\nfprintf('','COMMENT: end icon text');\n"
4867	}
4868	Block {
4869	BlockType Reference
4870	Name "Logical3"
4871	Ports [2, 1]
4872	Position [170, 159, 200, 206]
4873	SourceBlock "xbsIndex_r4/Logical"
4874	SourceType "Xilinx Logical Block Block"
4875	logical_function "OR"
4876	inputs "2"
4877	en off
4878	latency "0"
4879	precision "Full"
4880	arith_type "Unsigned"
4881	n_bits "16"
4882	bin_pt "0"
4883	align_bp on
4884	dbl_ovrd off
4885	xl_use_area off
4886	xl_area "[0,0,0,0,0,0,0]"
4887	has_advanced_control "0"
4888	sggui_pos "-1,-1,-1,-1"
4889	block_type "logical"
4890	block_version "9.1.01"
4891	sg_icon_stat "30,47,2,1,white,blue,0,f4a65842,right"
4892	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4893	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
4894	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
4895	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
4896	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
4897	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
4898	"'on');\nfprintf('','COMMENT: end icon text');\n"
4899	}
4900	Block {
4901	BlockType Reference
4902	Name "Logical4"
4903	Ports [2, 1]
4904	Position [735, 328, 780, 397]
4905	SourceBlock "xbsIndex_r4/Logical"
4906	SourceType "Xilinx Logical Block Block"
4907	logical_function "AND"
4908	inputs "2"
4909	en off
4910	latency "0"
4911	precision "Full"
4912	arith_type "Unsigned"
4913	n_bits "16"
4914	bin_pt "0"
4915	align_bp on
4916	dbl_ovrd off
4917	xl_use_area off
4918	xl_area "[0,0,0,0,0,0,0]"
4919	has_advanced_control "0"
4920	sggui_pos "-1,-1,-1,-1"
4921	block_type "logical"
4922	block_version "10.1.2"
4923	sg_icon_stat "45,69,2,1,white,blue,0,087b5522,right"
4924	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4925	"\npatch([0 45 45 0 ],[0 0 69 69 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 "
4926	"25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[17 24 35 46 53 53 50 53 53 43"
4927	" 53 46 35 24 17 27 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],["
4928	"0 0 69 69 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME"
4929	"NT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','te"
4930	"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
4931	}
4932	Block {
4933	BlockType Reference
4934	Name "Mux"
4935	Ports [3, 1]
4936	Position [215, 13, 260, 117]
4937	SourceBlock "xbsIndex_r4/Mux"
4938	SourceType "Xilinx Bus Multiplexer Block"
4939	inputs "2"
4940	en off
4941	latency "0"
4942	precision "Full"
4943	arith_type "Unsigned"
4944	n_bits "16"
4945	bin_pt "14"
4946	quantization "Truncate"
4947	overflow "Wrap"
4948	dbl_ovrd off
4949	xl_use_area off
4950	xl_area "[0,0,0,0,0,0,0]"
4951	has_advanced_control "0"
4952	sggui_pos "-1,-1,-1,-1"
4953	block_type "mux"
4954	block_version "8.2"
4955	sg_icon_stat "45,104,3,1,white,blue,3,613f58e1,right"
4956	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4957	"\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3"
4958	" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70"
4959	" 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4"
4960	"5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi"
4961	"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
4962	"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
4963	"rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr"
4964	"intf('','COMMENT: end icon text');\n"
4965	}
4966	Block {
4967	BlockType Reference
4968	Name "Relational"
4969	Ports [2, 1]
4970	Position [585, 126, 625, 184]
4971	SourceBlock "xbsIndex_r4/Relational"
4972	SourceType "Xilinx Arithmetic Relational Operator Block"
4973	mode "a=b"
4974	en off
4975	latency "0"
4976	dbl_ovrd off
4977	xl_use_area off
4978	xl_area "[0,0,0,0,0,0,0]"
4979	has_advanced_control "0"
4980	sggui_pos "-1,-1,-1,-1"
4981	block_type "relational"
4982	block_version "8.2"
4983	sg_icon_stat "40,58,2,1,white,blue,0,1b68ef8e,right"
4984	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
4985	"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
4986	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
4987	"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
4988	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
4989	"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
4990	"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^"
4991	"{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
4992	}
4993	Block {
4994	BlockType Reference
4995	Name "Relational1"
4996	Ports [2, 1]
4997	Position [585, 326, 630, 364]
4998	SourceBlock "xbsIndex_r4/Relational"
4999	SourceType "Xilinx Arithmetic Relational Operator Block"
5000	mode "a>b"
5001	en off
5002	latency "1"
5003	dbl_ovrd off
5004	xl_use_area off
5005	xl_area "[0,0,0,0,0,0,0]"
5006	has_advanced_control "0"
5007	sggui_pos "20,20,348,193"
5008	block_type "relational"
5009	block_version "10.1.2"
5010	sg_icon_stat "45,38,1,1,white,blue,0,c445790c,right"
5011	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
5012	"\npatch([0 45 45 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([12 6 15 6 12 22 "
5013	"25 28 39 31 23 17 26 17 23 31 39 28 25 22 12 ],[4 10 19 28 34 34 31 34 34 26 "
5014	"34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 38 "
5015	"38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
5016	"in icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');po"
5017	"rt_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>b}\\newlinez^{"
5018	"-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
5019	}
5020	Block {
5021	BlockType SubSystem
5022	Name "S-R_Latch1"
5023	Ports [2, 1]
5024	Position [245, 167, 285, 238]
5025	MinAlgLoopOccurrences off
5026	RTWSystemCode "Auto"
5027	FunctionWithSeparateData off
5028	MaskHideContents off
5029	System {
5030	Name "S-R_Latch1"
5031	Location [837, 103, 1234, 376]
5032	Open off
5033	ModelBrowserVisibility off
5034	ModelBrowserWidth 200
5035	ScreenColor "white"
5036	PaperOrientation "landscape"
5037	PaperPositionMode "auto"
5038	PaperType "usletter"
5039	PaperUnits "inches"
5040	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
5041	TiledPageScale 1
5042	ShowPageBoundaries off
5043	ZoomFactor "100"
5044	Block {
5045	BlockType Inport
5046	Name "S"
5047	Position [95, 58, 125, 72]
5048	IconDisplay "Port number"
5049	}
5050	Block {
5051	BlockType Inport
5052	Name "R"
5053	Position [95, 88, 125, 102]
5054	Port "2"
5055	IconDisplay "Port number"
5056	}
5057	Block {
5058	BlockType Reference
5059	Name "Inverter"
5060	Ports [1, 1]
5061	Position [220, 82, 250, 108]
5062	SourceBlock "xbsIndex_r4/Inverter"
5063	SourceType "Xilinx Inverter Block"
5064	infoedit "Bitwise logical negation (one's complem"
5065	"ent) operator."
5066	en "off"
5067	latency "0"
5068	dbl_ovrd "off"
5069	xl_use_area "off"
5070	xl_area "[0,0,0,0,0,0,0]"
5071	has_advanced_control "0"
5072	sggui_pos "-1,-1,-1,-1"
5073	block_type "inv"
5074	block_version "VER_STRING_GOES_HERE"
5075	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
5076	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5077	"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
5078	"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
5079	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
5080	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
5081	"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
5082	" text');\n"
5083	}
5084	Block {
5085	BlockType Reference
5086	Name "Register"
5087	Ports [3, 1]
5088	Position [150, 70, 195, 120]
5089	SourceBlock "xbsIndex_r4/Register"
5090	SourceType "Xilinx Register Block"
5091	init "0"
5092	rst "on"
5093	en "on"
5094	dbl_ovrd "off"
5095	xl_use_area "off"
5096	xl_area "[0,0,0,0,0,0,0]"
5097	has_advanced_control "0"
5098	sggui_pos "20,20,348,193"
5099	block_type "register"
5100	block_version "VER_STRING_GOES_HERE"
5101	sg_icon_stat "45,50,1,1,white,blue,0,923c1847,right"
5102	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5103	"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
5104	"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
5105	"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
5106	" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
5107	"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
5108	"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
5109	");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
5110	"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
5111	}
5112	Block {
5113	BlockType Outport
5114	Name "Q"
5115	Position [285, 63, 315, 77]
5116	IconDisplay "Port number"
5117	BusOutputAsStruct off
5118	}
5119	Line {
5120	SrcBlock "R"
5121	SrcPort 1
5122	DstBlock "Register"
5123	DstPort 2
5124	}
5125	Line {
5126	SrcBlock "S"
5127	SrcPort 1
5128	DstBlock "Register"
5129	DstPort 1
5130	}
5131	Line {
5132	SrcBlock "Inverter"
5133	SrcPort 1
5134	Points [10, 0; 0, 55; -130, 0]
5135	DstBlock "Register"
5136	DstPort 3
5137	}
5138	Line {
5139	SrcBlock "Register"
5140	SrcPort 1
5141	Points [0, 0; 5, 0]
5142	Branch {
5143	Points [0, -25]
5144	DstBlock "Q"
5145	DstPort 1
5146	}
5147	Branch {
5148	DstBlock "Inverter"
5149	DstPort 1
5150	}
5151	}
5152	}
5153	}
5154	Block {
5155	BlockType SubSystem
5156	Name "S-R_Latch2"
5157	Ports [2, 1]
5158	Position [745, 140, 785, 200]
5159	MinAlgLoopOccurrences off
5160	RTWSystemCode "Auto"
5161	FunctionWithSeparateData off
5162	MaskHideContents off
5163	System {
5164	Name "S-R_Latch2"
5165	Location [521, 318, 918, 591]
5166	Open off
5167	ModelBrowserVisibility off
5168	ModelBrowserWidth 200
5169	ScreenColor "white"
5170	PaperOrientation "landscape"
5171	PaperPositionMode "auto"
5172	PaperType "usletter"
5173	PaperUnits "inches"
5174	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
5175	TiledPageScale 1
5176	ShowPageBoundaries off
5177	ZoomFactor "100"
5178	Block {
5179	BlockType Inport
5180	Name "S"
5181	Position [95, 58, 125, 72]
5182	IconDisplay "Port number"
5183	}
5184	Block {
5185	BlockType Inport
5186	Name "R"
5187	Position [95, 88, 125, 102]
5188	Port "2"
5189	IconDisplay "Port number"
5190	}
5191	Block {
5192	BlockType Reference
5193	Name "Inverter"
5194	Ports [1, 1]
5195	Position [220, 82, 250, 108]
5196	SourceBlock "xbsIndex_r4/Inverter"
5197	SourceType "Xilinx Inverter Block"
5198	infoedit "Bitwise logical negation (one's complem"
5199	"ent) operator."
5200	en "off"
5201	latency "0"
5202	dbl_ovrd "off"
5203	xl_use_area "off"
5204	xl_area "[0,0,0,0,0,0,0]"
5205	has_advanced_control "0"
5206	sggui_pos "-1,-1,-1,-1"
5207	block_type "inv"
5208	block_version "VER_STRING_GOES_HERE"
5209	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
5210	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5211	"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
5212	"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
5213	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
5214	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
5215	"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
5216	" text');\n"
5217	}
5218	Block {
5219	BlockType Reference
5220	Name "Register"
5221	Ports [3, 1]
5222	Position [150, 70, 195, 120]
5223	SourceBlock "xbsIndex_r4/Register"
5224	SourceType "Xilinx Register Block"
5225	init "0"
5226	rst "on"
5227	en "on"
5228	dbl_ovrd "off"
5229	xl_use_area "off"
5230	xl_area "[0,0,0,0,0,0,0]"
5231	has_advanced_control "0"
5232	sggui_pos "-1,-1,-1,-1"
5233	block_type "register"
5234	block_version "VER_STRING_GOES_HERE"
5235	sg_icon_stat "45,50,1,1,white,blue,0,923c1847,right"
5236	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5237	"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
5238	"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
5239	"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
5240	" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
5241	"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
5242	"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
5243	");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
5244	"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
5245	}
5246	Block {
5247	BlockType Outport
5248	Name "Q"
5249	Position [285, 63, 315, 77]
5250	IconDisplay "Port number"
5251	BusOutputAsStruct off
5252	}
5253	Line {
5254	SrcBlock "Register"
5255	SrcPort 1
5256	Points [0, 0; 5, 0]
5257	Branch {
5258	DstBlock "Inverter"
5259	DstPort 1
5260	}
5261	Branch {
5262	Points [0, -25]
5263	DstBlock "Q"
5264	DstPort 1
5265	}
5266	}
5267	Line {
5268	SrcBlock "Inverter"
5269	SrcPort 1
5270	Points [10, 0; 0, 55; -130, 0]
5271	DstBlock "Register"
5272	DstPort 3
5273	}
5274	Line {
5275	SrcBlock "S"
5276	SrcPort 1
5277	DstBlock "Register"
5278	DstPort 1
5279	}
5280	Line {
5281	SrcBlock "R"
5282	SrcPort 1
5283	DstBlock "Register"
5284	DstPort 2
5285	}
5286	}
5287	}
5288	Block {
5289	BlockType SubSystem
5290	Name "posedge"
5291	Ports [1, 1]
5292	Position [75, 163, 105, 177]
5293	MinAlgLoopOccurrences off
5294	RTWSystemCode "Auto"
5295	FunctionWithSeparateData off
5296	MaskHideContents off
5297	System {
5298	Name "posedge"
5299	Location [459, 339, 854, 490]
5300	Open off
5301	ModelBrowserVisibility off
5302	ModelBrowserWidth 200
5303	ScreenColor "white"
5304	PaperOrientation "landscape"
5305	PaperPositionMode "auto"
5306	PaperType "usletter"
5307	PaperUnits "inches"
5308	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
5309	TiledPageScale 1
5310	ShowPageBoundaries off
5311	ZoomFactor "100"
5312	Block {
5313	BlockType Inport
5314	Name "In"
5315	Position [20, 33, 50, 47]
5316	IconDisplay "Port number"
5317	}
5318	Block {
5319	BlockType Reference
5320	Name "Delay"
5321	Ports [1, 1]
5322	Position [80, 67, 140, 123]
5323	SourceBlock "xbsIndex_r4/Delay"
5324	SourceType "Xilinx Delay Block"
5325	infoedit "Hardware notes: A delay line is a chain"
5326	", each link of which is an SRL16 followed by a flip-flop. If register retimin"
5327	"g is enabled, the delay line is a chain of flip-flops."
5328	en "off"
5329	latency "1"
5330	dbl_ovrd "off"
5331	reg_retiming "off"
5332	xl_use_area "off"
5333	xl_area "[1 1 0 0 0 0 0]"
5334	has_advanced_control "0"
5335	sggui_pos "-1,-1,-1,-1"
5336	block_type "delay"
5337	block_version "8.2"
5338	sg_icon_stat "60,56,1,1,white,blue,0,fc531c0e,right"
5339	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5340	"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
5341	" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
5342	" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
5343	"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
5344	": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
5345	"'','COMMENT: end icon text');\n"
5346	}
5347	Block {
5348	BlockType Reference
5349	Name "Inverter"
5350	Ports [1, 1]
5351	Position [170, 66, 225, 124]
5352	SourceBlock "xbsIndex_r4/Inverter"
5353	SourceType "Xilinx Inverter Block"
5354	infoedit "Bitwise logical negation (one's complem"
5355	"ent) operator."
5356	en "off"
5357	latency "0"
5358	dbl_ovrd "off"
5359	xl_use_area "off"
5360	xl_area "[0 0 0 0 0 0 0]"
5361	has_advanced_control "0"
5362	sggui_pos "-1,-1,-1,-1"
5363	block_type "inv"
5364	block_version "8.2"
5365	sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right"
5366	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5367	"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
5368	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
5369	" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
5370	"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
5371	": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
5372	"con text');\n"
5373	}
5374	Block {
5375	BlockType Reference
5376	Name "Logical"
5377	Ports [2, 1]
5378	Position [260, 25, 315, 85]
5379	SourceBlock "xbsIndex_r4/Logical"
5380	SourceType "Xilinx Logical Block Block"
5381	logical_function "AND"
5382	inputs "2"
5383	en "off"
5384	latency "0"
5385	precision "Full"
5386	arith_type "Unsigned"
5387	n_bits "16"
5388	bin_pt "0"
5389	align_bp "on"
5390	dbl_ovrd "off"
5391	xl_use_area "off"
5392	xl_area "[1 0 0 1 0 0 0]"
5393	has_advanced_control "0"
5394	sggui_pos "-1,-1,-1,-1"
5395	block_type "logical"
5396	block_version "8.2"
5397	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
5398	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5399	"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
5400	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
5401	" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
5402	"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
5403	": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
5404	"ode','on');\nfprintf('','COMMENT: end icon text');\n"
5405	}
5406	Block {
5407	BlockType Outport
5408	Name "Out"
5409	Position [340, 48, 370, 62]
5410	IconDisplay "Port number"
5411	BusOutputAsStruct off
5412	}
5413	Line {
5414	SrcBlock "Delay"
5415	SrcPort 1
5416	Points [0, 0]
5417	DstBlock "Inverter"
5418	DstPort 1
5419	}
5420	Line {
5421	SrcBlock "Inverter"
5422	SrcPort 1
5423	Points [5, 0; 0, -25]
5424	DstBlock "Logical"
5425	DstPort 2
5426	}
5427	Line {
5428	SrcBlock "In"
5429	SrcPort 1
5430	Points [0, 0; 5, 0]
5431	Branch {
5432	DstBlock "Logical"
5433	DstPort 1
5434	}
5435	Branch {
5436	Points [0, 55]
5437	DstBlock "Delay"
5438	DstPort 1
5439	}
5440	}
5441	Line {
5442	SrcBlock "Logical"
5443	SrcPort 1
5444	Points [0, 0]
5445	DstBlock "Out"
5446	DstPort 1
5447	}
5448	}
5449	}
5450	Block {
5451	BlockType SubSystem
5452	Name "posedge1"
5453	Ports [1, 1]
5454	Position [75, 188, 105, 202]
5455	MinAlgLoopOccurrences off
5456	RTWSystemCode "Auto"
5457	FunctionWithSeparateData off
5458	MaskHideContents off
5459	System {
5460	Name "posedge1"
5461	Location [459, 339, 854, 490]
5462	Open off
5463	ModelBrowserVisibility off
5464	ModelBrowserWidth 200
5465	ScreenColor "white"
5466	PaperOrientation "landscape"
5467	PaperPositionMode "auto"
5468	PaperType "usletter"
5469	PaperUnits "inches"
5470	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
5471	TiledPageScale 1
5472	ShowPageBoundaries off
5473	ZoomFactor "100"
5474	Block {
5475	BlockType Inport
5476	Name "In"
5477	Position [20, 33, 50, 47]
5478	IconDisplay "Port number"
5479	}
5480	Block {
5481	BlockType Reference
5482	Name "Delay"
5483	Ports [1, 1]
5484	Position [80, 67, 140, 123]
5485	SourceBlock "xbsIndex_r4/Delay"
5486	SourceType "Xilinx Delay Block"
5487	infoedit "Hardware notes: A delay line is a chain"
5488	", each link of which is an SRL16 followed by a flip-flop. If register retimin"
5489	"g is enabled, the delay line is a chain of flip-flops."
5490	en "off"
5491	latency "1"
5492	dbl_ovrd "off"
5493	reg_retiming "off"
5494	xl_use_area "off"
5495	xl_area "[1 1 0 0 0 0 0]"
5496	has_advanced_control "0"
5497	sggui_pos "-1,-1,-1,-1"
5498	block_type "delay"
5499	block_version "8.2"
5500	sg_icon_stat "60,56,1,1,white,blue,0,fc531c0e,right"
5501	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5502	"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
5503	" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
5504	" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
5505	"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
5506	": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
5507	"'','COMMENT: end icon text');\n"
5508	}
5509	Block {
5510	BlockType Reference
5511	Name "Inverter"
5512	Ports [1, 1]
5513	Position [170, 66, 225, 124]
5514	SourceBlock "xbsIndex_r4/Inverter"
5515	SourceType "Xilinx Inverter Block"
5516	infoedit "Bitwise logical negation (one's complem"
5517	"ent) operator."
5518	en "off"
5519	latency "0"
5520	dbl_ovrd "off"
5521	xl_use_area "off"
5522	xl_area "[0 0 0 0 0 0 0]"
5523	has_advanced_control "0"
5524	sggui_pos "-1,-1,-1,-1"
5525	block_type "inv"
5526	block_version "8.2"
5527	sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right"
5528	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5529	"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
5530	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
5531	" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
5532	"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
5533	": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
5534	"con text');\n"
5535	}
5536	Block {
5537	BlockType Reference
5538	Name "Logical"
5539	Ports [2, 1]
5540	Position [260, 25, 315, 85]
5541	SourceBlock "xbsIndex_r4/Logical"
5542	SourceType "Xilinx Logical Block Block"
5543	logical_function "AND"
5544	inputs "2"
5545	en "off"
5546	latency "0"
5547	precision "Full"
5548	arith_type "Unsigned"
5549	n_bits "16"
5550	bin_pt "0"
5551	align_bp "on"
5552	dbl_ovrd "off"
5553	xl_use_area "off"
5554	xl_area "[1 0 0 1 0 0 0]"
5555	has_advanced_control "0"
5556	sggui_pos "-1,-1,-1,-1"
5557	block_type "logical"
5558	block_version "8.2"
5559	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
5560	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
5561	"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
5562	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
5563	" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
5564	"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
5565	": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
5566	"ode','on');\nfprintf('','COMMENT: end icon text');\n"
5567	}
5568	Block {
5569	BlockType Outport
5570	Name "Out"
5571	Position [340, 48, 370, 62]
5572	IconDisplay "Port number"
5573	BusOutputAsStruct off
5574	}
5575	Line {
5576	SrcBlock "Logical"
5577	SrcPort 1
5578	Points [0, 0]
5579	DstBlock "Out"
5580	DstPort 1
5581	}
5582	Line {
5583	SrcBlock "In"
5584	SrcPort 1
5585	Points [0, 0; 5, 0]
5586	Branch {
5587	Points [0, 55]
5588	DstBlock "Delay"
5589	DstPort 1
5590	}
5591	Branch {
5592	DstBlock "Logical"
5593	DstPort 1
5594	}
5595	}
5596	Line {
5597	SrcBlock "Inverter"
5598	SrcPort 1
5599	Points [5, 0; 0, -25]
5600	DstBlock "Logical"
5601	DstPort 2
5602	}
5603	Line {
5604	SrcBlock "Delay"
5605	SrcPort 1
5606	Points [0, 0]
5607	DstBlock "Inverter"
5608	DstPort 1
5609	}
5610	}
5611	}
5612	Block {
5613	BlockType Outport
5614	Name "interrupt"
5615	Position [810, 163, 840, 177]
5616	IconDisplay "Port number"
5617	BusOutputAsStruct off
5618	}
5619	Block {
5620	BlockType Outport
5621	Name "active"
5622	Position [350, 253, 380, 267]
5623	Port "2"
5624	IconDisplay "Port number"
5625	BusOutputAsStruct off
5626	}
5627	Block {
5628	BlockType Outport
5629	Name "paused"
5630	Position [820, 358, 850, 372]
5631	Port "3"
5632	IconDisplay "Port number"
5633	BusOutputAsStruct off
5634	}
5635	Block {
5636	BlockType Outport
5637	Name "timeLeft"
5638	Position [740, 253, 770, 267]
5639	Port "4"
5640	IconDisplay "Port number"
5641	BusOutputAsStruct off
5642	}
5643	Line {
5644	SrcBlock "start"
5645	SrcPort 1
5646	DstBlock "posedge"
5647	DstPort 1
5648	}
5649	Line {
5650	SrcBlock "posedge"
5651	SrcPort 1
5652	Points [15, 0]
5653	Branch {
5654	DstBlock "Logical3"
5655	DstPort 1
5656	}
5657	Branch {
5658	Points [0, -15]
5659	DstBlock "Logical1"
5660	DstPort 3
5661	}
5662	}
5663	Line {
5664	SrcBlock "mode"
5665	SrcPort 1
5666	DstBlock "Mux"
5667	DstPort 1
5668	}
5669	Line {
5670	SrcBlock "Logical"
5671	SrcPort 1
5672	DstBlock "Counter"
5673	DstPort 2
5674	}
5675	Line {
5676	SrcBlock "countTo"
5677	SrcPort 1
5678	Points [10, 0; 0, 50]
5679	Branch {
5680	Points [0, 105]
5681	DstBlock "AddSub"
5682	DstPort 1
5683	}
5684	Branch {
5685	DstBlock "Relational"
5686	DstPort 1
5687	}
5688	}
5689	Line {
5690	SrcBlock "Relational"
5691	SrcPort 1
5692	Points [5, 0]
5693	Branch {
5694	Points [0, -80; -230, 0; 0, 60]
5695	DstBlock "Logical1"
5696	DstPort 1
5697	}
5698	Branch {
5699	DstBlock "S-R_Latch2"
5700	DstPort 1
5701	}
5702	Branch {
5703	Points [0, 140]
5704	DstBlock "Logical2"
5705	DstPort 3
5706	}
5707	}
5708	Line {
5709	SrcBlock "Counter"
5710	SrcPort 1
5711	Points [0, 0]
5712	Branch {
5713	Labels [1, 0]
5714	DstBlock "Relational"
5715	DstPort 2
5716	}
5717	Branch {
5718	Points [0, 100]
5719	DstBlock "AddSub"
5720	DstPort 2
5721	}
5722	Branch {
5723	Points [0, 165]
5724	DstBlock "Relational1"
5725	DstPort 1
5726	}
5727	}
5728	Line {
5729	SrcBlock "Constant1"
5730	SrcPort 1
5731	DstBlock "Mux"
5732	DstPort 2
5733	}
5734	Line {
5735	SrcBlock "idlefordifs_inp"
5736	SrcPort 1
5737	DstBlock "Mux"
5738	DstPort 3
5739	}
5740	Line {
5741	SrcBlock "Mux"
5742	SrcPort 1
5743	DstBlock "Convert1"
5744	DstPort 1
5745	}
5746	Line {
5747	SrcBlock "Convert1"
5748	SrcPort 1
5749	Points [15, 0]
5750	DstBlock "Logical"
5751	DstPort 1
5752	}
5753	Line {
5754	SrcBlock "Logical1"
5755	SrcPort 1
5756	DstBlock "Counter"
5757	DstPort 1
5758	}
5759	Line {
5760	SrcBlock "interruptReset"
5761	SrcPort 1
5762	DstBlock "S-R_Latch2"
5763	DstPort 2
5764	}
5765	Line {
5766	SrcBlock "Logical2"
5767	SrcPort 1
5768	Points [0, -20]
5769	DstBlock "S-R_Latch1"
5770	DstPort 2
5771	}
5772	Line {
5773	SrcBlock "S-R_Latch2"
5774	SrcPort 1
5775	DstBlock "interrupt"
5776	DstPort 1
5777	}
5778	Line {
5779	SrcBlock "stop"
5780	SrcPort 1
5781	Points [70, 0]
5782	Branch {
5783	DstBlock "Logical2"
5784	DstPort 1
5785	}
5786	Branch {
5787	Points [0, -150]
5788	DstBlock "Logical1"
5789	DstPort 2
5790	}
5791	}
5792	Line {
5793	SrcBlock "S-R_Latch1"
5794	SrcPort 1
5795	Points [25, 0]
5796	Branch {
5797	DstBlock "Logical"
5798	DstPort 2
5799	}
5800	Branch {
5801	Points [0, 55]
5802	DstBlock "active"
5803	DstPort 1
5804	}
5805	Branch {
5806	Points [0, 175]
5807	DstBlock "Inverter"
5808	DstPort 1
5809	}
5810	}
5811	Line {
5812	SrcBlock "AddSub"
5813	SrcPort 1
5814	DstBlock "timeLeft"
5815	DstPort 1
5816	}
5817	Line {
5818	SrcBlock "resume"
5819	SrcPort 1
5820	DstBlock "posedge1"
5821	DstPort 1
5822	}
5823	Line {
5824	SrcBlock "Logical3"
5825	SrcPort 1
5826	DstBlock "S-R_Latch1"
5827	DstPort 1
5828	}
5829	Line {
5830	SrcBlock "posedge1"
5831	SrcPort 1
5832	DstBlock "Logical3"
5833	DstPort 2
5834	}
5835	Line {
5836	SrcBlock "pause"
5837	SrcPort 1
5838	Points [155, 0]
5839	DstBlock "Logical2"
5840	DstPort 2
5841	}
5842	Line {
5843	SrcBlock "Constant"
5844	SrcPort 1
5845	DstBlock "Relational1"
5846	DstPort 2
5847	}
5848	Line {
5849	SrcBlock "Relational1"
5850	SrcPort 1
5851	DstBlock "Logical4"
5852	DstPort 1
5853	}
5854	Line {
5855	SrcBlock "Inverter"
5856	SrcPort 1
5857	DstBlock "Logical4"
5858	DstPort 2
5859	}
5860	Line {
5861	SrcBlock "Logical4"
5862	SrcPort 1
5863	DstBlock "paused"
5864	DstPort 1
5865	}
5866	}
5867	}
5868	Block {
5869	BlockType Reference
5870	Name "timer0_active"
5871	Ports [1, 1]
5872	Position [1000, 83, 1060, 97]
5873	SourceBlock "xbsIndex_r4/Gateway Out"
5874	SourceType "Xilinx Gateway Out Block"
5875	infoedit "Gateway out block. Converts Xilinx fixed point"
5876	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
5877	"rdware notes: In hardware these blocks become top level output ports or are "
5878	"discarded, depending on how they are configured."
5879	hdl_port on
5880	timing_constraint "None"
5881	locs_specified off
5882	LOCs "{}"
5883	xl_use_area off
5884	xl_area "[0,0,0,0,0,0,0]"
5885	has_advanced_control "0"
5886	sggui_pos "-1,-1,-1,-1"
5887	block_type "gatewayout"
5888	block_version "9.1.01"
5889	sg_icon_stat "60,14,1,1,white,yellow,0,38220381,right"
5890	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
5891	"tch([0 60 60 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([26 24 27 24 26 30 31"
5892	" 32 36 33 30 28 31 28 30 33 36 32 31 30 26 ],[2 4 7 10 12 12 11 12 12 9 12 10"
5893	" 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 14 14 0 ]);"
5894	"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
5895	"text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label"
5896	"('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT"
5897	": end icon text');\n"
5898	}
5899	Block {
5900	BlockType SubSystem
5901	Name "timer1"
5902	Ports [8, 4]
5903	Position [290, 227, 400, 428]
5904	MinAlgLoopOccurrences off
5905	RTWSystemCode "Auto"
5906	FunctionWithSeparateData off
5907	MaskHideContents off
5908	System {
5909	Name "timer1"
5910	Location [58, 190, 1298, 1018]
5911	Open off
5912	ModelBrowserVisibility off
5913	ModelBrowserWidth 200
5914	ScreenColor "white"
5915	PaperOrientation "landscape"
5916	PaperPositionMode "auto"
5917	PaperType "usletter"
5918	PaperUnits "inches"
5919	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
5920	TiledPageScale 1
5921	ShowPageBoundaries off
5922	ZoomFactor "100"
5923	Block {
5924	BlockType Inport
5925	Name "start"
5926	Position [15, 163, 45, 177]
5927	IconDisplay "Port number"
5928	}
5929	Block {
5930	BlockType Inport
5931	Name "stop"
5932	Position [15, 288, 45, 302]
5933	Port "2"
5934	IconDisplay "Port number"
5935	}
5936	Block {
5937	BlockType Inport
5938	Name "resume"
5939	Position [15, 188, 45, 202]
5940	Port "3"
5941	IconDisplay "Port number"
5942	}
5943	Block {
5944	BlockType Inport
5945	Name "pause"
5946	Position [15, 313, 45, 327]
5947	Port "4"
5948	IconDisplay "Port number"
5949	}
5950	Block {
5951	BlockType Inport
5952	Name "mode"
5953	Position [155, 23, 185, 37]
5954	Port "5"
5955	IconDisplay "Port number"
5956	}
5957	Block {
5958	BlockType Inport
5959	Name "interruptReset"
5960	Position [680, 178, 710, 192]
5961	Port "6"
5962	IconDisplay "Port number"
5963	}
5964	Block {
5965	BlockType Inport
5966	Name "countTo"
5967	Position [515, 83, 545, 97]
5968	Port "7"
5969	IconDisplay "Port number"
5970	}
5971	Block {
5972	BlockType Inport
5973	Name "idlefordifs_inp"
5974	Position [155, 93, 185, 107]
5975	Port "8"
5976	IconDisplay "Port number"
5977	}
5978	Block {
5979	BlockType Reference
5980	Name "AddSub"
5981	Ports [2, 1]
5982	Position [665, 234, 710, 281]
5983	SourceBlock "xbsIndex_r4/AddSub"
5984	SourceType "Xilinx Adder/Subtractor Block"
5985	mode "Subtraction"
5986	use_carryin off
5987	use_carryout off
5988	en off
5989	latency "0"
5990	precision "User Defined"
5991	arith_type "Unsigned"
5992	n_bits "32"
5993	bin_pt "0"
5994	quantization "Truncate"
5995	overflow "Wrap"
5996	dbl_ovrd off
5997	use_behavioral_HDL off
5998	pipelined off
5999	use_rpm on
6000	xl_use_area off
6001	xl_area "[0,0,0,0,0,0,0]"
6002	has_advanced_control "0"
6003	sggui_pos "-1,-1,-1,-1"
6004	block_type "addsub"
6005	block_version "8.2"
6006	sg_icon_stat "45,47,2,1,white,blue,0,46b4c804,right"
6007	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6008	"\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 "
6009	"34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 "
6010	"53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58"
6011	" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
6012	"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
6013	"ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}'"
6014	",'texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6015	}
6016	Block {
6017	BlockType Reference
6018	Name "Constant"
6019	Ports [0, 1]
6020	Position [520, 349, 550, 361]
6021	SourceBlock "xbsIndex_r4/Constant"
6022	SourceType "Xilinx Constant Block Block"
6023	arith_type "Unsigned"
6024	const "0"
6025	n_bits "32"
6026	bin_pt "0"
6027	explicit_period off
6028	period "1"
6029	dsp48_infoedit "The use of this block for DSP48 instruction"
6030	"s is deprecated. Please use the Opmode block."
6031	equ "P=C"
6032	opselect "C"
6033	inp2 "PCIN>>17"
6034	opr "+"
6035	inp1 "P"
6036	carry "CIN"
6037	dbl_ovrd off
6038	has_advanced_control "0"
6039	sggui_pos "50,50,400,346"
6040	block_type "constant"
6041	block_version "10.1.2"
6042	sg_icon_stat "30,12,1,1,white,blue,0,72d575a1,right"
6043	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6044	"\npatch([0 30 30 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([12 10 13 10 12 1"
6045	"5 16 17 20 17 14 12 15 12 14 17 20 17 16 15 12 ],[1 3 6 9 11 11 10 11 11 8 11"
6046	" 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]"
6047	");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
6048	"n text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: e"
6049	"nd icon text');\n"
6050	}
6051	Block {
6052	BlockType Reference
6053	Name "Constant1"
6054	Ports [0, 1]
6055	Position [155, 57, 190, 73]
6056	SourceBlock "xbsIndex_r4/Constant"
6057	SourceType "Xilinx Constant Block Block"
6058	arith_type "Unsigned"
6059	const "1"
6060	n_bits "1"
6061	bin_pt "0"
6062	explicit_period off
6063	period "1"
6064	dsp48_infoedit "The use of this block for DSP48 instruction"
6065	"s is deprecated. Please use the Opmode block."
6066	equ "P=C"
6067	opselect "C"
6068	inp2 "PCIN>>17"
6069	opr "+"
6070	inp1 "P"
6071	carry "CIN"
6072	dbl_ovrd off
6073	has_advanced_control "0"
6074	sggui_pos "-1,-1,-1,-1"
6075	block_type "constant"
6076	block_version "8.2"
6077	sg_icon_stat "35,16,0,1,white,blue,0,06094819,right"
6078	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6079	"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
6080	"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
6081	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
6082	"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
6083	"n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME"
6084	"NT: end icon text');\n"
6085	}
6086	Block {
6087	BlockType Reference
6088	Name "Convert1"
6089	Ports [1, 1]
6090	Position [290, 55, 325, 75]
6091	SourceBlock "xbsIndex_r4/Convert"
6092	SourceType "Xilinx Type Converter Block"
6093	infoedit "Hardware notes: rounding and saturating req"
6094	"uire hardware resources; truncating and wrapping do not."
6095	arith_type "Boolean"
6096	n_bits "16"
6097	bin_pt "14"
6098	quantization "Truncate"
6099	overflow "Wrap"
6100	latency "0"
6101	dbl_ovrd off
6102	pipeline off
6103	xl_use_area off
6104	xl_area "[0,0,0,0,0,0,0]"
6105	has_advanced_control "0"
6106	sggui_pos "20,20,461,375"
6107	block_type "convert"
6108	block_version "8.2"
6109	sg_icon_stat "35,20,1,1,white,blue,0,74901e60,right"
6110	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6111	"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
6112	"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
6113	" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
6114	"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
6115	"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
6116	"OMMENT: end icon text');\n"
6117	}
6118	Block {
6119	BlockType Reference
6120	Name "Counter"
6121	Ports [2, 1]
6122	Position [485, 119, 545, 221]
6123	SourceBlock "xbsIndex_r4/Counter"
6124	SourceType "Xilinx Counter Block"
6125	infoedit "Hardware notes: Free running counters are t"
6126	"he least expensive in hardware. A count limited counter is implemented by co"
6127	"mbining a counter with a comparator."
6128	cnt_type "Free Running"
6129	cnt_to "Inf"
6130	operation "Up"
6131	start_count "0"
6132	cnt_by_val "1"
6133	arith_type "Unsigned"
6134	n_bits "32"
6135	bin_pt "0"
6136	load_pin off
6137	rst on
6138	en on
6139	explicit_period "on"
6140	period "1"
6141	dbl_ovrd off
6142	use_behavioral_HDL off
6143	use_rpm off
6144	xl_use_area off
6145	xl_area "[0,0,0,0,0,0,0]"
6146	has_advanced_control "0"
6147	sggui_pos "20,20,356,630"
6148	block_type "counter"
6149	block_version "8.2"
6150	sg_icon_stat "60,102,2,1,white,blue,0,46c73e85,right"
6151	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6152	"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
6153	"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
6154	"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
6155	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
6156	"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
6157	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
6158	"printf('','COMMENT: end icon text');\n"
6159	}
6160	Block {
6161	BlockType Reference
6162	Name "Inverter"
6163	Ports [1, 1]
6164	Position [660, 371, 705, 389]
6165	SourceBlock "xbsIndex_r4/Inverter"
6166	SourceType "Xilinx Inverter Block"
6167	infoedit "Bitwise logical negation (one's complement)"
6168	" operator."
6169	en off
6170	latency "0"
6171	dbl_ovrd off
6172	xl_use_area off
6173	xl_area "[0,0,0,0,0,0,0]"
6174	has_advanced_control "0"
6175	sggui_pos "20,20,348,251"
6176	block_type "inv"
6177	block_version "10.1.2"
6178	sg_icon_stat "45,18,1,1,white,blue,0,1ab4a85f,right"
6179	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6180	"\npatch([0 45 45 0 ],[0 0 18 18 ],[0.77 0.82 0.91]);\npatch([18 15 19 15 18 2"
6181	"3 24 25 30 26 22 19 23 19 22 26 30 25 24 23 18 ],[2 5 9 13 16 16 15 16 16 12 "
6182	"16 13 9 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 18 18 "
6183	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
6184	"icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text"
6185	"');\n"
6186	}
6187	Block {
6188	BlockType Reference
6189	Name "Logical"
6190	Ports [2, 1]
6191	Position [360, 174, 405, 216]
6192	SourceBlock "xbsIndex_r4/Logical"
6193	SourceType "Xilinx Logical Block Block"
6194	logical_function "AND"
6195	inputs "2"
6196	en off
6197	latency "0"
6198	precision "Full"
6199	arith_type "Unsigned"
6200	n_bits "16"
6201	bin_pt "0"
6202	align_bp on
6203	dbl_ovrd off
6204	xl_use_area off
6205	xl_area "[0,0,0,0,0,0,0]"
6206	has_advanced_control "0"
6207	sggui_pos "20,20,348,261"
6208	block_type "logical"
6209	block_version "8.2"
6210	sg_icon_stat "45,42,2,1,white,blue,0,087b5522,right"
6211	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6212	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
6213	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
6214	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
6215	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
6216	"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
6217	",'on');\nfprintf('','COMMENT: end icon text');\n"
6218	}
6219	Block {
6220	BlockType Reference
6221	Name "Logical1"
6222	Ports [3, 1]
6223	Position [430, 127, 465, 163]
6224	SourceBlock "xbsIndex_r4/Logical"
6225	SourceType "Xilinx Logical Block Block"
6226	logical_function "OR"
6227	inputs "3"
6228	en off
6229	latency "0"
6230	precision "Full"
6231	arith_type "Unsigned"
6232	n_bits "16"
6233	bin_pt "0"
6234	align_bp on
6235	dbl_ovrd off
6236	xl_use_area off
6237	xl_area "[0,0,0,0,0,0,0]"
6238	has_advanced_control "0"
6239	sggui_pos "-1,-1,-1,-1"
6240	block_type "logical"
6241	block_version "8.2"
6242	sg_icon_stat "35,36,3,1,white,blue,0,bd50cad4,right"
6243	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6244	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
6245	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
6246	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
6247	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
6248	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
6249	"'on');\nfprintf('','COMMENT: end icon text');\n"
6250	}
6251	Block {
6252	BlockType Reference
6253	Name "Logical2"
6254	Ports [3, 1]
6255	Position [187, 245, 223, 280]
6256	Orientation "up"
6257	SourceBlock "xbsIndex_r4/Logical"
6258	SourceType "Xilinx Logical Block Block"
6259	logical_function "OR"
6260	inputs "3"
6261	en off
6262	latency "0"
6263	precision "Full"
6264	arith_type "Unsigned"
6265	n_bits "16"
6266	bin_pt "0"
6267	align_bp on
6268	dbl_ovrd off
6269	xl_use_area off
6270	xl_area "[0,0,0,0,0,0,0]"
6271	has_advanced_control "0"
6272	sggui_pos "-1,-1,-1,-1"
6273	block_type "logical"
6274	block_version "8.2"
6275	sg_icon_stat "36,35,3,1,white,blue,0,bd50cad4,up"
6276	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6277	"\npatch([0 36 36 0 ],[0 0 35 35 ],[0.77 0.82 0.91]);\npatch([9 3 11 3 9 18 21"
6278	" 24 34 26 19 14 22 14 19 26 34 24 21 18 9 ],[4 10 18 26 32 32 29 32 32 24 31 "
6279	"26 18 10 5 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 36 36 0 0 ],[0 0 35 35 "
6280	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
6281	"icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on'"
6282	");\nfprintf('','COMMENT: end icon text');\n"
6283	}
6284	Block {
6285	BlockType Reference
6286	Name "Logical3"
6287	Ports [2, 1]
6288	Position [170, 159, 200, 206]
6289	SourceBlock "xbsIndex_r4/Logical"
6290	SourceType "Xilinx Logical Block Block"
6291	logical_function "OR"
6292	inputs "2"
6293	en off
6294	latency "0"
6295	precision "Full"
6296	arith_type "Unsigned"
6297	n_bits "16"
6298	bin_pt "0"
6299	align_bp on
6300	dbl_ovrd off
6301	xl_use_area off
6302	xl_area "[0,0,0,0,0,0,0]"
6303	has_advanced_control "0"
6304	sggui_pos "-1,-1,-1,-1"
6305	block_type "logical"
6306	block_version "9.1.01"
6307	sg_icon_stat "30,47,2,1,white,blue,0,f4a65842,right"
6308	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6309	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
6310	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
6311	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
6312	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
6313	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
6314	"'on');\nfprintf('','COMMENT: end icon text');\n"
6315	}
6316	Block {
6317	BlockType Reference
6318	Name "Logical4"
6319	Ports [2, 1]
6320	Position [735, 328, 780, 397]
6321	SourceBlock "xbsIndex_r4/Logical"
6322	SourceType "Xilinx Logical Block Block"
6323	logical_function "AND"
6324	inputs "2"
6325	en off
6326	latency "0"
6327	precision "Full"
6328	arith_type "Unsigned"
6329	n_bits "16"
6330	bin_pt "0"
6331	align_bp on
6332	dbl_ovrd off
6333	xl_use_area off
6334	xl_area "[0,0,0,0,0,0,0]"
6335	has_advanced_control "0"
6336	sggui_pos "20,20,348,261"
6337	block_type "logical"
6338	block_version "10.1.2"
6339	sg_icon_stat "45,69,1,1,white,blue,0,087b5522,right"
6340	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6341	"\npatch([0 45 45 0 ],[0 0 69 69 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 "
6342	"25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[17 24 35 46 53 53 50 53 53 43"
6343	" 53 46 35 24 17 27 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],["
6344	"0 0 69 69 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME"
6345	"NT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','te"
6346	"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
6347	}
6348	Block {
6349	BlockType Reference
6350	Name "Mux"
6351	Ports [3, 1]
6352	Position [215, 13, 260, 117]
6353	SourceBlock "xbsIndex_r4/Mux"
6354	SourceType "Xilinx Bus Multiplexer Block"
6355	inputs "2"
6356	en off
6357	latency "0"
6358	precision "Full"
6359	arith_type "Unsigned"
6360	n_bits "16"
6361	bin_pt "14"
6362	quantization "Truncate"
6363	overflow "Wrap"
6364	dbl_ovrd off
6365	xl_use_area off
6366	xl_area "[0,0,0,0,0,0,0]"
6367	has_advanced_control "0"
6368	sggui_pos "-1,-1,-1,-1"
6369	block_type "mux"
6370	block_version "8.2"
6371	sg_icon_stat "45,104,3,1,white,blue,3,613f58e1,right"
6372	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6373	"\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3"
6374	" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70"
6375	" 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4"
6376	"5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi"
6377	"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
6378	"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
6379	"rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr"
6380	"intf('','COMMENT: end icon text');\n"
6381	}
6382	Block {
6383	BlockType Reference
6384	Name "Relational"
6385	Ports [2, 1]
6386	Position [585, 126, 625, 184]
6387	SourceBlock "xbsIndex_r4/Relational"
6388	SourceType "Xilinx Arithmetic Relational Operator Block"
6389	mode "a=b"
6390	en off
6391	latency "0"
6392	dbl_ovrd off
6393	xl_use_area off
6394	xl_area "[0,0,0,0,0,0,0]"
6395	has_advanced_control "0"
6396	sggui_pos "-1,-1,-1,-1"
6397	block_type "relational"
6398	block_version "8.2"
6399	sg_icon_stat "40,58,2,1,white,blue,0,1b68ef8e,right"
6400	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6401	"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
6402	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
6403	"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
6404	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
6405	"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
6406	"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^"
6407	"{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6408	}
6409	Block {
6410	BlockType Reference
6411	Name "Relational1"
6412	Ports [2, 1]
6413	Position [585, 326, 630, 364]
6414	SourceBlock "xbsIndex_r4/Relational"
6415	SourceType "Xilinx Arithmetic Relational Operator Block"
6416	mode "a>b"
6417	en off
6418	latency "1"
6419	dbl_ovrd off
6420	xl_use_area off
6421	xl_area "[0,0,0,0,0,0,0]"
6422	has_advanced_control "0"
6423	sggui_pos "20,20,348,193"
6424	block_type "relational"
6425	block_version "10.1.2"
6426	sg_icon_stat "45,38,1,1,white,blue,0,c445790c,right"
6427	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
6428	"\npatch([0 45 45 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([12 6 15 6 12 22 "
6429	"25 28 39 31 23 17 26 17 23 31 39 28 25 22 12 ],[4 10 19 28 34 34 31 34 34 26 "
6430	"34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 38 "
6431	"38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
6432	"in icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');po"
6433	"rt_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>b}\\newlinez^{"
6434	"-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6435	}
6436	Block {
6437	BlockType SubSystem
6438	Name "S-R_Latch1"
6439	Ports [2, 1]
6440	Position [245, 167, 285, 238]
6441	MinAlgLoopOccurrences off
6442	RTWSystemCode "Auto"
6443	FunctionWithSeparateData off
6444	MaskHideContents off
6445	System {
6446	Name "S-R_Latch1"
6447	Location [837, 103, 1234, 376]
6448	Open off
6449	ModelBrowserVisibility off
6450	ModelBrowserWidth 200
6451	ScreenColor "white"
6452	PaperOrientation "landscape"
6453	PaperPositionMode "auto"
6454	PaperType "usletter"
6455	PaperUnits "inches"
6456	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6457	TiledPageScale 1
6458	ShowPageBoundaries off
6459	ZoomFactor "100"
6460	Block {
6461	BlockType Inport
6462	Name "S"
6463	Position [95, 58, 125, 72]
6464	IconDisplay "Port number"
6465	}
6466	Block {
6467	BlockType Inport
6468	Name "R"
6469	Position [95, 88, 125, 102]
6470	Port "2"
6471	IconDisplay "Port number"
6472	}
6473	Block {
6474	BlockType Reference
6475	Name "Inverter"
6476	Ports [1, 1]
6477	Position [220, 82, 250, 108]
6478	SourceBlock "xbsIndex_r4/Inverter"
6479	SourceType "Xilinx Inverter Block"
6480	infoedit "Bitwise logical negation (one's complem"
6481	"ent) operator."
6482	en "off"
6483	latency "0"
6484	dbl_ovrd "off"
6485	xl_use_area "off"
6486	xl_area "[0,0,0,0,0,0,0]"
6487	has_advanced_control "0"
6488	sggui_pos "-1,-1,-1,-1"
6489	block_type "inv"
6490	block_version "VER_STRING_GOES_HERE"
6491	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
6492	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6493	"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
6494	"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
6495	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
6496	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
6497	"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
6498	" text');\n"
6499	}
6500	Block {
6501	BlockType Reference
6502	Name "Register"
6503	Ports [3, 1]
6504	Position [150, 70, 195, 120]
6505	SourceBlock "xbsIndex_r4/Register"
6506	SourceType "Xilinx Register Block"
6507	init "0"
6508	rst "on"
6509	en "on"
6510	dbl_ovrd "off"
6511	xl_use_area "off"
6512	xl_area "[0,0,0,0,0,0,0]"
6513	has_advanced_control "0"
6514	sggui_pos "20,20,348,193"
6515	block_type "register"
6516	block_version "VER_STRING_GOES_HERE"
6517	sg_icon_stat "45,50,1,1,white,blue,0,923c1847,right"
6518	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6519	"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
6520	"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
6521	"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
6522	" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
6523	"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
6524	"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
6525	");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
6526	"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6527	}
6528	Block {
6529	BlockType Outport
6530	Name "Q"
6531	Position [285, 63, 315, 77]
6532	IconDisplay "Port number"
6533	BusOutputAsStruct off
6534	}
6535	Line {
6536	SrcBlock "Register"
6537	SrcPort 1
6538	Points [0, 0; 5, 0]
6539	Branch {
6540	DstBlock "Inverter"
6541	DstPort 1
6542	}
6543	Branch {
6544	Points [0, -25]
6545	DstBlock "Q"
6546	DstPort 1
6547	}
6548	}
6549	Line {
6550	SrcBlock "Inverter"
6551	SrcPort 1
6552	Points [10, 0; 0, 55; -130, 0]
6553	DstBlock "Register"
6554	DstPort 3
6555	}
6556	Line {
6557	SrcBlock "S"
6558	SrcPort 1
6559	DstBlock "Register"
6560	DstPort 1
6561	}
6562	Line {
6563	SrcBlock "R"
6564	SrcPort 1
6565	DstBlock "Register"
6566	DstPort 2
6567	}
6568	}
6569	}
6570	Block {
6571	BlockType SubSystem
6572	Name "S-R_Latch2"
6573	Ports [2, 1]
6574	Position [745, 140, 785, 200]
6575	MinAlgLoopOccurrences off
6576	RTWSystemCode "Auto"
6577	FunctionWithSeparateData off
6578	MaskHideContents off
6579	System {
6580	Name "S-R_Latch2"
6581	Location [521, 318, 918, 591]
6582	Open off
6583	ModelBrowserVisibility off
6584	ModelBrowserWidth 200
6585	ScreenColor "white"
6586	PaperOrientation "landscape"
6587	PaperPositionMode "auto"
6588	PaperType "usletter"
6589	PaperUnits "inches"
6590	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6591	TiledPageScale 1
6592	ShowPageBoundaries off
6593	ZoomFactor "100"
6594	Block {
6595	BlockType Inport
6596	Name "S"
6597	Position [95, 58, 125, 72]
6598	IconDisplay "Port number"
6599	}
6600	Block {
6601	BlockType Inport
6602	Name "R"
6603	Position [95, 88, 125, 102]
6604	Port "2"
6605	IconDisplay "Port number"
6606	}
6607	Block {
6608	BlockType Reference
6609	Name "Inverter"
6610	Ports [1, 1]
6611	Position [220, 82, 250, 108]
6612	SourceBlock "xbsIndex_r4/Inverter"
6613	SourceType "Xilinx Inverter Block"
6614	infoedit "Bitwise logical negation (one's complem"
6615	"ent) operator."
6616	en "off"
6617	latency "0"
6618	dbl_ovrd "off"
6619	xl_use_area "off"
6620	xl_area "[0,0,0,0,0,0,0]"
6621	has_advanced_control "0"
6622	sggui_pos "-1,-1,-1,-1"
6623	block_type "inv"
6624	block_version "VER_STRING_GOES_HERE"
6625	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
6626	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6627	"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
6628	"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
6629	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
6630	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
6631	"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
6632	" text');\n"
6633	}
6634	Block {
6635	BlockType Reference
6636	Name "Register"
6637	Ports [3, 1]
6638	Position [150, 70, 195, 120]
6639	SourceBlock "xbsIndex_r4/Register"
6640	SourceType "Xilinx Register Block"
6641	init "0"
6642	rst "on"
6643	en "on"
6644	dbl_ovrd "off"
6645	xl_use_area "off"
6646	xl_area "[0,0,0,0,0,0,0]"
6647	has_advanced_control "0"
6648	sggui_pos "-1,-1,-1,-1"
6649	block_type "register"
6650	block_version "VER_STRING_GOES_HERE"
6651	sg_icon_stat "45,50,1,1,white,blue,0,923c1847,right"
6652	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6653	"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
6654	"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
6655	"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
6656	" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
6657	"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
6658	"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
6659	");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
6660	"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6661	}
6662	Block {
6663	BlockType Outport
6664	Name "Q"
6665	Position [285, 63, 315, 77]
6666	IconDisplay "Port number"
6667	BusOutputAsStruct off
6668	}
6669	Line {
6670	SrcBlock "R"
6671	SrcPort 1
6672	DstBlock "Register"
6673	DstPort 2
6674	}
6675	Line {
6676	SrcBlock "S"
6677	SrcPort 1
6678	DstBlock "Register"
6679	DstPort 1
6680	}
6681	Line {
6682	SrcBlock "Inverter"
6683	SrcPort 1
6684	Points [10, 0; 0, 55; -130, 0]
6685	DstBlock "Register"
6686	DstPort 3
6687	}
6688	Line {
6689	SrcBlock "Register"
6690	SrcPort 1
6691	Points [0, 0; 5, 0]
6692	Branch {
6693	Points [0, -25]
6694	DstBlock "Q"
6695	DstPort 1
6696	}
6697	Branch {
6698	DstBlock "Inverter"
6699	DstPort 1
6700	}
6701	}
6702	}
6703	}
6704	Block {
6705	BlockType SubSystem
6706	Name "posedge"
6707	Ports [1, 1]
6708	Position [75, 163, 105, 177]
6709	MinAlgLoopOccurrences off
6710	RTWSystemCode "Auto"
6711	FunctionWithSeparateData off
6712	MaskHideContents off
6713	System {
6714	Name "posedge"
6715	Location [459, 339, 854, 490]
6716	Open off
6717	ModelBrowserVisibility off
6718	ModelBrowserWidth 200
6719	ScreenColor "white"
6720	PaperOrientation "landscape"
6721	PaperPositionMode "auto"
6722	PaperType "usletter"
6723	PaperUnits "inches"
6724	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6725	TiledPageScale 1
6726	ShowPageBoundaries off
6727	ZoomFactor "100"
6728	Block {
6729	BlockType Inport
6730	Name "In"
6731	Position [20, 33, 50, 47]
6732	IconDisplay "Port number"
6733	}
6734	Block {
6735	BlockType Reference
6736	Name "Delay"
6737	Ports [1, 1]
6738	Position [80, 67, 140, 123]
6739	SourceBlock "xbsIndex_r4/Delay"
6740	SourceType "Xilinx Delay Block"
6741	infoedit "Hardware notes: A delay line is a chain"
6742	", each link of which is an SRL16 followed by a flip-flop. If register retimin"
6743	"g is enabled, the delay line is a chain of flip-flops."
6744	en "off"
6745	latency "1"
6746	dbl_ovrd "off"
6747	reg_retiming "off"
6748	xl_use_area "off"
6749	xl_area "[1 1 0 0 0 0 0]"
6750	has_advanced_control "0"
6751	sggui_pos "-1,-1,-1,-1"
6752	block_type "delay"
6753	block_version "8.2"
6754	sg_icon_stat "60,56,1,1,white,blue,0,fc531c0e,right"
6755	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6756	"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
6757	" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
6758	" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
6759	"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
6760	": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
6761	"'','COMMENT: end icon text');\n"
6762	}
6763	Block {
6764	BlockType Reference
6765	Name "Inverter"
6766	Ports [1, 1]
6767	Position [170, 66, 225, 124]
6768	SourceBlock "xbsIndex_r4/Inverter"
6769	SourceType "Xilinx Inverter Block"
6770	infoedit "Bitwise logical negation (one's complem"
6771	"ent) operator."
6772	en "off"
6773	latency "0"
6774	dbl_ovrd "off"
6775	xl_use_area "off"
6776	xl_area "[0 0 0 0 0 0 0]"
6777	has_advanced_control "0"
6778	sggui_pos "-1,-1,-1,-1"
6779	block_type "inv"
6780	block_version "8.2"
6781	sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right"
6782	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6783	"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
6784	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
6785	" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
6786	"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
6787	": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
6788	"con text');\n"
6789	}
6790	Block {
6791	BlockType Reference
6792	Name "Logical"
6793	Ports [2, 1]
6794	Position [260, 25, 315, 85]
6795	SourceBlock "xbsIndex_r4/Logical"
6796	SourceType "Xilinx Logical Block Block"
6797	logical_function "AND"
6798	inputs "2"
6799	en "off"
6800	latency "0"
6801	precision "Full"
6802	arith_type "Unsigned"
6803	n_bits "16"
6804	bin_pt "0"
6805	align_bp "on"
6806	dbl_ovrd "off"
6807	xl_use_area "off"
6808	xl_area "[1 0 0 1 0 0 0]"
6809	has_advanced_control "0"
6810	sggui_pos "-1,-1,-1,-1"
6811	block_type "logical"
6812	block_version "8.2"
6813	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
6814	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6815	"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
6816	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
6817	" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
6818	"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
6819	": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
6820	"ode','on');\nfprintf('','COMMENT: end icon text');\n"
6821	}
6822	Block {
6823	BlockType Outport
6824	Name "Out"
6825	Position [340, 48, 370, 62]
6826	IconDisplay "Port number"
6827	BusOutputAsStruct off
6828	}
6829	Line {
6830	SrcBlock "Logical"
6831	SrcPort 1
6832	Points [0, 0]
6833	DstBlock "Out"
6834	DstPort 1
6835	}
6836	Line {
6837	SrcBlock "In"
6838	SrcPort 1
6839	Points [0, 0; 5, 0]
6840	Branch {
6841	Points [0, 55]
6842	DstBlock "Delay"
6843	DstPort 1
6844	}
6845	Branch {
6846	DstBlock "Logical"
6847	DstPort 1
6848	}
6849	}
6850	Line {
6851	SrcBlock "Inverter"
6852	SrcPort 1
6853	Points [5, 0; 0, -25]
6854	DstBlock "Logical"
6855	DstPort 2
6856	}
6857	Line {
6858	SrcBlock "Delay"
6859	SrcPort 1
6860	Points [0, 0]
6861	DstBlock "Inverter"
6862	DstPort 1
6863	}
6864	}
6865	}
6866	Block {
6867	BlockType SubSystem
6868	Name "posedge1"
6869	Ports [1, 1]
6870	Position [75, 188, 105, 202]
6871	MinAlgLoopOccurrences off
6872	RTWSystemCode "Auto"
6873	FunctionWithSeparateData off
6874	MaskHideContents off
6875	System {
6876	Name "posedge1"
6877	Location [459, 339, 854, 490]
6878	Open off
6879	ModelBrowserVisibility off
6880	ModelBrowserWidth 200
6881	ScreenColor "white"
6882	PaperOrientation "landscape"
6883	PaperPositionMode "auto"
6884	PaperType "usletter"
6885	PaperUnits "inches"
6886	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6887	TiledPageScale 1
6888	ShowPageBoundaries off
6889	ZoomFactor "100"
6890	Block {
6891	BlockType Inport
6892	Name "In"
6893	Position [20, 33, 50, 47]
6894	IconDisplay "Port number"
6895	}
6896	Block {
6897	BlockType Reference
6898	Name "Delay"
6899	Ports [1, 1]
6900	Position [80, 67, 140, 123]
6901	SourceBlock "xbsIndex_r4/Delay"
6902	SourceType "Xilinx Delay Block"
6903	infoedit "Hardware notes: A delay line is a chain"
6904	", each link of which is an SRL16 followed by a flip-flop. If register retimin"
6905	"g is enabled, the delay line is a chain of flip-flops."
6906	en "off"
6907	latency "1"
6908	dbl_ovrd "off"
6909	reg_retiming "off"
6910	xl_use_area "off"
6911	xl_area "[1 1 0 0 0 0 0]"
6912	has_advanced_control "0"
6913	sggui_pos "-1,-1,-1,-1"
6914	block_type "delay"
6915	block_version "8.2"
6916	sg_icon_stat "60,56,1,1,white,blue,0,fc531c0e,right"
6917	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6918	"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
6919	" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
6920	" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
6921	"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
6922	": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
6923	"'','COMMENT: end icon text');\n"
6924	}
6925	Block {
6926	BlockType Reference
6927	Name "Inverter"
6928	Ports [1, 1]
6929	Position [170, 66, 225, 124]
6930	SourceBlock "xbsIndex_r4/Inverter"
6931	SourceType "Xilinx Inverter Block"
6932	infoedit "Bitwise logical negation (one's complem"
6933	"ent) operator."
6934	en "off"
6935	latency "0"
6936	dbl_ovrd "off"
6937	xl_use_area "off"
6938	xl_area "[0 0 0 0 0 0 0]"
6939	has_advanced_control "0"
6940	sggui_pos "-1,-1,-1,-1"
6941	block_type "inv"
6942	block_version "8.2"
6943	sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right"
6944	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6945	"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
6946	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
6947	" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
6948	"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
6949	": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
6950	"con text');\n"
6951	}
6952	Block {
6953	BlockType Reference
6954	Name "Logical"
6955	Ports [2, 1]
6956	Position [260, 25, 315, 85]
6957	SourceBlock "xbsIndex_r4/Logical"
6958	SourceType "Xilinx Logical Block Block"
6959	logical_function "AND"
6960	inputs "2"
6961	en "off"
6962	latency "0"
6963	precision "Full"
6964	arith_type "Unsigned"
6965	n_bits "16"
6966	bin_pt "0"
6967	align_bp "on"
6968	dbl_ovrd "off"
6969	xl_use_area "off"
6970	xl_area "[1 0 0 1 0 0 0]"
6971	has_advanced_control "0"
6972	sggui_pos "-1,-1,-1,-1"
6973	block_type "logical"
6974	block_version "8.2"
6975	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
6976	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
6977	"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
6978	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
6979	" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
6980	"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
6981	": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
6982	"ode','on');\nfprintf('','COMMENT: end icon text');\n"
6983	}
6984	Block {
6985	BlockType Outport
6986	Name "Out"
6987	Position [340, 48, 370, 62]
6988	IconDisplay "Port number"
6989	BusOutputAsStruct off
6990	}
6991	Line {
6992	SrcBlock "Delay"
6993	SrcPort 1
6994	Points [0, 0]
6995	DstBlock "Inverter"
6996	DstPort 1
6997	}
6998	Line {
6999	SrcBlock "Inverter"
7000	SrcPort 1
7001	Points [5, 0; 0, -25]
7002	DstBlock "Logical"
7003	DstPort 2
7004	}
7005	Line {
7006	SrcBlock "In"
7007	SrcPort 1
7008	Points [0, 0; 5, 0]
7009	Branch {
7010	DstBlock "Logical"
7011	DstPort 1
7012	}
7013	Branch {
7014	Points [0, 55]
7015	DstBlock "Delay"
7016	DstPort 1
7017	}
7018	}
7019	Line {
7020	SrcBlock "Logical"
7021	SrcPort 1
7022	Points [0, 0]
7023	DstBlock "Out"
7024	DstPort 1
7025	}
7026	}
7027	}
7028	Block {
7029	BlockType Outport
7030	Name "interrupt"
7031	Position [810, 163, 840, 177]
7032	IconDisplay "Port number"
7033	BusOutputAsStruct off
7034	}
7035	Block {
7036	BlockType Outport
7037	Name "active"
7038	Position [350, 253, 380, 267]
7039	Port "2"
7040	IconDisplay "Port number"
7041	BusOutputAsStruct off
7042	}
7043	Block {
7044	BlockType Outport
7045	Name "paused"
7046	Position [820, 358, 850, 372]
7047	Port "3"
7048	IconDisplay "Port number"
7049	BusOutputAsStruct off
7050	}
7051	Block {
7052	BlockType Outport
7053	Name "timeLeft"
7054	Position [740, 253, 770, 267]
7055	Port "4"
7056	IconDisplay "Port number"
7057	BusOutputAsStruct off
7058	}
7059	Line {
7060	SrcBlock "Logical4"
7061	SrcPort 1
7062	DstBlock "paused"
7063	DstPort 1
7064	}
7065	Line {
7066	SrcBlock "Inverter"
7067	SrcPort 1
7068	DstBlock "Logical4"
7069	DstPort 2
7070	}
7071	Line {
7072	SrcBlock "Relational1"
7073	SrcPort 1
7074	DstBlock "Logical4"
7075	DstPort 1
7076	}
7077	Line {
7078	SrcBlock "Constant"
7079	SrcPort 1
7080	DstBlock "Relational1"
7081	DstPort 2
7082	}
7083	Line {
7084	SrcBlock "pause"
7085	SrcPort 1
7086	Points [155, 0]
7087	DstBlock "Logical2"
7088	DstPort 2
7089	}
7090	Line {
7091	SrcBlock "posedge1"
7092	SrcPort 1
7093	DstBlock "Logical3"
7094	DstPort 2
7095	}
7096	Line {
7097	SrcBlock "Logical3"
7098	SrcPort 1
7099	DstBlock "S-R_Latch1"
7100	DstPort 1
7101	}
7102	Line {
7103	SrcBlock "resume"
7104	SrcPort 1
7105	DstBlock "posedge1"
7106	DstPort 1
7107	}
7108	Line {
7109	SrcBlock "AddSub"
7110	SrcPort 1
7111	DstBlock "timeLeft"
7112	DstPort 1
7113	}
7114	Line {
7115	SrcBlock "S-R_Latch1"
7116	SrcPort 1
7117	Points [25, 0]
7118	Branch {
7119	Points [0, 175]
7120	DstBlock "Inverter"
7121	DstPort 1
7122	}
7123	Branch {
7124	Points [0, 55]
7125	DstBlock "active"
7126	DstPort 1
7127	}
7128	Branch {
7129	DstBlock "Logical"
7130	DstPort 2
7131	}
7132	}
7133	Line {
7134	SrcBlock "stop"
7135	SrcPort 1
7136	Points [70, 0]
7137	Branch {
7138	Points [0, -150]
7139	DstBlock "Logical1"
7140	DstPort 2
7141	}
7142	Branch {
7143	DstBlock "Logical2"
7144	DstPort 1
7145	}
7146	}
7147	Line {
7148	SrcBlock "S-R_Latch2"
7149	SrcPort 1
7150	DstBlock "interrupt"
7151	DstPort 1
7152	}
7153	Line {
7154	SrcBlock "Logical2"
7155	SrcPort 1
7156	Points [0, -20]
7157	DstBlock "S-R_Latch1"
7158	DstPort 2
7159	}
7160	Line {
7161	SrcBlock "interruptReset"
7162	SrcPort 1
7163	DstBlock "S-R_Latch2"
7164	DstPort 2
7165	}
7166	Line {
7167	SrcBlock "Logical1"
7168	SrcPort 1
7169	DstBlock "Counter"
7170	DstPort 1
7171	}
7172	Line {
7173	SrcBlock "Convert1"
7174	SrcPort 1
7175	Points [15, 0]
7176	DstBlock "Logical"
7177	DstPort 1
7178	}
7179	Line {
7180	SrcBlock "Mux"
7181	SrcPort 1
7182	DstBlock "Convert1"
7183	DstPort 1
7184	}
7185	Line {
7186	SrcBlock "idlefordifs_inp"
7187	SrcPort 1
7188	DstBlock "Mux"
7189	DstPort 3
7190	}
7191	Line {
7192	SrcBlock "Constant1"
7193	SrcPort 1
7194	DstBlock "Mux"
7195	DstPort 2
7196	}
7197	Line {
7198	SrcBlock "Counter"
7199	SrcPort 1
7200	Points [0, 0]
7201	Branch {
7202	Points [0, 165]
7203	DstBlock "Relational1"
7204	DstPort 1
7205	}
7206	Branch {
7207	Points [0, 100]
7208	DstBlock "AddSub"
7209	DstPort 2
7210	}
7211	Branch {
7212	Labels [1, 0]
7213	DstBlock "Relational"
7214	DstPort 2
7215	}
7216	}
7217	Line {
7218	SrcBlock "Relational"
7219	SrcPort 1
7220	Points [5, 0]
7221	Branch {
7222	Points [0, 140]
7223	DstBlock "Logical2"
7224	DstPort 3
7225	}
7226	Branch {
7227	DstBlock "S-R_Latch2"
7228	DstPort 1
7229	}
7230	Branch {
7231	Points [0, -80; -230, 0; 0, 60]
7232	DstBlock "Logical1"
7233	DstPort 1
7234	}
7235	}
7236	Line {
7237	SrcBlock "countTo"
7238	SrcPort 1
7239	Points [10, 0; 0, 50]
7240	Branch {
7241	DstBlock "Relational"
7242	DstPort 1
7243	}
7244	Branch {
7245	Points [0, 105]
7246	DstBlock "AddSub"
7247	DstPort 1
7248	}
7249	}
7250	Line {
7251	SrcBlock "Logical"
7252	SrcPort 1
7253	DstBlock "Counter"
7254	DstPort 2
7255	}
7256	Line {
7257	SrcBlock "mode"
7258	SrcPort 1
7259	DstBlock "Mux"
7260	DstPort 1
7261	}
7262	Line {
7263	SrcBlock "posedge"
7264	SrcPort 1
7265	Points [15, 0]
7266	Branch {
7267	Points [0, -15]
7268	DstBlock "Logical1"
7269	DstPort 3
7270	}
7271	Branch {
7272	DstBlock "Logical3"
7273	DstPort 1
7274	}
7275	}
7276	Line {
7277	SrcBlock "start"
7278	SrcPort 1
7279	DstBlock "posedge"
7280	DstPort 1
7281	}
7282	}
7283	}
7284	Block {
7285	BlockType Reference
7286	Name "timer1_active"
7287	Ports [1, 1]
7288	Position [1000, 103, 1060, 117]
7289	SourceBlock "xbsIndex_r4/Gateway Out"
7290	SourceType "Xilinx Gateway Out Block"
7291	infoedit "Gateway out block. Converts Xilinx fixed point"
7292	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
7293	"rdware notes: In hardware these blocks become top level output ports or are "
7294	"discarded, depending on how they are configured."
7295	hdl_port on
7296	timing_constraint "None"
7297	locs_specified off
7298	LOCs "{}"
7299	xl_use_area off
7300	xl_area "[0,0,0,0,0,0,0]"
7301	has_advanced_control "0"
7302	sggui_pos "-1,-1,-1,-1"
7303	block_type "gatewayout"
7304	block_version "9.1.01"
7305	sg_icon_stat "60,14,1,1,white,yellow,0,38220381,right"
7306	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
7307	"tch([0 60 60 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([26 24 27 24 26 30 31"
7308	" 32 36 33 30 28 31 28 30 33 36 32 31 30 26 ],[2 4 7 10 12 12 11 12 12 9 12 10"
7309	" 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 14 14 0 ]);"
7310	"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
7311	"text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label"
7312	"('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT"
7313	": end icon text');\n"
7314	}
7315	Block {
7316	BlockType SubSystem
7317	Name "timer2"
7318	Ports [8, 4]
7319	Position [290, 442, 400, 643]
7320	MinAlgLoopOccurrences off
7321	RTWSystemCode "Auto"
7322	FunctionWithSeparateData off
7323	MaskHideContents off
7324	System {
7325	Name "timer2"
7326	Location [58, 190, 1298, 1018]
7327	Open off
7328	ModelBrowserVisibility off
7329	ModelBrowserWidth 200
7330	ScreenColor "white"
7331	PaperOrientation "landscape"
7332	PaperPositionMode "auto"
7333	PaperType "usletter"
7334	PaperUnits "inches"
7335	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
7336	TiledPageScale 1
7337	ShowPageBoundaries off
7338	ZoomFactor "100"
7339	Block {
7340	BlockType Inport
7341	Name "start"
7342	Position [15, 163, 45, 177]
7343	IconDisplay "Port number"
7344	}
7345	Block {
7346	BlockType Inport
7347	Name "stop"
7348	Position [15, 288, 45, 302]
7349	Port "2"
7350	IconDisplay "Port number"
7351	}
7352	Block {
7353	BlockType Inport
7354	Name "resume"
7355	Position [15, 188, 45, 202]
7356	Port "3"
7357	IconDisplay "Port number"
7358	}
7359	Block {
7360	BlockType Inport
7361	Name "pause"
7362	Position [15, 313, 45, 327]
7363	Port "4"
7364	IconDisplay "Port number"
7365	}
7366	Block {
7367	BlockType Inport
7368	Name "mode"
7369	Position [155, 23, 185, 37]
7370	Port "5"
7371	IconDisplay "Port number"
7372	}
7373	Block {
7374	BlockType Inport
7375	Name "interruptReset"
7376	Position [680, 178, 710, 192]
7377	Port "6"
7378	IconDisplay "Port number"
7379	}
7380	Block {
7381	BlockType Inport
7382	Name "countTo"
7383	Position [515, 83, 545, 97]
7384	Port "7"
7385	IconDisplay "Port number"
7386	}
7387	Block {
7388	BlockType Inport
7389	Name "idlefordifs_inp"
7390	Position [155, 93, 185, 107]
7391	Port "8"
7392	IconDisplay "Port number"
7393	}
7394	Block {
7395	BlockType Reference
7396	Name "AddSub"
7397	Ports [2, 1]
7398	Position [665, 234, 710, 281]
7399	SourceBlock "xbsIndex_r4/AddSub"
7400	SourceType "Xilinx Adder/Subtractor Block"
7401	mode "Subtraction"
7402	use_carryin off
7403	use_carryout off
7404	en off
7405	latency "0"
7406	precision "User Defined"
7407	arith_type "Unsigned"
7408	n_bits "32"
7409	bin_pt "0"
7410	quantization "Truncate"
7411	overflow "Wrap"
7412	dbl_ovrd off
7413	use_behavioral_HDL off
7414	pipelined off
7415	use_rpm on
7416	xl_use_area off
7417	xl_area "[0,0,0,0,0,0,0]"
7418	has_advanced_control "0"
7419	sggui_pos "-1,-1,-1,-1"
7420	block_type "addsub"
7421	block_version "8.2"
7422	sg_icon_stat "45,47,2,1,white,blue,0,46b4c804,right"
7423	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7424	"\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 "
7425	"34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 "
7426	"53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58"
7427	" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
7428	"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
7429	"ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}'"
7430	",'texmode','on');\nfprintf('','COMMENT: end icon text');\n"
7431	}
7432	Block {
7433	BlockType Reference
7434	Name "Constant"
7435	Ports [0, 1]
7436	Position [520, 349, 550, 361]
7437	SourceBlock "xbsIndex_r4/Constant"
7438	SourceType "Xilinx Constant Block Block"
7439	arith_type "Unsigned"
7440	const "0"
7441	n_bits "32"
7442	bin_pt "0"
7443	explicit_period off
7444	period "1"
7445	dsp48_infoedit "The use of this block for DSP48 instruction"
7446	"s is deprecated. Please use the Opmode block."
7447	equ "P=C"
7448	opselect "C"
7449	inp2 "PCIN>>17"
7450	opr "+"
7451	inp1 "P"
7452	carry "CIN"
7453	dbl_ovrd off
7454	has_advanced_control "0"
7455	sggui_pos "50,50,400,346"
7456	block_type "constant"
7457	block_version "10.1.2"
7458	sg_icon_stat "30,12,1,1,white,blue,0,72d575a1,right"
7459	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7460	"\npatch([0 30 30 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([12 10 13 10 12 1"
7461	"5 16 17 20 17 14 12 15 12 14 17 20 17 16 15 12 ],[1 3 6 9 11 11 10 11 11 8 11"
7462	" 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]"
7463	");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
7464	"n text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: e"
7465	"nd icon text');\n"
7466	}
7467	Block {
7468	BlockType Reference
7469	Name "Constant1"
7470	Ports [0, 1]
7471	Position [155, 57, 190, 73]
7472	SourceBlock "xbsIndex_r4/Constant"
7473	SourceType "Xilinx Constant Block Block"
7474	arith_type "Unsigned"
7475	const "1"
7476	n_bits "1"
7477	bin_pt "0"
7478	explicit_period off
7479	period "1"
7480	dsp48_infoedit "The use of this block for DSP48 instruction"
7481	"s is deprecated. Please use the Opmode block."
7482	equ "P=C"
7483	opselect "C"
7484	inp2 "PCIN>>17"
7485	opr "+"
7486	inp1 "P"
7487	carry "CIN"
7488	dbl_ovrd off
7489	has_advanced_control "0"
7490	sggui_pos "-1,-1,-1,-1"
7491	block_type "constant"
7492	block_version "8.2"
7493	sg_icon_stat "35,16,0,1,white,blue,0,06094819,right"
7494	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7495	"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
7496	"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
7497	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
7498	"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
7499	"n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME"
7500	"NT: end icon text');\n"
7501	}
7502	Block {
7503	BlockType Reference
7504	Name "Convert1"
7505	Ports [1, 1]
7506	Position [290, 55, 325, 75]
7507	SourceBlock "xbsIndex_r4/Convert"
7508	SourceType "Xilinx Type Converter Block"
7509	infoedit "Hardware notes: rounding and saturating req"
7510	"uire hardware resources; truncating and wrapping do not."
7511	arith_type "Boolean"
7512	n_bits "16"
7513	bin_pt "14"
7514	quantization "Truncate"
7515	overflow "Wrap"
7516	latency "0"
7517	dbl_ovrd off
7518	pipeline off
7519	xl_use_area off
7520	xl_area "[0,0,0,0,0,0,0]"
7521	has_advanced_control "0"
7522	sggui_pos "20,20,461,375"
7523	block_type "convert"
7524	block_version "8.2"
7525	sg_icon_stat "35,20,1,1,white,blue,0,74901e60,right"
7526	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7527	"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
7528	"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
7529	" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
7530	"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
7531	"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
7532	"OMMENT: end icon text');\n"
7533	}
7534	Block {
7535	BlockType Reference
7536	Name "Counter"
7537	Ports [2, 1]
7538	Position [485, 119, 545, 221]
7539	SourceBlock "xbsIndex_r4/Counter"
7540	SourceType "Xilinx Counter Block"
7541	infoedit "Hardware notes: Free running counters are t"
7542	"he least expensive in hardware. A count limited counter is implemented by co"
7543	"mbining a counter with a comparator."
7544	cnt_type "Free Running"
7545	cnt_to "Inf"
7546	operation "Up"
7547	start_count "0"
7548	cnt_by_val "1"
7549	arith_type "Unsigned"
7550	n_bits "32"
7551	bin_pt "0"
7552	load_pin off
7553	rst on
7554	en on
7555	explicit_period "on"
7556	period "1"
7557	dbl_ovrd off
7558	use_behavioral_HDL off
7559	use_rpm off
7560	xl_use_area off
7561	xl_area "[0,0,0,0,0,0,0]"
7562	has_advanced_control "0"
7563	sggui_pos "20,20,356,630"
7564	block_type "counter"
7565	block_version "8.2"
7566	sg_icon_stat "60,102,2,1,white,blue,0,46c73e85,right"
7567	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7568	"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
7569	"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
7570	"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
7571	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
7572	"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
7573	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
7574	"printf('','COMMENT: end icon text');\n"
7575	}
7576	Block {
7577	BlockType Reference
7578	Name "Inverter"
7579	Ports [1, 1]
7580	Position [660, 371, 705, 389]
7581	SourceBlock "xbsIndex_r4/Inverter"
7582	SourceType "Xilinx Inverter Block"
7583	infoedit "Bitwise logical negation (one's complement)"
7584	" operator."
7585	en off
7586	latency "0"
7587	dbl_ovrd off
7588	xl_use_area off
7589	xl_area "[0,0,0,0,0,0,0]"
7590	has_advanced_control "0"
7591	sggui_pos "-1,-1,-1,-1"
7592	block_type "inv"
7593	block_version "10.1.2"
7594	sg_icon_stat "45,18,1,1,white,blue,0,1ab4a85f,right"
7595	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7596	"\npatch([0 45 45 0 ],[0 0 18 18 ],[0.77 0.82 0.91]);\npatch([18 15 19 15 18 2"
7597	"3 24 25 30 26 22 19 23 19 22 26 30 25 24 23 18 ],[2 5 9 13 16 16 15 16 16 12 "
7598	"16 13 9 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 18 18 "
7599	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
7600	"icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text"
7601	"');\n"
7602	}
7603	Block {
7604	BlockType Reference
7605	Name "Logical"
7606	Ports [2, 1]
7607	Position [360, 174, 405, 216]
7608	SourceBlock "xbsIndex_r4/Logical"
7609	SourceType "Xilinx Logical Block Block"
7610	logical_function "AND"
7611	inputs "2"
7612	en off
7613	latency "0"
7614	precision "Full"
7615	arith_type "Unsigned"
7616	n_bits "16"
7617	bin_pt "0"
7618	align_bp on
7619	dbl_ovrd off
7620	xl_use_area off
7621	xl_area "[0,0,0,0,0,0,0]"
7622	has_advanced_control "0"
7623	sggui_pos "20,20,348,261"
7624	block_type "logical"
7625	block_version "8.2"
7626	sg_icon_stat "45,42,2,1,white,blue,0,087b5522,right"
7627	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7628	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
7629	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
7630	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
7631	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
7632	"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
7633	",'on');\nfprintf('','COMMENT: end icon text');\n"
7634	}
7635	Block {
7636	BlockType Reference
7637	Name "Logical1"
7638	Ports [3, 1]
7639	Position [430, 127, 465, 163]
7640	SourceBlock "xbsIndex_r4/Logical"
7641	SourceType "Xilinx Logical Block Block"
7642	logical_function "OR"
7643	inputs "3"
7644	en off
7645	latency "0"
7646	precision "Full"
7647	arith_type "Unsigned"
7648	n_bits "16"
7649	bin_pt "0"
7650	align_bp on
7651	dbl_ovrd off
7652	xl_use_area off
7653	xl_area "[0,0,0,0,0,0,0]"
7654	has_advanced_control "0"
7655	sggui_pos "-1,-1,-1,-1"
7656	block_type "logical"
7657	block_version "8.2"
7658	sg_icon_stat "35,36,3,1,white,blue,0,bd50cad4,right"
7659	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7660	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
7661	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
7662	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
7663	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
7664	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
7665	"'on');\nfprintf('','COMMENT: end icon text');\n"
7666	}
7667	Block {
7668	BlockType Reference
7669	Name "Logical2"
7670	Ports [3, 1]
7671	Position [187, 245, 223, 280]
7672	Orientation "up"
7673	SourceBlock "xbsIndex_r4/Logical"
7674	SourceType "Xilinx Logical Block Block"
7675	logical_function "OR"
7676	inputs "3"
7677	en off
7678	latency "0"
7679	precision "Full"
7680	arith_type "Unsigned"
7681	n_bits "16"
7682	bin_pt "0"
7683	align_bp on
7684	dbl_ovrd off
7685	xl_use_area off
7686	xl_area "[0,0,0,0,0,0,0]"
7687	has_advanced_control "0"
7688	sggui_pos "-1,-1,-1,-1"
7689	block_type "logical"
7690	block_version "8.2"
7691	sg_icon_stat "36,35,3,1,white,blue,0,bd50cad4,up"
7692	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7693	"\npatch([0 36 36 0 ],[0 0 35 35 ],[0.77 0.82 0.91]);\npatch([9 3 11 3 9 18 21"
7694	" 24 34 26 19 14 22 14 19 26 34 24 21 18 9 ],[4 10 18 26 32 32 29 32 32 24 31 "
7695	"26 18 10 5 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 36 36 0 0 ],[0 0 35 35 "
7696	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
7697	"icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on'"
7698	");\nfprintf('','COMMENT: end icon text');\n"
7699	}
7700	Block {
7701	BlockType Reference
7702	Name "Logical3"
7703	Ports [2, 1]
7704	Position [170, 159, 200, 206]
7705	SourceBlock "xbsIndex_r4/Logical"
7706	SourceType "Xilinx Logical Block Block"
7707	logical_function "OR"
7708	inputs "2"
7709	en off
7710	latency "0"
7711	precision "Full"
7712	arith_type "Unsigned"
7713	n_bits "16"
7714	bin_pt "0"
7715	align_bp on
7716	dbl_ovrd off
7717	xl_use_area off
7718	xl_area "[0,0,0,0,0,0,0]"
7719	has_advanced_control "0"
7720	sggui_pos "-1,-1,-1,-1"
7721	block_type "logical"
7722	block_version "9.1.01"
7723	sg_icon_stat "30,47,2,1,white,blue,0,f4a65842,right"
7724	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7725	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
7726	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
7727	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
7728	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
7729	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
7730	"'on');\nfprintf('','COMMENT: end icon text');\n"
7731	}
7732	Block {
7733	BlockType Reference
7734	Name "Logical4"
7735	Ports [2, 1]
7736	Position [735, 328, 780, 397]
7737	SourceBlock "xbsIndex_r4/Logical"
7738	SourceType "Xilinx Logical Block Block"
7739	logical_function "AND"
7740	inputs "2"
7741	en off
7742	latency "0"
7743	precision "Full"
7744	arith_type "Unsigned"
7745	n_bits "16"
7746	bin_pt "0"
7747	align_bp on
7748	dbl_ovrd off
7749	xl_use_area off
7750	xl_area "[0,0,0,0,0,0,0]"
7751	has_advanced_control "0"
7752	sggui_pos "-1,-1,-1,-1"
7753	block_type "logical"
7754	block_version "10.1.2"
7755	sg_icon_stat "45,69,2,1,white,blue,0,087b5522,right"
7756	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7757	"\npatch([0 45 45 0 ],[0 0 69 69 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 "
7758	"25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[17 24 35 46 53 53 50 53 53 43"
7759	" 53 46 35 24 17 27 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],["
7760	"0 0 69 69 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME"
7761	"NT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','te"
7762	"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
7763	}
7764	Block {
7765	BlockType Reference
7766	Name "Mux"
7767	Ports [3, 1]
7768	Position [215, 13, 260, 117]
7769	SourceBlock "xbsIndex_r4/Mux"
7770	SourceType "Xilinx Bus Multiplexer Block"
7771	inputs "2"
7772	en off
7773	latency "0"
7774	precision "Full"
7775	arith_type "Unsigned"
7776	n_bits "16"
7777	bin_pt "14"
7778	quantization "Truncate"
7779	overflow "Wrap"
7780	dbl_ovrd off
7781	xl_use_area off
7782	xl_area "[0,0,0,0,0,0,0]"
7783	has_advanced_control "0"
7784	sggui_pos "-1,-1,-1,-1"
7785	block_type "mux"
7786	block_version "8.2"
7787	sg_icon_stat "45,104,3,1,white,blue,3,613f58e1,right"
7788	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7789	"\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3"
7790	" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70"
7791	" 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4"
7792	"5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi"
7793	"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
7794	"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
7795	"rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr"
7796	"intf('','COMMENT: end icon text');\n"
7797	}
7798	Block {
7799	BlockType Reference
7800	Name "Relational"
7801	Ports [2, 1]
7802	Position [585, 126, 625, 184]
7803	SourceBlock "xbsIndex_r4/Relational"
7804	SourceType "Xilinx Arithmetic Relational Operator Block"
7805	mode "a=b"
7806	en off
7807	latency "0"
7808	dbl_ovrd off
7809	xl_use_area off
7810	xl_area "[0,0,0,0,0,0,0]"
7811	has_advanced_control "0"
7812	sggui_pos "-1,-1,-1,-1"
7813	block_type "relational"
7814	block_version "8.2"
7815	sg_icon_stat "40,58,2,1,white,blue,0,1b68ef8e,right"
7816	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7817	"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
7818	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
7819	"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
7820	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
7821	"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
7822	"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^"
7823	"{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
7824	}
7825	Block {
7826	BlockType Reference
7827	Name "Relational1"
7828	Ports [2, 1]
7829	Position [585, 326, 630, 364]
7830	SourceBlock "xbsIndex_r4/Relational"
7831	SourceType "Xilinx Arithmetic Relational Operator Block"
7832	mode "a>b"
7833	en off
7834	latency "1"
7835	dbl_ovrd off
7836	xl_use_area off
7837	xl_area "[0,0,0,0,0,0,0]"
7838	has_advanced_control "0"
7839	sggui_pos "20,20,348,193"
7840	block_type "relational"
7841	block_version "10.1.2"
7842	sg_icon_stat "45,38,1,1,white,blue,0,c445790c,right"
7843	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
7844	"\npatch([0 45 45 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([12 6 15 6 12 22 "
7845	"25 28 39 31 23 17 26 17 23 31 39 28 25 22 12 ],[4 10 19 28 34 34 31 34 34 26 "
7846	"34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 38 "
7847	"38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
7848	"in icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');po"
7849	"rt_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>b}\\newlinez^{"
7850	"-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
7851	}
7852	Block {
7853	BlockType SubSystem
7854	Name "S-R_Latch1"
7855	Ports [2, 1]
7856	Position [245, 167, 285, 238]
7857	MinAlgLoopOccurrences off
7858	RTWSystemCode "Auto"
7859	FunctionWithSeparateData off
7860	MaskHideContents off
7861	System {
7862	Name "S-R_Latch1"
7863	Location [837, 103, 1234, 376]
7864	Open off
7865	ModelBrowserVisibility off
7866	ModelBrowserWidth 200
7867	ScreenColor "white"
7868	PaperOrientation "landscape"
7869	PaperPositionMode "auto"
7870	PaperType "usletter"
7871	PaperUnits "inches"
7872	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
7873	TiledPageScale 1
7874	ShowPageBoundaries off
7875	ZoomFactor "100"
7876	Block {
7877	BlockType Inport
7878	Name "S"
7879	Position [95, 58, 125, 72]
7880	IconDisplay "Port number"
7881	}
7882	Block {
7883	BlockType Inport
7884	Name "R"
7885	Position [95, 88, 125, 102]
7886	Port "2"
7887	IconDisplay "Port number"
7888	}
7889	Block {
7890	BlockType Reference
7891	Name "Inverter"
7892	Ports [1, 1]
7893	Position [220, 82, 250, 108]
7894	SourceBlock "xbsIndex_r4/Inverter"
7895	SourceType "Xilinx Inverter Block"
7896	infoedit "Bitwise logical negation (one's complem"
7897	"ent) operator."
7898	en "off"
7899	latency "0"
7900	dbl_ovrd "off"
7901	xl_use_area "off"
7902	xl_area "[0,0,0,0,0,0,0]"
7903	has_advanced_control "0"
7904	sggui_pos "-1,-1,-1,-1"
7905	block_type "inv"
7906	block_version "VER_STRING_GOES_HERE"
7907	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
7908	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
7909	"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
7910	"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
7911	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
7912	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
7913	"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
7914	" text');\n"
7915	}
7916	Block {
7917	BlockType Reference
7918	Name "Register"
7919	Ports [3, 1]
7920	Position [150, 70, 195, 120]
7921	SourceBlock "xbsIndex_r4/Register"
7922	SourceType "Xilinx Register Block"
7923	init "0"
7924	rst "on"
7925	en "on"
7926	dbl_ovrd "off"
7927	xl_use_area "off"
7928	xl_area "[0,0,0,0,0,0,0]"
7929	has_advanced_control "0"
7930	sggui_pos "20,20,348,193"
7931	block_type "register"
7932	block_version "VER_STRING_GOES_HERE"
7933	sg_icon_stat "45,50,1,1,white,blue,0,923c1847,right"
7934	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
7935	"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
7936	"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
7937	"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
7938	" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
7939	"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
7940	"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
7941	");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
7942	"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
7943	}
7944	Block {
7945	BlockType Outport
7946	Name "Q"
7947	Position [285, 63, 315, 77]
7948	IconDisplay "Port number"
7949	BusOutputAsStruct off
7950	}
7951	Line {
7952	SrcBlock "R"
7953	SrcPort 1
7954	DstBlock "Register"
7955	DstPort 2
7956	}
7957	Line {
7958	SrcBlock "S"
7959	SrcPort 1
7960	DstBlock "Register"
7961	DstPort 1
7962	}
7963	Line {
7964	SrcBlock "Inverter"
7965	SrcPort 1
7966	Points [10, 0; 0, 55; -130, 0]
7967	DstBlock "Register"
7968	DstPort 3
7969	}
7970	Line {
7971	SrcBlock "Register"
7972	SrcPort 1
7973	Points [0, 0; 5, 0]
7974	Branch {
7975	Points [0, -25]
7976	DstBlock "Q"
7977	DstPort 1
7978	}
7979	Branch {
7980	DstBlock "Inverter"
7981	DstPort 1
7982	}
7983	}
7984	}
7985	}
7986	Block {
7987	BlockType SubSystem
7988	Name "S-R_Latch2"
7989	Ports [2, 1]
7990	Position [745, 140, 785, 200]
7991	MinAlgLoopOccurrences off
7992	RTWSystemCode "Auto"
7993	FunctionWithSeparateData off
7994	MaskHideContents off
7995	System {
7996	Name "S-R_Latch2"
7997	Location [521, 318, 918, 591]
7998	Open off
7999	ModelBrowserVisibility off
8000	ModelBrowserWidth 200
8001	ScreenColor "white"
8002	PaperOrientation "landscape"
8003	PaperPositionMode "auto"
8004	PaperType "usletter"
8005	PaperUnits "inches"
8006	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
8007	TiledPageScale 1
8008	ShowPageBoundaries off
8009	ZoomFactor "100"
8010	Block {
8011	BlockType Inport
8012	Name "S"
8013	Position [95, 58, 125, 72]
8014	IconDisplay "Port number"
8015	}
8016	Block {
8017	BlockType Inport
8018	Name "R"
8019	Position [95, 88, 125, 102]
8020	Port "2"
8021	IconDisplay "Port number"
8022	}
8023	Block {
8024	BlockType Reference
8025	Name "Inverter"
8026	Ports [1, 1]
8027	Position [220, 82, 250, 108]
8028	SourceBlock "xbsIndex_r4/Inverter"
8029	SourceType "Xilinx Inverter Block"
8030	infoedit "Bitwise logical negation (one's complem"
8031	"ent) operator."
8032	en "off"
8033	latency "0"
8034	dbl_ovrd "off"
8035	xl_use_area "off"
8036	xl_area "[0,0,0,0,0,0,0]"
8037	has_advanced_control "0"
8038	sggui_pos "-1,-1,-1,-1"
8039	block_type "inv"
8040	block_version "VER_STRING_GOES_HERE"
8041	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
8042	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
8043	"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
8044	"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
8045	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
8046	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
8047	"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
8048	" text');\n"
8049	}
8050	Block {
8051	BlockType Reference
8052	Name "Register"
8053	Ports [3, 1]
8054	Position [150, 70, 195, 120]
8055	SourceBlock "xbsIndex_r4/Register"
8056	SourceType "Xilinx Register Block"
8057	init "0"
8058	rst "on"
8059	en "on"
8060	dbl_ovrd "off"
8061	xl_use_area "off"
8062	xl_area "[0,0,0,0,0,0,0]"
8063	has_advanced_control "0"
8064	sggui_pos "-1,-1,-1,-1"
8065	block_type "register"
8066	block_version "VER_STRING_GOES_HERE"
8067	sg_icon_stat "45,50,1,1,white,blue,0,923c1847,right"
8068	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
8069	"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
8070	"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
8071	"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
8072	" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
8073	"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
8074	"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
8075	");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
8076	"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8077	}
8078	Block {
8079	BlockType Outport
8080	Name "Q"
8081	Position [285, 63, 315, 77]
8082	IconDisplay "Port number"
8083	BusOutputAsStruct off
8084	}
8085	Line {
8086	SrcBlock "Register"
8087	SrcPort 1
8088	Points [0, 0; 5, 0]
8089	Branch {
8090	DstBlock "Inverter"
8091	DstPort 1
8092	}
8093	Branch {
8094	Points [0, -25]
8095	DstBlock "Q"
8096	DstPort 1
8097	}
8098	}
8099	Line {
8100	SrcBlock "Inverter"
8101	SrcPort 1
8102	Points [10, 0; 0, 55; -130, 0]
8103	DstBlock "Register"
8104	DstPort 3
8105	}
8106	Line {
8107	SrcBlock "S"
8108	SrcPort 1
8109	DstBlock "Register"
8110	DstPort 1
8111	}
8112	Line {
8113	SrcBlock "R"
8114	SrcPort 1
8115	DstBlock "Register"
8116	DstPort 2
8117	}
8118	}
8119	}
8120	Block {
8121	BlockType SubSystem
8122	Name "posedge"
8123	Ports [1, 1]
8124	Position [75, 163, 105, 177]
8125	MinAlgLoopOccurrences off
8126	RTWSystemCode "Auto"
8127	FunctionWithSeparateData off
8128	MaskHideContents off
8129	System {
8130	Name "posedge"
8131	Location [459, 339, 854, 490]
8132	Open off
8133	ModelBrowserVisibility off
8134	ModelBrowserWidth 200
8135	ScreenColor "white"
8136	PaperOrientation "landscape"
8137	PaperPositionMode "auto"
8138	PaperType "usletter"
8139	PaperUnits "inches"
8140	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
8141	TiledPageScale 1
8142	ShowPageBoundaries off
8143	ZoomFactor "100"
8144	Block {
8145	BlockType Inport
8146	Name "In"
8147	Position [20, 33, 50, 47]
8148	IconDisplay "Port number"
8149	}
8150	Block {
8151	BlockType Reference
8152	Name "Delay"
8153	Ports [1, 1]
8154	Position [80, 67, 140, 123]
8155	SourceBlock "xbsIndex_r4/Delay"
8156	SourceType "Xilinx Delay Block"
8157	infoedit "Hardware notes: A delay line is a chain"
8158	", each link of which is an SRL16 followed by a flip-flop. If register retimin"
8159	"g is enabled, the delay line is a chain of flip-flops."
8160	en "off"
8161	latency "1"
8162	dbl_ovrd "off"
8163	reg_retiming "off"
8164	xl_use_area "off"
8165	xl_area "[1 1 0 0 0 0 0]"
8166	has_advanced_control "0"
8167	sggui_pos "-1,-1,-1,-1"
8168	block_type "delay"
8169	block_version "8.2"
8170	sg_icon_stat "60,56,1,1,white,blue,0,fc531c0e,right"
8171	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
8172	"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
8173	" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
8174	" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
8175	"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
8176	": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
8177	"'','COMMENT: end icon text');\n"
8178	}
8179	Block {
8180	BlockType Reference
8181	Name "Inverter"
8182	Ports [1, 1]
8183	Position [170, 66, 225, 124]
8184	SourceBlock "xbsIndex_r4/Inverter"
8185	SourceType "Xilinx Inverter Block"
8186	infoedit "Bitwise logical negation (one's complem"
8187	"ent) operator."
8188	en "off"
8189	latency "0"
8190	dbl_ovrd "off"
8191	xl_use_area "off"
8192	xl_area "[0 0 0 0 0 0 0]"
8193	has_advanced_control "0"
8194	sggui_pos "-1,-1,-1,-1"
8195	block_type "inv"
8196	block_version "8.2"
8197	sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right"
8198	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
8199	"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
8200	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
8201	" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
8202	"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
8203	": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
8204	"con text');\n"
8205	}
8206	Block {
8207	BlockType Reference
8208	Name "Logical"
8209	Ports [2, 1]
8210	Position [260, 25, 315, 85]
8211	SourceBlock "xbsIndex_r4/Logical"
8212	SourceType "Xilinx Logical Block Block"
8213	logical_function "AND"
8214	inputs "2"
8215	en "off"
8216	latency "0"
8217	precision "Full"
8218	arith_type "Unsigned"
8219	n_bits "16"
8220	bin_pt "0"
8221	align_bp "on"
8222	dbl_ovrd "off"
8223	xl_use_area "off"
8224	xl_area "[1 0 0 1 0 0 0]"
8225	has_advanced_control "0"
8226	sggui_pos "-1,-1,-1,-1"
8227	block_type "logical"
8228	block_version "8.2"
8229	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
8230	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
8231	"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
8232	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
8233	" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
8234	"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
8235	": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
8236	"ode','on');\nfprintf('','COMMENT: end icon text');\n"
8237	}
8238	Block {
8239	BlockType Outport
8240	Name "Out"
8241	Position [340, 48, 370, 62]
8242	IconDisplay "Port number"
8243	BusOutputAsStruct off
8244	}
8245	Line {
8246	SrcBlock "Delay"
8247	SrcPort 1
8248	Points [0, 0]
8249	DstBlock "Inverter"
8250	DstPort 1
8251	}
8252	Line {
8253	SrcBlock "Inverter"
8254	SrcPort 1
8255	Points [5, 0; 0, -25]
8256	DstBlock "Logical"
8257	DstPort 2
8258	}
8259	Line {
8260	SrcBlock "In"
8261	SrcPort 1
8262	Points [0, 0; 5, 0]
8263	Branch {
8264	DstBlock "Logical"
8265	DstPort 1
8266	}
8267	Branch {
8268	Points [0, 55]
8269	DstBlock "Delay"
8270	DstPort 1
8271	}
8272	}
8273	Line {
8274	SrcBlock "Logical"
8275	SrcPort 1
8276	Points [0, 0]
8277	DstBlock "Out"
8278	DstPort 1
8279	}
8280	}
8281	}
8282	Block {
8283	BlockType SubSystem
8284	Name "posedge1"
8285	Ports [1, 1]
8286	Position [75, 188, 105, 202]
8287	MinAlgLoopOccurrences off
8288	RTWSystemCode "Auto"
8289	FunctionWithSeparateData off
8290	MaskHideContents off
8291	System {
8292	Name "posedge1"
8293	Location [459, 339, 854, 490]
8294	Open off
8295	ModelBrowserVisibility off
8296	ModelBrowserWidth 200
8297	ScreenColor "white"
8298	PaperOrientation "landscape"
8299	PaperPositionMode "auto"
8300	PaperType "usletter"
8301	PaperUnits "inches"
8302	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
8303	TiledPageScale 1
8304	ShowPageBoundaries off
8305	ZoomFactor "100"
8306	Block {
8307	BlockType Inport
8308	Name "In"
8309	Position [20, 33, 50, 47]
8310	IconDisplay "Port number"
8311	}
8312	Block {
8313	BlockType Reference
8314	Name "Delay"
8315	Ports [1, 1]
8316	Position [80, 67, 140, 123]
8317	SourceBlock "xbsIndex_r4/Delay"
8318	SourceType "Xilinx Delay Block"
8319	infoedit "Hardware notes: A delay line is a chain"
8320	", each link of which is an SRL16 followed by a flip-flop. If register retimin"
8321	"g is enabled, the delay line is a chain of flip-flops."
8322	en "off"
8323	latency "1"
8324	dbl_ovrd "off"
8325	reg_retiming "off"
8326	xl_use_area "off"
8327	xl_area "[1 1 0 0 0 0 0]"
8328	has_advanced_control "0"
8329	sggui_pos "-1,-1,-1,-1"
8330	block_type "delay"
8331	block_version "8.2"
8332	sg_icon_stat "60,56,1,1,white,blue,0,fc531c0e,right"
8333	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
8334	"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
8335	" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
8336	" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
8337	"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
8338	": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
8339	"'','COMMENT: end icon text');\n"
8340	}
8341	Block {
8342	BlockType Reference
8343	Name "Inverter"
8344	Ports [1, 1]
8345	Position [170, 66, 225, 124]
8346	SourceBlock "xbsIndex_r4/Inverter"
8347	SourceType "Xilinx Inverter Block"
8348	infoedit "Bitwise logical negation (one's complem"
8349	"ent) operator."
8350	en "off"
8351	latency "0"
8352	dbl_ovrd "off"
8353	xl_use_area "off"
8354	xl_area "[0 0 0 0 0 0 0]"
8355	has_advanced_control "0"
8356	sggui_pos "-1,-1,-1,-1"
8357	block_type "inv"
8358	block_version "8.2"
8359	sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right"
8360	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
8361	"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
8362	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
8363	" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
8364	"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
8365	": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
8366	"con text');\n"
8367	}
8368	Block {
8369	BlockType Reference
8370	Name "Logical"
8371	Ports [2, 1]
8372	Position [260, 25, 315, 85]
8373	SourceBlock "xbsIndex_r4/Logical"
8374	SourceType "Xilinx Logical Block Block"
8375	logical_function "AND"
8376	inputs "2"
8377	en "off"
8378	latency "0"
8379	precision "Full"
8380	arith_type "Unsigned"
8381	n_bits "16"
8382	bin_pt "0"
8383	align_bp "on"
8384	dbl_ovrd "off"
8385	xl_use_area "off"
8386	xl_area "[1 0 0 1 0 0 0]"
8387	has_advanced_control "0"
8388	sggui_pos "-1,-1,-1,-1"
8389	block_type "logical"
8390	block_version "8.2"
8391	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
8392	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
8393	"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
8394	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
8395	" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
8396	"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
8397	": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
8398	"ode','on');\nfprintf('','COMMENT: end icon text');\n"
8399	}
8400	Block {
8401	BlockType Outport
8402	Name "Out"
8403	Position [340, 48, 370, 62]
8404	IconDisplay "Port number"
8405	BusOutputAsStruct off
8406	}
8407	Line {
8408	SrcBlock "Logical"
8409	SrcPort 1
8410	Points [0, 0]
8411	DstBlock "Out"
8412	DstPort 1
8413	}
8414	Line {
8415	SrcBlock "In"
8416	SrcPort 1
8417	Points [0, 0; 5, 0]
8418	Branch {
8419	Points [0, 55]
8420	DstBlock "Delay"
8421	DstPort 1
8422	}
8423	Branch {
8424	DstBlock "Logical"
8425	DstPort 1
8426	}
8427	}
8428	Line {
8429	SrcBlock "Inverter"
8430	SrcPort 1
8431	Points [5, 0; 0, -25]
8432	DstBlock "Logical"
8433	DstPort 2
8434	}
8435	Line {
8436	SrcBlock "Delay"
8437	SrcPort 1
8438	Points [0, 0]
8439	DstBlock "Inverter"
8440	DstPort 1
8441	}
8442	}
8443	}
8444	Block {
8445	BlockType Outport
8446	Name "interrupt"
8447	Position [810, 163, 840, 177]
8448	IconDisplay "Port number"
8449	BusOutputAsStruct off
8450	}
8451	Block {
8452	BlockType Outport
8453	Name "active"
8454	Position [350, 253, 380, 267]
8455	Port "2"
8456	IconDisplay "Port number"
8457	BusOutputAsStruct off
8458	}
8459	Block {
8460	BlockType Outport
8461	Name "paused"
8462	Position [820, 358, 850, 372]
8463	Port "3"
8464	IconDisplay "Port number"
8465	BusOutputAsStruct off
8466	}
8467	Block {
8468	BlockType Outport
8469	Name "timeLeft"
8470	Position [740, 253, 770, 267]
8471	Port "4"
8472	IconDisplay "Port number"
8473	BusOutputAsStruct off
8474	}
8475	Line {
8476	SrcBlock "start"
8477	SrcPort 1
8478	DstBlock "posedge"
8479	DstPort 1
8480	}
8481	Line {
8482	SrcBlock "posedge"
8483	SrcPort 1
8484	Points [15, 0]
8485	Branch {
8486	DstBlock "Logical3"
8487	DstPort 1
8488	}
8489	Branch {
8490	Points [0, -15]
8491	DstBlock "Logical1"
8492	DstPort 3
8493	}
8494	}
8495	Line {
8496	SrcBlock "mode"
8497	SrcPort 1
8498	DstBlock "Mux"
8499	DstPort 1
8500	}
8501	Line {
8502	SrcBlock "Logical"
8503	SrcPort 1
8504	DstBlock "Counter"
8505	DstPort 2
8506	}
8507	Line {
8508	SrcBlock "countTo"
8509	SrcPort 1
8510	Points [10, 0; 0, 50]
8511	Branch {
8512	Points [0, 105]
8513	DstBlock "AddSub"
8514	DstPort 1
8515	}
8516	Branch {
8517	DstBlock "Relational"
8518	DstPort 1
8519	}
8520	}
8521	Line {
8522	SrcBlock "Relational"
8523	SrcPort 1
8524	Points [5, 0]
8525	Branch {
8526	Points [0, -80; -230, 0; 0, 60]
8527	DstBlock "Logical1"
8528	DstPort 1
8529	}
8530	Branch {
8531	DstBlock "S-R_Latch2"
8532	DstPort 1
8533	}
8534	Branch {
8535	Points [0, 140]
8536	DstBlock "Logical2"
8537	DstPort 3
8538	}
8539	}
8540	Line {
8541	SrcBlock "Counter"
8542	SrcPort 1
8543	Points [0, 0]
8544	Branch {
8545	Labels [1, 0]
8546	DstBlock "Relational"
8547	DstPort 2
8548	}
8549	Branch {
8550	Points [0, 100]
8551	DstBlock "AddSub"
8552	DstPort 2
8553	}
8554	Branch {
8555	Points [0, 165]
8556	DstBlock "Relational1"
8557	DstPort 1
8558	}
8559	}
8560	Line {
8561	SrcBlock "Constant1"
8562	SrcPort 1
8563	DstBlock "Mux"
8564	DstPort 2
8565	}
8566	Line {
8567	SrcBlock "idlefordifs_inp"
8568	SrcPort 1
8569	DstBlock "Mux"
8570	DstPort 3
8571	}
8572	Line {
8573	SrcBlock "Mux"
8574	SrcPort 1
8575	DstBlock "Convert1"
8576	DstPort 1
8577	}
8578	Line {
8579	SrcBlock "Convert1"
8580	SrcPort 1
8581	Points [15, 0]
8582	DstBlock "Logical"
8583	DstPort 1
8584	}
8585	Line {
8586	SrcBlock "Logical1"
8587	SrcPort 1
8588	DstBlock "Counter"
8589	DstPort 1
8590	}
8591	Line {
8592	SrcBlock "interruptReset"
8593	SrcPort 1
8594	DstBlock "S-R_Latch2"
8595	DstPort 2
8596	}
8597	Line {
8598	SrcBlock "Logical2"
8599	SrcPort 1
8600	Points [0, -20]
8601	DstBlock "S-R_Latch1"
8602	DstPort 2
8603	}
8604	Line {
8605	SrcBlock "S-R_Latch2"
8606	SrcPort 1
8607	DstBlock "interrupt"
8608	DstPort 1
8609	}
8610	Line {
8611	SrcBlock "stop"
8612	SrcPort 1
8613	Points [70, 0]
8614	Branch {
8615	DstBlock "Logical2"
8616	DstPort 1
8617	}
8618	Branch {
8619	Points [0, -150]
8620	DstBlock "Logical1"
8621	DstPort 2
8622	}
8623	}
8624	Line {
8625	SrcBlock "S-R_Latch1"
8626	SrcPort 1
8627	Points [25, 0]
8628	Branch {
8629	DstBlock "Logical"
8630	DstPort 2
8631	}
8632	Branch {
8633	Points [0, 55]
8634	DstBlock "active"
8635	DstPort 1
8636	}
8637	Branch {
8638	Points [0, 175]
8639	DstBlock "Inverter"
8640	DstPort 1
8641	}
8642	}
8643	Line {
8644	SrcBlock "AddSub"
8645	SrcPort 1
8646	DstBlock "timeLeft"
8647	DstPort 1
8648	}
8649	Line {
8650	SrcBlock "resume"
8651	SrcPort 1
8652	DstBlock "posedge1"
8653	DstPort 1
8654	}
8655	Line {
8656	SrcBlock "Logical3"
8657	SrcPort 1
8658	DstBlock "S-R_Latch1"
8659	DstPort 1
8660	}
8661	Line {
8662	SrcBlock "posedge1"
8663	SrcPort 1
8664	DstBlock "Logical3"
8665	DstPort 2
8666	}
8667	Line {
8668	SrcBlock "pause"
8669	SrcPort 1
8670	Points [155, 0]
8671	DstBlock "Logical2"
8672	DstPort 2
8673	}
8674	Line {
8675	SrcBlock "Constant"
8676	SrcPort 1
8677	DstBlock "Relational1"
8678	DstPort 2
8679	}
8680	Line {
8681	SrcBlock "Relational1"
8682	SrcPort 1
8683	DstBlock "Logical4"
8684	DstPort 1
8685	}
8686	Line {
8687	SrcBlock "Inverter"
8688	SrcPort 1
8689	DstBlock "Logical4"
8690	DstPort 2
8691	}
8692	Line {
8693	SrcBlock "Logical4"
8694	SrcPort 1
8695	DstBlock "paused"
8696	DstPort 1
8697	}
8698	}
8699	}
8700	Block {
8701	BlockType Reference
8702	Name "timer2_active"
8703	Ports [1, 1]
8704	Position [1000, 123, 1060, 137]
8705	SourceBlock "xbsIndex_r4/Gateway Out"
8706	SourceType "Xilinx Gateway Out Block"
8707	infoedit "Gateway out block. Converts Xilinx fixed point"
8708	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
8709	"rdware notes: In hardware these blocks become top level output ports or are "
8710	"discarded, depending on how they are configured."
8711	hdl_port on
8712	timing_constraint "None"
8713	locs_specified off
8714	LOCs "{}"
8715	xl_use_area off
8716	xl_area "[0,0,0,0,0,0,0]"
8717	has_advanced_control "0"
8718	sggui_pos "-1,-1,-1,-1"
8719	block_type "gatewayout"
8720	block_version "9.1.01"
8721	sg_icon_stat "60,14,1,1,white,yellow,0,38220381,right"
8722	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
8723	"tch([0 60 60 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([26 24 27 24 26 30 31"
8724	" 32 36 33 30 28 31 28 30 33 36 32 31 30 26 ],[2 4 7 10 12 12 11 12 12 9 12 10"
8725	" 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 14 14 0 ]);"
8726	"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
8727	"text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label"
8728	"('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT"
8729	": end icon text');\n"
8730	}
8731	Block {
8732	BlockType SubSystem
8733	Name "timer3"
8734	Ports [8, 4]
8735	Position [290, 657, 400, 858]
8736	MinAlgLoopOccurrences off
8737	RTWSystemCode "Auto"
8738	FunctionWithSeparateData off
8739	MaskHideContents off
8740	System {
8741	Name "timer3"
8742	Location [58, 190, 1298, 1018]
8743	Open off
8744	ModelBrowserVisibility off
8745	ModelBrowserWidth 200
8746	ScreenColor "white"
8747	PaperOrientation "landscape"
8748	PaperPositionMode "auto"
8749	PaperType "usletter"
8750	PaperUnits "inches"
8751	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
8752	TiledPageScale 1
8753	ShowPageBoundaries off
8754	ZoomFactor "100"
8755	Block {
8756	BlockType Inport
8757	Name "start"
8758	Position [15, 163, 45, 177]
8759	IconDisplay "Port number"
8760	}
8761	Block {
8762	BlockType Inport
8763	Name "stop"
8764	Position [15, 288, 45, 302]
8765	Port "2"
8766	IconDisplay "Port number"
8767	}
8768	Block {
8769	BlockType Inport
8770	Name "resume"
8771	Position [15, 188, 45, 202]
8772	Port "3"
8773	IconDisplay "Port number"
8774	}
8775	Block {
8776	BlockType Inport
8777	Name "pause"
8778	Position [15, 313, 45, 327]
8779	Port "4"
8780	IconDisplay "Port number"
8781	}
8782	Block {
8783	BlockType Inport
8784	Name "mode"
8785	Position [155, 23, 185, 37]
8786	Port "5"
8787	IconDisplay "Port number"
8788	}
8789	Block {
8790	BlockType Inport
8791	Name "interruptReset"
8792	Position [680, 178, 710, 192]
8793	Port "6"
8794	IconDisplay "Port number"
8795	}
8796	Block {
8797	BlockType Inport
8798	Name "countTo"
8799	Position [515, 83, 545, 97]
8800	Port "7"
8801	IconDisplay "Port number"
8802	}
8803	Block {
8804	BlockType Inport
8805	Name "idlefordifs_inp"
8806	Position [155, 93, 185, 107]
8807	Port "8"
8808	IconDisplay "Port number"
8809	}
8810	Block {
8811	BlockType Reference
8812	Name "AddSub"
8813	Ports [2, 1]
8814	Position [665, 234, 710, 281]
8815	SourceBlock "xbsIndex_r4/AddSub"
8816	SourceType "Xilinx Adder/Subtractor Block"
8817	mode "Subtraction"
8818	use_carryin off
8819	use_carryout off
8820	en off
8821	latency "0"
8822	precision "User Defined"
8823	arith_type "Unsigned"
8824	n_bits "32"
8825	bin_pt "0"
8826	quantization "Truncate"
8827	overflow "Wrap"
8828	dbl_ovrd off
8829	use_behavioral_HDL off
8830	pipelined off
8831	use_rpm on
8832	xl_use_area off
8833	xl_area "[0,0,0,0,0,0,0]"
8834	has_advanced_control "0"
8835	sggui_pos "-1,-1,-1,-1"
8836	block_type "addsub"
8837	block_version "8.2"
8838	sg_icon_stat "45,47,2,1,white,blue,0,46b4c804,right"
8839	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
8840	"\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 "
8841	"34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 "
8842	"53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58"
8843	" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
8844	"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
8845	"ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}'"
8846	",'texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8847	}
8848	Block {
8849	BlockType Reference
8850	Name "Constant"
8851	Ports [0, 1]
8852	Position [520, 349, 550, 361]
8853	SourceBlock "xbsIndex_r4/Constant"
8854	SourceType "Xilinx Constant Block Block"
8855	arith_type "Unsigned"
8856	const "0"
8857	n_bits "32"
8858	bin_pt "0"
8859	explicit_period off
8860	period "1"
8861	dsp48_infoedit "The use of this block for DSP48 instruction"
8862	"s is deprecated. Please use the Opmode block."
8863	equ "P=C"
8864	opselect "C"
8865	inp2 "PCIN>>17"
8866	opr "+"
8867	inp1 "P"
8868	carry "CIN"
8869	dbl_ovrd off
8870	has_advanced_control "0"
8871	sggui_pos "50,50,400,346"
8872	block_type "constant"
8873	block_version "10.1.2"
8874	sg_icon_stat "30,12,1,1,white,blue,0,72d575a1,right"
8875	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
8876	"\npatch([0 30 30 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([12 10 13 10 12 1"
8877	"5 16 17 20 17 14 12 15 12 14 17 20 17 16 15 12 ],[1 3 6 9 11 11 10 11 11 8 11"
8878	" 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]"
8879	");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
8880	"n text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: e"
8881	"nd icon text');\n"
8882	}
8883	Block {
8884	BlockType Reference
8885	Name "Constant1"
8886	Ports [0, 1]
8887	Position [155, 57, 190, 73]
8888	SourceBlock "xbsIndex_r4/Constant"
8889	SourceType "Xilinx Constant Block Block"
8890	arith_type "Unsigned"
8891	const "1"
8892	n_bits "1"
8893	bin_pt "0"
8894	explicit_period off
8895	period "1"
8896	dsp48_infoedit "The use of this block for DSP48 instruction"
8897	"s is deprecated. Please use the Opmode block."
8898	equ "P=C"
8899	opselect "C"
8900	inp2 "PCIN>>17"
8901	opr "+"
8902	inp1 "P"
8903	carry "CIN"
8904	dbl_ovrd off
8905	has_advanced_control "0"
8906	sggui_pos "-1,-1,-1,-1"
8907	block_type "constant"
8908	block_version "8.2"
8909	sg_icon_stat "35,16,0,1,white,blue,0,06094819,right"
8910	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
8911	"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
8912	"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
8913	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
8914	"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
8915	"n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME"
8916	"NT: end icon text');\n"
8917	}
8918	Block {
8919	BlockType Reference
8920	Name "Convert1"
8921	Ports [1, 1]
8922	Position [290, 55, 325, 75]
8923	SourceBlock "xbsIndex_r4/Convert"
8924	SourceType "Xilinx Type Converter Block"
8925	infoedit "Hardware notes: rounding and saturating req"
8926	"uire hardware resources; truncating and wrapping do not."
8927	arith_type "Boolean"
8928	n_bits "16"
8929	bin_pt "14"
8930	quantization "Truncate"
8931	overflow "Wrap"
8932	latency "0"
8933	dbl_ovrd off
8934	pipeline off
8935	xl_use_area off
8936	xl_area "[0,0,0,0,0,0,0]"
8937	has_advanced_control "0"
8938	sggui_pos "20,20,461,375"
8939	block_type "convert"
8940	block_version "8.2"
8941	sg_icon_stat "35,20,1,1,white,blue,0,74901e60,right"
8942	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
8943	"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
8944	"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
8945	" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
8946	"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
8947	"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
8948	"OMMENT: end icon text');\n"
8949	}
8950	Block {
8951	BlockType Reference
8952	Name "Counter"
8953	Ports [2, 1]
8954	Position [485, 119, 545, 221]
8955	SourceBlock "xbsIndex_r4/Counter"
8956	SourceType "Xilinx Counter Block"
8957	infoedit "Hardware notes: Free running counters are t"
8958	"he least expensive in hardware. A count limited counter is implemented by co"
8959	"mbining a counter with a comparator."
8960	cnt_type "Free Running"
8961	cnt_to "Inf"
8962	operation "Up"
8963	start_count "0"
8964	cnt_by_val "1"
8965	arith_type "Unsigned"
8966	n_bits "32"
8967	bin_pt "0"
8968	load_pin off
8969	rst on
8970	en on
8971	explicit_period "on"
8972	period "1"
8973	dbl_ovrd off
8974	use_behavioral_HDL off
8975	use_rpm off
8976	xl_use_area off
8977	xl_area "[0,0,0,0,0,0,0]"
8978	has_advanced_control "0"
8979	sggui_pos "20,20,356,630"
8980	block_type "counter"
8981	block_version "8.2"
8982	sg_icon_stat "60,102,2,1,white,blue,0,46c73e85,right"
8983	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
8984	"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
8985	"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
8986	"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
8987	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
8988	"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
8989	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
8990	"printf('','COMMENT: end icon text');\n"
8991	}
8992	Block {
8993	BlockType Reference
8994	Name "Inverter"
8995	Ports [1, 1]
8996	Position [660, 371, 705, 389]
8997	SourceBlock "xbsIndex_r4/Inverter"
8998	SourceType "Xilinx Inverter Block"
8999	infoedit "Bitwise logical negation (one's complement)"
9000	" operator."
9001	en off
9002	latency "0"
9003	dbl_ovrd off
9004	xl_use_area off
9005	xl_area "[0,0,0,0,0,0,0]"
9006	has_advanced_control "0"
9007	sggui_pos "-1,-1,-1,-1"
9008	block_type "inv"
9009	block_version "10.1.2"
9010	sg_icon_stat "45,18,1,1,white,blue,0,1ab4a85f,right"
9011	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9012	"\npatch([0 45 45 0 ],[0 0 18 18 ],[0.77 0.82 0.91]);\npatch([18 15 19 15 18 2"
9013	"3 24 25 30 26 22 19 23 19 22 26 30 25 24 23 18 ],[2 5 9 13 16 16 15 16 16 12 "
9014	"16 13 9 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 18 18 "
9015	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
9016	"icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text"
9017	"');\n"
9018	}
9019	Block {
9020	BlockType Reference
9021	Name "Logical"
9022	Ports [2, 1]
9023	Position [360, 174, 405, 216]
9024	SourceBlock "xbsIndex_r4/Logical"
9025	SourceType "Xilinx Logical Block Block"
9026	logical_function "AND"
9027	inputs "2"
9028	en off
9029	latency "0"
9030	precision "Full"
9031	arith_type "Unsigned"
9032	n_bits "16"
9033	bin_pt "0"
9034	align_bp on
9035	dbl_ovrd off
9036	xl_use_area off
9037	xl_area "[0,0,0,0,0,0,0]"
9038	has_advanced_control "0"
9039	sggui_pos "20,20,348,261"
9040	block_type "logical"
9041	block_version "8.2"
9042	sg_icon_stat "45,42,2,1,white,blue,0,087b5522,right"
9043	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9044	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
9045	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
9046	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
9047	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
9048	"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
9049	",'on');\nfprintf('','COMMENT: end icon text');\n"
9050	}
9051	Block {
9052	BlockType Reference
9053	Name "Logical1"
9054	Ports [3, 1]
9055	Position [430, 127, 465, 163]
9056	SourceBlock "xbsIndex_r4/Logical"
9057	SourceType "Xilinx Logical Block Block"
9058	logical_function "OR"
9059	inputs "3"
9060	en off
9061	latency "0"
9062	precision "Full"
9063	arith_type "Unsigned"
9064	n_bits "16"
9065	bin_pt "0"
9066	align_bp on
9067	dbl_ovrd off
9068	xl_use_area off
9069	xl_area "[0,0,0,0,0,0,0]"
9070	has_advanced_control "0"
9071	sggui_pos "-1,-1,-1,-1"
9072	block_type "logical"
9073	block_version "8.2"
9074	sg_icon_stat "35,36,3,1,white,blue,0,bd50cad4,right"
9075	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9076	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
9077	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
9078	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
9079	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
9080	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
9081	"'on');\nfprintf('','COMMENT: end icon text');\n"
9082	}
9083	Block {
9084	BlockType Reference
9085	Name "Logical2"
9086	Ports [3, 1]
9087	Position [187, 245, 223, 280]
9088	Orientation "up"
9089	SourceBlock "xbsIndex_r4/Logical"
9090	SourceType "Xilinx Logical Block Block"
9091	logical_function "OR"
9092	inputs "3"
9093	en off
9094	latency "0"
9095	precision "Full"
9096	arith_type "Unsigned"
9097	n_bits "16"
9098	bin_pt "0"
9099	align_bp on
9100	dbl_ovrd off
9101	xl_use_area off
9102	xl_area "[0,0,0,0,0,0,0]"
9103	has_advanced_control "0"
9104	sggui_pos "-1,-1,-1,-1"
9105	block_type "logical"
9106	block_version "8.2"
9107	sg_icon_stat "36,35,3,1,white,blue,0,bd50cad4,up"
9108	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9109	"\npatch([0 36 36 0 ],[0 0 35 35 ],[0.77 0.82 0.91]);\npatch([9 3 11 3 9 18 21"
9110	" 24 34 26 19 14 22 14 19 26 34 24 21 18 9 ],[4 10 18 26 32 32 29 32 32 24 31 "
9111	"26 18 10 5 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 36 36 0 0 ],[0 0 35 35 "
9112	"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
9113	"icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on'"
9114	");\nfprintf('','COMMENT: end icon text');\n"
9115	}
9116	Block {
9117	BlockType Reference
9118	Name "Logical3"
9119	Ports [2, 1]
9120	Position [170, 159, 200, 206]
9121	SourceBlock "xbsIndex_r4/Logical"
9122	SourceType "Xilinx Logical Block Block"
9123	logical_function "OR"
9124	inputs "2"
9125	en off
9126	latency "0"
9127	precision "Full"
9128	arith_type "Unsigned"
9129	n_bits "16"
9130	bin_pt "0"
9131	align_bp on
9132	dbl_ovrd off
9133	xl_use_area off
9134	xl_area "[0,0,0,0,0,0,0]"
9135	has_advanced_control "0"
9136	sggui_pos "-1,-1,-1,-1"
9137	block_type "logical"
9138	block_version "9.1.01"
9139	sg_icon_stat "30,47,2,1,white,blue,0,f4a65842,right"
9140	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9141	"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
9142	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
9143	"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
9144	" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
9145	"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
9146	"'on');\nfprintf('','COMMENT: end icon text');\n"
9147	}
9148	Block {
9149	BlockType Reference
9150	Name "Logical4"
9151	Ports [2, 1]
9152	Position [735, 328, 780, 397]
9153	SourceBlock "xbsIndex_r4/Logical"
9154	SourceType "Xilinx Logical Block Block"
9155	logical_function "AND"
9156	inputs "2"
9157	en off
9158	latency "0"
9159	precision "Full"
9160	arith_type "Unsigned"
9161	n_bits "16"
9162	bin_pt "0"
9163	align_bp on
9164	dbl_ovrd off
9165	xl_use_area off
9166	xl_area "[0,0,0,0,0,0,0]"
9167	has_advanced_control "0"
9168	sggui_pos "-1,-1,-1,-1"
9169	block_type "logical"
9170	block_version "10.1.2"
9171	sg_icon_stat "45,69,2,1,white,blue,0,087b5522,right"
9172	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9173	"\npatch([0 45 45 0 ],[0 0 69 69 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 "
9174	"25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[17 24 35 46 53 53 50 53 53 43"
9175	" 53 46 35 24 17 27 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],["
9176	"0 0 69 69 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME"
9177	"NT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','te"
9178	"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
9179	}
9180	Block {
9181	BlockType Reference
9182	Name "Mux"
9183	Ports [3, 1]
9184	Position [215, 13, 260, 117]
9185	SourceBlock "xbsIndex_r4/Mux"
9186	SourceType "Xilinx Bus Multiplexer Block"
9187	inputs "2"
9188	en off
9189	latency "0"
9190	precision "Full"
9191	arith_type "Unsigned"
9192	n_bits "16"
9193	bin_pt "14"
9194	quantization "Truncate"
9195	overflow "Wrap"
9196	dbl_ovrd off
9197	xl_use_area off
9198	xl_area "[0,0,0,0,0,0,0]"
9199	has_advanced_control "0"
9200	sggui_pos "-1,-1,-1,-1"
9201	block_type "mux"
9202	block_version "8.2"
9203	sg_icon_stat "45,104,3,1,white,blue,3,613f58e1,right"
9204	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9205	"\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3"
9206	" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70"
9207	" 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4"
9208	"5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi"
9209	"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
9210	"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
9211	"rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr"
9212	"intf('','COMMENT: end icon text');\n"
9213	}
9214	Block {
9215	BlockType Reference
9216	Name "Relational"
9217	Ports [2, 1]
9218	Position [585, 126, 625, 184]
9219	SourceBlock "xbsIndex_r4/Relational"
9220	SourceType "Xilinx Arithmetic Relational Operator Block"
9221	mode "a=b"
9222	en off
9223	latency "0"
9224	dbl_ovrd off
9225	xl_use_area off
9226	xl_area "[0,0,0,0,0,0,0]"
9227	has_advanced_control "0"
9228	sggui_pos "-1,-1,-1,-1"
9229	block_type "relational"
9230	block_version "8.2"
9231	sg_icon_stat "40,58,2,1,white,blue,0,1b68ef8e,right"
9232	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9233	"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
9234	"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
9235	"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
9236	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
9237	"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
9238	"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^"
9239	"{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9240	}
9241	Block {
9242	BlockType Reference
9243	Name "Relational1"
9244	Ports [2, 1]
9245	Position [585, 326, 630, 364]
9246	SourceBlock "xbsIndex_r4/Relational"
9247	SourceType "Xilinx Arithmetic Relational Operator Block"
9248	mode "a>b"
9249	en off
9250	latency "1"
9251	dbl_ovrd off
9252	xl_use_area off
9253	xl_area "[0,0,0,0,0,0,0]"
9254	has_advanced_control "0"
9255	sggui_pos "20,20,348,193"
9256	block_type "relational"
9257	block_version "10.1.2"
9258	sg_icon_stat "45,38,1,1,white,blue,0,c445790c,right"
9259	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
9260	"\npatch([0 45 45 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([12 6 15 6 12 22 "
9261	"25 28 39 31 23 17 26 17 23 31 39 28 25 22 12 ],[4 10 19 28 34 34 31 34 34 26 "
9262	"34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 38 "
9263	"38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
9264	"in icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');po"
9265	"rt_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>b}\\newlinez^{"
9266	"-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9267	}
9268	Block {
9269	BlockType SubSystem
9270	Name "S-R_Latch1"
9271	Ports [2, 1]
9272	Position [245, 167, 285, 238]
9273	MinAlgLoopOccurrences off
9274	RTWSystemCode "Auto"
9275	FunctionWithSeparateData off
9276	MaskHideContents off
9277	System {
9278	Name "S-R_Latch1"
9279	Location [837, 103, 1234, 376]
9280	Open off
9281	ModelBrowserVisibility off
9282	ModelBrowserWidth 200
9283	ScreenColor "white"
9284	PaperOrientation "landscape"
9285	PaperPositionMode "auto"
9286	PaperType "usletter"
9287	PaperUnits "inches"
9288	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
9289	TiledPageScale 1
9290	ShowPageBoundaries off
9291	ZoomFactor "100"
9292	Block {
9293	BlockType Inport
9294	Name "S"
9295	Position [95, 58, 125, 72]
9296	IconDisplay "Port number"
9297	}
9298	Block {
9299	BlockType Inport
9300	Name "R"
9301	Position [95, 88, 125, 102]
9302	Port "2"
9303	IconDisplay "Port number"
9304	}
9305	Block {
9306	BlockType Reference
9307	Name "Inverter"
9308	Ports [1, 1]
9309	Position [220, 82, 250, 108]
9310	SourceBlock "xbsIndex_r4/Inverter"
9311	SourceType "Xilinx Inverter Block"
9312	infoedit "Bitwise logical negation (one's complem"
9313	"ent) operator."
9314	en "off"
9315	latency "0"
9316	dbl_ovrd "off"
9317	xl_use_area "off"
9318	xl_area "[0,0,0,0,0,0,0]"
9319	has_advanced_control "0"
9320	sggui_pos "-1,-1,-1,-1"
9321	block_type "inv"
9322	block_version "VER_STRING_GOES_HERE"
9323	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
9324	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9325	"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
9326	"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
9327	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
9328	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
9329	"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
9330	" text');\n"
9331	}
9332	Block {
9333	BlockType Reference
9334	Name "Register"
9335	Ports [3, 1]
9336	Position [150, 70, 195, 120]
9337	SourceBlock "xbsIndex_r4/Register"
9338	SourceType "Xilinx Register Block"
9339	init "0"
9340	rst "on"
9341	en "on"
9342	dbl_ovrd "off"
9343	xl_use_area "off"
9344	xl_area "[0,0,0,0,0,0,0]"
9345	has_advanced_control "0"
9346	sggui_pos "20,20,348,193"
9347	block_type "register"
9348	block_version "VER_STRING_GOES_HERE"
9349	sg_icon_stat "45,50,1,1,white,blue,0,923c1847,right"
9350	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9351	"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
9352	"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
9353	"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
9354	" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
9355	"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
9356	"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
9357	");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
9358	"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9359	}
9360	Block {
9361	BlockType Outport
9362	Name "Q"
9363	Position [285, 63, 315, 77]
9364	IconDisplay "Port number"
9365	BusOutputAsStruct off
9366	}
9367	Line {
9368	SrcBlock "Register"
9369	SrcPort 1
9370	Points [0, 0; 5, 0]
9371	Branch {
9372	DstBlock "Inverter"
9373	DstPort 1
9374	}
9375	Branch {
9376	Points [0, -25]
9377	DstBlock "Q"
9378	DstPort 1
9379	}
9380	}
9381	Line {
9382	SrcBlock "Inverter"
9383	SrcPort 1
9384	Points [10, 0; 0, 55; -130, 0]
9385	DstBlock "Register"
9386	DstPort 3
9387	}
9388	Line {
9389	SrcBlock "S"
9390	SrcPort 1
9391	DstBlock "Register"
9392	DstPort 1
9393	}
9394	Line {
9395	SrcBlock "R"
9396	SrcPort 1
9397	DstBlock "Register"
9398	DstPort 2
9399	}
9400	}
9401	}
9402	Block {
9403	BlockType SubSystem
9404	Name "S-R_Latch2"
9405	Ports [2, 1]
9406	Position [745, 140, 785, 200]
9407	MinAlgLoopOccurrences off
9408	RTWSystemCode "Auto"
9409	FunctionWithSeparateData off
9410	MaskHideContents off
9411	System {
9412	Name "S-R_Latch2"
9413	Location [521, 318, 918, 591]
9414	Open off
9415	ModelBrowserVisibility off
9416	ModelBrowserWidth 200
9417	ScreenColor "white"
9418	PaperOrientation "landscape"
9419	PaperPositionMode "auto"
9420	PaperType "usletter"
9421	PaperUnits "inches"
9422	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
9423	TiledPageScale 1
9424	ShowPageBoundaries off
9425	ZoomFactor "100"
9426	Block {
9427	BlockType Inport
9428	Name "S"
9429	Position [95, 58, 125, 72]
9430	IconDisplay "Port number"
9431	}
9432	Block {
9433	BlockType Inport
9434	Name "R"
9435	Position [95, 88, 125, 102]
9436	Port "2"
9437	IconDisplay "Port number"
9438	}
9439	Block {
9440	BlockType Reference
9441	Name "Inverter"
9442	Ports [1, 1]
9443	Position [220, 82, 250, 108]
9444	SourceBlock "xbsIndex_r4/Inverter"
9445	SourceType "Xilinx Inverter Block"
9446	infoedit "Bitwise logical negation (one's complem"
9447	"ent) operator."
9448	en "off"
9449	latency "0"
9450	dbl_ovrd "off"
9451	xl_use_area "off"
9452	xl_area "[0,0,0,0,0,0,0]"
9453	has_advanced_control "0"
9454	sggui_pos "-1,-1,-1,-1"
9455	block_type "inv"
9456	block_version "VER_STRING_GOES_HERE"
9457	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
9458	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9459	"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
9460	"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
9461	" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
9462	"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
9463	"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
9464	" text');\n"
9465	}
9466	Block {
9467	BlockType Reference
9468	Name "Register"
9469	Ports [3, 1]
9470	Position [150, 70, 195, 120]
9471	SourceBlock "xbsIndex_r4/Register"
9472	SourceType "Xilinx Register Block"
9473	init "0"
9474	rst "on"
9475	en "on"
9476	dbl_ovrd "off"
9477	xl_use_area "off"
9478	xl_area "[0,0,0,0,0,0,0]"
9479	has_advanced_control "0"
9480	sggui_pos "-1,-1,-1,-1"
9481	block_type "register"
9482	block_version "VER_STRING_GOES_HERE"
9483	sg_icon_stat "45,50,1,1,white,blue,0,923c1847,right"
9484	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9485	"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
9486	"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
9487	"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
9488	" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
9489	"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
9490	"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
9491	");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
9492	"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9493	}
9494	Block {
9495	BlockType Outport
9496	Name "Q"
9497	Position [285, 63, 315, 77]
9498	IconDisplay "Port number"
9499	BusOutputAsStruct off
9500	}
9501	Line {
9502	SrcBlock "R"
9503	SrcPort 1
9504	DstBlock "Register"
9505	DstPort 2
9506	}
9507	Line {
9508	SrcBlock "S"
9509	SrcPort 1
9510	DstBlock "Register"
9511	DstPort 1
9512	}
9513	Line {
9514	SrcBlock "Inverter"
9515	SrcPort 1
9516	Points [10, 0; 0, 55; -130, 0]
9517	DstBlock "Register"
9518	DstPort 3
9519	}
9520	Line {
9521	SrcBlock "Register"
9522	SrcPort 1
9523	Points [0, 0; 5, 0]
9524	Branch {
9525	Points [0, -25]
9526	DstBlock "Q"
9527	DstPort 1
9528	}
9529	Branch {
9530	DstBlock "Inverter"
9531	DstPort 1
9532	}
9533	}
9534	}
9535	}
9536	Block {
9537	BlockType SubSystem
9538	Name "posedge"
9539	Ports [1, 1]
9540	Position [75, 163, 105, 177]
9541	MinAlgLoopOccurrences off
9542	RTWSystemCode "Auto"
9543	FunctionWithSeparateData off
9544	MaskHideContents off
9545	System {
9546	Name "posedge"
9547	Location [459, 339, 854, 490]
9548	Open off
9549	ModelBrowserVisibility off
9550	ModelBrowserWidth 200
9551	ScreenColor "white"
9552	PaperOrientation "landscape"
9553	PaperPositionMode "auto"
9554	PaperType "usletter"
9555	PaperUnits "inches"
9556	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
9557	TiledPageScale 1
9558	ShowPageBoundaries off
9559	ZoomFactor "100"
9560	Block {
9561	BlockType Inport
9562	Name "In"
9563	Position [20, 33, 50, 47]
9564	IconDisplay "Port number"
9565	}
9566	Block {
9567	BlockType Reference
9568	Name "Delay"
9569	Ports [1, 1]
9570	Position [80, 67, 140, 123]
9571	SourceBlock "xbsIndex_r4/Delay"
9572	SourceType "Xilinx Delay Block"
9573	infoedit "Hardware notes: A delay line is a chain"
9574	", each link of which is an SRL16 followed by a flip-flop. If register retimin"
9575	"g is enabled, the delay line is a chain of flip-flops."
9576	en "off"
9577	latency "1"
9578	dbl_ovrd "off"
9579	reg_retiming "off"
9580	xl_use_area "off"
9581	xl_area "[1 1 0 0 0 0 0]"
9582	has_advanced_control "0"
9583	sggui_pos "-1,-1,-1,-1"
9584	block_type "delay"
9585	block_version "8.2"
9586	sg_icon_stat "60,56,1,1,white,blue,0,fc531c0e,right"
9587	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9588	"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
9589	" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
9590	" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
9591	"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
9592	": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
9593	"'','COMMENT: end icon text');\n"
9594	}
9595	Block {
9596	BlockType Reference
9597	Name "Inverter"
9598	Ports [1, 1]
9599	Position [170, 66, 225, 124]
9600	SourceBlock "xbsIndex_r4/Inverter"
9601	SourceType "Xilinx Inverter Block"
9602	infoedit "Bitwise logical negation (one's complem"
9603	"ent) operator."
9604	en "off"
9605	latency "0"
9606	dbl_ovrd "off"
9607	xl_use_area "off"
9608	xl_area "[0 0 0 0 0 0 0]"
9609	has_advanced_control "0"
9610	sggui_pos "-1,-1,-1,-1"
9611	block_type "inv"
9612	block_version "8.2"
9613	sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right"
9614	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9615	"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
9616	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
9617	" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
9618	"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
9619	": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
9620	"con text');\n"
9621	}
9622	Block {
9623	BlockType Reference
9624	Name "Logical"
9625	Ports [2, 1]
9626	Position [260, 25, 315, 85]
9627	SourceBlock "xbsIndex_r4/Logical"
9628	SourceType "Xilinx Logical Block Block"
9629	logical_function "AND"
9630	inputs "2"
9631	en "off"
9632	latency "0"
9633	precision "Full"
9634	arith_type "Unsigned"
9635	n_bits "16"
9636	bin_pt "0"
9637	align_bp "on"
9638	dbl_ovrd "off"
9639	xl_use_area "off"
9640	xl_area "[1 0 0 1 0 0 0]"
9641	has_advanced_control "0"
9642	sggui_pos "-1,-1,-1,-1"
9643	block_type "logical"
9644	block_version "8.2"
9645	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
9646	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9647	"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
9648	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
9649	" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
9650	"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
9651	": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
9652	"ode','on');\nfprintf('','COMMENT: end icon text');\n"
9653	}
9654	Block {
9655	BlockType Outport
9656	Name "Out"
9657	Position [340, 48, 370, 62]
9658	IconDisplay "Port number"
9659	BusOutputAsStruct off
9660	}
9661	Line {
9662	SrcBlock "Logical"
9663	SrcPort 1
9664	Points [0, 0]
9665	DstBlock "Out"
9666	DstPort 1
9667	}
9668	Line {
9669	SrcBlock "In"
9670	SrcPort 1
9671	Points [0, 0; 5, 0]
9672	Branch {
9673	Points [0, 55]
9674	DstBlock "Delay"
9675	DstPort 1
9676	}
9677	Branch {
9678	DstBlock "Logical"
9679	DstPort 1
9680	}
9681	}
9682	Line {
9683	SrcBlock "Inverter"
9684	SrcPort 1
9685	Points [5, 0; 0, -25]
9686	DstBlock "Logical"
9687	DstPort 2
9688	}
9689	Line {
9690	SrcBlock "Delay"
9691	SrcPort 1
9692	Points [0, 0]
9693	DstBlock "Inverter"
9694	DstPort 1
9695	}
9696	}
9697	}
9698	Block {
9699	BlockType SubSystem
9700	Name "posedge1"
9701	Ports [1, 1]
9702	Position [75, 188, 105, 202]
9703	MinAlgLoopOccurrences off
9704	RTWSystemCode "Auto"
9705	FunctionWithSeparateData off
9706	MaskHideContents off
9707	System {
9708	Name "posedge1"
9709	Location [459, 339, 854, 490]
9710	Open off
9711	ModelBrowserVisibility off
9712	ModelBrowserWidth 200
9713	ScreenColor "white"
9714	PaperOrientation "landscape"
9715	PaperPositionMode "auto"
9716	PaperType "usletter"
9717	PaperUnits "inches"
9718	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
9719	TiledPageScale 1
9720	ShowPageBoundaries off
9721	ZoomFactor "100"
9722	Block {
9723	BlockType Inport
9724	Name "In"
9725	Position [20, 33, 50, 47]
9726	IconDisplay "Port number"
9727	}
9728	Block {
9729	BlockType Reference
9730	Name "Delay"
9731	Ports [1, 1]
9732	Position [80, 67, 140, 123]
9733	SourceBlock "xbsIndex_r4/Delay"
9734	SourceType "Xilinx Delay Block"
9735	infoedit "Hardware notes: A delay line is a chain"
9736	", each link of which is an SRL16 followed by a flip-flop. If register retimin"
9737	"g is enabled, the delay line is a chain of flip-flops."
9738	en "off"
9739	latency "1"
9740	dbl_ovrd "off"
9741	reg_retiming "off"
9742	xl_use_area "off"
9743	xl_area "[1 1 0 0 0 0 0]"
9744	has_advanced_control "0"
9745	sggui_pos "-1,-1,-1,-1"
9746	block_type "delay"
9747	block_version "8.2"
9748	sg_icon_stat "60,56,1,1,white,blue,0,fc531c0e,right"
9749	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9750	"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
9751	" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
9752	" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
9753	"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
9754	": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
9755	"'','COMMENT: end icon text');\n"
9756	}
9757	Block {
9758	BlockType Reference
9759	Name "Inverter"
9760	Ports [1, 1]
9761	Position [170, 66, 225, 124]
9762	SourceBlock "xbsIndex_r4/Inverter"
9763	SourceType "Xilinx Inverter Block"
9764	infoedit "Bitwise logical negation (one's complem"
9765	"ent) operator."
9766	en "off"
9767	latency "0"
9768	dbl_ovrd "off"
9769	xl_use_area "off"
9770	xl_area "[0 0 0 0 0 0 0]"
9771	has_advanced_control "0"
9772	sggui_pos "-1,-1,-1,-1"
9773	block_type "inv"
9774	block_version "8.2"
9775	sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right"
9776	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9777	"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
9778	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
9779	" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
9780	"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
9781	": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
9782	"con text');\n"
9783	}
9784	Block {
9785	BlockType Reference
9786	Name "Logical"
9787	Ports [2, 1]
9788	Position [260, 25, 315, 85]
9789	SourceBlock "xbsIndex_r4/Logical"
9790	SourceType "Xilinx Logical Block Block"
9791	logical_function "AND"
9792	inputs "2"
9793	en "off"
9794	latency "0"
9795	precision "Full"
9796	arith_type "Unsigned"
9797	n_bits "16"
9798	bin_pt "0"
9799	align_bp "on"
9800	dbl_ovrd "off"
9801	xl_use_area "off"
9802	xl_area "[1 0 0 1 0 0 0]"
9803	has_advanced_control "0"
9804	sggui_pos "-1,-1,-1,-1"
9805	block_type "logical"
9806	block_version "8.2"
9807	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
9808	sg_mask_display "fprintf('','COMMENT: begin icon graphic"
9809	"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
9810	" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
9811	" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
9812	"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
9813	": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
9814	"ode','on');\nfprintf('','COMMENT: end icon text');\n"
9815	}
9816	Block {
9817	BlockType Outport
9818	Name "Out"
9819	Position [340, 48, 370, 62]
9820	IconDisplay "Port number"
9821	BusOutputAsStruct off
9822	}
9823	Line {
9824	SrcBlock "Delay"
9825	SrcPort 1
9826	Points [0, 0]
9827	DstBlock "Inverter"
9828	DstPort 1
9829	}
9830	Line {
9831	SrcBlock "Inverter"
9832	SrcPort 1
9833	Points [5, 0; 0, -25]
9834	DstBlock "Logical"
9835	DstPort 2
9836	}
9837	Line {
9838	SrcBlock "In"
9839	SrcPort 1
9840	Points [0, 0; 5, 0]
9841	Branch {
9842	DstBlock "Logical"
9843	DstPort 1
9844	}
9845	Branch {
9846	Points [0, 55]
9847	DstBlock "Delay"
9848	DstPort 1
9849	}
9850	}
9851	Line {
9852	SrcBlock "Logical"
9853	SrcPort 1
9854	Points [0, 0]
9855	DstBlock "Out"
9856	DstPort 1
9857	}
9858	}
9859	}
9860	Block {
9861	BlockType Outport
9862	Name "interrupt"
9863	Position [810, 163, 840, 177]
9864	IconDisplay "Port number"
9865	BusOutputAsStruct off
9866	}
9867	Block {
9868	BlockType Outport
9869	Name "active"
9870	Position [350, 253, 380, 267]
9871	Port "2"
9872	IconDisplay "Port number"
9873	BusOutputAsStruct off
9874	}
9875	Block {
9876	BlockType Outport
9877	Name "paused"
9878	Position [820, 358, 850, 372]
9879	Port "3"
9880	IconDisplay "Port number"
9881	BusOutputAsStruct off
9882	}
9883	Block {
9884	BlockType Outport
9885	Name "timeLeft"
9886	Position [740, 253, 770, 267]
9887	Port "4"
9888	IconDisplay "Port number"
9889	BusOutputAsStruct off
9890	}
9891	Line {
9892	SrcBlock "Logical4"
9893	SrcPort 1
9894	DstBlock "paused"
9895	DstPort 1
9896	}
9897	Line {
9898	SrcBlock "Inverter"
9899	SrcPort 1
9900	DstBlock "Logical4"
9901	DstPort 2
9902	}
9903	Line {
9904	SrcBlock "Relational1"
9905	SrcPort 1
9906	DstBlock "Logical4"
9907	DstPort 1
9908	}
9909	Line {
9910	SrcBlock "Constant"
9911	SrcPort 1
9912	DstBlock "Relational1"
9913	DstPort 2
9914	}
9915	Line {
9916	SrcBlock "pause"
9917	SrcPort 1
9918	Points [155, 0]
9919	DstBlock "Logical2"
9920	DstPort 2
9921	}
9922	Line {
9923	SrcBlock "posedge1"
9924	SrcPort 1
9925	DstBlock "Logical3"
9926	DstPort 2
9927	}
9928	Line {
9929	SrcBlock "Logical3"
9930	SrcPort 1
9931	DstBlock "S-R_Latch1"
9932	DstPort 1
9933	}
9934	Line {
9935	SrcBlock "resume"
9936	SrcPort 1
9937	DstBlock "posedge1"
9938	DstPort 1
9939	}
9940	Line {
9941	SrcBlock "AddSub"
9942	SrcPort 1
9943	DstBlock "timeLeft"
9944	DstPort 1
9945	}
9946	Line {
9947	SrcBlock "S-R_Latch1"
9948	SrcPort 1
9949	Points [25, 0]
9950	Branch {
9951	Points [0, 175]
9952	DstBlock "Inverter"
9953	DstPort 1
9954	}
9955	Branch {
9956	Points [0, 55]
9957	DstBlock "active"
9958	DstPort 1
9959	}
9960	Branch {
9961	DstBlock "Logical"
9962	DstPort 2
9963	}
9964	}
9965	Line {
9966	SrcBlock "stop"
9967	SrcPort 1
9968	Points [70, 0]
9969	Branch {
9970	Points [0, -150]
9971	DstBlock "Logical1"
9972	DstPort 2
9973	}
9974	Branch {
9975	DstBlock "Logical2"
9976	DstPort 1
9977	}
9978	}
9979	Line {
9980	SrcBlock "S-R_Latch2"
9981	SrcPort 1
9982	DstBlock "interrupt"
9983	DstPort 1
9984	}
9985	Line {
9986	SrcBlock "Logical2"
9987	SrcPort 1
9988	Points [0, -20]
9989	DstBlock "S-R_Latch1"
9990	DstPort 2
9991	}
9992	Line {
9993	SrcBlock "interruptReset"
9994	SrcPort 1
9995	DstBlock "S-R_Latch2"
9996	DstPort 2
9997	}
9998	Line {
9999	SrcBlock "Logical1"
10000	SrcPort 1
10001	DstBlock "Counter"
10002	DstPort 1
10003	}
10004	Line {
10005	SrcBlock "Convert1"
10006	SrcPort 1
10007	Points [15, 0]
10008	DstBlock "Logical"
10009	DstPort 1
10010	}
10011	Line {
10012	SrcBlock "Mux"
10013	SrcPort 1
10014	DstBlock "Convert1"
10015	DstPort 1
10016	}
10017	Line {
10018	SrcBlock "idlefordifs_inp"
10019	SrcPort 1
10020	DstBlock "Mux"
10021	DstPort 3
10022	}
10023	Line {
10024	SrcBlock "Constant1"
10025	SrcPort 1
10026	DstBlock "Mux"
10027	DstPort 2
10028	}
10029	Line {
10030	SrcBlock "Counter"
10031	SrcPort 1
10032	Points [0, 0]
10033	Branch {
10034	Points [0, 165]
10035	DstBlock "Relational1"
10036	DstPort 1
10037	}
10038	Branch {
10039	Points [0, 100]
10040	DstBlock "AddSub"
10041	DstPort 2
10042	}
10043	Branch {
10044	Labels [1, 0]
10045	DstBlock "Relational"
10046	DstPort 2
10047	}
10048	}
10049	Line {
10050	SrcBlock "Relational"
10051	SrcPort 1
10052	Points [5, 0]
10053	Branch {
10054	Points [0, 140]
10055	DstBlock "Logical2"
10056	DstPort 3
10057	}
10058	Branch {
10059	DstBlock "S-R_Latch2"
10060	DstPort 1
10061	}
10062	Branch {
10063	Points [0, -80; -230, 0; 0, 60]
10064	DstBlock "Logical1"
10065	DstPort 1
10066	}
10067	}
10068	Line {
10069	SrcBlock "countTo"
10070	SrcPort 1
10071	Points [10, 0; 0, 50]
10072	Branch {
10073	DstBlock "Relational"
10074	DstPort 1
10075	}
10076	Branch {
10077	Points [0, 105]
10078	DstBlock "AddSub"
10079	DstPort 1
10080	}
10081	}
10082	Line {
10083	SrcBlock "Logical"
10084	SrcPort 1
10085	DstBlock "Counter"
10086	DstPort 2
10087	}
10088	Line {
10089	SrcBlock "mode"
10090	SrcPort 1
10091	DstBlock "Mux"
10092	DstPort 1
10093	}
10094	Line {
10095	SrcBlock "posedge"
10096	SrcPort 1
10097	Points [15, 0]
10098	Branch {
10099	Points [0, -15]
10100	DstBlock "Logical1"
10101	DstPort 3
10102	}
10103	Branch {
10104	DstBlock "Logical3"
10105	DstPort 1
10106	}
10107	}
10108	Line {
10109	SrcBlock "start"
10110	SrcPort 1
10111	DstBlock "posedge"
10112	DstPort 1
10113	}
10114	}
10115	}
10116	Block {
10117	BlockType Reference
10118	Name "timer3_active"
10119	Ports [1, 1]
10120	Position [1000, 143, 1060, 157]
10121	SourceBlock "xbsIndex_r4/Gateway Out"
10122	SourceType "Xilinx Gateway Out Block"
10123	infoedit "Gateway out block. Converts Xilinx fixed point"
10124	" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
10125	"rdware notes: In hardware these blocks become top level output ports or are "
10126	"discarded, depending on how they are configured."
10127	hdl_port on
10128	timing_constraint "None"
10129	locs_specified off
10130	LOCs "{}"
10131	xl_use_area off
10132	xl_area "[0,0,0,0,0,0,0]"
10133	has_advanced_control "0"
10134	sggui_pos "-1,-1,-1,-1"
10135	block_type "gatewayout"
10136	block_version "9.1.01"
10137	sg_icon_stat "60,14,1,1,white,yellow,0,38220381,right"
10138	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
10139	"tch([0 60 60 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([26 24 27 24 26 30 31"
10140	" 32 36 33 30 28 31 28 30 33 36 32 31 30 26 ],[2 4 7 10 12 12 11 12 12 9 12 10"
10141	" 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 14 14 0 ]);"
10142	"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
10143	"text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label"
10144	"('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT"
10145	": end icon text');\n"
10146	}
10147	Block {
10148	BlockType SubSystem
10149	Name "timer_control"
10150	Ports [0, 1]
10151	Position [30, 374, 95, 416]
10152	MinAlgLoopOccurrences off
10153	RTWSystemCode "Auto"
10154	FunctionWithSeparateData off
10155	MaskHideContents off
10156	MaskIconFrame on
10157	MaskIconOpaque on
10158	MaskIconRotate "none"
10159	MaskIconUnits "autoscale"
10160	System {
10161	Name "timer_control"
10162	Location [938, 667, 1231, 867]
10163	Open off
10164	ModelBrowserVisibility off
10165	ModelBrowserWidth 200
10166	ScreenColor "white"
10167	PaperOrientation "landscape"
10168	PaperPositionMode "auto"
10169	PaperType "usletter"
10170	PaperUnits "inches"
10171	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
10172	TiledPageScale 1
10173	ShowPageBoundaries off
10174	ZoomFactor "100"
10175	Block {
10176	BlockType Reference
10177	Name "Constant6"
10178	Ports [0, 1]
10179	Position [80, 127, 100, 143]
10180	SourceBlock "xbsIndex_r4/Constant"
10181	SourceType "Xilinx Constant Block Block"
10182	arith_type "Boolean"
10183	const "1"
10184	n_bits "16"
10185	bin_pt "14"
10186	explicit_period "off"
10187	period "1"
10188	dsp48_infoedit "The use of this block for DSP48 instruction"
10189	"s is deprecated. Please use the Opmode block."
10190	equ "P=C"
10191	opselect "C"
10192	inp2 "PCIN>>17"
10193	opr "+"
10194	inp1 "P"
10195	carry "CIN"
10196	dbl_ovrd "off"
10197	has_advanced_control "0"
10198	sggui_pos "20,20,400,346"
10199	block_type "constant"
10200	block_version "10.1.2"
10201	sg_icon_stat "20,16,1,1,white,blue,0,06094819,right"
10202	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
10203	"\npatch([0 20 20 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([6 3 7 3 6 10 11 "
10204	"12 17 13 10 8 12 8 10 13 17 12 11 10 6 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 "
10205	"5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\nf"
10206	"printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon tex"
10207	"t');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: end ic"
10208	"on text');\n"
10209	}
10210	Block {
10211	BlockType Reference
10212	Name "From Register2"
10213	Ports [0, 1]
10214	Position [60, 25, 105, 75]
10215	ShowName off
10216	AttributesFormatString "From Register\\n<< %<shared_memory_name> >>"
10217	SourceBlock "xbsIndex_r4/From Register"
10218	SourceType "Xilinx Shared Memory Based From Register Bl"
10219	"ock"
10220	infoedit "Register block that reads data to a shared "
10221	"memory register. Delay of one sample period."
10222	shared_memory_name "'timer_control_w'"
10223	init "0"
10224	period "1"
10225	ownership "Locally owned and initialized"
10226	arith_type "Unsigned"
10227	n_bits "32"
10228	bin_pt "0"
10229	dbl_ovrd off
10230	xl_use_area off
10231	xl_area "[0,0,0,0,0,0,0]"
10232	has_advanced_control "0"
10233	sggui_pos "412,24,383,246"
10234	block_type "fromreg"
10235	block_version "8.2"
10236	sg_icon_stat "45,50,0,1,white,blue,0,4b212927,right"
10237	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
10238	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
10239	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
10240	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
10241	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
10242	"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
10243	"COMMENT: end icon text');\n"
10244	}
10245	Block {
10246	BlockType Terminator
10247	Name "Terminator"
10248	Position [250, 115, 270, 135]
10249	ShowName off
10250	}
10251	Block {
10252	BlockType Reference
10253	Name "To Register5"
10254	Ports [2, 1]
10255	Position [165, 98, 210, 147]
10256	AttributesFormatString "<< %<shared_memory_name> >>"
10257	SourceBlock "xbsIndex_r4/To Register"
10258	SourceType "Xilinx Shared Memory Based To Register Bloc"
10259	"k"
10260	infoedit "Register block that writes data to a shared"
10261	" memory register. Delay of one sample period."
10262	shared_memory_name "'timer_control_r'"
10263	init "0"
10264	ownership "Locally owned and initialized"
10265	explicit_data_type on
10266	arith_type "Unsigned"
10267	n_bits "32"
10268	bin_pt "0"
10269	dbl_ovrd off
10270	xl_use_area off
10271	xl_area "[0,0,0,0,0,0,0]"
10272	has_advanced_control "0"
10273	sggui_pos "20,20,381,266"
10274	block_type "toreg"
10275	block_version "10.1.2"
10276	sg_icon_stat "45,49,2,1,white,blue,0,77cabcdf,right"
10277	sg_mask_display "fprintf('','COMMENT: begin icon graphics');"
10278	"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
10279	"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
10280	"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
10281	" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
10282	"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
10283	";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
10284	"fprintf('','COMMENT: end icon text');\n"
10285	}
10286	Block {
10287	BlockType Outport
10288	Name "D"
10289	Position [180, 43, 210, 57]
10290	IconDisplay "Port number"
10291	BusOutputAsStruct off
10292	}
10293	Line {
10294	SrcBlock "From Register2"
10295	SrcPort 1
10296	Points [10, 0]
10297	Branch {
10298	Points [0, 60]
10299	DstBlock "To Register5"
10300	DstPort 1
10301	}
10302	Branch {
10303	DstBlock "D"
10304	DstPort 1
10305	}
10306	}
10307	Line {
10308	SrcBlock "To Register5"
10309	SrcPort 1
10310	DstBlock "Terminator"
10311	DstPort 1
10312	}
10313	Line {
10314	SrcBlock "Constant6"
10315	SrcPort 1
10316	DstBlock "To Register5"
10317	DstPort 2
10318	}
10319	}
10320	}
10321	Line {
10322	SrcBlock "timer"
10323	SrcPort 4
10324	DstBlock "To Register"
10325	DstPort 1
10326	}
10327	Line {
10328	SrcBlock "Constant3"
10329	SrcPort 1
10330	DstBlock "To Register2"
10331	DstPort 2
10332	}
10333	Line {
10334	SrcBlock "Constant4"
10335	SrcPort 1
10336	DstBlock "To Register3"
10337	DstPort 2
10338	}
10339	Line {
10340	SrcBlock "timer_control"
10341	SrcPort 1
10342	Points [45, 0]
10343	Branch {
10344	Points [0, -370]
10345	DstBlock "Slice"
10346	DstPort 1
10347	}
10348	Branch {
10349	Points [0, -345]
10350	DstBlock "Slice1"
10351	DstPort 1
10352	}
10353	Branch {
10354	Points [0, -320]
10355	DstBlock "Slice2"
10356	DstPort 1
10357	}
10358	Branch {
10359	Points [0, -155]
10360	DstBlock "Slice6"
10361	DstPort 1
10362	}
10363	Branch {
10364	Points [0, -105]
10365	DstBlock "Slice8"
10366	DstPort 1
10367	}
10368	Branch {
10369	Points [0, -130]
10370	DstBlock "Slice7"
10371	DstPort 1
10372	}
10373	Branch {
10374	Points [0, -80]
10375	DstBlock "Slice9"
10376	DstPort 1
10377	}
10378	Branch {
10379	Points [0, 60]
10380	DstBlock "Slice12"
10381	DstPort 1
10382	}
10383	Branch {
10384	Points [0, 85]
10385	DstBlock "Slice13"
10386	DstPort 1
10387	}
10388	Branch {
10389	Points [0, 135]
10390	DstBlock "Slice15"
10391	DstPort 1
10392	}
10393	Branch {
10394	Points [0, 110]
10395	DstBlock "Slice14"
10396	DstPort 1
10397	}
10398	Branch {
10399	Points [0, 160]
10400	DstBlock "Slice16"
10401	DstPort 1
10402	}
10403	Branch {
10404	Points [0, 185]
10405	DstBlock "Slice17"
10406	DstPort 1
10407	}
10408	Branch {
10409	Points [0, 275]
10410	DstBlock "Slice18"
10411	DstPort 1
10412	}
10413	Branch {
10414	Points [0, 300]
10415	DstBlock "Slice19"
10416	DstPort 1
10417	}
10418	Branch {
10419	Points [0, 325]
10420	DstBlock "Slice20"
10421	DstPort 1
10422	}
10423	Branch {
10424	Points [0, 350]
10425	DstBlock "Slice21"
10426	DstPort 1
10427	}
10428	Branch {
10429	Points [0, 375]
10430	DstBlock "Slice22"
10431	DstPort 1
10432	}
10433	Branch {
10434	Points [0, 400]
10435	DstBlock "Slice23"
10436	DstPort 1
10437	}
10438	Branch {
10439	Points [0, -55]
10440	DstBlock "Slice10"
10441	DstPort 1
10442	}
10443	Branch {
10444	Points [0, -30]
10445	DstBlock "Slice11"
10446	DstPort 1
10447	}
10448	Branch {
10449	Points [0, -295]
10450	DstBlock "Slice3"
10451	DstPort 1
10452	}
10453	Branch {
10454	Points [0, -270]
10455	DstBlock "Slice4"
10456	DstPort 1
10457	}
10458	Branch {
10459	Points [0, -245]
10460	DstBlock "Slice5"
10461	DstPort 1
10462	}
10463	}
10464	Line {
10465	SrcBlock "Slice6"
10466	SrcPort 1
10467	DstBlock "timer1"
10468	DstPort 1
10469	}
10470	Line {
10471	SrcBlock "Slice7"
10472	SrcPort 1
10473	DstBlock "timer1"
10474	DstPort 2
10475	}
10476	Line {
10477	SrcBlock "Slice8"
10478	SrcPort 1
10479	DstBlock "timer1"
10480	DstPort 3
10481	}
10482	Line {
10483	SrcBlock "Slice12"
10484	SrcPort 1
10485	DstBlock "timer2"
10486	DstPort 1
10487	}
10488	Line {
10489	SrcBlock "Constant1"
10490	SrcPort 1
10491	DstBlock "To Register"
10492	DstPort 2
10493	}
10494	Line {
10495	SrcBlock "Constant2"
10496	SrcPort 1
10497	DstBlock "To Register1"
10498	DstPort 2
10499	}
10500	Line {
10501	SrcBlock "Constant5"
10502	SrcPort 1
10503	DstBlock "To Register4"
10504	DstPort 2
10505	}
10506	Line {
10507	SrcBlock "From Register1"
10508	SrcPort 1
10509	DstBlock "timer"
10510	DstPort 7
10511	}
10512	Line {
10513	SrcBlock "Slice13"
10514	SrcPort 1
10515	DstBlock "timer2"
10516	DstPort 2
10517	}
10518	Line {
10519	SrcBlock "Slice9"
10520	SrcPort 1
10521	DstBlock "timer1"
10522	DstPort 4
10523	}
10524	Line {
10525	SrcBlock "timer"
10526	SrcPort 1
10527	Points [500, 0]
10528	Branch {
10529	DstBlock "Logical"
10530	DstPort 1
10531	}
10532	Branch {
10533	DstBlock "Concat1"
10534	DstPort 3
10535	}
10536	}
10537	Line {
10538	SrcBlock "timer1"
10539	SrcPort 1
10540	Points [210, 0; 0, -205; 245, 0]
10541	Branch {
10542	Points [0, 0]
10543	DstBlock "Logical"
10544	DstPort 2
10545	}
10546	Branch {
10547	DstBlock "Concat2"
10548	DstPort 3
10549	}
10550	}
10551	Line {
10552	SrcBlock "timer2"
10553	SrcPort 1
10554	Points [215, 0; 0, -410; 195, 0]
10555	Branch {
10556	DstBlock "Logical"
10557	DstPort 3
10558	}
10559	Branch {
10560	DstBlock "Concat3"
10561	DstPort 3
10562	}
10563	}
10564	Line {
10565	SrcBlock "timer3"
10566	SrcPort 1
10567	Points [220, 0; 0, -615; 145, 0]
10568	Branch {
10569	DstBlock "Logical"
10570	DstPort 4
10571	}
10572	Branch {
10573	DstBlock "Concat4"
10574	DstPort 3
10575	}
10576	}
10577	Line {
10578	SrcBlock "To Register"
10579	SrcPort 1
10580	Points [20, 0; 0, 585]
10581	DstBlock "Gateway Out1"
10582	DstPort 1
10583	}
10584	Line {
10585	SrcBlock "To Register1"
10586	SrcPort 1
10587	Points [15, 0; 0, 390]
10588	DstBlock "Gateway Out2"
10589	DstPort 1
10590	}
10591	Line {
10592	SrcBlock "To Register2"
10593	SrcPort 1
10594	Points [10, 0; 0, 195]
10595	DstBlock "Gateway Out3"
10596	DstPort 1
10597	}
10598	Line {
10599	SrcBlock "To Register3"
10600	SrcPort 1
10601	DstBlock "Gateway Out4"
10602	DstPort 1
10603	}
10604	Line {
10605	SrcBlock "Logical"
10606	SrcPort 1
10607	DstBlock "TIMEREXPIRE"
10608	DstPort 1
10609	}
10610	Line {
10611	SrcBlock "TIMEREXPIRE"
10612	SrcPort 1
10613	Points [55, 0; 0, 240]
10614	DstBlock "Scope"
10615	DstPort 1
10616	}
10617	Line {
10618	SrcBlock "timer"
10619	SrcPort 2
10620	Points [495, 0; 0, 0]
10621	Branch {
10622	DstBlock "timer0_active"
10623	DstPort 1
10624	}
10625	Branch {
10626	DstBlock "Concat1"
10627	DstPort 2
10628	}
10629	}
10630	Line {
10631	SrcBlock "Concat"
10632	SrcPort 1
10633	Points [0, 25]
10634	DstBlock "To Register4"
10635	DstPort 1
10636	}
10637	Line {
10638	SrcBlock "Concat1"
10639	SrcPort 1
10640	DstBlock "Convert"
10641	DstPort 1
10642	}
10643	Line {
10644	SrcBlock "Convert"
10645	SrcPort 1
10646	DstBlock "Concat"
10647	DstPort 4
10648	}
10649	Line {
10650	Labels [1, 0]
10651	SrcBlock "Concat4"
10652	SrcPort 1
10653	DstBlock "Convert3"
10654	DstPort 1
10655	}
10656	Line {
10657	SrcBlock "Convert3"
10658	SrcPort 1
10659	DstBlock "Concat"
10660	DstPort 1
10661	}
10662	Line {
10663	SrcBlock "Concat3"
10664	SrcPort 1
10665	DstBlock "Convert2"
10666	DstPort 1
10667	}
10668	Line {
10669	SrcBlock "Convert2"
10670	SrcPort 1
10671	DstBlock "Concat"
10672	DstPort 2
10673	}
10674	Line {
10675	SrcBlock "Concat2"
10676	SrcPort 1
10677	DstBlock "Convert1"
10678	DstPort 1
10679	}
10680	Line {
10681	SrcBlock "Convert1"
10682	SrcPort 1
10683	DstBlock "Concat"
10684	DstPort 3
10685	}
10686	Line {
10687	SrcBlock "Slice"
10688	SrcPort 1
10689	DstBlock "timer"
10690	DstPort 1
10691	}
10692	Line {
10693	SrcBlock "Slice1"
10694	SrcPort 1
10695	DstBlock "timer"
10696	DstPort 2
10697	}
10698	Line {
10699	SrcBlock "Slice2"
10700	SrcPort 1
10701	DstBlock "timer"
10702	DstPort 3
10703	}
10704	Line {
10705	SrcBlock "Slice3"
10706	SrcPort 1
10707	DstBlock "timer"
10708	DstPort 4
10709	}
10710	Line {
10711	SrcBlock "Slice4"
10712	SrcPort 1
10713	DstBlock "timer"
10714	DstPort 5
10715	}
10716	Line {
10717	SrcBlock "Slice5"
10718	SrcPort 1
10719	DstBlock "timer"
10720	DstPort 6
10721	}
10722	Line {
10723	SrcBlock "From Register3"
10724	SrcPort 1
10725	DstBlock "timer1"
10726	DstPort 7
10727	}
10728	Line {
10729	SrcBlock "From Register4"
10730	SrcPort 1
10731	DstBlock "timer2"
10732	DstPort 7
10733	}
10734	Line {
10735	SrcBlock "Slice10"
10736	SrcPort 1
10737	DstBlock "timer1"
10738	DstPort 5
10739	}
10740	Line {
10741	SrcBlock "Slice11"
10742	SrcPort 1
10743	DstBlock "timer1"
10744	DstPort 6
10745	}
10746	Line {
10747	SrcBlock "Slice14"
10748	SrcPort 1
10749	DstBlock "timer2"
10750	DstPort 3
10751	}
10752	Line {
10753	SrcBlock "Slice15"
10754	SrcPort 1
10755	DstBlock "timer2"
10756	DstPort 4
10757	}
10758	Line {
10759	SrcBlock "Slice16"
10760	SrcPort 1
10761	DstBlock "timer2"
10762	DstPort 5
10763	}
10764	Line {
10765	SrcBlock "Slice17"
10766	SrcPort 1
10767	DstBlock "timer2"
10768	DstPort 6
10769	}
10770	Line {
10771	SrcBlock "Slice18"
10772	SrcPort 1
10773	DstBlock "timer3"
10774	DstPort 1
10775	}
10776	Line {
10777	SrcBlock "Slice19"
10778	SrcPort 1
10779	DstBlock "timer3"
10780	DstPort 2
10781	}
10782	Line {
10783	SrcBlock "Slice20"
10784	SrcPort 1
10785	DstBlock "timer3"
10786	DstPort 3
10787	}
10788	Line {
10789	SrcBlock "To Register4"
10790	SrcPort 1
10791	DstBlock "Gateway Out"
10792	DstPort 1
10793	}
10794	Line {
10795	SrcBlock "Constant"
10796	SrcPort 1
10797	DstBlock "IDLEFORDIFS"
10798	DstPort 1
10799	}
10800	Line {
10801	SrcBlock "IDLEFORDIFS"
10802	SrcPort 1
10803	Points [10, 0]
10804	Branch {
10805	DstBlock "timer"
10806	DstPort 8
10807	}
10808	Branch {
10809	Points [0, 215]
10810	DstBlock "timer1"
10811	DstPort 8
10812	}
10813	Branch {
10814	Points [0, 430]
10815	DstBlock "timer2"
10816	DstPort 8
10817	}
10818	Branch {
10819	Points [0, 645]
10820	DstBlock "timer3"
10821	DstPort 8
10822	}
10823	}
10824	Line {
10825	SrcBlock "Slice21"
10826	SrcPort 1
10827	DstBlock "timer3"
10828	DstPort 4
10829	}
10830	Line {
10831	SrcBlock "Slice22"
10832	SrcPort 1
10833	DstBlock "timer3"
10834	DstPort 5
10835	}
10836	Line {
10837	SrcBlock "timer3"
10838	SrcPort 4
10839	DstBlock "To Register3"
10840	DstPort 1
10841	}
10842	Line {
10843	SrcBlock "timer2"
10844	SrcPort 4
10845	DstBlock "To Register2"
10846	DstPort 1
10847	}
10848	Line {
10849	SrcBlock "timer1"
10850	SrcPort 4
10851	DstBlock "To Register1"
10852	DstPort 1
10853	}
10854	Line {
10855	SrcBlock "timer1"
10856	SrcPort 2
10857	Points [240, 0; 0, -195; 210, 0]
10858	Branch {
10859	DstBlock "timer1_active"
10860	DstPort 1
10861	}
10862	Branch {
10863	DstBlock "Concat2"
10864	DstPort 2
10865	}
10866	}
10867	Line {
10868	SrcBlock "timer2"
10869	SrcPort 2
10870	Points [245, 0; 0, -390; 160, 0]
10871	Branch {
10872	DstBlock "timer2_active"
10873	DstPort 1
10874	}
10875	Branch {
10876	DstBlock "Concat3"
10877	DstPort 2
10878	}
10879	}
10880	Line {
10881	SrcBlock "timer3"
10882	SrcPort 2
10883	Points [250, 0; 0, -585; 110, 0]
10884	Branch {
10885	DstBlock "timer3_active"
10886	DstPort 1
10887	}
10888	Branch {
10889	DstBlock "Concat4"
10890	DstPort 2
10891	}
10892	}
10893	Line {
10894	SrcBlock "From Register5"
10895	SrcPort 1
10896	DstBlock "timer3"
10897	DstPort 7
10898	}
10899	Line {
10900	SrcBlock "Slice23"
10901	SrcPort 1
10902	DstBlock "timer3"
10903	DstPort 6
10904	}
10905	Line {
10906	SrcBlock "timer0_active"
10907	SrcPort 1
10908	Points [40, 0; 0, 225]
10909	DstBlock "Scope"
10910	DstPort 2
10911	}
10912	Line {
10913	SrcBlock "timer1_active"
10914	SrcPort 1
10915	Points [30, 0; 0, 225]
10916	DstBlock "Scope"
10917	DstPort 3
10918	}
10919	Line {
10920	SrcBlock "timer2_active"
10921	SrcPort 1
10922	Points [20, 0; 0, 225]
10923	DstBlock "Scope"
10924	DstPort 4
10925	}
10926	Line {
10927	SrcBlock "timer3_active"
10928	SrcPort 1
10929	Points [10, 0; 0, 225]
10930	DstBlock "Scope"
10931	DstPort 5
10932	}
10933	Line {
10934	SrcBlock "Gateway Out"
10935	SrcPort 1
10936	DstBlock "Scope"
10937	DstPort 6
10938	}
10939	Line {
10940	SrcBlock "Gateway Out1"
10941	SrcPort 1
10942	DstBlock "Scope1"
10943	DstPort 1
10944	}
10945	Line {
10946	SrcBlock "Gateway Out2"
10947	SrcPort 1
10948	DstBlock "Scope1"
10949	DstPort 2
10950	}
10951	Line {
10952	SrcBlock "Gateway Out3"
10953	SrcPort 1
10954	DstBlock "Scope1"
10955	DstPort 3
10956	}
10957	Line {
10958	SrcBlock "Gateway Out4"
10959	SrcPort 1
10960	DstBlock "Scope1"
10961	DstPort 4
10962	}
10963	Line {
10964	SrcBlock "timer"
10965	SrcPort 3
10966	Points [190, 0; 0, 45; 300, 0]
10967	DstBlock "Concat1"
10968	DstPort 1
10969	}
10970	Line {
10971	SrcBlock "timer1"
10972	SrcPort 3
10973	Points [270, 0; 0, -165; 175, 0]
10974	DstBlock "Concat2"
10975	DstPort 1
10976	}
10977	Line {
10978	SrcBlock "timer2"
10979	SrcPort 3
10980	Points [280, 0; 0, -375; 120, 0]
10981	DstBlock "Concat3"
10982	DstPort 1
10983	}
10984	Line {
10985	SrcBlock "timer3"
10986	SrcPort 3
10987	Points [285, 0; 0, -585; 70, 0]
10988	DstBlock "Concat4"
10989	DstPort 1
10990	}
10991	}
10992	}
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11129	"AE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](G)U;E]C;W)E9V5N(B!D969A=6QT/2)O9F8B(&Q"
11130	"A8F5L/2)2=6X@0V]R94=E;B(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](F"
11131	"1E<')E8V%T961?8V]N=')O;\"(@9&5F875L=#TB;V9F(B!L86)E;#TB4VAO=R!D97!R96-A=&5D(&"
11132	"-O;G1R;VQS(B O/@H@(#QH:61D96YV87(@979A;'5A=&4](G1R=64B(&YA;64](F5V86Q?9FEE;&0"
11133	"B(&1E9F%U;'0](C B(\"\\^\"B \\+V)L;V-K9W5I/@H\\+W-Y<V=E;F)L;V-K/@H X "
11134	"P !@ @ $ 4 ( ! ! #@ # "
11135	" & \" 0 !0 @ ! ! $ $ $ %9(1$P. . "
11136	" 8 ( !@ % \" $ ! 0 ) \" "
11137	" #@ #@ & \" 8 !0 @ ! 0 $ \"0 @ "
11138	" X ! !@ @ $ 4 ( 0 T ! ! "
11139	" - 0VQO8VL@16YA8FQE<P X P !@ @ $ 4 ( 0 "
11140	" , ! ! P Q,# #@ +@9 & \" ( !0 @ ! "
11141	" 0 $ !0 $ !X ! _ , &EN9F]E9&ET "
11142	"'AI;&EN>&9A;6EL>0 '!A<G0 "
11143	" '-P965D '!A8VMA9V4 "
11144	" '-Y;G1H97-I<U]T;V]L7W-G861V86YC960 '-Y;G1H97-I<U]T;V]L "
11145	" &1I<F5C=&]R>0 '1E<W1B96YC:%]S9V%D=F%N8V5D "
11146	" '1E<W1B96YC: '-Y<V-L:U]P97)I;V0 "
11147	" &EN8W)?;F5T;&ES=%]S9V%D=F%N8V5D '1R:6U?=F)I='-?<V=A9'9"
11148	"A;F-E9 &1B;%]O=G)D7W-G861V86YC960 &-O<F5?9V5N97)A=&EO"
11149	";E]S9V%D=F%N8V5D &-O<F5?9V5N97)A=&EO;@ ')U;E]C;W)E9V5N7"
11150	"W-G861V86YC960 ')U;E]C;W)E9V5N &1E<')E8V%T96"
11151	"1?8V]N=')O;%]S9V%D=F%N8V5D &5V86Q?9FEE;&0 &AA<U]A9'9"
11152	"A;F-E9%]C;VYT<F]L '-G9W5I7W!O<P &)L;V-K"
11153	"7W1Y<&4 &)L;V-K7W9E<G-I;VX '-G7"
11154	"VEC;VY?<W1A= '-G7VUA<VM?9&ES<&QA>0 '"
11155	"-G7VQI<W1?8V]N=&5N=', '-G7V)L;V-K9W5I7WAM; "
11156	" &-L;V-K7VQO8P '-Y;G1H97-I<U]L86YG=6%G90 "
11157	" &-E7V-L<@ '!R97-E<G9E7VAI97)A<F-H>0 "
11158	" '!O<W1G96YE<F%T:6]N7V9C;@ '-E='1I;F=S7V9C;@ "
11159	" . 2 8 ( ! % \" $ 1 0 "
11160	" 0 $0 \"!3>7-T96T@1V5N97)A=&]R X X !@ @ $ "
11161	" 4 ( 0 @ ! ! ( =FER=&5X,G . . 8 ( "
11162	" ! % \" $ ' 0 0 !P 'AC,G9P-S #@ # "
11163	"& \" 0 !0 @ ! @ $ $ \" \"TV . . "
11164	" 8 ( ! % \" $ & 0 0 !@ &9F,34Q-P #"
11165	"@ # & \" 0 !0 @ $ $ . "
11166	" , 8 ( ! % \" $ # 0 0 , 6%-4 X "
11167	" ! !@ @ $ 4 ( 0 D ! ! ) 0SHO4E"
11168	"130U13 X P !@ @ $ 4 ( ! "
11169	" ! #@ # & \" 0 !0 @ ! P $ "
11170	" $ # &]F9@ . , 8 ( ! % \" $ \" 0 "
11171	" 0 ( ,3 X P !@ @ $ 4 ( ! ! "
11172	" #@ # & \" 0 !0 @ $ $ "
11173	" . , 8 ( ! % \" 0 0 "
11174	" X P !@ @ $ 4 ( ! ! "
11175	" #@ $@ & \" 0 !0 @ ! & $ $ !@ "
11176	" !!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,. , 8 ( ! % \" "
11177	" 0 0 X P !@ @ $ 4 ( "
11178	" 0 , ! ! P!O9F8 #@ # & \" 0 !0 @ "
11179	" $ $ . , 8 ( ! % \" $ "
11180	" ! 0 0 $ , X P !@ @ $ 4 ( 0 "
11181	" $ ! ! 0 P #@ $ & \" 0 !0 @ ! "
11182	"\"P $ $ L M,2PM,2PM,2PM,0 #@ #@ & \" 0 "
11183	" !0 @ ! !@ $ $ 8 !S>7-G96X X P !@ @ "
11184	" $ 4 ( 0 , ! ! P X+C( #@ % & \" "
11185	" 0 !0 @ ! '0 $ $ !T U,2PU,\"PM,2PM,2QR960L"
11186	"8F5I9V4L,\"PP-S<S- X # 0 !@ @ $ 4 ( 0 (X! !"
11187	" ! \". 0 9G!R:6YT9B@G)RPG0T]-345.5#H@8F5G:6X@:6-O;B!G<F%P:&EC<R<I"
11188	".PIP871C:\"A;,\" U,2 U,2 P(%TL6S @,\" U,\" U,\"!=+%LP+CDS(# N.3(@,\"XX-ETI.PI"
11189	"P871C:\"A;,3(@-\" Q-B T(#$R(#(U(#(Y(#,S(#0W(#,V(#(U(#$W(#(Y(#$W(#(U(#,V(#0W(#"
11190	",S(#(Y(#(U(#$R(%TL6S4@,3,@,C4@,S<@-#4@-#4@-#$@-#4@-#4@,S0@-#4@,S<@,C4@,3,@-2 "
11191	"Q-B U(#4@.2 U(#4@72Q;,\"XV(# N,B P+C(U72D[\"G!L;W0H6S @,\" U,2 U,2 P(%TL6S @-"
11192	"3 @-3 @,\" P(%TI.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!G<F%P:&EC<R<I.PI"
11193	"F<')I;G1F\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N('1E>'0G3L*9G!R:6YT9B@G)RPG0T]-34"
11194	"5.5#H@96YD(&EC;VX@=&5X=\"<I.PH X P !@ @ $ 4 ( "
11195	" ! ! #@ / + & \" 0 !0 @ ! "
11196	" NPL $ $ +L+ \\(2TM(\" J(\"!#;W!Y<FEG:'0@*&,I(#(P,#4L(%AI;&EN"
11197	">\"P@26YC+B @06QL(%)I9VAT<R!297-E<G9E9\"X@(\" @(\" @(\" @(\" M+3X\\(2TM(\" J("
11198	"\"!297!R;V1U8W1I;VX@;W(@<F5U<V4L(&EN(&%N>2!F;W)M+\"!W:71H;W5T('1H92!E>'!L:6-I"
11199	"=\"!W<FET=&5N(\" M+3X\\(2TM(\" J(\"!C;VYS96YT(&]F(%AI;&EN>\"P@26YC+BP@:7,@<W1"
11200	"R:6-T;'D@<')O:&EB:71E9\"X@(\" @(\" @(\" @(\" @(\" @(\" M+3X\\<WES9V5N8FQO8VL@"
11201	":&%S7W5S97)D871A/2)T<G5E(B!T86<](F=E;E@B(&)L;V-K7W1Y<&4](G-Y<V=E;B(@<VEM=6QI;"
11202	"FMN86UE/2(@4WES=&5M($=E;F5R871O<B(@/@H@/&EC;VX@=VED=&@](C4Q(B!B9U]C;VQO<CTB8F"
11203	"5I9V4B(&AE:6=H=#TB-3 B(&-A<'1I;VY?9F]R;6%T/2)3>7-T96U<;D=E;F5R871O<B(@=VUA<FM"
11204	"?8V]L;W(](G)E9\"(@+SX*(#QC86QL8F%C:W,@1&5L971E1F-N/2)X;%-Y<V=E;D=522@G9&5L971"
11205	"E)RP@9V-S+\"!G8V)H3LB($]P96Y&8VX](GAL4WES9V5N1U5)\"=S=&%R='5P)RQG8W,L9V-B:"
11206	"\"DB($UO9&5L0VQO<V5&8VX](GAL4WES9V5N1U5)*\"=#;&]S92<L9V-S+&=C8F@I(B!0;W-T4V%V"
11207	"949C;CTB>&Q3>7-G96Y'54DH)U-A=F4G2(@+SX(#QL:6)R87)I97,^\"B @/&QI8G)A<GD@;F%M"
11208	"93TB>&)S26YD97@B(\"\\^\"B @/&QI8G)A<GD@;F%M93TB>&)S0F%S:6,B(\"\\^\"B @/&QI8G)"
11209	"A<GD@;F%M93TB>&)S5&]O;',B(\"\\^\"B \\+VQI8G)A<FEE<SX*(#QS=6)S>7-T96U?;6]D96P@"
11210	"9FEL93TB<WES=&5M7V=E;F5R871O<E]S=6)S>7-T96TN;61L(B O/@H@/&)L;V-K9W5I(&QA8F5L/"
11211	"2)8:6QI;G@@4WES=&5M($=E;F5R871O<B(@/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;7"
11212	"5L=&E?;&EN93TB=')U92(@;F%M93TB:6YF;V5D:70B(')E861?;VYL>3TB=')U92(@9&5F875L=#T"
11213	"B(%-Y<W1E;2!'96YE<F%T;W(B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](F9A;'-E(B!N86UE/"
11214	"2)X:6QI;GAF86UI;'DB(&1E9F%U;'0](E9I<G1E>#0B(&QA8F5L/2)8:6QI;G@@9F%M:6QY(B O/@"
11215	"H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB<&%R=\"(@9&5F875L=#TB>&,T=G-X,S"
11216	"4B(&QA8F5L/2)087)T(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB<W!E960"
11217	"B(&1E9F%U;'0](BTQ,\"(@;&%B96P](E-P965D(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86Q"
11218	"S92(@;F%M93TB<&%C:V%G92(@9&5F875L=#TB9F8V-C@B(&QA8F5L/2)086-K86=E(B O/@H@(#QL"
11219	":7-T8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)S>6YT:&5S:7-?=&]O;\"(@9&5F875L=#TB6%-4"
11220	"(B!L86)E;#TB4WEN=&AE<VES('1O;VPB(#X*(\" @/&ET96T@=F%L=64](E-P96-T<G5M(B O/@H@"
11221	"(\" \\:71E;2!V86QU93TB4WEN<&QI9GDB(\"\\^\"B @(#QI=&5M('9A;'5E/2)3>6YP;&EF>2!0"
11222	"<F\\B(\"\\^\"B @(#QI=&5M('9A;'5E/2)84U0B(\"\\^\"B @(#QI=&5M('9A;'5E/2)0<F5C:7"
11223	"-I;VXB(\"\\^\"B @/\"]L:7-T8F]X/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93T"
11224	"B9&ER96-T;W)Y(B!D969A=6QT/2(N+VYE=&QI<W0B(&QA8F5L/2)487)G970@9&ER96-T;W)Y(B O"
11225	"/@H@(#QC:&5C:V)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB=&5S=&)E;F-H(B!D969A=6QT/2)O"
11226	"9F8B(&QA8F5L/2)497-T8F5N8V@B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](G1R=64B(&YA;6"
11227	"4](G-I;75L:6YK7W!E<FEO9\"(@9&5F875L=#TB,2(@;&%B96P](E-I;75L:6YK('!E<FEO9\"(@+"
11228	"SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB<WES8VQK7W!E<FEO9\"(@9&5F87"
11229	"5L=#TB,3 B(&QA8F5L/2)3>7-T96T@8VQO8VL@<&5R:6]D(B O/@H@(#QC:&5C:V)O>\"!E=F%L=6"
11230	"%T93TB=')U92(@;F%M93TB:6YC<E]N971L:7-T(B!D969A=6QT/2)O9F8B(&QA8F5L/2));F-R96U"
11231	"E;G1A;\"!N971L:7-T:6YG(B O/@H@(#QL:7-T8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)T<FE"
11232	"M7W9B:71S(B!D969A=6QT/2)%=F5R>7=H97)E(&EN(%-U8E-Y<W1E;2(@;&%B96P](E1R:6T@=F%L"
11233	":60@8FET<R(@/@H@(\" \\:71E;2!V86QU93TB06-C;W)D:6YG('1O($)L;V-K($UA<VMS(B O/@H"
11234	"@(\" \\:71E;2!V86QU93TB179E<GEW:&5R92!I;B!3=6)3>7-T96TB(\"\\^\"B @(#QI=&5M('9"
11235	"A;'5E/2).;R!7:&5R92!I;B!3=6)3>7-T96TB(\"\\^\"B @/\"]L:7-T8F]X/@H@(#QL:7-T8F]X"
11236	"(&5V86QU871E/2)T<G5E(B!N86UE/2)D8FQ?;W9R9\"(@9&5F875L=#TB06-C;W)D:6YG('1O($)L"
11237	";V-K($UA<VMS(B!L86)E;#TB3W9E<G)I9&4@=VET:\"!D;W5B;&5S(B ^\"B @(#QI=&5M('9A;'5"
11238	"E/2)!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,B(\"\\^\"B @(#QI=&5M('9A;'5E/2)%=F5R>7=H"
11239	"97)E(&EN(%-U8E-Y<W1E;2(@+SX*(\" @/&ET96T@=F%L=64](DYO(%=H97)E(&EN(%-U8E-Y<W1E"
11240	";2(@+SX*(\" \\+VQI<W1B;W@^\"B @/&QI<W1B;W@@979A;'5A=&4](G1R=64B(&YA;64](F-O<F"
11241	"5?9V5N97)A=&EO;B(@9&5F875L=#TB06-C;W)D:6YG('1O($)L;V-K($UA<VMS(B!L86)E;#TB1V5"
11242	"N97)A=&4@8V]R97,B(#X*(\" @/&ET96T@=F%L=64](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R"
11243	"(@+SX*(\" @/&ET96T@=F%L=64](D5V97)Y=VAE<F4@079A:6QA8FQE(B O/@H@(\" \\:71E;2!V"
11244	"86QU93TB3F]T($YE961E9\" M($%L<F5A9'D@1V5N97)A=&5D(B O/@H@(#PO;&ES=&)O>#X*(\" "
11245	"\\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](G)U;E]C;W)E9V5N(B!D969A=6QT/2)O9F8"
11246	"B(&QA8F5L/2)2=6X@0V]R94=E;B(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;6"
11247	"4](F1E<')E8V%T961?8V]N=')O;\"(@9&5F875L=#TB;V9F(B!L86)E;#TB4VAO=R!D97!R96-A=&"
11248	"5D(&-O;G1R;VQS(B O/@H@(#QH:61D96YV87(@979A;'5A=&4](G1R=64B(&YA;64](F5V86Q?9FE"
11249	"E;&0B(&1E9F%U;'0](C B(\"\\^\"B \\+V)L;V-K9W5I/@H\\+W-Y<V=E;F)L;V-K/@H X"
11250	" P !@ @ $ 4 ( ! ! #@ "
11251	" # & \" 0 !0 @ ! ! $ $ $ %9(1$P. "
11252	". 8 ( !@ % \" $ ! 0 ) \" "
11253	" #@ #@ & \" 8 !0 @ ! 0 $ \"0 "
11254	"@ X ! !@ @ $ 4 ( 0 P ! "
11255	" ! , >&QE9&MP;W-T9V5N X ! !@ @ $ 4 ( "
11256	" 0 T ! ! - >&QE9&MS971T:6YG<P X #(&P !@ @ \""
11257	" 4 ( 0 $ ! 4 ! > 0 )($ !I;F9O961I= "
11258	" !X:6QI;GAF86UI;'D !P87)T "
11259	" !S<&5E9 !P86-K86="
11260	"E !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT"
11261	":&5S:7-?=&]O; !D:7)E8W1O<GD !T9"
11262	"7-T8F5N8VA?<V=A9'9A;F-E9 !T97-T8F5N8V@ "
11263	"!S>7-C;&M?<&5R:6]D !I;F-R7VYE=&QI<W1?<V=A9'9A;F-E9 "
11264	" !T<FEM7W9B:71S7W-G861V86YC960 !D8FQ?;W9R9%]S9V%D=F%N8V5D "
11265	" !C;W)E7V=E;F5R871I;VY?<V=A9'9A;F-E9 !C;W)E7V=E;F5R871I;VX "
11266	" !R=6Y?8V]R96=E;E]S9V%D=F%N8V5D !R=6Y?8V]R96=E;@ "
11267	" !D97!R96-A=&5D7V-O;G1R;VQ?<V=A9'9A;F-E9 !E=F%L7V9I96QD "
11268	" !H87-?861V86YC961?8V]N=')O; !S9V=U:5]P;W, "
11269	" !B;&]C:U]T>7!E !B;&]C:U]V97)S:6]N "
11270	" !S9U]I8V]N7W-T870 !S9U]M87-K7V1I<W"
11271	"!L87D !S9U]L:7-T7V-O;G1E;G1S !S9U]B;&]C:V="
11272	"U:5]X;6P !C;&]C:U]L;V, !S>6YT:&5S"
11273	":7-?;&%N9W5A9V4 !C95]C;'( !P<F5S9"
11274	"7)V95]H:65R87)C:'D !C;&]C:U]W<F%P<&5R !D8V"
11275	"U?:6YP=71?8VQO8VM?<&5R:6]D !V97)S:6]N !"
11276	"P;W-T9V5N97)A=&EO;E]F8VX !S971T:6YG<U]F8VX "
11277	" !P<F5C;VUP:6QE7V9C;@ !U<&1A=&5?9F-N "
11278	" . 2 8 ( ! % \" $ 1 0 "
11279	" 0 $0 \"!3>7-T96T@1V5N97)A=&]R X X !@ @ $ "
11280	" 4 ( 0 @ ! ! ( =FER=&5X,G . . 8 ( ! "
11281	" % \" $ ' 0 0 !P 'AC,G9P-S #@ # & "
11282	" \" 0 !0 @ ! @ $ $ \" \"TV . . 8 "
11283	" ( ! % \" $ & 0 0 !@ &9F,34Q-P #@ "
11284	" # & \" 0 !0 @ $ $ . "
11285	", 8 ( ! % \" $ # 0 0 , 6%-4 X !H"
11286	" !@ @ $ 4 ( 0 #0 ! ! T 0SHO1&]C="
11287	"6UE;G1S(&%N9\"!3971T:6YG<R]#34,O1&5S:W1O<\"]W87)P7W1I;65R7V5X< . , "
11288	" 8 ( ! % \" 0 0 X P "
11289	"!@ @ $ 4 ( 0 , ! ! P!O9F8 #@ # & "
11290	" \" 0 !0 @ ! @ $ $ \" #$P . , 8 "
11291	" ( ! % \" 0 0 X P !@ "
11292	" @ $ 4 ( ! ! #@ # & "
11293	"\" 0 !0 @ $ $ . , 8 ("
11294	" ! % \" 0 0 X !( !@ @ "
11295	" $ 4 ( 0 !@ ! ! 8 06-C;W)D:6YG('1O($)L;"
11296	"V-K($UA<VMS#@ # & \" 0 !0 @ $ $"
11297	" . , 8 ( ! % \" $ # 0 0 "
11298	" , ;V9F X P !@ @ $ 4 ( ! ! "
11299	" #@ # & \" 0 !0 @ ! 0 $ $ ! #"
11300	" . , 8 ( ! % \" $ ! 0 0 $ , "
11301	" X ! !@ @ $ 4 ( 0 L ! ! + "
11302	" +3$L+3$L+3$L+3$ X X !@ @ $ 4 ( 0 8 !"
11303	" ! & <WES9V5N . , 8 ( ! % \" $ "
11304	" # 0 0 , .\"XR X !0 !@ @ $ 4 ( 0 "
11305	" !T ! ! = -3$L-3 L+3$L+3$L<F5D+&)E:6=E+# L,#<W,S0 . P"
11306	" $ 8 ( ! % \" $ \". 0 0 0 C@$ &9P<FEN"
11307	"=&8H)R<L)T-/34U%3E0Z(&)E9VEN(&EC;VX@9W)A<&AI8W,G3L<&%T8V@H6S @-3$@-3$@,\"!="
11308	"+%LP(# @-3 @-3 @72Q;,\"XY,R P+CDR(# N.#9=3L<&%T8V@H6S$R(#0@,38@-\" Q,B R-2 "
11309	"R.2 S,R T-R S-B R-2 Q-R R.2 Q-R R-2 S-B T-R S,R R.2 R-2 Q,B!=+%LU(#$S(#(U(#,W"
11310	"(#0U(#0U(#0Q(#0U(#0U(#,T(#0U(#,W(#(U(#$S(#4@,38@-2 U(#D@-2 U(%TL6S N-B P+C(@,"
11311	"\"XR-5TI.PIP;&]T%LP(# @-3$@-3$@,\"!=+%LP(#4P(#4P(# @,\"!=3L*9G!R:6YT9B@G)RP"
11312	"G0T]-345.5#H@96YD(&EC;VX@9W)A<&AI8W,G3L9G!R:6YT9B@G)RPG0T]-345.5#H@8F5G:6X@"
11313	":6-O;B!T97AT)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N('1E>'0G3L . "
11314	" , 8 ( ! % \" 0 0 X #"
11315	"P\"P !@ @ $ 4 ( 0 +L+ ! ! \"[\"P /\"$M"
11316	"+2 @B @0V]P>7)I9VAT(\"AC2 R,# U+\"!8:6QI;G@L($EN8RX@($%L;\"!2:6=H=',@4F5S97"
11317	")V960N(\" @(\" @(\" @(\" @+2T^/\"$M+2 @*B @4F5P<F]D=6-T:6]N(&]R(')E=7-E+\"!I;"
11318	"B!A;GD@9F]R;2P@=VET:&]U=\"!T:&4@97AP;&EC:70@=W)I='1E;B @+2T^/\"$M+2 @*B @8V]N"
11319	"<V5N=\"!O9B!8:6QI;G@L($EN8RXL(&ES('-T<FEC=&QY('!R;VAI8FET960N(\" @(\" @(\" @("
11320	"\" @(\" @(\" @+2T^/'-Y<V=E;F)L;V-K(&AA<U]U<V5R9&%T83TB=')U92(@=&%G/2)G96Y8(B!"
11321	"B;&]C:U]T>7!E/2)S>7-G96XB('-I;75L:6YK;F%M93TB(%-Y<W1E;2!'96YE<F%T;W(B(#X*(#QI"
11322	"8V]N('=I9'1H/2(U,2(@8F=?8V]L;W(](F)E:6=E(B!H96EG:'0](C4P(B!C87!T:6]N7V9O<FUA="
11323	"#TB4WES=&5M7&Y'96YE<F%T;W(B('=M87)K7V-O;&]R/2)R960B(\"\\^\"B \\8V%L;&)A8VMS($"
11324	"1E;&5T949C;CTB>&Q3>7-G96Y'54DH)V1E;&5T92<L(&=C<RP@9V-B:\"D[(B!/<&5N1F-N/2)X;%"
11325	"-Y<V=E;D=522@G<W1A<G1U<\"<L9V-S+&=C8F@I(B!-;V1E;$-L;W-E1F-N/2)X;%-Y<V=E;D=522"
11326	"@G0VQO<V4G+&=C<RQG8V)H2(@4&]S=%-A=F5&8VX](GAL4WES9V5N1U5)\"=3879E)RDB(\"\\^"
11327	"\"B \\;&EB<F%R:65S/@H@(#QL:6)R87)Y(&YA;64](GAB<TEN9&5X(B O/@H@(#QL:6)R87)Y(&Y"
11328	"A;64](GAB<T)A<VEC(B O/@H@(#QL:6)R87)Y(&YA;64](GAB<U1O;VQS(B O/@H@/\"]L:6)R87)"
11329	"I97,^\"B \\<W5B<WES=&5M7VUO9&5L(&9I;&4](G-Y<W1E;5]G96YE<F%T;W)?<W5B<WES=&5M+F"
11330	"UD;\"(@+SX(#QB;&]C:V=U:2!L86)E;#TB6&EL:6YX(%-Y<W1E;2!'96YE<F%T;W(B(#X(\" \\"
11331	"961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&UU;'1I7VQI;F4](G1R=64B(&YA;64](FEN9F]E9&ET"
11332	"(B!R96%D7V]N;'D](G1R=64B(&1E9F%U;'0](B!3>7-T96T@1V5N97)A=&]R(B O/@H@(#QE9&ET8"
11333	"F]X(&5V86QU871E/2)F86QS92(@;F%M93TB>&EL:6YX9F%M:6QY(B!D969A=6QT/2)6:7)T97@T(B"
11334	"!L86)E;#TB6&EL:6YX(&9A;6EL>2(@+SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA"
11335	";64](G!A<G0B(&1E9F%U;'0](GAC-'9S>#,U(B!L86)E;#TB4&%R=\"(@+SX*(\" \\961I=&)O>"
11336	"\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](G-P965D(B!D969A=6QT/2(M,3 B(&QA8F5L/2)3<&5E9"
11337	"\"(@+SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](G!A8VMA9V4B(&1E9F%U;'"
11338	"0](F9F-C8X(B!L86)E;#TB4&%C:V%G92(@+SX*(\" \\;&ES=&)O>\"!E=F%L=6%T93TB=')U92(@"
11339	";F%M93TB<WEN=&AE<VES7W1O;VPB(&1E9F%U;'0](EA35\"(@;&%B96P](E-Y;G1H97-I<R!T;V]L"
11340	"(B ^\"B @(#QI=&5M('9A;'5E/2)3<&5C=')U;2(@+SX*(\" @/&ET96T@=F%L=64](E-Y;G!L:69"
11341	"Y(B O/@H@(\" \\:71E;2!V86QU93TB4WEN<&QI9GD@4')O(B O/@H@(\" \\:71E;2!V86QU93TB"
11342	"6%-4(B O/@H@(\" \\:71E;2!V86QU93TB4')E8VES:6]N(B O/@H@(#PO;&ES=&)O>#X*(\" \\9"
11343	"61I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](F1I<F5C=&]R>2(@9&5F875L=#TB+B]N971L:"
11344	"7-T(B!L86)E;#TB5&%R9V5T(&1I<F5C=&]R>2(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4](G1R"
11345	"=64B(&YA;64](G1E<W1B96YC:\"(@9&5F875L=#TB;V9F(B!L86)E;#TB5&5S=&)E;F-H(B O/@H@"
11346	"(#QE9&ET8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)S:6UU;&EN:U]P97)I;V0B(&1E9F%U;'0]("
11347	"C$B(&QA8F5L/2)3:6UU;&EN:R!P97)I;V0B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](G1R=64"
11348	"B(&YA;64](G-Y<V-L:U]P97)I;V0B(&1E9F%U;'0](C$P(B!L86)E;#TB4WES=&5M(&-L;V-K('!E"
11349	"<FEO9\"(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](FEN8W)?;F5T;&ES="
11350	"\"(@9&5F875L=#TB;V9F(B!L86)E;#TB26YC<F5M96YT86P@;F5T;&ES=&EN9R(@+SX*(\" \\;&E"
11351	"S=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB=')I;5]V8FET<R(@9&5F875L=#TB179E<GEW:&5"
11352	"R92!I;B!3=6)3>7-T96TB(&QA8F5L/2)4<FEM('9A;&ED(&)I=',B(#X*(\" @/&ET96T@=F%L=64"
11353	"](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R(@+SX*(\" @/&ET96T@=F%L=64](D5V97)Y=VAE<F"
11354	"4@:6X@4W5B4WES=&5M(B O/@H@(\" \\:71E;2!V86QU93TB3F\\@5VAE<F4@:6X@4W5B4WES=&5M"
11355	"(B O/@H@(#PO;&ES=&)O>#X*(\" \\;&ES=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB9&)L7V"
11356	"]V<F0B(&1E9F%U;'0](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R(@;&%B96P](D]V97)R:61E('"
11357	"=I=&@@9&]U8FQE<R(@/@H@(\" \\:71E;2!V86QU93TB06-C;W)D:6YG('1O($)L;V-K($UA<VMS("
11358	"B O/@H@(\" \\:71E;2!V86QU93TB179E<GEW:&5R92!I;B!3=6)3>7-T96TB(\"\\^\"B @(#QI="
11359	"&5M('9A;'5E/2).;R!7:&5R92!I;B!3=6)3>7-T96TB(\"\\^\"B @/\"]L:7-T8F]X/@H@(#QL:7"
11360	"-T8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)C;W)E7V=E;F5R871I;VXB(&1E9F%U;'0](D%C8V]"
11361	"R9&EN9R!T;R!\";&]C:R!-87-K<R(@;&%B96P](D=E;F5R871E(&-O<F5S(B ^\"B @(#QI=&5M('"
11362	"9A;'5E/2)!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,B(\"\\^\"B @(#QI=&5M('9A;'5E/2)%=F5"
11363	"R>7=H97)E($%V86EL86)L92(@+SX*(\" @/&ET96T@=F%L=64](DYO=\"!.965D960@+2!!;')E86"
11364	"1Y($=E;F5R871E9\"(@+SX*(\" \\+VQI<W1B;W@^\"B @/&-H96-K8F]X(&5V86QU871E/2)T<G5"
11365	"E(B!N86UE/2)R=6Y?8V]R96=E;B(@9&5F875L=#TB;V9F(B!L86)E;#TB4G5N($-O<F5'96XB(\""
11366	"\\^\"B @/&-H96-K8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)D97!R96-A=&5D7V-O;G1R;VPB("
11367	"&1E9F%U;'0](F]F9B(@;&%B96P](E-H;W<@9&5P<F5C871E9\"!C;VYT<F]L<R(@+SX*(\" \\:&E"
11368	"D9&5N=F%R(&5V86QU871E/2)T<G5E(B!N86UE/2)E=F%L7V9I96QD(B!D969A=6QT/2(P(B O/@H@"
11369	"/\"]B;&]C:V=U:3X/\"]S>7-G96YB;&]C:SX . , 8 ( ! "
11370	"% \" 0 0 X P !@ @ $ 4"
11371	" ( 0 0 ! ! ! !62$1,#@ #@ & \" 8 !0 "
11372	" @ ! 0 $ \"0 @ X X !@ @ & "
11373	" 4 ( 0 $ ! D ( . 0 8 ("
11374	" ! % \" $ - 0 0 #0 $-L;V-K($5N86)L97, "
11375	" . , 8 ( ! % \" $ # 0 0 , ,3 P"
11376	" X X !@ @ $ 4 ( 0 8 ! ! & ."
11377	"2XR+C Q . 0 8 ( ! % \" $ , 0 0 "
11378	" # 'AL961K<&]S=&=E;@ . 0 8 ( ! % \" $ "
11379	" - 0 0 #0 'AL961K<V5T=&EN9W, . 0 8 ( ! "
11380	" % \" $ / 0 0 #P 'AL961K<')E8V]M<&EL90 . 0 "
11381	" 8 ( ! % \" $ - 0 0 #0 'AL961K=7"
11382	"!D871E9FX . X%0 8 ( @ % \" $ ! 0 "
11383	" % 0 # $ 8 <VAA<F5D 8V]M<&EL871I;VX #@ / $ & \" "
11384	"( !0 @ ! 0 $ !0 $ !, ! F &-O;7!I;&%T:6]"
11385	"N !C;VUP:6QA=&EO;E]L=70 <VEM=6QI;FM?<&5R:6]D &EN8W)?;F5T;&ES"
11386	"= !T<FEM7W9B:71S 9&)L7V]V<F0 &1E<')E8V%T961?8"
11387	"V]N=')O; !B;&]C:U]I8V]N7V1I<W!L87D #@ #@ & \" 0 !0 @ "
11388	" ! !P $ $ < !T87)G970S X !0 @ !@ @ \" "
11389	" 4 ( 0 $ ! 4 ! ' 0 X !K97ES =F%L=65S #@"
11390	" ! ! & \" $ !0 @ ! P $ #@ $ & "
11391	" \" 0 !0 @ ! \"P $ $ L !(1$P@3F5T;&ES="
11392	" #@ $@ & \" 0 !0 @ ! % $ $ "
11393	"!0 !705)0($]00B!%>'!O<G0@5&]O; . 2 8 ( ! % \""
11394	" $ 8 0 0 & $5X<&]R=\"!A<R!A('!C;W)E('1O($5$2PX #H "
11395	" !@ @ ! 4 ( 0 , ! X X !@ @ "
11396	" $ 4 ( 0 < ! ! ' =&%R9V5T,0 . . 8"
11397	" ( ! % \" $ ' 0 0 !P '1A<F=E=#( #@ "
11398	" #@ & \" 0 !0 @ ! !P $ $ < !T87)"
11399	"G970S X P !@ @ $ 4 ( 0 $ ! ! 0 Q"
11400	" #@ # & \" 0 !0 @ ! P $ $ # &]F"
11401	"9@ . 2 8 ( ! % \" $ 7 0 0 %P "
11402	" $5V97)Y=VAE<F4@:6X@4W5B4WES=&5M X !( !@ @ $ 4 ( "
11403	"0 !@ ! ! 8 06-C;W)D:6YG('1O($)L;V-K($UA<VMS#@ # & "
11404	" \" 0 !0 @ ! P $ $ # &]F9@ . . 8 "
11405	" ( ! % \" $ ' 0 0 !P $1E9F%U;'0 #@ )"
11406	"!/ & \" ( !0 @ ! 0 $ !0 $ @ ! & "
11407	" '1A<F=E=#$ =&%R9V5T,@!T87)G970S X \"H&0 !@ @ \" 4 ( "
11408	" 0 $ ! 4 ! > 0 /P# !I;F9O961I= "
11409	" !X:6QI;GAF86UI;'D !P87)T "
11410	" !S<&5E9 !P86-K86=E "
11411	" !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5S:7-?=&]O; "
11412	" !D:7)E8W1O<GD !T97-T8F5N8VA?<V=A9'"
11413	"9A;F-E9 !T97-T8F5N8V@ !S>7-C;&M?<&5R:6]"
11414	"D !I;F-R7VYE=&QI<W1?<V=A9'9A;F-E9 !T<FEM7W9B:71S"
11415	"7W-G861V86YC960 !D8FQ?;W9R9%]S9V%D=F%N8V5D !C;W)E7V=E;"
11416	"F5R871I;VY?<V=A9'9A;F-E9 !C;W)E7V=E;F5R871I;VX !R=6Y?8V"
11417	"]R96=E;E]S9V%D=F%N8V5D !R=6Y?8V]R96=E;@ !D97!"
11418	"R96-A=&5D7V-O;G1R;VQ?<V=A9'9A;F-E9 !E=F%L7V9I96QD !H"
11419	"87-?861V86YC961?8V]N=')O; !S9V=U:5]P;W, "
11420	" !B;&]C:U]T>7!E !B;&]C:U]V97)S:6]N "
11421	" !S9U]I8V]N7W-T870 !S9U]M87-K7V1I<W!L87D "
11422	" !S9U]L:7-T7V-O;G1E;G1S !S9U]B;&]C:V=U:5]X;6P "
11423	" !C;&]C:U]L;V, !S>6YT:&5S:7-?;&%N9W5A9V4 "
11424	" !C95]C;'( !P<F5S97)V95]H:65R87)C:'"
11425	"D !C;&]C:U]W<F%P<&5R !D8VU?:6YP=71?8VQO8VM"
11426	"?<&5R:6]D #@ $@ & \" 0 !0 @ ! $0 "
11427	" $ $ !$ @4WES=&5M($=E;F5R871O<@ . . 8 ( "
11428	"! % \" $ ' 0 0 !P '9I<G1E>#0 #@ #@ &"
11429	" \" 0 !0 @ ! \" $ $ @ !X8S1V<W@S-0X"
11430	" P !@ @ $ 4 ( 0 , ! ! P M,3 #@ "
11431	" #@ & \" 0 !0 @ ! !0 $ $ 4 !F9C8V"
11432	". X P !@ @ $ 4 ( ! ! "
11433	" #@ # & \" 0 !0 @ ! P $ $ # %A35"
11434	" . 0 8 ( ! % \" $ ) 0 0 \"0 "
11435	" \"XO;F5T;&ES= . , 8 ( ! % \" "
11436	" 0 0 X P !@ @ $ 4 ( 0 , !"
11437	" ! P!O9F8 #@ # & \" 0 !0 @ ! @ $ "
11438	" $ \" #$P . , 8 ( ! % \" 0 "
11439	" 0 X P !@ @ $ 4 ( ! "
11440	" ! #@ # & \" 0 !0 @ $ "
11441	" $ . , 8 ( ! % \" 0 "
11442	" 0 X !( !@ @ $ 4 ( 0 !@ ! "
11443	"! 8 06-C;W)D:6YG('1O($)L;V-K($UA<VMS#@ # & \" 0 !"
11444	"0 @ $ $ . , 8 ( ! % "
11445	" \" $ # 0 0 , ;V9F X P !@ @ $ 4 "
11446	" ( ! ! #@ # & \" 0 !0 "
11447	"@ ! 0 $ $ ! # . , 8 ( ! % \" "
11448	" $ ! 0 0 $ , X ! !@ @ $ 4 ( "
11449	" 0 L ! ! + +3$L+3$L+3$L+3$ X X !@ @ $"
11450	" 4 ( 0 8 ! ! & <WES9V5N . , 8 "
11451	" ( ! % \" $ # 0 0 , .\"XR X !0 !@ "
11452	" @ $ 4 ( 0 !T ! ! = -3$L-3 L+3$L+3$L<"
11453	"F5D+&)E:6=E+# L,#<W,S0 . P $ 8 ( ! % \" $ \"."
11454	" 0 0 0 C@$ &9P<FEN=&8H)R<L)T-/34U%3E0Z(&)E9VEN(&EC;VX@9W)A<&AI8"
11455	"W,G3L<&%T8V@H6S @-3$@-3$@,\"!=+%LP(# @-3 @-3 @72Q;,\"XY,R P+CDR(# N.#9=3L"
11456	"<&%T8V@H6S$R(#0@,38@-\" Q,B R-2 R.2 S,R T-R S-B R-2 Q-R R.2 Q-R R-2 S-B T-R S"
11457	",R R.2 R-2 Q,B!=+%LU(#$S(#(U(#,W(#0U(#0U(#0Q(#0U(#0U(#,T(#0U(#,W(#(U(#$S(#4@,"
11458	"38@-2 U(#D@-2 U(%TL6S N-B P+C(@,\"XR-5TI.PIP;&]T*%LP(# @-3$@-3$@,\"!=+%LP(#4P"
11459	"(#4P(# @,\"!=3L9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@9W)A<&AI8W,G3L9G!R"
11460	":6YT9B@G)RPG0T]-345.5#H@8F5G:6X@:6-O;B!T97AT)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z"
11461	"(&5N9\"!I8V]N('1E>'0G3L . , 8 ( ! % \" "
11462	" 0 0 X #P\"P !@ @ $ 4 ( 0 +L"
11463	"+ ! ! \"[\"P /\"$M+2 @B @0V]P>7)I9VAT(\"AC2 R,# U+\"!8:6QI;G@"
11464	"L($EN8RX@($%L;\"!2:6=H=',@4F5S97)V960N(\" @(\" @(\" @(\" @+2T^/\"$M+2 @*B @4F"
11465	"5P<F]D=6-T:6]N(&]R(')E=7-E+\"!I;B!A;GD@9F]R;2P@=VET:&]U=\"!T:&4@97AP;&EC:70@="
11466	"W)I='1E;B @+2T^/\"$M+2 @*B @8V]N<V5N=\"!O9B!8:6QI;G@L($EN8RXL(&ES('-T<FEC=&QY"
11467	"('!R;VAI8FET960N(\" @(\" @(\" @(\" @(\" @(\" @+2T^/'-Y<V=E;F)L;V-K(&AA<U]U<V5"
11468	"R9&%T83TB=')U92(@=&%G/2)G96Y8(B!B;&]C:U]T>7!E/2)S>7-G96XB('-I;75L:6YK;F%M93TB"
11469	"(%-Y<W1E;2!'96YE<F%T;W(B(#X*(#QI8V]N('=I9'1H/2(U,2(@8F=?8V]L;W(](F)E:6=E(B!H9"
11470	"6EG:'0](C4P(B!C87!T:6]N7V9O<FUA=#TB4WES=&5M7&Y'96YE<F%T;W(B('=M87)K7V-O;&]R/2"
11471	")R960B(\"\\^\"B \\8V%L;&)A8VMS($1E;&5T949C;CTB>&Q3>7-G96Y'54DH)V1E;&5T92<L(&="
11472	"C<RP@9V-B:\"D[(B!/<&5N1F-N/2)X;%-Y<V=E;D=522@G<W1A<G1U<\"<L9V-S+&=C8F@I(B!-;V"
11473	"1E;$-L;W-E1F-N/2)X;%-Y<V=E;D=522@G0VQO<V4G+&=C<RQG8V)H*2(@4&]S=%-A=F5&8VX](GA"
11474	"L4WES9V5N1U5)*\"=3879E)RDB(\"\\^\"B \\;&EB<F%R:65S/@H@(#QL:6)R87)Y(&YA;64](GA"
11475	"B<TEN9&5X(B O/@H@(#QL:6)R87)Y(&YA;64](GAB<T)A<VEC(B O/@H@(#QL:6)R87)Y(&YA;64]"
11476	"(GAB<U1O;VQS(B O/@H@/\"]L:6)R87)I97,^\"B \\<W5B<WES=&5M7VUO9&5L(&9I;&4](G-Y<W"
11477	"1E;5]G96YE<F%T;W)?<W5B<WES=&5M+FUD;\"(@+SX*(#QB;&]C:V=U:2!L86)E;#TB6&EL:6YX(%"
11478	"-Y<W1E;2!'96YE<F%T;W(B(#X*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&UU;'1I7VQI"
11479	";F4](G1R=64B(&YA;64](FEN9F]E9&ET(B!R96%D7V]N;'D](G1R=64B(&1E9F%U;'0](B!3>7-T9"
11480	"6T@1V5N97)A=&]R(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB>&EL:6YX9F"
11481	"%M:6QY(B!D969A=6QT/2)6:7)T97@T(B!L86)E;#TB6&EL:6YX(&9A;6EL>2(@+SX*(\" \\961I="
11482	"&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](G!A<G0B(&1E9F%U;'0](GAC-'9S>#,U(B!L86)E;"
11483	"#TB4&%R=\"(@+SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](G-P965D(B!D96"
11484	"9A=6QT/2(M,3 B(&QA8F5L/2)3<&5E9\"(@+SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4"
11485	"B(&YA;64](G!A8VMA9V4B(&1E9F%U;'0](F9F-C8X(B!L86)E;#TB4&%C:V%G92(@+SX*(\" \\;&"
11486	"ES=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB<WEN=&AE<VES7W1O;VPB(&1E9F%U;'0](EA35"
11487	"\"(@;&%B96P](E-Y;G1H97-I<R!T;V]L(B ^\"B @(#QI=&5M('9A;'5E/2)3<&5C=')U;2(@+SX*"
11488	"(\" @/&ET96T@=F%L=64](E-Y;G!L:69Y(B O/@H@(\" \\:71E;2!V86QU93TB4WEN<&QI9GD@4'"
11489	")O(B O/@H@(\" \\:71E;2!V86QU93TB6%-4(B O/@H@(\" \\:71E;2!V86QU93TB4')E8VES:6]"
11490	"N(B O/@H@(#PO;&ES=&)O>#X*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](F1I<"
11491	"F5C=&]R>2(@9&5F875L=#TB+B]N971L:7-T(B!L86)E;#TB5&%R9V5T(&1I<F5C=&]R>2(@+SX*("
11492	"\" \\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](G1E<W1B96YC:\"(@9&5F875L=#TB;V9"
11493	"F(B!L86)E;#TB5&5S=&)E;F-H(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)S"
11494	":6UU;&EN:U]P97)I;V0B(&1E9F%U;'0](C$B(&QA8F5L/2)3:6UU;&EN:R!P97)I;V0B(\"\\^\"B"
11495	" @/&5D:71B;W@@979A;'5A=&4](G1R=64B(&YA;64](G-Y<V-L:U]P97)I;V0B(&1E9F%U;'0](C$"
11496	"P(B!L86)E;#TB4WES=&5M(&-L;V-K('!E<FEO9\"(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4]("
11497	"G1R=64B(&YA;64](FEN8W)?;F5T;&ES=\"(@9&5F875L=#TB;V9F(B!L86)E;#TB26YC<F5M96YT8"
11498	"6P@;F5T;&ES=&EN9R(@+SX*(\" \\;&ES=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB=')I;5]"
11499	"V8FET<R(@9&5F875L=#TB179E<GEW:&5R92!I;B!3=6)3>7-T96TB(&QA8F5L/2)4<FEM('9A;&ED"
11500	"(&)I=',B(#X(\" @/&ET96T@=F%L=64](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R(@+SX(\""
11501	" @/&ET96T@=F%L=64](D5V97)Y=VAE<F4@:6X@4W5B4WES=&5M(B O/@H@(\" \\:71E;2!V86QU9"
11502	"3TB3F\\@5VAE<F4@:6X@4W5B4WES=&5M(B O/@H@(#PO;&ES=&)O>#X*(\" \\;&ES=&)O>\"!E=F"
11503	"%L=6%T93TB=')U92(@;F%M93TB9&)L7V]V<F0B(&1E9F%U;'0](D%C8V]R9&EN9R!T;R!\";&]C:R"
11504	"!-87-K<R(@;&%B96P](D]V97)R:61E('=I=&@@9&]U8FQE<R(@/@H@(\" \\:71E;2!V86QU93TB0"
11505	"6-C;W)D:6YG('1O($)L;V-K($UA<VMS(B O/@H@(\" \\:71E;2!V86QU93TB179E<GEW:&5R92!I"
11506	";B!3=6)3>7-T96TB(\"\\^\"B @(#QI=&5M('9A;'5E/2).;R!7:&5R92!I;B!3=6)3>7-T96TB("
11507	"\"\\^\"B @/\"]L:7-T8F]X/@H@(#QL:7-T8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)C;W)E7V"
11508	"=E;F5R871I;VXB(&1E9F%U;'0](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R(@;&%B96P](D=E;F"
11509	"5R871E(&-O<F5S(B ^\"B @(#QI=&5M('9A;'5E/2)!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,B("
11510	"\"\\^\"B @(#QI=&5M('9A;'5E/2)%=F5R>7=H97)E($%V86EL86)L92(@+SX*(\" @/&ET96T@=F"
11511	"%L=64](DYO=\"!.965D960@+2!!;')E861Y($=E;F5R871E9\"(@+SX*(\" \\+VQI<W1B;W@^\"B"
11512	" @/&-H96-K8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)R=6Y?8V]R96=E;B(@9&5F875L=#TB;V9"
11513	"F(B!L86)E;#TB4G5N($-O<F5'96XB(\"\\^\"B @/&-H96-K8F]X(&5V86QU871E/2)T<G5E(B!N8"
11514	"6UE/2)D97!R96-A=&5D7V-O;G1R;VPB(&1E9F%U;'0](F]F9B(@;&%B96P](E-H;W<@9&5P<F5C87"
11515	"1E9\"!C;VYT<F]L<R(@+SX*(\" \\:&ED9&5N=F%R(&5V86QU871E/2)T<G5E(B!N86UE/2)E=F%L"
11516	"7V9I96QD(B!D969A=6QT/2(P(B O/@H@/\"]B;&]C:V=U:3X/\"]S>7-G96YB;&]C:SX "
11517	". , 8 ( ! % \" 0 0 X"
11518	" P !@ @ $ 4 ( 0 0 ! ! ! !62$1,#@ "
11519	" #@ & \" 8 !0 @ ! 0 $ \"0 @ "
11520	" X X !@ @ & 4 ( 0 $ ! D ("
11521	" . 0 8 ( ! % \" $ - 0 "
11522	" 0 #0 $-L;V-K($5N86)L97, . , 8 ( ! % \" "
11523	" $ # 0 0 , ,3 P X \"X&0 !@ @ \" 4 ( "
11524	" 0 $ ! 4 ! > 0 /P# !I;F9O961I= "
11525	" !X:6QI;GAF86UI;'D !P87)T "
11526	" !S<&5E9 !P86-K86=E "
11527	" !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5S:7-?=&]O; "
11528	" !D:7)E8W1O<GD !T97-T8F5N8VA?<V=A9'9A"
11529	";F-E9 !T97-T8F5N8V@ !S>7-C;&M?<&5R:6]D "
11530	" !I;F-R7VYE=&QI<W1?<V=A9'9A;F-E9 !T<FEM7W9B:71S7W"
11531	"-G861V86YC960 !D8FQ?;W9R9%]S9V%D=F%N8V5D !C;W)E7V=E;F5"
11532	"R871I;VY?<V=A9'9A;F-E9 !C;W)E7V=E;F5R871I;VX !R=6Y?8V]R"
11533	"96=E;E]S9V%D=F%N8V5D !R=6Y?8V]R96=E;@ !D97!R9"
11534	"6-A=&5D7V-O;G1R;VQ?<V=A9'9A;F-E9 !E=F%L7V9I96QD !H87"
11535	"-?861V86YC961?8V]N=')O; !S9V=U:5]P;W, !"
11536	"B;&]C:U]T>7!E !B;&]C:U]V97)S:6]N "
11537	" !S9U]I8V]N7W-T870 !S9U]M87-K7V1I<W!L87D "
11538	" !S9U]L:7-T7V-O;G1E;G1S !S9U]B;&]C:V=U:5]X;6P "
11539	" !C;&]C:U]L;V, !S>6YT:&5S:7-?;&%N9W5A9V4 "
11540	" !C95]C;'( !P<F5S97)V95]H:65R87)C:'D "
11541	" !P;W-T9V5N97)A=&EO;E]F8VX !S971T:6YG<U]F8VX "
11542	" #@ $@ & \" 0 !0 @ ! $0 "
11543	" $ $ !$ @4WES=&5M($=E;F5R871O<@ . . 8 ( ! "
11544	" % \" $ ( 0 0 \" '9I<G1E>#)P#@ #@ & "
11545	" \" 0 !0 @ ! !P $ $ < !X8S)V<#<P X "
11546	" P !@ @ $ 4 ( 0 ( ! ! @ M-@ #@ #"
11547	"@ & \" 0 !0 @ ! !@ $ $ 8 !F9C$U,3"
11548	"< X P !@ @ $ 4 ( ! ! "
11549	" #@ # & \" 0 !0 @ ! P $ $ # %A35 "
11550	". 0 8 ( ! % \" $ ) 0 0 \"0 $"
11551	",Z+U)44T-44P . , 8 ( ! % \" 0"
11552	" 0 X P !@ @ $ 4 ( 0 , ! "
11553	" ! P!O9F8 #@ # & \" 0 !0 @ ! @ $ "
11554	" $ \" #$P . , 8 ( ! % \" 0 "
11555	" 0 X P !@ @ $ 4 ( ! "
11556	" ! #@ # & \" 0 !0 @ $ "
11557	" $ . , 8 ( ! % \" 0 "
11558	"0 X !( !@ @ $ 4 ( 0 !@ ! ! "
11559	" 8 06-C;W)D:6YG('1O($)L;V-K($UA<VMS#@ # & \" 0 !0 "
11560	" @ $ $ . , 8 ( ! % "
11561	"\" $ # 0 0 , ;V9F X P !@ @ $ 4 ("
11562	" ! ! #@ # & \" 0 !0 @ "
11563	" ! 0 $ $ ! # . , 8 ( ! % \" "
11564	" $ ! 0 0 $ , X ! !@ @ $ 4 ( "
11565	"0 L ! ! + +3$L+3$L+3$L+3$ X X !@ @ $ "
11566	" 4 ( 0 8 ! ! & <WES9V5N . , 8 "
11567	"( ! % \" $ # 0 0 , .\"XR X !0 !@ "
11568	"@ $ 4 ( 0 !T ! ! = -3$L-3 L+3$L+3$L<F5"
11569	"D+&)E:6=E+# L,#<W,S0 . P $ 8 ( ! % \" $ \". 0"
11570	" 0 0 C@$ &9P<FEN=&8H)R<L)T-/34U%3E0Z(&)E9VEN(&EC;VX@9W)A<&AI8W,"
11571	"G3L<&%T8V@H6S @-3$@-3$@,\"!=+%LP(# @-3 @-3 @72Q;,\"XY,R P+CDR(# N.#9=3L<&"
11572	"%T8V@H6S$R(#0@,38@-\" Q,B R-2 R.2 S,R T-R S-B R-2 Q-R R.2 Q-R R-2 S-B T-R S,R"
11573	" R.2 R-2 Q,B!=+%LU(#$S(#(U(#,W(#0U(#0U(#0Q(#0U(#0U(#,T(#0U(#,W(#(U(#$S(#4@,38"
11574	"@-2 U(#D@-2 U(%TL6S N-B P+C(@,\"XR-5TI.PIP;&]T*%LP(# @-3$@-3$@,\"!=+%LP(#4P(#"
11575	"4P(# @,\"!=3L9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@9W)A<&AI8W,G3L9G!R:6"
11576	"YT9B@G)RPG0T]-345.5#H@8F5G:6X@:6-O;B!T97AT)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&"
11577	"5N9\"!I8V]N('1E>'0G3L . , 8 ( ! % \" "
11578	" 0 0 X #P\"P !@ @ $ 4 ( 0 +L+ "
11579	" ! ! \"[\"P /\"$M+2 @B @0V]P>7)I9VAT(\"AC2 R,# U+\"!8:6QI;G@L("
11580	"$EN8RX@($%L;\"!2:6=H=',@4F5S97)V960N(\" @(\" @(\" @(\" @+2T^/\"$M+2 @*B @4F5P"
11581	"<F]D=6-T:6]N(&]R(')E=7-E+\"!I;B!A;GD@9F]R;2P@=VET:&]U=\"!T:&4@97AP;&EC:70@=W)"
11582	"I='1E;B @+2T^/\"$M+2 @*B @8V]N<V5N=\"!O9B!8:6QI;G@L($EN8RXL(&ES('-T<FEC=&QY('"
11583	"!R;VAI8FET960N(\" @(\" @(\" @(\" @(\" @(\" @+2T^/'-Y<V=E;F)L;V-K(&AA<U]U<V5R9"
11584	"&%T83TB=')U92(@=&%G/2)G96Y8(B!B;&]C:U]T>7!E/2)S>7-G96XB('-I;75L:6YK;F%M93TB(%"
11585	"-Y<W1E;2!'96YE<F%T;W(B(#X*(#QI8V]N('=I9'1H/2(U,2(@8F=?8V]L;W(](F)E:6=E(B!H96E"
11586	"G:'0](C4P(B!C87!T:6]N7V9O<FUA=#TB4WES=&5M7&Y'96YE<F%T;W(B('=M87)K7V-O;&]R/2)R"
11587	"960B(\"\\^\"B \\8V%L;&)A8VMS($1E;&5T949C;CTB>&Q3>7-G96Y'54DH)V1E;&5T92<L(&=C<"
11588	"RP@9V-B:\"D[(B!/<&5N1F-N/2)X;%-Y<V=E;D=522@G<W1A<G1U<\"<L9V-S+&=C8F@I(B!-;V1E"
11589	";$-L;W-E1F-N/2)X;%-Y<V=E;D=522@G0VQO<V4G+&=C<RQG8V)H*2(@4&]S=%-A=F5&8VX](GAL4"
11590	"WES9V5N1U5)*\"=3879E)RDB(\"\\^\"B \\;&EB<F%R:65S/@H@(#QL:6)R87)Y(&YA;64](GAB<"
11591	"TEN9&5X(B O/@H@(#QL:6)R87)Y(&YA;64](GAB<T)A<VEC(B O/@H@(#QL:6)R87)Y(&YA;64](G"
11592	"AB<U1O;VQS(B O/@H@/\"]L:6)R87)I97,^\"B \\<W5B<WES=&5M7VUO9&5L(&9I;&4](G-Y<W1E"
11593	";5]G96YE<F%T;W)?<W5B<WES=&5M+FUD;\"(@+SX*(#QB;&]C:V=U:2!L86)E;#TB6&EL:6YX(%-Y"
11594	"<W1E;2!'96YE<F%T;W(B(#X*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&UU;'1I7VQI;F"
11595	"4](G1R=64B(&YA;64](FEN9F]E9&ET(B!R96%D7V]N;'D](G1R=64B(&1E9F%U;'0](B!3>7-T96T"
11596	"@1V5N97)A=&]R(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB>&EL:6YX9F%M"
11597	":6QY(B!D969A=6QT/2)6:7)T97@T(B!L86)E;#TB6&EL:6YX(&9A;6EL>2(@+SX*(\" \\961I=&)"
11598	"O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](G!A<G0B(&1E9F%U;'0](GAC-'9S>#,U(B!L86)E;#T"
11599	"B4&%R=\"(@+SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](G-P965D(B!D969A"
11600	"=6QT/2(M,3 B(&QA8F5L/2)3<&5E9\"(@+SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B("
11601	"&YA;64](G!A8VMA9V4B(&1E9F%U;'0](F9F-C8X(B!L86)E;#TB4&%C:V%G92(@+SX*(\" \\;&ES"
11602	"=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB<WEN=&AE<VES7W1O;VPB(&1E9F%U;'0](EA35\"("
11603	"@;&%B96P](E-Y;G1H97-I<R!T;V]L(B ^\"B @(#QI=&5M('9A;'5E/2)3<&5C=')U;2(@+SX*(\""
11604	" @/&ET96T@=F%L=64](E-Y;G!L:69Y(B O/@H@(\" \\:71E;2!V86QU93TB4WEN<&QI9GD@4')O("
11605	"B O/@H@(\" \\:71E;2!V86QU93TB6%-4(B O/@H@(\" \\:71E;2!V86QU93TB4')E8VES:6]N(B"
11606	" O/@H@(#PO;&ES=&)O>#X*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](F1I<F5C"
11607	"=&]R>2(@9&5F875L=#TB+B]N971L:7-T(B!L86)E;#TB5&%R9V5T(&1I<F5C=&]R>2(@+SX*(\" "
11608	"\\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](G1E<W1B96YC:\"(@9&5F875L=#TB;V9F(B"
11609	"!L86)E;#TB5&5S=&)E;F-H(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)S:6U"
11610	"U;&EN:U]P97)I;V0B(&1E9F%U;'0](C$B(&QA8F5L/2)3:6UU;&EN:R!P97)I;V0B(\"\\^\"B @/"
11611	"&5D:71B;W@@979A;'5A=&4](G1R=64B(&YA;64](G-Y<V-L:U]P97)I;V0B(&1E9F%U;'0](C$P(B"
11612	"!L86)E;#TB4WES=&5M(&-L;V-K('!E<FEO9\"(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4](G1R"
11613	"=64B(&YA;64](FEN8W)?;F5T;&ES=\"(@9&5F875L=#TB;V9F(B!L86)E;#TB26YC<F5M96YT86P@"
11614	";F5T;&ES=&EN9R(@+SX*(\" \\;&ES=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB=')I;5]V8F"
11615	"ET<R(@9&5F875L=#TB179E<GEW:&5R92!I;B!3=6)3>7-T96TB(&QA8F5L/2)4<FEM('9A;&ED(&)"
11616	"I=',B(#X(\" @/&ET96T@=F%L=64](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R(@+SX(\" @/"
11617	"&ET96T@=F%L=64](D5V97)Y=VAE<F4@:6X@4W5B4WES=&5M(B O/@H@(\" \\:71E;2!V86QU93TB"
11618	"3F\\@5VAE<F4@:6X@4W5B4WES=&5M(B O/@H@(#PO;&ES=&)O>#X*(\" \\;&ES=&)O>\"!E=F%L="
11619	"6%T93TB=')U92(@;F%M93TB9&)L7V]V<F0B(&1E9F%U;'0](D%C8V]R9&EN9R!T;R!\";&]C:R!-8"
11620	"7-K<R(@;&%B96P](D]V97)R:61E('=I=&@@9&]U8FQE<R(@/@H@(\" \\:71E;2!V86QU93TB06-C"
11621	";W)D:6YG('1O($)L;V-K($UA<VMS(B O/@H@(\" \\:71E;2!V86QU93TB179E<GEW:&5R92!I;B!"
11622	"3=6)3>7-T96TB(\"\\^\"B @(#QI=&5M('9A;'5E/2).;R!7:&5R92!I;B!3=6)3>7-T96TB(\"\\"
11623	"^\"B @/\"]L:7-T8F]X/@H@(#QL:7-T8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)C;W)E7V=E;F"
11624	"5R871I;VXB(&1E9F%U;'0](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R(@;&%B96P](D=E;F5R87"
11625	"1E(&-O<F5S(B ^\"B @(#QI=&5M('9A;'5E/2)!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,B(\"\\"
11626	"^\"B @(#QI=&5M('9A;'5E/2)%=F5R>7=H97)E($%V86EL86)L92(@+SX*(\" @/&ET96T@=F%L=6"
11627	"4](DYO=\"!.965D960@+2!!;')E861Y($=E;F5R871E9\"(@+SX*(\" \\+VQI<W1B;W@^\"B @/&"
11628	"-H96-K8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)R=6Y?8V]R96=E;B(@9&5F875L=#TB;V9F(B!"
11629	"L86)E;#TB4G5N($-O<F5'96XB(\"\\^\"B @/&-H96-K8F]X(&5V86QU871E/2)T<G5E(B!N86UE/"
11630	"2)D97!R96-A=&5D7V-O;G1R;VPB(&1E9F%U;'0](F]F9B(@;&%B96P](E-H;W<@9&5P<F5C871E9"
11631	"\"!C;VYT<F]L<R(@+SX*(\" \\:&ED9&5N=F%R(&5V86QU871E/2)T<G5E(B!N86UE/2)E=F%L7V9"
11632	"I96QD(B!D969A=6QT/2(P(B O/@H@/\"]B;&]C:V=U:3X/\"]S>7-G96YB;&]C:SX . "
11633	" , 8 ( ! % \" 0 0 X "
11634	" P !@ @ $ 4 ( 0 0 ! ! ! !62$1,#@ #@"
11635	" & \" 8 !0 @ ! 0 $ \"0 @ "
11636	" X X !@ @ & 4 ( 0 $ ! D ( "
11637	" . 0 8 ( ! % \" $ , 0 "
11638	"0 # 'AL961K<&]S=&=E;@ . 0 8 ( ! % \" $"
11639	" - 0 0 #0 'AL961K<V5T=&EN9W, . R!L 8 ( @ "
11640	" % \" $ ! 0 % 0 '@ $ \"2! :6YF;V5D:70 "
11641	" >&EL:6YX9F%M:6QY <&%R= "
11642	" <W!E960 <&%C:V%G9"
11643	"0 <WEN=&AE<VES7W1O;VQ?<V=A9'9A;F-E9 <WEN=&"
11644	"AE<VES7W1O;VP 9&ER96-T;W)Y =&5"
11645	"S=&)E;F-H7W-G861V86YC960 =&5S=&)E;F-H "
11646	"<WES8VQK7W!E<FEO9 :6YC<E]N971L:7-T7W-G861V86YC960 "
11647	" =')I;5]V8FET<U]S9V%D=F%N8V5D 9&)L7V]V<F1?<V=A9'9A;F-E9 "
11648	" 8V]R95]G96YE<F%T:6]N7W-G861V86YC960 8V]R95]G96YE<F%T:6]N "
11649	" <G5N7V-O<F5G96Y?<V=A9'9A;F-E9 <G5N7V-O<F5G96X "
11650	" 9&5P<F5C871E9%]C;VYT<F]L7W-G861V86YC960 979A;%]F:65L9 "
11651	" :&%S7V%D=F%N8V5D7V-O;G1R;VP <V=G=6E?<&]S "
11652	" 8FQO8VM?='EP90 8FQO8VM?=F5R<VEO;@ "
11653	" <V=?:6-O;E]S=&%T <V=?;6%S:U]D:7-P"
11654	";&%Y <V=?;&ES=%]C;VYT96YT<P <V=?8FQO8VMG="
11655	"6E?>&UL 8VQO8VM?;&]C <WEN=&AE<V"
11656	"ES7VQA;F=U86=E 8V5?8VQR <')E<V5"
11657	"R=F5?:&EE<F%R8VAY 8VQO8VM?=W)A<'!E<@ 9&-M"
11658	"7VEN<'5T7V-L;V-K7W!E<FEO9 =F5R<VEO;@ <"
11659	"&]S=&=E;F5R871I;VY?9F-N <V5T=&EN9W-?9F-N "
11660	" <')E8V]M<&EL95]F8VX =7!D871E7V9C;@ "
11661	" #@ $@ & \" 0 !0 @ ! $0 $ "
11662	" $ !$ @4WES=&5M($=E;F5R871O<@ . . 8 ( ! %"
11663	" \" $ ( 0 0 \" '9I<G1E>#)P#@ #@ & \" "
11664	"0 !0 @ ! !P $ $ < !X8S)V<#<P X P !@ "
11665	" @ $ 4 ( 0 ( ! ! @ M-@ #@ #@ & "
11666	"\" 0 !0 @ ! !@ $ $ 8 !F9C$U,3< X P"
11667	" !@ @ $ 4 ( ! ! #@ # "
11668	" & \" 0 !0 @ ! P $ $ # %A35 . : "
11669	" 8 ( ! % \" $ T 0 0 - $,Z+T1O8W5M9"
11670	"6YT<R!A;F0@4V5T=&EN9W,O0TU#+T1E<VMT;W O=V%R<%]T:6UE<E]E>' #@ # & "
11671	" \" 0 !0 @ $ $ . , 8 "
11672	" ( ! % \" $ # 0 0 , ;V9F X P !@ "
11673	"@ $ 4 ( 0 ( ! ! @ Q, #@ # & \" "
11674	" 0 !0 @ $ $ . , 8 ( "
11675	" ! % \" 0 0 X P !@ @ "
11676	"$ 4 ( ! ! #@ # & \" 0"
11677	" !0 @ $ $ . 2 8 ( ! "
11678	" % \" $ 8 0 0 & $%C8V]R9&EN9R!T;R!\";&]C:R!"
11679	"-87-K<PX P !@ @ $ 4 ( ! ! "
11680	" #@ # & \" 0 !0 @ ! P $ $ # &]F"
11681	"9@ . , 8 ( ! % \" 0 0 "
11682	" X P !@ @ $ 4 ( 0 $ ! ! 0 P #"
11683	"@ # & \" 0 !0 @ ! 0 $ $ ! # . "
11684	" 0 8 ( ! % \" $ + 0 0 \"P \"T"
11685	"Q+\"TQ+\"TQ+\"TQ . . 8 ( ! % \" $ & "
11686	" 0 0 !@ '-Y<V=E;@ #@ # & \" 0 !0 @ !"
11687	" P $ $ # #@N,@ . 4 8 ( ! % \" $ "
11688	" = 0 0 '0 #4Q+#4P+\"TQ+\"TQ+')E9\"QB96EG92PP+# W-S,T #@"
11689	" , ! & \" 0 !0 @ ! C@$ $ $ (X! !F<'"
11690	")I;G1F\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N(&=R87!H:6-S)RD[\"G!A=&-H%LP(#4Q(#4Q"
11691	"(# @72Q;,\" P(#4P(#4P(%TL6S N.3,@,\"XY,B P+C@V72D[\"G!A=&-H*%LQ,B T(#$V(#0@,3"
11692	"(@,C4@,CD@,S,@-#<@,S8@,C4@,3<@,CD@,3<@,C4@,S8@-#<@,S,@,CD@,C4@,3(@72Q;-2 Q,R "
11693	"R-2 S-R T-2 T-2 T,2 T-2 T-2 S-\" T-2 S-R R-2 Q,R U(#$V(#4@-2 Y(#4@-2!=+%LP+C8"
11694	"@,\"XR(# N,C5=3L<&QO=\"A;,\" P(#4Q(#4Q(# @72Q;,\" U,\" U,\" P(# @72D[\"F9P<"
11695	"FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N(&=R87!H:6-S)RD[\"F9P<FEN=&8H)R<L)T-/34U%"
11696	"3E0Z(&)E9VEN(&EC;VX@=&5X=\"<I.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!T97"
11697	"AT)RD[\"@ #@ # & \" 0 !0 @ $ $"
11698	" . \\ L 8 ( ! % \" $ \"[\"P 0 "
11699	" 0 NPL #PA+2T@(\"H@($-O<'ER:6=H=\" H8RD@,C P-2P@6&EL:6YX+\"!);F,N(\"!!;&P"
11700	"@4FEG:'1S(%)E<V5R=F5D+B @(\" @(\" @(\" @(\"TM/CPA+2T@(\"H@(%)E<')O9'5C=&EO;B!"
11701	"O<B!R975S92P@:6X@86YY(&9O<FTL('=I=&AO=70@=&AE(&5X<&QI8VET('=R:71T96X@(\"TM/CP"
11702	"A+2T@(\"H@(&-O;G-E;G0@;V8@6&EL:6YX+\"!);F,N+\"!I<R!S=')I8W1L>2!P<F]H:6)I=&5D+"
11703	"B @(\" @(\" @(\" @(\" @(\" @(\"TM/CQS>7-G96YB;&]C:R!H87-?=7-E<F1A=&$](G1R=64B"
11704	"('1A9STB9V5N6\"(@8FQO8VM?='EP93TB<WES9V5N(B!S:6UU;&EN:VYA;64](B!3>7-T96T@1V5N"
11705	"97)A=&]R(B ^\"B \\:6-O;B!W:61T:#TB-3$B(&)G7V-O;&]R/2)B96EG92(@:&5I9VAT/2(U,\""
11706	"(@8V%P=&EO;E]F;W)M870](E-Y<W1E;5QN1V5N97)A=&]R(B!W;6%R:U]C;VQO<CTB<F5D(B O/@H"
11707	"@/&-A;&QB86-K<R!$96QE=&5&8VX](GAL4WES9V5N1U5)*\"=D96QE=&4G+\"!G8W,L(&=C8F@I.R"
11708	"(@3W!E;D9C;CTB>&Q3>7-G96Y'54DH)W-T87)T=7 G+&=C<RQG8V)H*2(@36]D96Q#;&]S949C;CT"
11709	"B>&Q3>7-G96Y'54DH)T-L;W-E)RQG8W,L9V-B:\"DB(%!O<W13879E1F-N/2)X;%-Y<V=E;D=522@"
11710	"G4V%V92<I(B O/@H@/&QI8G)A<FEE<SX(\" \\;&EB<F%R>2!N86UE/2)X8G-);F1E>\"(@+SX("
11711	"\" \\;&EB<F%R>2!N86UE/2)X8G-\"87-I8R(@+SX*(\" \\;&EB<F%R>2!N86UE/2)X8G-4;V]L<"
11712	"R(@+SX*(#PO;&EB<F%R:65S/@H@/'-U8G-Y<W1E;5]M;V1E;\"!F:6QE/2)S>7-T96U?9V5N97)A="
11713	"&]R7W-U8G-Y<W1E;2YM9&PB(\"\\^\"B \\8FQO8VMG=6D@;&%B96P](EAI;&EN>\"!3>7-T96T@1"
11714	"V5N97)A=&]R(B ^\"B @/&5D:71B;W@@979A;'5A=&4](F9A;'-E(B!M=6QT:5]L:6YE/2)T<G5E("
11715	"B!N86UE/2)I;F9O961I=\"(@<F5A9%]O;FQY/2)T<G5E(B!D969A=6QT/2(@4WES=&5M($=E;F5R8"
11716	"71O<B(@+SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB9F%L<V4B(&YA;64](GAI;&EN>&9A;6EL>2("
11717	"@9&5F875L=#TB5FER=&5X-\"(@;&%B96P](EAI;&EN>\"!F86UI;'DB(\"\\^\"B @/&5D:71B;W@"
11718	"@979A;'5A=&4](F9A;'-E(B!N86UE/2)P87)T(B!D969A=6QT/2)X8S1V<W@S-2(@;&%B96P](E!A"
11719	"<G0B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](F9A;'-E(B!N86UE/2)S<&5E9\"(@9&5F875L="
11720	"#TB+3$P(B!L86)E;#TB4W!E960B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](F9A;'-E(B!N86U"
11721	"E/2)P86-K86=E(B!D969A=6QT/2)F9C8V.\"(@;&%B96P](E!A8VMA9V4B(\"\\^\"B @/&QI<W1B"
11722	";W@@979A;'5A=&4](G1R=64B(&YA;64](G-Y;G1H97-I<U]T;V]L(B!D969A=6QT/2)84U0B(&QA8"
11723	"F5L/2)3>6YT:&5S:7,@=&]O;\"(@/@H@(\" \\:71E;2!V86QU93TB4W!E8W1R=6TB(\"\\^\"B @"
11724	"(#QI=&5M('9A;'5E/2)3>6YP;&EF>2(@+SX*(\" @/&ET96T@=F%L=64](E-Y;G!L:69Y(%!R;R(@"
11725	"+SX(\" @/&ET96T@=F%L=64](EA35\"(@+SX(\" @/&ET96T@=F%L=64](E!R96-I<VEO;B(@+S"
11726	"X*(\" \\+VQI<W1B;W@^\"B @/&5D:71B;W@@979A;'5A=&4](F9A;'-E(B!N86UE/2)D:7)E8W1O"
11727	"<GDB(&1E9F%U;'0](BXO;F5T;&ES=\"(@;&%B96P](E1A<F=E=\"!D:7)E8W1O<GDB(\"\\^\"B @"
11728	"/&-H96-K8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)T97-T8F5N8V@B(&1E9F%U;'0](F]F9B(@;"
11729	"&%B96P](E1E<W1B96YC:\"(@+SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB<V"
11730	"EM=6QI;FM?<&5R:6]D(B!D969A=6QT/2(Q(B!L86)E;#TB4VEM=6QI;FL@<&5R:6]D(B O/@H@(#Q"
11731	"E9&ET8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)S>7-C;&M?<&5R:6]D(B!D969A=6QT/2(Q,\"("
11732	"@;&%B96P](E-Y<W1E;2!C;&]C:R!P97)I;V0B(\"\\^\"B @/&-H96-K8F]X(&5V86QU871E/2)T<"
11733	"G5E(B!N86UE/2)I;F-R7VYE=&QI<W0B(&1E9F%U;'0](F]F9B(@;&%B96P](DEN8W)E;65N=&%L(&"
11734	"YE=&QI<W1I;F<B(\"\\^\"B @/&QI<W1B;W@@979A;'5A=&4](G1R=64B(&YA;64](G1R:6U?=F)I"
11735	"=',B(&1E9F%U;'0](D5V97)Y=VAE<F4@:6X@4W5B4WES=&5M(B!L86)E;#TB5')I;2!V86QI9\"!B"
11736	":71S(B ^\"B @(#QI=&5M('9A;'5E/2)!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,B(\"\\^\"B @"
11737	"(#QI=&5M('9A;'5E/2)%=F5R>7=H97)E(&EN(%-U8E-Y<W1E;2(@+SX*(\" @/&ET96T@=F%L=64]"
11738	"(DYO(%=H97)E(&EN(%-U8E-Y<W1E;2(@+SX*(\" \\+VQI<W1B;W@^\"B @/&QI<W1B;W@@979A;'"
11739	"5A=&4](G1R=64B(&YA;64](F1B;%]O=G)D(B!D969A=6QT/2)!8V-O<F1I;F<@=&\\@0FQO8VL@36"
11740	"%S:W,B(&QA8F5L/2)/=F5R<FED92!W:71H(&1O=6)L97,B(#X*(\" @/&ET96T@=F%L=64](D%C8V"
11741	"]R9&EN9R!T;R!\";&]C:R!-87-K<R(@+SX*(\" @/&ET96T@=F%L=64](D5V97)Y=VAE<F4@:6X@4"
11742	"W5B4WES=&5M(B O/@H@(\" \\:71E;2!V86QU93TB3F\\@5VAE<F4@:6X@4W5B4WES=&5M(B O/@H"
11743	"@(#PO;&ES=&)O>#X*(\" \\;&ES=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB8V]R95]G96YE<"
11744	"F%T:6]N(B!D969A=6QT/2)!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,B(&QA8F5L/2)'96YE<F%T9"
11745	"2!C;W)E<R(@/@H@(\" \\:71E;2!V86QU93TB06-C;W)D:6YG('1O($)L;V-K($UA<VMS(B O/@H@"
11746	"(\" \\:71E;2!V86QU93TB179E<GEW:&5R92!!=F%I;&%B;&4B(\"\\^\"B @(#QI=&5M('9A;'5E"
11747	"/2).;W0@3F5E9&5D(\"T@06QR96%D>2!'96YE<F%T960B(\"\\^\"B @/\"]L:7-T8F]X/@H@(#QC"
11748	":&5C:V)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB<G5N7V-O<F5G96XB(&1E9F%U;'0](F]F9B(@"
11749	";&%B96P](E)U;B!#;W)E1V5N(B O/@H@(#QC:&5C:V)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB"
11750	"9&5P<F5C871E9%]C;VYT<F]L(B!D969A=6QT/2)O9F8B(&QA8F5L/2)3:&]W(&1E<')E8V%T960@8"
11751	"V]N=')O;',B(\"\\^\"B @/&AI9&1E;G9A<B!E=F%L=6%T93TB=')U92(@;F%M93TB979A;%]F:65"
11752	"L9\"(@9&5F875L=#TB,\"(@+SX*(#PO8FQO8VMG=6D^\"CPO<WES9V5N8FQO8VL^\"@ #@ "
11753	" # & \" 0 !0 @ $ $ . "
11754	", 8 ( ! % \" $ $ 0 0 0 5DA$3 X X"
11755	" !@ @ & 4 ( 0 $ ! D ( "
11756	" . . 8 ( !@ % \" $ ! 0 ) \" "
11757	" #@ $ & \" 0 !0 @ ! #0 $ "
11758	"$ T !#;&]C:R!%;F%B;&5S #@ # & \" 0 !0 @ !"
11759	" P $ $ # #$P, . . 8 ( ! % \" $ "
11760	" & 0 0 !@ #DN,BXP,0 #@ $ & \" 0 !0 "
11761	" @ ! # $ $ P !X;&5D:W!O<W1G96X #@ $ & "
11762	"\" 0 !0 @ ! #0 $ $ T !X;&5D:W-E='1I;F=S"
11763	" #@ $ & \" 0 !0 @ ! #P $ $ \\"
11764	" !X;&5D:W!R96-O;7!I;&4 #@ $ & \" 0 !0 @ ! #0 "
11765	" $ $ T !X;&5D:W5P9&%T969N "
11766	}
11767	}

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