| 1 | #ifndef WARP_TIMER_MACROS_H |
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| 2 | #define WARP_TIMER_MACROS_H |
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| 3 | |
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| 4 | #include "xbasic_types.h" |
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| 5 | #include "xstatus.h" |
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| 6 | #include "xio.h" |
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| 7 | |
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| 8 | #define TIMER_MASK_CALC(id) ((unsigned int)(0xF << (id * 4))) |
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| 9 | |
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| 10 | #define TIMER0_MASK 0x0000000F |
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| 11 | #define TIMER1_MASK 0x000000F0 |
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| 12 | #define TIMER2_MASK 0x00000F00 |
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| 13 | #define TIMER3_MASK 0x0000F000 |
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| 14 | #define TIMER4_MASK 0x000F0000 |
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| 15 | #define TIMER5_MASK 0x00F00000 |
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| 16 | #define TIMER6_MASK 0x0F000000 |
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| 17 | #define TIMER7_MASK 0xF0000000 |
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| 18 | |
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| 19 | #define TIMER_CONTROL_START_MASK 0x11111111 |
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| 20 | #define TIMER_CONTROL_PAUSE_MASK 0x22222222 |
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| 21 | #define TIMER_CONTROL_MODE_MASK 0x44444444 |
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| 22 | #define TIMER_CONTROL_RESETDONE_MASK 0x88888888 |
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| 23 | |
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| 24 | #define TIMER_STATUS_PASUED_MASK 0x11111111 |
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| 25 | #define TIMER_STATUS_RUNNING_MASK 0x22222222 |
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| 26 | #define TIMER_STATUS_DONE_MASK 0x44444444 |
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| 27 | |
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| 28 | //Register writing macros |
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| 29 | #define warp_timer_WriteReg_control(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER_CONTROL, (unsigned int)(d)) |
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| 30 | #define warp_timer_WriteReg_timer0_slotCount(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER0_SLOTCOUNT, (unsigned int)(d)) |
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| 31 | #define warp_timer_WriteReg_timer1_slotCount(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER1_SLOTCOUNT, (unsigned int)(d)) |
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| 32 | #define warp_timer_WriteReg_timer2_slotCount(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER2_SLOTCOUNT, (unsigned int)(d)) |
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| 33 | #define warp_timer_WriteReg_timer3_slotCount(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER3_SLOTCOUNT, (unsigned int)(d)) |
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| 34 | #define warp_timer_WriteReg_timer4_slotCount(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER4_SLOTCOUNT, (unsigned int)(d)) |
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| 35 | #define warp_timer_WriteReg_timer5_slotCount(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER5_SLOTCOUNT, (unsigned int)(d)) |
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| 36 | #define warp_timer_WriteReg_timer6_slotCount(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER6_SLOTCOUNT, (unsigned int)(d)) |
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| 37 | #define warp_timer_WriteReg_timer7_slotCount(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER7_SLOTCOUNT, (unsigned int)(d)) |
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| 38 | #define warp_timer_WriteReg_timers01_slotTime(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMERS01_SLOTTIME, (unsigned int)(d)) |
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| 39 | #define warp_timer_WriteReg_timers23_slotTime(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMERS23_SLOTTIME, (unsigned int)(d)) |
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| 40 | #define warp_timer_WriteReg_timers45_slotTime(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMERS45_SLOTTIME, (unsigned int)(d)) |
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| 41 | #define warp_timer_WriteReg_timers67_slotTime(d) XIo_Out32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMERS67_SLOTTIME, (unsigned int)(d)) |
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| 42 | |
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| 43 | //Register reading macros |
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| 44 | //Read-only reg |
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| 45 | #define warp_timer_ReadReg_status() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER_STATUS) |
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| 46 | |
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| 47 | //Read-write regs |
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| 48 | #define warp_timer_ReadReg_control() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER_CONTROL) |
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| 49 | #define warp_timer_ReadReg_timer0_slotCount() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER0_SLOTCOUNT) |
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| 50 | #define warp_timer_ReadReg_timer1_slotCount() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER1_SLOTCOUNT) |
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| 51 | #define warp_timer_ReadReg_timer2_slotCount() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER2_SLOTCOUNT) |
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| 52 | #define warp_timer_ReadReg_timer3_slotCount() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER3_SLOTCOUNT) |
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| 53 | #define warp_timer_ReadReg_timer4_slotCount() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER4_SLOTCOUNT) |
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| 54 | #define warp_timer_ReadReg_timer5_slotCount() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER5_SLOTCOUNT) |
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| 55 | #define warp_timer_ReadReg_timer6_slotCount() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER6_SLOTCOUNT) |
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| 56 | #define warp_timer_ReadReg_timer7_slotCount() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMER7_SLOTCOUNT) |
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| 57 | #define warp_timer_ReadReg_timers01_slotTime() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMERS01_SLOTTIME) |
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| 58 | #define warp_timer_ReadReg_timers23_slotTime() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMERS23_SLOTTIME) |
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| 59 | #define warp_timer_ReadReg_timers45_slotTime() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMERS45_SLOTTIME) |
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| 60 | #define warp_timer_ReadReg_timers67_slotTime() XIo_In32(XPAR_WARP_TIMER_PLBW_0_MEMMAP_TIMERS67_SLOTTIME) |
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| 61 | |
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| 62 | |
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| 63 | #endif |
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