source: ReferenceDesigns/w3_802.11/sysgen/wlan_phy_tx_pmd/mcode_blocks/sym_config_decode.m

Last change on this file was 5095, checked in by murphpo, 8 years ago

First commit of new Tx PHY.

Re-designed most of the Tx PHY pipeline

-Added 11n SISO support, implements MCS 0-7, long-GI only (still working on short-GI mode)
-Replaced interleaver-per-mod with unified bits-in, syms-out interleaver
-Replaced control logic with simpler generate-one-sym-at-a-time logic
-Replcaed packet buffer addressing logic with simpler packet section decode logic
-Moved all MAC I/O and radio_controller I/O to common subsystem for easier integration in XPS
-Adopted external sample clock enable; ad_bridge now decides sampling rate
-Unified configuration params for each OFDM symbol in one subsystem

-Added DFFs around output FIFO control signals, hoping to isolate apparent asynchronous assertions
-Qualified PHY_Start by samp_ce, for fixed phase relationship between sample clock and PHY-MAC control
File size: 1.1 KB
Line 
1function [load_base_rate, rotate_bpsk, load_htstf, load_htltf, load_full_rate, pilot_shift, cyclic_prefix, cyclic_shift] = sym_config_decode(sym_cfg)
2
3%Inputs:
4% sym_cfg: OFDM sym config code, concatenated configuration fields
5
6% Sym Config fields:
7%     0: Load Base Rate - base-rate in 48 subcarriers (SIGNAL/HT-SIG fields)
8%     1: Rotate BPSK - use QBPSK (+/- j) (HT-SIG fields)
9%     2: Load HT-STF - no data bits
10%     3: Load HT-LTF - no data bits
11%     4: Load Full Rate - full-rate in 48 (a/g) or 52 (n/ac) subcarriers
12%   6:5: Pilot shift (0,1,2,3)
13%     7: Reserved
14% 12: 8: Cyclic prefix length (samples)
15% 15:13: Cyclic shift (samples)
16
17%xl_slice(arg, from_bit, to_bit); bits indexed from LSB=0
18% '==1' is quick conversion to boolean
19load_base_rate = xl_slice(sym_cfg, 0, 0) == 1;
20rotate_bpsk    = xl_slice(sym_cfg, 1, 1) == 1;
21load_htstf     = xl_slice(sym_cfg, 2, 2) == 1;
22load_htltf     = xl_slice(sym_cfg, 3, 3) == 1;
23load_full_rate = xl_slice(sym_cfg, 4, 4) == 1;
24pilot_shift    = xl_slice(sym_cfg, 6, 5);
25
26cyclic_prefix  = xl_slice(sym_cfg, 12, 8);
27cyclic_shift   = xl_slice(sym_cfg, 15, 13);
28
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