source: ResearchApps/PHY/MIMO_OFDM/Deprecated/ofdm_rx_supermimo_init.m

Last change on this file was 1714, checked in by murphpo, 12 years ago

cleaning up PHY directory; coded PHY is now primary OFDM_MIMO model

File size: 8.0 KB
Line 
1%Make sure the Tx init has already been loaded
2ofdm_tx_supermimo_init;
3
4%Do not use 16! Breaks Alamouti Rx timing
5%Symbol_Timing_Offset = 15; %Use for no cyclic shift offset w/ antB preamble enabled, countLoad=229
6
7%Symbol_Timing_Offset = 12; %Use for no cyclic shift offset w/ SISO, antB channel disabled, countLoad=229
8Symbol_Timing_Offset = 10;
9
10PktDet_Delay = 58+32 + ... %UFix7_0 packet detect delay
11    Symbol_Timing_Offset*2^7 + ... %UFix6_0 FFT window offset
12    0*2^16 + ... %UFix5_0 CFO calc delay, in samples
13    (117* 2^24); %UFix8_8 threshold
14%    (round(0.15 * 2^8)* 2^24); %UFix8_8 threshold
15
16pktByteNums =   numHeaderBytes + ...
17                byteIndex_numPayloadBytes(1)*2^8 + ...
18                byteIndex_numPayloadBytes(2)*2^16 + ...
19                byteIndex_simpleDynModMasks * 2^24;
20
21rx_SISO_Mode = tx_SISO_Mode;
22
23pktTiming_controlCounter_bits = 16;
24
25%Structure of packet following detection
26%Short symbols
27pktTiming_ss_num = 6;
28pktTiming_ss_length = length(shortSymbol_time);
29%Long symbols
30pktTiming_ls_num = 2;
31pktTiming_ls_length = length(longSymbol_time);
32%Long symbol cyclic prefix
33pktTiming_lscp_length = 32;
34
35pktTiming_count_ssStart = 0;
36pktTiming_count_lscpStart = (pktTiming_count_ssStart + pktTiming_ss_num*pktTiming_ss_length);
37pktTiming_count_lsStart = (pktTiming_count_lscpStart + pktTiming_lscp_length);
38pktTiming_count_payloadStart = pktTiming_count_lsStart + pktTiming_ls_num*pktTiming_ls_length;
39
40%Packet detection threshold
41pkt_crossCorr_thresh = 0.7;
42pkt_energy_thresh = 0;
43
44%In alamouti mode, the Rx syncs to the earlier preamble
45%LongCorrCounterLoad = 229;
46%LongCorrCounterLoad = 232;
47LongCorrCounterLoad = 253-8;%234;
48
49Rx_PktDet_LongCorrThresholds = 8000;
50
51Rx_PktDet_LongCorr_Params = LongCorrCounterLoad + 0*2^8 + 0*2^16 + 255*2^24;
52
53%Interrupt control register has 8 bits:
54%0: Rx Pkt Interrupts Reset
55%1: Rx Header Interrupts Reset
56%2: Tx Done Interrupt Reset
57%3: Rx Good Pkt Interrupt Enable
58%4: Rx Bad Pkt Interrupt Enable
59%5: Rx Good Header Interrupt Enable
60%6: Rx Bad Header Interrupt Enable
61%7: Tx Done Interrupt Enable
62reg_InterruptControl = ...
63    0 + ...  %3 bits [RxPkt, RxHeader, TxDone] interrupt resets
64    15 * 2^3 + ... %4 bits[LSB:MSB]=[goodPkt, badPkt, goodHdr, badHdr] interrupt enables
65    0 * 2^7; %1 bit for TxDone enable
66
67%32-bit register holds both pkt buffer offsets (16LSB+8) and interrupt control (8LSB)
68reg_Interrupt_PktBuf_Control = ...
69    reg_InterruptControl + ...
70    1 * 2^16 + ... %6 bits for Tx pkt buff offset
71    0 * 2^24; %6 bits for Rx pkt buff offset
72
73minPilotChanMag = (0.01 * 2^12); %UFix12_12
74reg_PilotCalcParams = (4 * 2^16) + (minPilotChanMag);
75
76regRx_preCFOoptions = ...
77    0 * 2^0 + ... %Use coarse CFO estimate
78    1 * 2^1 + ... %Use pilot CFO estimate
79    0;
80
81regRx_pilotCalcCorrection = round(1.00115 * 2^31);
82regRx_coarseCalcCorrection = round((1.3e-3 - 1.2982e-3)*2^32);
83%Initialization values for the long correlator
84% The correlator only stores the signs of the values in a long trainin symbol
85% This code and the correlator block were designed by Dr. Chris Dick
86
87%Fix2_0 version of longSym
88longCorr_coef_nbits = 3;
89longCorr_coef_bp = 0;
90LTS = fliplr(longSymbol_time./max(abs(longSymbol_time)));
91
92%longCorr_coef_i = [-1*sign(real(fliplr(LTS))) 0];
93%longCorr_coef_q = [sign(imag(fliplr(LTS))) 0];
94
95longCorr_coef_i = [-4*real(LTS) 0];
96longCorr_coef_q = [4*imag(LTS) 0];
97ii = find(longCorr_coef_i < -3.5);
98longCorr_coef_i(ii) = -3;
99ii = find(longCorr_coef_q < -3.5);
100longCorr_coef_q(ii) = -3;
101
102%Shift the correlation pattern by 16 to allow the calculation
103% to finish in time to decide the beginning of the payload
104%L = [longSymbol_time(50:64) longSymbol_time(1:49)];
105L = [longSymbol_time];
106
107ccr = -1*sign(real(fliplr(L)));
108ccr = [ccr 0];
109ii = find(ccr==0);
110ccr(ii)=1;
111
112cci = 1*sign(fliplr(imag(L)));
113cci = [cci 0];
114ii=find(cci==0);
115cci(ii)=1;
116
117ii = find(ccr==-1);
118hr = zeros(1,length(ccr));
119hr(ii) = 1;
120
121ii = find(cci==-1);
122hi = zeros(1,length(cci));
123hi(ii) = 1;
124
125long_cor_acc_n_bits = 6;
126%long_cor_acc_n_bits = 4;
127Tr1 = 1/4;
128
129%Demodulator input precision
130symbol_unmap_bp= 15;
131symbol_unmap_nb= 16;
132
133RxReg_FixedPktLen = 0;%2^32 + 512;
134
135%Popluate the RxControlBits register
136% Each bit has a different function
137%0x1:   1: Reset BER
138%0x2:   2: Require long correlation for pkt detection
139%0x4:   4: Enable dynamic packet lengths
140%0x8:   8: Big sub-pkt buffer mode (16KB max pkt size)
141%0x10:  16: Enable SISO mode
142%0x20:  32: Require 2 long correlations for pkt detection
143%0x40:  64: Require short correlation or ext pkt detection
144%0x80:  128: Record channel estimates
145%0x100: 256: Record channel estimate magnitudes
146%0x200: 512: bypass CFO correction
147%0x400: 1024: Enable coarse CFO estimation
148%0x800: 2048: CFO debug output selection
149%0x1000:4096: Compensate for RF gain in RSSI input
150%0x4000:16384: Bypass division during EQ
151%0x8000:32768: Disable Rx PHY on Tx (not useful for simulation!)
152%0x1_0000:65536: Enable simple dynamic modulation
153%0x2_0000:131072: Enable switching diversity
154%0x4_0000:262144: Use antenna B in SISO mode
155%0x8_0000:524288: Enable Rx reset on bad header CRC
156%0x10_0000: 1048576: Enable Rx Alamouti mode
157%0x20_0000: 2097152: Enable flexBER mode
158%0x40_0000: 4194304: Ignore headers for BER
159%0x80_0000: 8388608: Per-packet BER reset
160%0x100_0000: 16777216: Force-enable radio RxEn
161%0x200_0000: 33554432: SaveAF waveform
162%0x400_0000: Reset autoResponse flagA
163%0x800_0000: Reset autoResponse flagB
164%0x2000_0000: 536870912: Enable channel magnitude masking (only useful in Alamouti mode)
165%0x8000_0000: 2147483648: Global Rx reset
166
167rx_controlBits = 1 * 2 ... %Long correlation
168         + 1 * 4 ... %Dyn pkt lengths
169         + 0 * 8 ... %1=big sub-pkt buffers
170         + 1 * 16 * rx_SISO_Mode ...
171         + 1 * 32 ... %2 long correlations
172         + 1 * 64 ... %short correlation
173         + 1 * 128 ... %record channel estimates
174         + 1 * 256 ... %record channel estimate mags
175         + 1 * 512 ... %bypass CFO%%%%%%%%%%%%
176         + 1 * 1024 ... %1=Enable coarse CFO estimation
177         + 1 * 4096 ... %Compensate for RFgain in RSSI input
178         + 0 * 16384 ... %1=Bypass EQ division
179         + 0 * 32768 ... %0=Don't disable Rx during Tx
180         + 1 * 65536 ... %1=Use simple dynamic modulation
181         + 0 * 131072 ... %1=Use switching diversity in SISO mode
182         + 0 * 262144 ... %1=force AntB in SISO mode
183         + 1 * 524288 ... %1=Reset Rx on bad header
184         + 1 * 1048576 * tx_Alamouti_Mode ...
185         + 0 * 2097152 ... %1=flex BER mode
186         + 1 * 33554432 ... %1=Save AF waveform
187         + 0 * 4194304 ... %1=ignore headers (and header-only packets) for BER calculation
188         + 0 * 8388608 ... %1=Per-packet BER reset
189         + 0 * 16777216 ... %Don't force RxEn in simulation (used in hardware though)
190         + 1 * 536870912 * tx_Alamouti_Mode ... %Enables chan mag checking/masking
191         + 0 * 2147483648; %Global Rx reset
192     
193     
194%Min chan est magnitudes (Two UFix16_15 values, re-interpreted as UFix16_0)
195regRx_chanEst_minMag = ((0.5)*2^15) + ((0.5 * 2^15)*2^16);
196
197%Post-equalization scaling
198%This value is used to scale the equalizer's output before demodulation
199%This is used to correct for any fixed gain/attenuation the full system has
200% The value shouldn't be channel or modulation dependent
201% It does depend on the number of training symbols (1/training)
202if(tx_SISO_Mode)
203    rxScaling = 2;
204else
205    rxScaling = 1;
206end
207
208%AF scaling; UFix18_12
209reg_AF_Tx_Scaling = 2944;%2 * 2^12;
210
211reg_AF_Tx_Blanking = (320+80) + ( (320+80+79)*2^16);
212
213% This scaling value resides in a UFix_32_0 register
214%  The value is split into two 16 bit values, then
215%   each is re-interpreted as a UFix_16_11
216rx_postEq_scaling = round(rxScaling*2^11) * (1 + 2^16);
217%mod((rxScaling*2^11),2^16) + (2^16 * mod((rxScaling*2^11),2^16));
218
219%Load Chipscope capture data
220AntA_ADC_I = 0;AntA_ADC_Q = 0; csInterp = 1; t_start = 1; t_stop = 1;%2260;
221%xlLoadChipScopeData('cs_capts\v15_19_1_badPkt_v0.prn'); csInterp = 1; t_start = 392;
222
223rxAntI.time = [];
224rxAntQ.time = [];
225rxAntI.signals.values = AntA_ADC_I(t_start:csInterp:end);
226rxAntQ.signals.values = AntA_ADC_Q(t_start:csInterp:end);
227if(length(AntA_ADC_I) > 1)
228    simOnly_simLength = 1000 + 4*(length(AntA_ADC_I) - t_start);
229end
230
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