1 | /** @file wl_common.c |
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2 | * @brief WARPLab Framework (Common) |
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3 | * |
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4 | * This contains the code for WARPLab Framework. |
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5 | * |
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6 | * @copyright Copyright 2013-2015, Mango Communications. All rights reserved. |
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7 | * Distributed under the WARP license (http://warpproject.org/license) |
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8 | * |
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9 | * @author Chris Hunter (chunter [at] mangocomm.com) |
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10 | * @author Patrick Murphy (murphpo [at] mangocomm.com) |
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11 | * @author Erik Welsh (welsh [at] mangocomm.com) |
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12 | */ |
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13 | |
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14 | |
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15 | /**********************************************************************************************************************/ |
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16 | /** |
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17 | * @brief Common Functions |
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18 | * |
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19 | **********************************************************************************************************************/ |
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20 | |
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21 | |
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22 | /***************************** Include Files *********************************/ |
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23 | |
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24 | // Xilinx / Standard library includes |
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25 | #include <xparameters.h> |
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26 | #include <xil_io.h> |
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27 | #include <xio.h> |
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28 | |
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29 | //#include "stdlib.h" |
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30 | //#include "ctype.h" |
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31 | #include "string.h" |
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32 | //#include "stdarg.h" |
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33 | #include "stdio.h" |
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34 | |
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35 | // Xilinx Peripheral includes |
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36 | #include <xtmrctr.h> |
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37 | #include <xgpio.h> |
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38 | |
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39 | // WARPLab includes |
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40 | #include "wl_common.h" |
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41 | #include "wl_node.h" |
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42 | #include "wl_baseband.h" |
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43 | |
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44 | |
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45 | /*************************** Constant Definitions ****************************/ |
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46 | |
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47 | #define TMRCTR_DEVICE_ID XPAR_TMRCTR_0_DEVICE_ID |
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48 | #define TIMER_FREQ XPAR_TMRCTR_0_CLOCK_FREQ_HZ |
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49 | #define TIMER_COUNTER_0 0 |
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50 | |
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51 | |
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52 | |
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53 | /*********************** Global Variable Definitions *************************/ |
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54 | |
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55 | /*************************** Variable Definitions ****************************/ |
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56 | |
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57 | // Peripheral Instances |
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58 | static XTmrCtr TimerCounter; ///< Instance of the Tmrctr device |
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59 | static XGpio GPIO_debugpin; ///< Instance of the GPIO device |
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60 | |
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61 | |
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62 | #if _DEBUG_STORAGE_ |
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63 | u32 debug_storage[_DEBUG_STORAGE_SIZE_]; |
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64 | u32 storage_index = 0; |
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65 | #endif |
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66 | |
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67 | |
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68 | |
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69 | /*************************** Functions Prototypes ****************************/ |
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70 | |
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71 | /******************************** Functions **********************************/ |
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72 | |
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73 | /***************************************************************************** |
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74 | * |
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75 | * Debug Printing Functions |
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76 | * |
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77 | *****************************************************************************/ |
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78 | u8 wl_print_level = DEFAULT_DEBUG_PRINT_LEVEL; |
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79 | char * print_type_node = "NODE"; |
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80 | char * print_type_transport = "TRANSPORT"; |
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81 | char * print_type_interface = "IFC"; |
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82 | char * print_type_baseband = "BB"; |
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83 | char * print_type_trigger = "TRIG"; |
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84 | char * print_type_user = "USER"; |
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85 | |
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86 | |
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87 | void wl_print_header(u8 level, char * type, char* filename, u32 line) { |
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88 | char * basename = NULL; |
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89 | |
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90 | if (type != NULL) { |
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91 | xil_printf("%s", type); |
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92 | |
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93 | if ((level <= WL_PRINT_WARNING) || (wl_print_level == WL_PRINT_DEBUG)) { |
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94 | basename = strrchr(filename, '/') ? strrchr(filename, '/') + 1 : filename; |
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95 | } |
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96 | |
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97 | if (wl_print_level == WL_PRINT_DEBUG) { |
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98 | xil_printf(" (%s:%d): ", basename, line); |
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99 | } else { |
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100 | xil_printf(": "); |
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101 | } |
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102 | |
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103 | switch(level) { |
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104 | case WL_PRINT_ERROR: |
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105 | xil_printf("ERROR (%s:%d): ", basename, line); |
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106 | increment_red_leds_one_hot(); |
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107 | break; |
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108 | |
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109 | case WL_PRINT_WARNING: |
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110 | xil_printf("WARNING (%s:%d): ", basename, line); |
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111 | break; |
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112 | } |
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113 | } |
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114 | } |
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115 | |
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116 | |
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117 | void wl_print_mac_address(u8 level, u8 * mac_address) { |
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118 | u32 i; |
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119 | |
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120 | if (level <= wl_print_level) { |
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121 | xil_printf("%02x", mac_address[0]); |
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122 | |
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123 | for ( i = 1; i < ETH_ADDR_LEN; i++ ) { |
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124 | xil_printf(":%02x", mac_address[i]); |
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125 | } |
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126 | } |
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127 | } |
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128 | |
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129 | |
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130 | void wl_set_print_level(u8 level) { |
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131 | |
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132 | switch(level) { |
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133 | case WL_PRINT_NONE: |
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134 | case WL_PRINT_ERROR: |
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135 | case WL_PRINT_WARNING: |
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136 | case WL_PRINT_INFO: |
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137 | case WL_PRINT_DEBUG: |
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138 | wl_print_level = level; |
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139 | break; |
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140 | |
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141 | default: |
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142 | xil_printf("Unsupported print level. Setting to WLAN_EXP_PRINT_ERROR.\n"); |
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143 | wl_print_level = WL_PRINT_ERROR; |
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144 | break; |
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145 | } |
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146 | } |
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147 | |
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148 | |
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149 | |
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150 | /***************************************************************************** |
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151 | * |
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152 | * Hardware initialization functions |
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153 | * |
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154 | *****************************************************************************/ |
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155 | |
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156 | /******************************************************************** |
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157 | * @brief Timer Initialization |
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158 | * |
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159 | * @param None |
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160 | * |
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161 | * @return int - Status of the command: |
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162 | * XST_SUCCESS - Initialization was successful |
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163 | * XST_DEVICE_IS_STARTED - The device has already been started |
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164 | * XST_DEVICE_NOT_FOUND - The device doesn't exist |
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165 | * |
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166 | ********************************************************************/ |
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167 | int wl_timer_initialize(){ |
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168 | int status = XST_SUCCESS; |
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169 | XTmrCtr *TmrCtrInstancePtr = &TimerCounter; |
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170 | XTmrCtr_Config *TmrCtrConfigPtr; |
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171 | |
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172 | // Initialize the timer counter |
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173 | status = XTmrCtr_Initialize(TmrCtrInstancePtr, TMRCTR_DEVICE_ID); |
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174 | |
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175 | if (status == XST_DEVICE_IS_STARTED) { |
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176 | wl_printf(WL_PRINT_INFO, print_type_node, "Timer was already running; clear/init manually\n"); |
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177 | |
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178 | TmrCtrConfigPtr = XTmrCtr_LookupConfig(TMRCTR_DEVICE_ID); |
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179 | |
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180 | TmrCtrInstancePtr->BaseAddress = TmrCtrConfigPtr->BaseAddress; |
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181 | TmrCtrInstancePtr->IsReady = XIL_COMPONENT_IS_READY; |
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182 | |
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183 | XTmrCtr_Stop(TmrCtrInstancePtr, 0); |
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184 | XTmrCtr_Reset(TmrCtrInstancePtr, 0); |
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185 | |
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186 | status = XTmrCtr_Initialize(TmrCtrInstancePtr, TMRCTR_DEVICE_ID); |
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187 | } |
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188 | |
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189 | if (status != XST_SUCCESS) { |
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190 | wl_printf(WL_PRINT_ERROR, print_type_node, "XtmrCtr_Initialize failed with status %d\n", status); |
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191 | } |
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192 | |
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193 | // Set timer 0 to into a "count down" mode |
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194 | XTmrCtr_SetOptions(TmrCtrInstancePtr, 0, (XTC_DOWN_COUNT_OPTION)); |
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195 | XTmrCtr_SetResetValue(TmrCtrInstancePtr, 1, 0); // Sets timer so issuing a "start" command begins at counter = 0 |
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196 | |
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197 | return status; |
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198 | } |
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199 | |
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200 | |
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201 | |
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202 | /***************************************************************************** |
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203 | * |
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204 | * Common functions |
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205 | * |
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206 | *****************************************************************************/ |
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207 | |
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208 | /******************************************************************** |
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209 | * Node Null Callbacks |
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210 | * |
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211 | * This function is part of the callback system for processing node commands. |
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212 | * If there are no additional node commands, then this will return appropriate values. |
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213 | * |
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214 | * @param void * param - Parameters for the callback |
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215 | * |
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216 | * @return int - Status of the command: |
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217 | * XST_SUCCESS - Command successful |
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218 | * |
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219 | ********************************************************************/ |
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220 | int wl_null_callback(void* param){ |
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221 | wl_printf(WL_PRINT_INFO, print_type_node, "WL NULL callback\n"); |
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222 | return XST_SUCCESS; |
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223 | } |
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224 | |
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225 | |
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226 | |
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227 | /******************************************************************** |
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228 | * @brief Set/Clear debug GPIO pins |
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229 | * |
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230 | * @param mask - u8 Bit mask to set / clear GPIO pins on the debug header |
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231 | * |
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232 | * @return None |
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233 | * |
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234 | ********************************************************************/ |
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235 | inline void wl_setDebugGPIO(u8 mask){ |
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236 | XGpio_DiscreteSet(&GPIO_debugpin, 1, mask); |
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237 | } |
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238 | |
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239 | inline void wl_clearDebugGPIO(u8 mask){ |
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240 | XGpio_DiscreteClear(&GPIO_debugpin, 1, mask); |
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241 | } |
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242 | |
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243 | |
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244 | |
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245 | /******************************************************************** |
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246 | * @brief Mapping of hexadecimal values to the 7-segment display |
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247 | * |
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248 | * @param hex_value - u8 Hexadecimal value to be converted (between 0 and 15) |
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249 | * |
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250 | * @return u8 - LED map value of the 7-segment display |
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251 | * |
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252 | ********************************************************************/ |
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253 | u8 sevenSegmentMap(u8 hex_value) { |
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254 | switch(hex_value) { |
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255 | case(0x0) : return 0x3F; |
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256 | case(0x1) : return 0x06; |
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257 | case(0x2) : return 0x5B; |
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258 | case(0x3) : return 0x4F; |
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259 | case(0x4) : return 0x66; |
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260 | case(0x5) : return 0x6D; |
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261 | case(0x6) : return 0x7D; |
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262 | case(0x7) : return 0x07; |
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263 | case(0x8) : return 0x7F; |
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264 | case(0x9) : return 0x6F; |
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265 | |
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266 | case(0xA) : return 0x77; |
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267 | case(0xB) : return 0x7C; |
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268 | case(0xC) : return 0x39; |
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269 | case(0xD) : return 0x5E; |
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270 | case(0xE) : return 0x79; |
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271 | case(0xF) : return 0x71; |
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272 | default : return 0x00; |
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273 | } |
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274 | } |
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275 | |
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276 | |
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277 | |
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278 | /******************************************************************** |
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279 | * @brief Pretty print a buffer of u8 |
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280 | * |
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281 | * @param buf - Pointer to u8 buffer to be printed |
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282 | * @param size - Number of bytes to be printed |
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283 | * |
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284 | * @return None |
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285 | * |
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286 | ********************************************************************/ |
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287 | void print_array_u8(u8 *buf, u32 size) { |
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288 | u32 i; |
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289 | for (i = 0; i < size; i++) { |
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290 | xil_printf("%2x ", buf[i]); |
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291 | if ( (((i + 1) % 16) == 0) && ((i + 1) != size) ) { |
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292 | xil_printf("\n"); |
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293 | } |
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294 | } |
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295 | xil_printf("\n\n"); |
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296 | } |
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297 | |
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298 | |
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299 | #if _MEASUREMENT_PRINT_ |
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300 | /******************************************************************** |
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301 | * @brief Pretty print a buffer of u32 formatted for measurement purposes |
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302 | * |
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303 | * @param buf - Pointer to u32 buffer to be printed |
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304 | * @param size - Number of u32 words to be printed |
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305 | * |
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306 | * @return None |
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307 | * |
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308 | ********************************************************************/ |
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309 | void print_array_u32(u32 *buf, u32 size) { |
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310 | u32 i; |
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311 | xil_printf("["); |
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312 | for (i = 0; i < size; i++) { |
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313 | xil_printf("0x%08x, ", buf[i]); |
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314 | if ( (((i + 1) % _MEASUREMENT_PRINT_WIDTH_ ) == 0) && ((i + 1) != size) ) { |
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315 | xil_printf("],\n["); |
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316 | } |
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317 | } |
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318 | xil_printf("]\n\n"); |
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319 | } |
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320 | |
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321 | |
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322 | #else |
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323 | |
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324 | |
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325 | /******************************************************************** |
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326 | * @brief Pretty print a buffer of u32 |
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327 | * |
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328 | * @param buf - Pointer to u32 buffer to be printed |
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329 | * @param size - Number of u32 words to be printed |
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330 | * |
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331 | * @return None |
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332 | * |
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333 | ********************************************************************/ |
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334 | void print_array_u32(u32 *buf, u32 size) { |
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335 | u32 i; |
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336 | for (i = 0; i < size; i++) { |
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337 | xil_printf("0x%08x ", buf[i]); |
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338 | if ( (((i + 1) % 4) == 0) && ((i + 1) != size) ) { |
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339 | xil_printf("\n"); |
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340 | } |
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341 | } |
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342 | xil_printf("\n\n"); |
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343 | } |
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344 | |
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345 | |
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346 | #endif |
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347 | |
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348 | |
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349 | /******************************************************************** |
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350 | * @brief Get Microsecond Counter Timestamp |
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351 | * |
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352 | * The Reference Design includes a 64-bit counter that increments with |
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353 | * every microsecond. This function returns this value. |
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354 | * |
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355 | * @param None |
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356 | * |
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357 | * @return u64 - Current number of microseconds that have elapsed since the hardware has booted. |
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358 | * |
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359 | ********************************************************************/ |
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360 | u64 get_usec_timestamp(){ |
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361 | u32 timestamp_high_u32; |
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362 | u32 timestamp_low_u32; |
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363 | u64 timestamp_u64; |
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364 | |
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365 | timestamp_high_u32 = wl_get_timer_64_MSB(); |
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366 | timestamp_low_u32 = wl_get_timer_64_LSB(); |
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367 | |
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368 | // Catch very rare race when 32-LSB of 64-bit value wraps between the two 32-bit reads |
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369 | if( (timestamp_high_u32 & 0x1) != (wl_get_timer_64_MSB() & 0x1) ) { |
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370 | // 32-LSB wrapped - start over |
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371 | timestamp_high_u32 = wl_get_timer_64_MSB(); |
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372 | timestamp_low_u32 = wl_get_timer_64_LSB(); |
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373 | } |
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374 | |
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375 | timestamp_u64 = (((u64)timestamp_high_u32) << 32) + ((u64)timestamp_low_u32); |
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376 | |
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377 | return timestamp_u64; |
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378 | } |
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379 | |
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380 | |
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381 | |
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382 | /**********************************************************************************************************************/ |
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383 | /** |
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384 | * @brief WARP v3 Specific Functions |
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385 | * |
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386 | **********************************************************************************************************************/ |
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387 | |
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388 | #ifdef WARP_HW_VER_v3 |
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389 | |
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390 | /***************************** Include Files *********************************/ |
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391 | |
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392 | #include "stdlib.h" |
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393 | #include "ctype.h" |
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394 | #include "stdarg.h" |
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395 | |
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396 | #include <xil_exception.h> |
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397 | |
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398 | #include <xintc.h> |
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399 | #include <xaxicdma.h> |
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400 | #include <xuartlite.h> |
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401 | |
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402 | #ifdef XPAR_XSYSMON_NUM_INSTANCES |
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403 | #include <xsysmon_hw.h> |
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404 | #endif |
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405 | |
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406 | |
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407 | /*************************** Constant Definitions ****************************/ |
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408 | |
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409 | // Peripheral defines |
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410 | #define DEBUG_GPIO_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID |
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411 | #define CDMA_DEVICE_ID XPAR_AXI_CDMA_0_DEVICE_ID |
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412 | #define UARTLITE_DEVICE_ID XPAR_UARTLITE_0_DEVICE_ID |
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413 | #define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID |
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414 | |
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415 | // UART defines |
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416 | #define UARTLITE_INTERRUPT_ID XPAR_INTC_0_UARTLITE_0_VEC_ID |
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417 | #define UART_BUFFER_SIZE 1 ///< UART is configured to read 1 byte at a time |
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418 | |
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419 | // CDMA defines |
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420 | #define CDMA_ALIGNMENT 0x10 |
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421 | #define CDMA_ALIGNMENT_MASK 0xFFFFFFF0 |
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422 | |
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423 | |
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424 | /*********************** Global Variable Definitions *************************/ |
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425 | |
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426 | /*************************** Variable Definitions ****************************/ |
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427 | |
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428 | // Peripherals |
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429 | XAxiCdma cdma_inst; ///< Instance of the CDMA device |
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430 | static XIntc InterruptController; ///< Interrupt Controller instance |
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431 | static XUartLite UartLite; ///< UART Device instance |
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432 | |
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433 | // UART interface |
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434 | u8 uart_rx_buffer[UART_BUFFER_SIZE]; ///< Buffer for received byte from UART |
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435 | volatile wl_function_ptr_t uart_callback; ///< User callback for UART reception |
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436 | |
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437 | // Interrupt State |
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438 | volatile static interrupt_state_t interrupt_state; |
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439 | |
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440 | |
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441 | /*************************** Functions Prototypes ****************************/ |
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442 | |
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443 | void wl_uart_rx_handler(void* CallBackRef, unsigned int EventData); |
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444 | |
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445 | |
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446 | |
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447 | /******************************** Functions **********************************/ |
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448 | |
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449 | |
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450 | /******************************************************************** |
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451 | * @brief Debug GPIO Initialization |
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452 | * |
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453 | * @param None |
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454 | * |
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455 | * @return None |
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456 | * |
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457 | ********************************************************************/ |
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458 | void wl_gpio_debug_initialize(){ |
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459 | XGpio_Initialize(&GPIO_debugpin, DEBUG_GPIO_DEVICE_ID); |
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460 | XGpio_DiscreteClear(&GPIO_debugpin, 1, 0xFF); |
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461 | } |
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462 | |
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463 | |
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464 | /******************************************************************** |
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465 | * @brief System Monitor Initialization |
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466 | * |
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467 | * @param None |
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468 | * |
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469 | * @return None |
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470 | * |
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471 | ********************************************************************/ |
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472 | void wl_sysmon_initialize(){ |
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473 | |
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474 | #ifdef XPAR_XSYSMON_NUM_INSTANCES |
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475 | u32 RegValue; |
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476 | |
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477 | // Reset the device. |
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478 | XSysMon_WriteReg(SYSMON_BASEADDR, XSM_SRR_OFFSET, XSM_SRR_IPRST_MASK); |
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479 | |
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480 | // Disable the Channel Sequencer before configuring the Sequence registers. |
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481 | RegValue = XSysMon_ReadReg(SYSMON_BASEADDR, XSM_CFR1_OFFSET) & (~ XSM_CFR1_SEQ_VALID_MASK); |
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482 | XSysMon_WriteReg(SYSMON_BASEADDR, XSM_CFR1_OFFSET, RegValue | XSM_CFR1_SEQ_SINGCHAN_MASK); |
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483 | |
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484 | // Setup the Averaging to be done for the channels in the Configuration 0 register as 16 samples |
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485 | RegValue = XSysMon_ReadReg(SYSMON_BASEADDR, XSM_CFR0_OFFSET) & (~XSM_CFR0_AVG_VALID_MASK); |
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486 | XSysMon_WriteReg(SYSMON_BASEADDR, XSM_CFR0_OFFSET, RegValue | XSM_CFR0_AVG16_MASK); |
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487 | |
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488 | // Enable the averaging on the following channels in the Sequencer registers: |
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489 | // - On-chip Temperature |
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490 | // - On-chip VCCAUX supply sensor |
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491 | XSysMon_WriteReg(SYSMON_BASEADDR, XSM_SEQ02_OFFSET, XSM_SEQ_CH_TEMP | XSM_SEQ_CH_VCCAUX); |
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492 | |
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493 | // Enable the following channels in the Sequencer registers: |
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494 | // - On-chip Temperature |
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495 | // - On-chip VCCAUX supply sensor |
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496 | XSysMon_WriteReg(SYSMON_BASEADDR, XSM_SEQ00_OFFSET, XSM_SEQ_CH_TEMP | XSM_SEQ_CH_VCCAUX); |
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497 | |
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498 | // Set the ADCCLK frequency equal to 1/32 of System clock for the System |
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499 | // Monitor/ADC in the Configuration Register 2. |
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500 | XSysMon_WriteReg(SYSMON_BASEADDR, XSM_CFR2_OFFSET, 32 << XSM_CFR2_CD_SHIFT); |
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501 | |
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502 | // Enable the Channel Sequencer in continuous sequencer cycling mode. |
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503 | RegValue = XSysMon_ReadReg(SYSMON_BASEADDR, XSM_CFR1_OFFSET) & (~ XSM_CFR1_SEQ_VALID_MASK); |
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504 | XSysMon_WriteReg(SYSMON_BASEADDR, XSM_CFR1_OFFSET, RegValue | XSM_CFR1_SEQ_CONTINPASS_MASK); |
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505 | |
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506 | // Wait till the End of Sequence occurs |
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507 | XSysMon_ReadReg(SYSMON_BASEADDR, XSM_SR_OFFSET); /* Clear the old status */ |
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508 | while (((XSysMon_ReadReg(SYSMON_BASEADDR, XSM_SR_OFFSET)) & |
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509 | XSM_SR_EOS_MASK) != XSM_SR_EOS_MASK); |
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510 | |
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511 | #endif |
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512 | |
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513 | } |
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514 | |
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515 | |
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516 | /******************************************************************** |
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517 | * @brief Central DMA Initialization |
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518 | * |
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519 | * @param None |
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520 | * |
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521 | * @return int - Status of the command: |
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522 | * XST_SUCCESS - Initialization was successful |
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523 | * XST_DEVICE_IS_STARTED - The device has already been started |
---|
524 | * XST_DEVICE_NOT_FOUND - The device doesn't exist |
---|
525 | * |
---|
526 | ********************************************************************/ |
---|
527 | int wl_cdma_initialize(){ |
---|
528 | int status = XST_SUCCESS; |
---|
529 | XAxiCdma_Config *cdma_cfg_ptr; |
---|
530 | |
---|
531 | cdma_cfg_ptr = XAxiCdma_LookupConfig(CDMA_DEVICE_ID); |
---|
532 | |
---|
533 | status = XAxiCdma_CfgInitialize(&cdma_inst, cdma_cfg_ptr, cdma_cfg_ptr->BaseAddress); |
---|
534 | |
---|
535 | if (status != XST_SUCCESS) { |
---|
536 | wl_printf(WL_PRINT_ERROR, print_type_node, "CDMA initialization failed with status: %d\n", status ); |
---|
537 | return XST_FAILURE; |
---|
538 | } |
---|
539 | |
---|
540 | XAxiCdma_IntrDisable(&cdma_inst, XAXICDMA_XR_IRQ_ALL_MASK); |
---|
541 | |
---|
542 | return status; |
---|
543 | } |
---|
544 | |
---|
545 | |
---|
546 | |
---|
547 | /******************************************************************** |
---|
548 | * @brief UART Initialization |
---|
549 | * |
---|
550 | * @param None |
---|
551 | * |
---|
552 | * @return int - Status of the command: |
---|
553 | * XST_SUCCESS - Initialization was successful |
---|
554 | * XST_DEVICE_IS_STARTED - The device has already been started |
---|
555 | * XST_DEVICE_NOT_FOUND - The device doesn't exist |
---|
556 | * |
---|
557 | ********************************************************************/ |
---|
558 | int wl_uart_initialize(){ |
---|
559 | int status = XST_SUCCESS; |
---|
560 | |
---|
561 | status = XUartLite_Initialize(&UartLite, UARTLITE_DEVICE_ID); |
---|
562 | |
---|
563 | if (status != XST_SUCCESS) { |
---|
564 | wl_printf(WL_PRINT_ERROR, print_type_node, "UART initialization failed with status: %d\n", status); |
---|
565 | return XST_FAILURE; |
---|
566 | } |
---|
567 | |
---|
568 | uart_callback = (wl_function_ptr_t)wl_null_callback; |
---|
569 | |
---|
570 | return status; |
---|
571 | } |
---|
572 | |
---|
573 | |
---|
574 | /******************************************************************** |
---|
575 | * @brief Use CDMA to transfer data from source address to destination address |
---|
576 | * |
---|
577 | * @param src_address - Source address (u32) of the transfer |
---|
578 | * @param dest_address - Destination address (u32) of the transfer |
---|
579 | * @param length - Length of the transfer in bytes |
---|
580 | * |
---|
581 | * @return None |
---|
582 | * |
---|
583 | * @note The CDMA is 128 bits and contains no data re-alignment engine |
---|
584 | * (limitation of the IP). Therefore, we can only perform 16 byte aligned |
---|
585 | * transfers without issue. If the transfer was unaligned, we will issue |
---|
586 | * a warning since this call can be in timing critical loops. |
---|
587 | * |
---|
588 | * @note This function does not wait for a DMA transfer to complete once it |
---|
589 | * has been issued. This allows the CPU to pipeline instructions while the |
---|
590 | * DMA is transferring data. However, this function will wait for the DMA |
---|
591 | * to be ready if it is currently in use. |
---|
592 | * |
---|
593 | ********************************************************************/ |
---|
594 | void wl_cdma_transfer(u32 src_address, u32 dest_address, u32 length){ |
---|
595 | |
---|
596 | // This code assumes all transfers are 16 byte aligned |
---|
597 | |
---|
598 | // Check if there was an error in the previous transfer and reset the DMA |
---|
599 | if ( XAxiCdma_GetError(&cdma_inst) != 0x0 ) { |
---|
600 | wl_printf(WL_PRINT_ERROR, print_type_node, "DMA transfer prior to %d bytes from 0x%08x to 0x%08x failed.\nResetting DMA ... \n\n", length, src_address, dest_address); |
---|
601 | XAxiCdma_Reset(&cdma_inst); |
---|
602 | while(!XAxiCdma_ResetIsDone(&cdma_inst)) {} |
---|
603 | } |
---|
604 | |
---|
605 | // Wait for the DMA to be ready before issuing a new transfer |
---|
606 | while(XAxiCdma_IsBusy(&cdma_inst)) {} |
---|
607 | XAxiCdma_SimpleTransfer(&cdma_inst, src_address, dest_address, length, NULL, NULL); |
---|
608 | |
---|
609 | // Issue a warning if the transfer was unaligned |
---|
610 | if (((src_address & CDMA_ALIGNMENT_MASK) != src_address ) || |
---|
611 | ((dest_address & CDMA_ALIGNMENT_MASK) != dest_address)) { |
---|
612 | wl_printf(WL_PRINT_ERROR, print_type_node, "DMA transfer not %d byte aligned: %d bytes from 0x%08x to 0x%08x.\n", CDMA_ALIGNMENT, length, src_address, dest_address); |
---|
613 | } |
---|
614 | } |
---|
615 | |
---|
616 | int wl_cdma_busy() { |
---|
617 | return XAxiCdma_IsBusy(&cdma_inst); |
---|
618 | } |
---|
619 | |
---|
620 | |
---|
621 | /******************************************************************** |
---|
622 | * @brief Initialize WARPLab Interrupts |
---|
623 | * |
---|
624 | * This function initializes sets up the interrupt subsystem of WARPLab. |
---|
625 | * |
---|
626 | * @param None |
---|
627 | * |
---|
628 | * @return int - Status of the command: |
---|
629 | * XST_SUCCESS - Initialization was successful |
---|
630 | * XST_DEVICE_IS_STARTED - The device has already been started |
---|
631 | * XST_DEVICE_NOT_FOUND - The device doesn't exist |
---|
632 | * XST_FAILURE - Initialization of an interrupt was not successful |
---|
633 | * |
---|
634 | ********************************************************************/ |
---|
635 | int wl_interrupt_init(){ |
---|
636 | int Result; |
---|
637 | |
---|
638 | // Set interrupt state |
---|
639 | interrupt_state = INTERRUPTS_DISABLED; |
---|
640 | |
---|
641 | |
---|
642 | // *************************************************** |
---|
643 | // Initialize XIntc |
---|
644 | // *************************************************** |
---|
645 | Result = XIntc_Initialize(&InterruptController, INTC_DEVICE_ID); |
---|
646 | if (Result != XST_SUCCESS) { |
---|
647 | return Result; |
---|
648 | } |
---|
649 | |
---|
650 | // *************************************************** |
---|
651 | // Connect interrupt devices |
---|
652 | // *************************************************** |
---|
653 | Result = XIntc_Connect(&InterruptController, UARTLITE_INTERRUPT_ID, (XInterruptHandler)XUartLite_InterruptHandler, &UartLite); |
---|
654 | if (Result != XST_SUCCESS) { |
---|
655 | wl_printf(WL_PRINT_ERROR, print_type_node, "Failed to connect XUartLite to XIntc\n"); |
---|
656 | return Result; |
---|
657 | } |
---|
658 | XIntc_Enable(&InterruptController, UARTLITE_INTERRUPT_ID); |
---|
659 | XUartLite_SetRecvHandler(&UartLite, wl_uart_rx_handler, &UartLite); |
---|
660 | XUartLite_EnableInterrupt(&UartLite); |
---|
661 | |
---|
662 | |
---|
663 | Result = wl_baseband_setup_interrupt(&InterruptController); |
---|
664 | if (Result != XST_SUCCESS) { |
---|
665 | wl_printf(WL_PRINT_ERROR, print_type_node, "Failed to set up baseband interrupt\n"); |
---|
666 | return XST_FAILURE; |
---|
667 | } |
---|
668 | |
---|
669 | // *************************************************** |
---|
670 | // Enable MicroBlaze exceptions |
---|
671 | // *************************************************** |
---|
672 | Xil_ExceptionInit(); |
---|
673 | Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,(Xil_ExceptionHandler)XIntc_InterruptHandler, &InterruptController); |
---|
674 | Xil_ExceptionEnable(); |
---|
675 | |
---|
676 | // Finish setting up any subsystems that were waiting on interrupts to be configured |
---|
677 | // - None at this time |
---|
678 | |
---|
679 | return XST_SUCCESS; |
---|
680 | } |
---|
681 | |
---|
682 | |
---|
683 | /******************************************************************** |
---|
684 | * @brief Restore the state of the interrupt controller |
---|
685 | * |
---|
686 | * This function will restore the state of the interrupt controller to the value |
---|
687 | * specified by the "new_interrupt_state" argument. This behavior allows this |
---|
688 | * function to be used with wl_interrupt_stop() to wrap code that is not interrupt |
---|
689 | * safe and not worry about the current state of the interrupt controller. |
---|
690 | * |
---|
691 | * @param new_interrupt_state - State to return interrupts. Typically, this argument |
---|
692 | * is the output of a previous call to wl_interrupt_stop() |
---|
693 | * |
---|
694 | * @return int - Status of the command: |
---|
695 | * XST_SUCCESS - Command successful |
---|
696 | * XST_FAILURE - Command not successful |
---|
697 | * |
---|
698 | ********************************************************************/ |
---|
699 | inline int wl_interrupt_restore_state(interrupt_state_t new_interrupt_state){ |
---|
700 | interrupt_state = new_interrupt_state; |
---|
701 | |
---|
702 | // Enable the interrupts based on the new interrupt state |
---|
703 | if(interrupt_state == INTERRUPTS_ENABLED){ |
---|
704 | if(InterruptController.IsReady && InterruptController.IsStarted == 0){ |
---|
705 | return XIntc_Start(&InterruptController, XIN_REAL_MODE); |
---|
706 | } else { |
---|
707 | return XST_FAILURE; |
---|
708 | } |
---|
709 | } else { |
---|
710 | return XST_SUCCESS; |
---|
711 | } |
---|
712 | } |
---|
713 | |
---|
714 | |
---|
715 | /******************************************************************** |
---|
716 | * @brief Stop the interrupt controller |
---|
717 | * |
---|
718 | * This function stops the interrupt controller, effectively pausing interrupts and returns |
---|
719 | * the current state of the interrupts (ie whether the interrupts were currently enabled or |
---|
720 | * disabled). This can then be used along with wl_interrupt_restore_state() to wrap code |
---|
721 | * that is not interrupt-safe. |
---|
722 | * |
---|
723 | * @param None |
---|
724 | * |
---|
725 | * @return interrupt_state_t - Current state of interrupts (when function was called): |
---|
726 | * INTERRUPTS_ENABLED - Interrupts were enabled |
---|
727 | * INTERRUPTS_DISABLED - Interrupts were disabled |
---|
728 | * |
---|
729 | * @note Interrupts that occur while the interrupt controller is off will be executed once |
---|
730 | * it is turned back on. They will not be "lost" as the interrupt inputs to the controller |
---|
731 | * will remain high. |
---|
732 | * |
---|
733 | ********************************************************************/ |
---|
734 | inline interrupt_state_t wl_interrupt_stop(){ |
---|
735 | interrupt_state_t curr_state = interrupt_state; // Save current interrupt state |
---|
736 | |
---|
737 | if(InterruptController.IsReady && InterruptController.IsStarted) XIntc_Stop(&InterruptController); |
---|
738 | interrupt_state = INTERRUPTS_DISABLED; // Set current interrupt state to "Disabled" |
---|
739 | |
---|
740 | return curr_state; |
---|
741 | } |
---|
742 | |
---|
743 | |
---|
744 | /******************************************************************** |
---|
745 | * @brief UART Receive Interrupt Handler |
---|
746 | * |
---|
747 | * This function is the interrupt handler for UART receptions. It, in turn, |
---|
748 | * will execute a callback that the user has previously registered. |
---|
749 | * |
---|
750 | * @param CallBackRef - Argument supplied by the XUartLite driver. Unused in this application. |
---|
751 | * @param EventData - Argument supplied by the XUartLite driver. Unused in this application. |
---|
752 | * |
---|
753 | * @return None |
---|
754 | * |
---|
755 | * @see wl_set_uart_rx_callback() |
---|
756 | * |
---|
757 | ********************************************************************/ |
---|
758 | void wl_uart_rx_handler(void* CallBackRef, unsigned int EventData){ |
---|
759 | XUartLite_Recv(&UartLite, uart_rx_buffer, UART_BUFFER_SIZE); |
---|
760 | uart_callback(uart_rx_buffer[0]); |
---|
761 | } |
---|
762 | |
---|
763 | |
---|
764 | /******************************************************************** |
---|
765 | * @brief Set UART Reception Callback |
---|
766 | * |
---|
767 | * Tells the framework which function should be called when a byte is received from UART. |
---|
768 | * |
---|
769 | * @param callback - Pointer to callback function |
---|
770 | * |
---|
771 | * @return None |
---|
772 | * |
---|
773 | ********************************************************************/ |
---|
774 | void wl_set_uart_rx_callback(wl_function_ptr_t callback){ |
---|
775 | uart_callback = callback; |
---|
776 | } |
---|
777 | |
---|
778 | |
---|
779 | /******************************************************************** |
---|
780 | * @brief Microsecond sleep counter |
---|
781 | * |
---|
782 | * @param duration - Duration in microseconds to sleep |
---|
783 | * |
---|
784 | * @return None |
---|
785 | * |
---|
786 | * @note For WARP v3, you cannot use usleep until wl_timer_initialize() has been called |
---|
787 | * |
---|
788 | ********************************************************************/ |
---|
789 | void usleep(u32 duration){ |
---|
790 | XTmrCtr *TmrCtrInstancePtr = &TimerCounter; |
---|
791 | volatile u8 isExpired = 0; |
---|
792 | |
---|
793 | XTmrCtr_SetResetValue(TmrCtrInstancePtr, 0, (duration * (TIMER_FREQ/1000000))); |
---|
794 | XTmrCtr_Start(TmrCtrInstancePtr, 0); |
---|
795 | |
---|
796 | while(isExpired != 1){ |
---|
797 | isExpired = XTmrCtr_IsExpired(TmrCtrInstancePtr, 0); |
---|
798 | } |
---|
799 | |
---|
800 | XTmrCtr_Reset(TmrCtrInstancePtr, 0); |
---|
801 | } |
---|
802 | |
---|
803 | |
---|
804 | /******************************************************************** |
---|
805 | * @brief Test Right Shift Operator |
---|
806 | * |
---|
807 | * This function tests the compiler right shift operator. This is due to a bug in |
---|
808 | * the Xilinx 14.7 toolchain when the '-Os' flag is used during compilation. Please |
---|
809 | * see: http://warpproject.org/forums/viewtopic.php?id=2472 for more information. |
---|
810 | * |
---|
811 | * @param None |
---|
812 | * |
---|
813 | * @return int - Status of the command: |
---|
814 | * XST_SUCCESS - Command successful |
---|
815 | * XST_FAILURE - Command not successful |
---|
816 | * |
---|
817 | ********************************************************************/ |
---|
818 | u32 right_shift_test = 0xFEDCBA98; |
---|
819 | |
---|
820 | int microblaze_right_shift_test() { |
---|
821 | u8 val_3, val_2, val_1, val_0; |
---|
822 | |
---|
823 | u32 test_val = right_shift_test; |
---|
824 | u8 *test_array = (u8 *)&right_shift_test; |
---|
825 | |
---|
826 | val_3 = (u8)((test_val & 0xFF000000) >> 24); |
---|
827 | val_2 = (u8)((test_val & 0x00FF0000) >> 16); |
---|
828 | val_1 = (u8)((test_val & 0x0000FF00) >> 8); |
---|
829 | val_0 = (u8)((test_val & 0x000000FF) >> 0); |
---|
830 | |
---|
831 | if ((val_3 != test_array[3]) || (val_2 != test_array[2]) || (val_1 != test_array[1]) || (val_0 != test_array[0])) { |
---|
832 | xil_printf("Right shift operator is not operating correctly in this toolchain.\n"); |
---|
833 | xil_printf("Please use Xilinx 14.4 or an optimization level other than '-Os'\n"); |
---|
834 | xil_printf("See http://warpproject.org/forums/viewtopic.php?id=2472 for more info.\n"); |
---|
835 | return XST_FAILURE; |
---|
836 | } |
---|
837 | |
---|
838 | return XST_SUCCESS; |
---|
839 | } |
---|
840 | |
---|
841 | |
---|
842 | /******************************************************************** |
---|
843 | * @brief Test DDR3 SODIMM Memory Module |
---|
844 | * |
---|
845 | * This function tests the integrity of the DDR3 SODIMM module attached to the hardware |
---|
846 | * by performing various write and read tests. Note, this function will destroy contents |
---|
847 | * in DRAM, so it should only be called immediately after booting. |
---|
848 | * |
---|
849 | * @param None |
---|
850 | * |
---|
851 | * @return int - Status of the command: |
---|
852 | * XST_SUCCESS - Command successful |
---|
853 | * XST_FAILURE - Command not successful |
---|
854 | * |
---|
855 | ********************************************************************/ |
---|
856 | int ddr_sodim_memory_test(){ |
---|
857 | u32 status = XST_SUCCESS; |
---|
858 | |
---|
859 | // Test num_test_points of the DDR evenly over the DDR range |
---|
860 | u32 num_test_points = 8; |
---|
861 | u32 ddr_test_step = (DDR_SIZE / num_test_points); |
---|
862 | |
---|
863 | // Delay to make sure data is written completely to the DDR |
---|
864 | u32 readback_delay_usec = 10000; |
---|
865 | |
---|
866 | // Memory variables |
---|
867 | volatile u8 i,j; |
---|
868 | |
---|
869 | volatile u8 test_u8; |
---|
870 | volatile u16 test_u16; |
---|
871 | volatile u32 test_u32; |
---|
872 | volatile u64 test_u64; |
---|
873 | |
---|
874 | volatile u8 readback_u8; |
---|
875 | volatile u16 readback_u16; |
---|
876 | volatile u32 readback_u32; |
---|
877 | volatile u64 readback_u64; |
---|
878 | |
---|
879 | volatile void* memory_ptr; |
---|
880 | |
---|
881 | for(i = 0; i < num_test_points; i++){ |
---|
882 | memory_ptr = (void*)((u8*)DRAM_BASEADDR + (i*ddr_test_step)); |
---|
883 | |
---|
884 | for(j = 0; j < 3; j++){ |
---|
885 | // Test 1 byte offsets to make sure byte enables are all working |
---|
886 | test_u8 = rand() & 0xFF; |
---|
887 | test_u16 = rand() & 0xFFFF; |
---|
888 | test_u32 = rand() & 0xFFFFFFFF; |
---|
889 | test_u64 = (((u64)rand() & 0xFFFFFFFF) << 32) + ((u64)rand() & 0xFFFFFFFF); |
---|
890 | |
---|
891 | // u8 Test |
---|
892 | *((u8*)memory_ptr) = test_u8; |
---|
893 | usleep(readback_delay_usec); |
---|
894 | readback_u8 = *((u8*)memory_ptr); |
---|
895 | |
---|
896 | if(readback_u8 != test_u8){ |
---|
897 | wl_printf(WL_PRINT_ERROR, print_type_node, "0x%08x: %02x != %02x\n", memory_ptr, readback_u8, test_u8); |
---|
898 | wl_printf(WL_PRINT_ERROR, print_type_node, "DRAM Failure: Addr: 0x%08x -- Unable to verify write of u8\n", memory_ptr); |
---|
899 | return XST_FAILURE; |
---|
900 | } |
---|
901 | |
---|
902 | // u16 Test |
---|
903 | *((u16*)memory_ptr) = test_u16; |
---|
904 | usleep(readback_delay_usec); |
---|
905 | readback_u16 = *((u16*)memory_ptr); |
---|
906 | |
---|
907 | if(readback_u16 != test_u16){ |
---|
908 | wl_printf(WL_PRINT_ERROR, print_type_node, "0x%08x: %04x != %04x\n", memory_ptr, readback_u16, test_u16); |
---|
909 | wl_printf(WL_PRINT_ERROR, print_type_node, "DRAM Failure: Addr: 0x%08x -- Unable to verify write of u16\n", memory_ptr); |
---|
910 | return XST_FAILURE; |
---|
911 | } |
---|
912 | |
---|
913 | // u32 Test |
---|
914 | *((u32*)memory_ptr) = test_u32; |
---|
915 | usleep(readback_delay_usec); |
---|
916 | readback_u32 = *((u32*)memory_ptr); |
---|
917 | |
---|
918 | if(readback_u32 != test_u32){ |
---|
919 | wl_printf(WL_PRINT_ERROR, print_type_node, "0x%08x: %08x != %08x\n", memory_ptr, readback_u32, test_u32); |
---|
920 | wl_printf(WL_PRINT_ERROR, print_type_node, "DRAM Failure: Addr: 0x%08x -- Unable to verify write of u32\n", memory_ptr); |
---|
921 | return XST_FAILURE; |
---|
922 | } |
---|
923 | |
---|
924 | // u64 Test |
---|
925 | *((u64*)memory_ptr) = test_u64; |
---|
926 | usleep(readback_delay_usec); |
---|
927 | readback_u64 = *((u64*)memory_ptr); |
---|
928 | |
---|
929 | if(readback_u64 != test_u64){ |
---|
930 | wl_printf(WL_PRINT_ERROR, print_type_node, "0x%08x: %08x%08x != %08x%08x\n", memory_ptr, |
---|
931 | (u32)(readback_u64 >> 32), (u32)readback_u64, (u32)(test_u64 >> 32), (u32)test_u64); |
---|
932 | wl_printf(WL_PRINT_ERROR, print_type_node, "DRAM Failure: Addr: 0x%08x -- Unable to verify write of u64\n", memory_ptr); |
---|
933 | return XST_FAILURE; |
---|
934 | } |
---|
935 | |
---|
936 | memory_ptr++; |
---|
937 | } |
---|
938 | } |
---|
939 | |
---|
940 | return status; |
---|
941 | } |
---|
942 | |
---|
943 | |
---|
944 | /******************************************************************** |
---|
945 | * @brief Clear DDR3 SODIMM Memory Module |
---|
946 | * |
---|
947 | * This function will clear the contents of the DDR |
---|
948 | * |
---|
949 | * @param verbose - Print information on time to clear the DDR |
---|
950 | * |
---|
951 | * @return None |
---|
952 | * |
---|
953 | ********************************************************************/ |
---|
954 | void clear_ddr(u32 verbose) { |
---|
955 | u32 i; |
---|
956 | u64 num_step; |
---|
957 | u64 step_size; |
---|
958 | |
---|
959 | u64 start_time; |
---|
960 | u64 end_time; |
---|
961 | u32 processing_time; |
---|
962 | |
---|
963 | u32 start_address = DRAM_BASEADDR; |
---|
964 | u64 size = DDR_SIZE; |
---|
965 | |
---|
966 | start_time = get_usec_timestamp(); |
---|
967 | |
---|
968 | #if 0 |
---|
969 | // Implementation 1: |
---|
970 | // Use CPU to bzero the entire DDR (approx 84769092 usec) |
---|
971 | bzero((void *)start_address, size); |
---|
972 | #endif |
---|
973 | |
---|
974 | #if 1 |
---|
975 | // Implementation 2: |
---|
976 | // Use CPU to bzero the first block of DDR |
---|
977 | // Use the DMA to zero out the rest of the DDR |
---|
978 | // |
---|
979 | // For num_step (all times approx): |
---|
980 | // 2^10 --> 1149215 usec |
---|
981 | // 2^11 --> 1107146 usec |
---|
982 | // 2^12 --> 1089062 usec |
---|
983 | // 2^13 --> 1082326 usec |
---|
984 | // 2^14 --> 1080768 usec <-- Minimum |
---|
985 | // 2^15 --> 1093902 usec |
---|
986 | // 2^16 --> 1150738 usec |
---|
987 | // 2^17 --> 1265897 usec |
---|
988 | // |
---|
989 | num_step = 1 << 14; |
---|
990 | step_size = size / num_step; |
---|
991 | |
---|
992 | bzero((void *)start_address, step_size); |
---|
993 | |
---|
994 | for (i = 1; i < num_step; i++) { |
---|
995 | wl_cdma_transfer(start_address, (start_address + (step_size * i)), step_size); |
---|
996 | } |
---|
997 | #endif |
---|
998 | |
---|
999 | end_time = get_usec_timestamp(); |
---|
1000 | processing_time = (end_time - start_time) & 0xFFFFFFFF; |
---|
1001 | |
---|
1002 | if (verbose == WL_VERBOSE) { |
---|
1003 | wl_printf(WL_PRINT_NONE, NULL, " Contents cleared in %d (usec)\n", processing_time); |
---|
1004 | } |
---|
1005 | } |
---|
1006 | |
---|
1007 | #endif |
---|
1008 | |
---|
1009 | |
---|
1010 | |
---|
1011 | /**********************************************************************************************************************/ |
---|
1012 | /** |
---|
1013 | * @brief Debug Functions |
---|
1014 | * |
---|
1015 | **********************************************************************************************************************/ |
---|
1016 | |
---|
1017 | |
---|
1018 | /***************************************************************************** |
---|
1019 | * |
---|
1020 | * Non-Invasive Debug functions |
---|
1021 | * |
---|
1022 | *****************************************************************************/ |
---|
1023 | |
---|
1024 | /******************************************************************** |
---|
1025 | * @brief Add value to debug storage |
---|
1026 | * |
---|
1027 | * @param value - Value (u32) to add to debug storage |
---|
1028 | * @param enable - Should the value be added to the debug storage |
---|
1029 | * |
---|
1030 | * @return None |
---|
1031 | * |
---|
1032 | ********************************************************************/ |
---|
1033 | void add_to_debug_storage(u32 value, u32 enable) { |
---|
1034 | #if _DEBUG_STORAGE_ |
---|
1035 | if ((enable) && (storage_index < _DEBUG_STORAGE_SIZE_)) { |
---|
1036 | debug_storage[storage_index++] = value; |
---|
1037 | } |
---|
1038 | #endif |
---|
1039 | } |
---|
1040 | |
---|
1041 | |
---|
1042 | /******************************************************************** |
---|
1043 | * @brief Remove elements from the debug storage |
---|
1044 | * |
---|
1045 | * @param num_elements - Number of elements to remove from debug storage |
---|
1046 | * |
---|
1047 | * @return None |
---|
1048 | * |
---|
1049 | ********************************************************************/ |
---|
1050 | void remove_from_debug_storage(u32 num_elements, u32 enable) { |
---|
1051 | #if _DEBUG_STORAGE_ |
---|
1052 | if (enable) { |
---|
1053 | if (num_elements > storage_index) { |
---|
1054 | storage_index = 0; |
---|
1055 | } else { |
---|
1056 | storage_index -= num_elements; |
---|
1057 | } |
---|
1058 | } |
---|
1059 | #endif |
---|
1060 | } |
---|
1061 | |
---|
1062 | |
---|
1063 | /******************************************************************** |
---|
1064 | * @brief Reset the debug storage |
---|
1065 | * |
---|
1066 | * @param None |
---|
1067 | * |
---|
1068 | * @return None |
---|
1069 | * |
---|
1070 | ********************************************************************/ |
---|
1071 | void reset_debug_storage() { |
---|
1072 | #if _DEBUG_STORAGE_ |
---|
1073 | storage_index = 0; |
---|
1074 | wl_printf(WL_PRINT_NONE, NULL, "Cleared Debug Storage.\n"); |
---|
1075 | #endif |
---|
1076 | } |
---|
1077 | |
---|
1078 | |
---|
1079 | /******************************************************************** |
---|
1080 | * @brief Print the debug storage |
---|
1081 | * |
---|
1082 | * @param None |
---|
1083 | * |
---|
1084 | * @return None |
---|
1085 | * |
---|
1086 | ********************************************************************/ |
---|
1087 | void print_debug_storage() { |
---|
1088 | #if _DEBUG_STORAGE_ |
---|
1089 | print_array_u32(debug_storage, storage_index); |
---|
1090 | #else |
---|
1091 | wl_printf(WL_PRINT_NONE, NULL, "Debug storage not enabled.\n"); |
---|
1092 | #endif |
---|
1093 | } |
---|
1094 | |
---|
1095 | |
---|