Last change
on this file was
4469,
checked in by welsh, 9 years ago
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Version 1.04.b - Increased available AGC delay to (216 - 1) cycles.
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File size:
755 bytes
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1 | README |
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2 | |
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3 | This Trigger Manager core was taken from the WARP v3 WARPLab 7.5.1 release. This is straight |
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4 | copy of the w3 Trigger manager, renamed for the WARP v2 hardware, except for the following modifications: |
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5 | |
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6 | - Updated Model properties to reference w2_warplab_trigger_proc_init.m |
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7 | - Removed CM-PLL support (both on debug inputs and outputs) |
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8 | - Removed ETH A HW trigger support and all of ETH B trigger support, since it is not supported by the WARP v2 hardware |
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9 | - Updated EDK processor block to use PLB bus and removed Ethernet Trigger registers |
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10 | - Added pulse extender to the AGC trigger output since AGC runs at a slower clock speed |
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11 | - i.e. The AGC core runs at 80 MHz in WARP v2 due to timing issues vs 160 MHz in WARP v3 |
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