Model {
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  StartFcn		  "w2_warplab_buffers_init"
  Created		  "Wed Jan 07 15:32:06 2009"
  Creator		  "mduarte"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "mango"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Tue Feb 24 13:38:40 2015"
  RTWModifiedTimeStamp	  346685909
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      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      DataTypeOverrideAppliesTo	"AllNumericTypes"
      MinMaxOverflowLogging   "UseLocalSettings"
      Variant		      off
      GeneratePreprocessorConditionals off
    }
    Block {
      BlockType		      Terminator
    }
  }
  System {
    Name		    "w2_warplab_buffers"
    Location		    [222, 165, 2385, 1251]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    SIDHighWatermark	    "4908"
    Block {
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      SID		      "2"
      Ports		      [2, 1]
      Position		      [360, 812, 400, 868]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Logical"
      SourceType	      "Xilinx Logical Block Block"
      logical_function	      "OR"
      inputs		      "2"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "0"
      align_bp		      on
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "logical"
      block_version	      "9.1.01"
      sg_icon_stat	      "40,56,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 56 56 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 56 56 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[33.55 3"
      "3.55 38.55 33.55 38.55 38.55 38.55 33.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[28.55 28.55 33.55"
      " 33.55 28.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[23.55 23.55 28.55 28.55 23.55 ],[1"
      " 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 18.55 23.55 23.55 18.55 ],[0.931 0"
      ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor("
      "'black');disp('or');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      " 2"
      SID		      "4698"
      Ports		      [4, 1]
      Position		      [390, 1179, 430, 1236]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Logical"
      SourceType	      "Xilinx Logical Block Block"
      logical_function	      "OR"
      inputs		      "4"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "0"
      align_bp		      on
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "logical"
      block_version	      "9.1.01"
      sg_icon_stat	      "40,57,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 57 57 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 57 57 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[33.55 3"
      "3.55 38.55 33.55 38.55 38.55 38.55 33.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[28.55 28.55 33.55"
      " 33.55 28.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[23.55 23.55 28.55 28.55 23.55 ],[1"
      " 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 18.55 23.55 23.55 18.55 ],[0.931 0"
      ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\nco"
      "lor('black');disp('or');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      " System Generator"
      SID		      "669"
      Tag		      "genX"
      Ports		      []
      Position		      [20, 25, 63, 68]
      ShowName		      off
      AttributesFormatString  "System\\nGenerator"
      LibraryVersion	      "1.2"
      UserDataPersistent      on
      UserData		      "DataTag0"
      SourceBlock	      "xbsIndex_r4/ System Generator"
      SourceType	      "Xilinx System Generator Block"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      GeneratePreprocessorConditionals off
      infoedit		      " System Generator"
      xilinxfamily	      "virtex4"
      part		      "xc4vfx100"
      speed		      "-11"
      package		      "ff1517"
      synthesis_tool	      "XST"
      clock_wrapper	      "Clock Enables"
      directory		      "./warplab_buffers"
      proj_type		      "Project Navigator"
      Synth_file	      "XST Defaults"
      Impl_file		      "ISE Defaults"
      testbench		      off
      simulink_period	      "1"
      sysclk_period	      "10"
      dcm_input_clock_period  "10"
      incr_netlist	      off
      trim_vbits	      "Everywhere in SubSystem"
      dbl_ovrd		      "According to Block Masks"
      core_generation	      "According to Block Masks"
      run_coregen	      off
      deprecated_control      off
      eval_field	      "0"
      has_advanced_control    "0"
      sggui_pos		      "33,904,464,470"
      block_type	      "sysgen"
      sg_icon_stat	      "43,43,0,0,token,white,0,58c5b5770fe5f7c311f53dbc6e73f0f6,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 43 43 0 0 ],[0 0 43 43 0 ],[1 1 1 ]"
      ");\npatch([0.975 13.98 22.98 31.98 40.98 22.98 9.975 0.975 ],[30.99 30.99 39.99 30.99 39.99 39.99 39.99 30.99 ],"
      "[0.933333 0.203922 0.141176 ]);\npatch([9.975 22.98 13.98 0.975 9.975 ],[21.99 21.99 30.99 30.99 21.99 ],[0.6980"
      "39 0.0313725 0.219608 ]);\npatch([0.975 13.98 22.98 9.975 0.975 ],[12.99 12.99 21.99 21.99 12.99 ],[0.933333 0.2"
      "03922 0.141176 ]);\npatch([9.975 40.98 31.98 22.98 13.98 0.975 9.975 ],[3.99 3.99 12.99 3.99 12.99 12.99 3.99 ],"
      "[0.698039 0.0313725 0.219608 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon tex"
      "t');\nfprintf('','COMMENT: end icon text');"
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    Block {
      BlockType		      Reference
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      SID		      "4"
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      Position		      [235, 959, 290, 971]
      NamePlacement	      "alternate"
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      SourceBlock	      "xbsIndex_r4/Gateway In"
      SourceType	      "Xilinx Gateway In Block"
      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, double and fixed point to  Xilinx "
      "fixed point type.<P><P>Hardware notes:  In hardware these blocks become top level input ports."
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "1"
      bin_pt		      "0"
      preci_type	      "Single"
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      quantization	      "Round  (unbiased: +/- Inf)"
      overflow		      "Saturate"
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      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      UseAsADC		      off
      ADCChannel	      "'1'"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      inherit_from_input      off
      hdl_port		      "on"
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      sggui_pos		      "20,20,356,432"
      block_type	      "gatewayin"
      block_version	      "VER_STRING_GOES_HERE"
      sg_icon_stat	      "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0."
      "93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ],["
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      "tf('','COMMENT: end icon text');"
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    Block {
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      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
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      RequestExecContextInheritance off
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      System {
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	Block {
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	Block {
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	Block {
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	Block {
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	Block {
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	Block {
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	  GotoTag		  "RFA_IQ_RX_DIN"
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	Block {
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	  GotoTag		  "RFB_IQ_RX_DIN"
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	Block {
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	Block {
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	  ShowName		  off
	  GotoTag		  "RFD_RSSI_ADDR"
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	Block {
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	  ShowName		  off
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	  ShowName		  off
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	  ShowName		  off
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	Block {
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	  Position		  [635, 104, 805, 466]
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	  PropExecContextOutsideSubsystem off
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	    Block {
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	      Name		      "IQ_RX_ADDR"
	      SID		      "2389"
	      Position		      [50, 113, 80, 127]
	      IconDisplay	      "Port number"
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	    Block {
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	      Name		      "IQ_RX_WEN"
	      SID		      "2391"
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	    Block {
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	      IconDisplay	      "Port number"
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	    Block {
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	      Position		      [50, 458, 80, 472]
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	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_ADDR"
	      SID		      "2396"
	      Position		      [775, 118, 805, 132]
	      Port		      "5"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_DIN"
	      SID		      "2397"
	      Position		      [775, 148, 805, 162]
	      Port		      "6"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_WEN"
	      SID		      "2398"
	      Position		      [775, 178, 805, 192]
	      Port		      "7"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "4827"
	      Ports		      [0, 1]
	      Position		      [195, 515, 220, 535]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "0"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,400,346"
	      block_type	      "constant"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2"
	      "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2"
	      "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 "
	      "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant2"
	      SID		      "4828"
	      Ports		      [0, 1]
	      Position		      [195, 485, 220, 505]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "0"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,400,346"
	      block_type	      "constant"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2"
	      "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2"
	      "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 "
	      "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto1"
	      SID		      "3301"
	      Position		      [285, 310, 500, 330]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_RX_DOUT_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto2"
	      SID		      "3302"
	      Position		      [285, 251, 500, 269]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_RX_WEN_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto26"
	      SID		      "2863"
	      Position		      [285, 280, 500, 300]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_RX_ADDR_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto3"
	      SID		      "3303"
	      Position		      [485, 650, 700, 670]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_TX_DOUT_RAW_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto4"
	      SID		      "3304"
	      Position		      [485, 620, 700, 640]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_TX_SEL_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto5"
	      SID		      "3305"
	      Position		      [485, 680, 700, 700]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_TX_DOUT_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto6"
	      SID		      "4052"
	      Position		      [485, 590, 700, 610]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_TX_ADDR_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory"
	      SID		      "4823"
	      Ports		      [3, 1]
	      Position		      [285, 105, 365, 195]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFA_IQ_Rx_Buffer'"
	      depth		      "NumSamps_Rx_IQ"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "239,295,384,413"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[57.21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.2"
	      "1 46.21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.2"
	      "1 46.21 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.2"
	      "1 35.21 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory1"
	      SID		      "4825"
	      Ports		      [3, 1]
	      Position		      [1060, 111, 1140, 199]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFA_RSSI_Buffer'"
	      depth		      "NumSamps_Rx_RSSI/2"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,384,381"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,88,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 88 88 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 88 88 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[56.21 56.21 67.21 56.21 67.21 67.21 67.21 56.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[45.2"
	      "1 45.21 56.21 56.21 45.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[34.21 34.21 45.2"
	      "1 45.21 34.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[23.21 23.21 34.21 23.21 34.2"
	      "1 34.21 23.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory2"
	      SID		      "4829"
	      Ports		      [3, 1]
	      Position		      [285, 450, 365, 540]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFA_IQ_Tx_Buffer'"
	      depth		      "NumSamps_Tx_IQ"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "1017,382,384,413"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[57.21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.2"
	      "1 46.21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.2"
	      "1 46.21 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.2"
	      "1 35.21 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Terminator
	      Name		      "Terminator"
	      SID		      "4824"
	      Position		      [430, 140, 450, 160]
	      ShowName		      off
	    }
	    Block {
	      BlockType		      Terminator
	      Name		      "Terminator2"
	      SID		      "4826"
	      Position		      [1210, 145, 1230, 165]
	      ShowName		      off
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "rx_addr[13:0]"
	      SID		      "4907"
	      Ports		      [1, 1]
	      Position		      [165, 111, 205, 129]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "14"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "tx_addr[13:0]"
	      SID		      "4901"
	      Ports		      [1, 1]
	      Position		      [195, 456, 235, 474]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "14"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "IQ_TX_DOUT"
	      SID		      "2395"
	      Position		      [470, 488, 500, 502]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "IQ_RX_WEN"
	      SrcPort		      1
	      Points		      [120, 0]
	      Branch {
		Points			[30, 0]
		Branch {
		  DstBlock		  "Shared Memory"
		  DstPort		  3
		}
		Branch {
		  Points		  [0, 80]
		  DstBlock		  "Goto2"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 140]
		DstBlock		"Goto1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "IQ_RX_ADDR"
	      SrcPort		      1
	      DstBlock		      "rx_addr[13:0]"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Shared Memory"
	      SrcPort		      1
	      DstBlock		      "Terminator"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "IQ_RX_DIN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Shared Memory1"
	      SrcPort		      1
	      DstBlock		      "Terminator2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RSSI_ADDR"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RSSI_DIN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "RSSI_WEN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "IQ_TX_ADDR"
	      SrcPort		      1
	      Points		      [35, 0]
	      Branch {
		Points			[0, 135]
		DstBlock		"Goto6"
		DstPort			1
	      }
	      Branch {
		DstBlock		"tx_addr[13:0]"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		DstBlock		"Shared Memory2"
		DstPort			3
	      }
	      Branch {
		Points			[0, 105]
		DstBlock		"Goto4"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "Shared Memory2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Shared Memory2"
	      SrcPort		      1
	      Points		      [50, 0]
	      Branch {
		Points			[15, 0]
		Branch {
		  DstBlock		  "IQ_TX_DOUT"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 165]
		  DstBlock		  "Goto3"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 195]
		DstBlock		"Goto5"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "tx_addr[13:0]"
	      SrcPort		      1
	      DstBlock		      "Shared Memory2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "rx_addr[13:0]"
	      SrcPort		      1
	      Points		      [10, 0]
	      Branch {
		DstBlock		"Shared Memory"
		DstPort			1
	      }
	      Branch {
		Points			[0, 170]
		DstBlock		"Goto26"
		DstPort			1
	      }
	    }
	    Annotation {
	      Name		      "RX IQ Interface"
	      Position		      [117, 77]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	    Annotation {
	      Name		      "TX IQ Interface"
	      Position		      [112, 412]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	    Annotation {
	      Name		      "RX RSSI Interface"
	      Position		      [862, 77]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RFB Buffers"
	  SID			  "4830"
	  Ports			  [7, 1]
	  Position		  [635, 504, 805, 866]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RFB Buffers"
	    Location		    [185, 178, 2365, 1281]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "105"
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_ADDR"
	      SID		      "4831"
	      Position		      [50, 113, 80, 127]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_WEN"
	      SID		      "4832"
	      Position		      [50, 173, 80, 187]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_DIN"
	      SID		      "4833"
	      Position		      [50, 143, 80, 157]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_TX_ADDR"
	      SID		      "4834"
	      Position		      [50, 458, 80, 472]
	      Port		      "4"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_ADDR"
	      SID		      "4835"
	      Position		      [775, 118, 805, 132]
	      Port		      "5"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_DIN"
	      SID		      "4836"
	      Position		      [775, 148, 805, 162]
	      Port		      "6"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_WEN"
	      SID		      "4837"
	      Position		      [775, 178, 805, 192]
	      Port		      "7"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "4838"
	      Ports		      [0, 1]
	      Position		      [195, 515, 220, 535]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "0"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,400,346"
	      block_type	      "constant"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2"
	      "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2"
	      "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 "
	      "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant2"
	      SID		      "4839"
	      Ports		      [0, 1]
	      Position		      [195, 485, 220, 505]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "0"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,400,346"
	      block_type	      "constant"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2"
	      "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2"
	      "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 "
	      "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto1"
	      SID		      "4840"
	      Position		      [285, 310, 500, 330]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_RX_DOUT_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto2"
	      SID		      "4841"
	      Position		      [285, 251, 500, 269]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_RX_WEN_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto26"
	      SID		      "4842"
	      Position		      [285, 280, 500, 300]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_RX_ADDR_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto3"
	      SID		      "4843"
	      Position		      [485, 650, 700, 670]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_TX_DOUT_RAW_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto4"
	      SID		      "4844"
	      Position		      [485, 620, 700, 640]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_TX_SEL_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto5"
	      SID		      "4845"
	      Position		      [485, 680, 700, 700]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_TX_DOUT_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto6"
	      SID		      "4846"
	      Position		      [485, 590, 700, 610]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_TX_ADDR_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory"
	      SID		      "4847"
	      Ports		      [3, 1]
	      Position		      [285, 105, 365, 195]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFB_IQ_Rx_Buffer'"
	      depth		      "NumSamps_Rx_IQ"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "239,295,384,413"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[57.21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.2"
	      "1 46.21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.2"
	      "1 46.21 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.2"
	      "1 35.21 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory1"
	      SID		      "4848"
	      Ports		      [3, 1]
	      Position		      [1060, 111, 1140, 199]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFB_RSSI_Buffer'"
	      depth		      "NumSamps_Rx_RSSI/2"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,384,381"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,88,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 88 88 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 88 88 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[56.21 56.21 67.21 56.21 67.21 67.21 67.21 56.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[45.2"
	      "1 45.21 56.21 56.21 45.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[34.21 34.21 45.2"
	      "1 45.21 34.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[23.21 23.21 34.21 23.21 34.2"
	      "1 34.21 23.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory2"
	      SID		      "4849"
	      Ports		      [3, 1]
	      Position		      [285, 450, 365, 540]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFB_IQ_Tx_Buffer'"
	      depth		      "NumSamps_Tx_IQ"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "1017,382,384,413"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[57.21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.2"
	      "1 46.21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.2"
	      "1 46.21 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.2"
	      "1 35.21 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Terminator
	      Name		      "Terminator"
	      SID		      "4850"
	      Position		      [430, 140, 450, 160]
	      ShowName		      off
	    }
	    Block {
	      BlockType		      Terminator
	      Name		      "Terminator2"
	      SID		      "4851"
	      Position		      [1210, 145, 1230, 165]
	      ShowName		      off
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "rx_addr[13:0]"
	      SID		      "4906"
	      Ports		      [1, 1]
	      Position		      [160, 111, 200, 129]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "14"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "tx_addr[13:0]"
	      SID		      "4902"
	      Ports		      [1, 1]
	      Position		      [195, 456, 235, 474]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "14"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "IQ_TX_DOUT"
	      SID		      "4852"
	      Position		      [470, 488, 500, 502]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "IQ_RX_WEN"
	      SrcPort		      1
	      Points		      [120, 0]
	      Branch {
		Points			[30, 0]
		Branch {
		  DstBlock		  "Shared Memory"
		  DstPort		  3
		}
		Branch {
		  Points		  [0, 80]
		  DstBlock		  "Goto2"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 140]
		DstBlock		"Goto1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "IQ_RX_ADDR"
	      SrcPort		      1
	      DstBlock		      "rx_addr[13:0]"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Shared Memory"
	      SrcPort		      1
	      DstBlock		      "Terminator"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "IQ_RX_DIN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Shared Memory1"
	      SrcPort		      1
	      DstBlock		      "Terminator2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RSSI_ADDR"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RSSI_DIN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "RSSI_WEN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "IQ_TX_ADDR"
	      SrcPort		      1
	      Points		      [35, 0]
	      Branch {
		Points			[0, 135]
		DstBlock		"Goto6"
		DstPort			1
	      }
	      Branch {
		DstBlock		"tx_addr[13:0]"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		DstBlock		"Shared Memory2"
		DstPort			3
	      }
	      Branch {
		Points			[0, 105]
		DstBlock		"Goto4"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "Shared Memory2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Shared Memory2"
	      SrcPort		      1
	      Points		      [50, 0]
	      Branch {
		Points			[15, 0]
		Branch {
		  DstBlock		  "IQ_TX_DOUT"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 165]
		  DstBlock		  "Goto3"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 195]
		DstBlock		"Goto5"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "tx_addr[13:0]"
	      SrcPort		      1
	      DstBlock		      "Shared Memory2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "rx_addr[13:0]"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		DstBlock		"Shared Memory"
		DstPort			1
	      }
	      Branch {
		Points			[0, 170]
		DstBlock		"Goto26"
		DstPort			1
	      }
	    }
	    Annotation {
	      Name		      "RX IQ Interface"
	      Position		      [117, 77]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	    Annotation {
	      Name		      "TX IQ Interface"
	      Position		      [112, 412]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	    Annotation {
	      Name		      "RX RSSI Interface"
	      Position		      [862, 77]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RFC Buffers"
	  SID			  "4853"
	  Ports			  [7, 1]
	  Position		  [1470, 89, 1640, 451]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RFC Buffers"
	    Location		    [185, 178, 2365, 1281]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "105"
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_ADDR"
	      SID		      "4854"
	      Position		      [50, 113, 80, 127]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_WEN"
	      SID		      "4855"
	      Position		      [50, 173, 80, 187]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_DIN"
	      SID		      "4856"
	      Position		      [50, 143, 80, 157]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_TX_ADDR"
	      SID		      "4857"
	      Position		      [50, 458, 80, 472]
	      Port		      "4"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_ADDR"
	      SID		      "4858"
	      Position		      [775, 118, 805, 132]
	      Port		      "5"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_DIN"
	      SID		      "4859"
	      Position		      [775, 148, 805, 162]
	      Port		      "6"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_WEN"
	      SID		      "4860"
	      Position		      [775, 178, 805, 192]
	      Port		      "7"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "4861"
	      Ports		      [0, 1]
	      Position		      [195, 515, 220, 535]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "0"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,400,346"
	      block_type	      "constant"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2"
	      "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2"
	      "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 "
	      "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant2"
	      SID		      "4862"
	      Ports		      [0, 1]
	      Position		      [195, 485, 220, 505]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "0"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,400,346"
	      block_type	      "constant"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2"
	      "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2"
	      "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 "
	      "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto1"
	      SID		      "4863"
	      Position		      [285, 310, 500, 330]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_RX_DOUT_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto2"
	      SID		      "4864"
	      Position		      [285, 251, 500, 269]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_RX_WEN_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto26"
	      SID		      "4865"
	      Position		      [285, 280, 500, 300]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_RX_ADDR_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto3"
	      SID		      "4866"
	      Position		      [485, 650, 700, 670]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_TX_DOUT_RAW_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto4"
	      SID		      "4867"
	      Position		      [485, 620, 700, 640]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_TX_SEL_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto5"
	      SID		      "4868"
	      Position		      [485, 680, 700, 700]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_TX_DOUT_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto6"
	      SID		      "4869"
	      Position		      [485, 590, 700, 610]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_TX_ADDR_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory"
	      SID		      "4870"
	      Ports		      [3, 1]
	      Position		      [285, 105, 365, 195]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFC_IQ_Rx_Buffer'"
	      depth		      "NumSamps_Rx_IQ"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "239,295,384,413"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[57.21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.2"
	      "1 46.21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.2"
	      "1 46.21 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.2"
	      "1 35.21 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory1"
	      SID		      "4871"
	      Ports		      [3, 1]
	      Position		      [1060, 111, 1140, 199]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFC_RSSI_Buffer'"
	      depth		      "NumSamps_Rx_RSSI/2"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,384,381"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,88,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 88 88 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 88 88 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[56.21 56.21 67.21 56.21 67.21 67.21 67.21 56.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[45.2"
	      "1 45.21 56.21 56.21 45.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[34.21 34.21 45.2"
	      "1 45.21 34.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[23.21 23.21 34.21 23.21 34.2"
	      "1 34.21 23.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory2"
	      SID		      "4872"
	      Ports		      [3, 1]
	      Position		      [285, 450, 365, 540]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFC_IQ_Tx_Buffer'"
	      depth		      "NumSamps_Tx_IQ"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "1017,382,384,413"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[57.21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.2"
	      "1 46.21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.2"
	      "1 46.21 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.2"
	      "1 35.21 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Terminator
	      Name		      "Terminator"
	      SID		      "4873"
	      Position		      [430, 140, 450, 160]
	      ShowName		      off
	    }
	    Block {
	      BlockType		      Terminator
	      Name		      "Terminator2"
	      SID		      "4874"
	      Position		      [1210, 145, 1230, 165]
	      ShowName		      off
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[13:0]"
	      SID		      "4903"
	      Ports		      [1, 1]
	      Position		      [195, 456, 235, 474]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "14"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "rx_addr[13:0]"
	      SID		      "4905"
	      Ports		      [1, 1]
	      Position		      [160, 111, 200, 129]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "14"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "IQ_TX_DOUT"
	      SID		      "4875"
	      Position		      [470, 488, 500, 502]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "IQ_RX_WEN"
	      SrcPort		      1
	      Points		      [120, 0]
	      Branch {
		Points			[30, 0]
		Branch {
		  DstBlock		  "Shared Memory"
		  DstPort		  3
		}
		Branch {
		  Points		  [0, 80]
		  DstBlock		  "Goto2"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 140]
		DstBlock		"Goto1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "IQ_RX_ADDR"
	      SrcPort		      1
	      DstBlock		      "rx_addr[13:0]"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Shared Memory"
	      SrcPort		      1
	      DstBlock		      "Terminator"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "IQ_RX_DIN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Shared Memory1"
	      SrcPort		      1
	      DstBlock		      "Terminator2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RSSI_ADDR"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RSSI_DIN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "RSSI_WEN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "IQ_TX_ADDR"
	      SrcPort		      1
	      Points		      [35, 0]
	      Branch {
		Points			[0, 135]
		DstBlock		"Goto6"
		DstPort			1
	      }
	      Branch {
		DstBlock		"b[13:0]"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		DstBlock		"Shared Memory2"
		DstPort			3
	      }
	      Branch {
		Points			[0, 105]
		DstBlock		"Goto4"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "Shared Memory2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Shared Memory2"
	      SrcPort		      1
	      Points		      [50, 0]
	      Branch {
		Points			[15, 0]
		Branch {
		  DstBlock		  "IQ_TX_DOUT"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 165]
		  DstBlock		  "Goto3"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 195]
		DstBlock		"Goto5"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "b[13:0]"
	      SrcPort		      1
	      DstBlock		      "Shared Memory2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "rx_addr[13:0]"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		DstBlock		"Shared Memory"
		DstPort			1
	      }
	      Branch {
		Points			[0, 170]
		DstBlock		"Goto26"
		DstPort			1
	      }
	    }
	    Annotation {
	      Name		      "RX IQ Interface"
	      Position		      [117, 77]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	    Annotation {
	      Name		      "TX IQ Interface"
	      Position		      [112, 412]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	    Annotation {
	      Name		      "RX RSSI Interface"
	      Position		      [862, 77]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RFD Buffers"
	  SID			  "4876"
	  Ports			  [7, 1]
	  Position		  [1470, 504, 1640, 866]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RFD Buffers"
	    Location		    [185, 178, 2365, 1281]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "105"
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_ADDR"
	      SID		      "4877"
	      Position		      [50, 113, 80, 127]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_WEN"
	      SID		      "4878"
	      Position		      [50, 173, 80, 187]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_RX_DIN"
	      SID		      "4879"
	      Position		      [50, 143, 80, 157]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "IQ_TX_ADDR"
	      SID		      "4880"
	      Position		      [50, 458, 80, 472]
	      Port		      "4"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_ADDR"
	      SID		      "4881"
	      Position		      [775, 118, 805, 132]
	      Port		      "5"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_DIN"
	      SID		      "4882"
	      Position		      [775, 148, 805, 162]
	      Port		      "6"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI_WEN"
	      SID		      "4883"
	      Position		      [775, 178, 805, 192]
	      Port		      "7"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "4884"
	      Ports		      [0, 1]
	      Position		      [195, 515, 220, 535]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "0"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,400,346"
	      block_type	      "constant"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2"
	      "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2"
	      "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 "
	      "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant2"
	      SID		      "4885"
	      Ports		      [0, 1]
	      Position		      [195, 485, 220, 505]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "0"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,400,346"
	      block_type	      "constant"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2"
	      "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2"
	      "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 "
	      "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto1"
	      SID		      "4886"
	      Position		      [285, 310, 500, 330]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_RX_DOUT_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto2"
	      SID		      "4887"
	      Position		      [285, 251, 500, 269]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_RX_WEN_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto26"
	      SID		      "4888"
	      Position		      [285, 280, 500, 300]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_RX_ADDR_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto3"
	      SID		      "4889"
	      Position		      [485, 650, 700, 670]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_TX_DOUT_RAW_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto4"
	      SID		      "4890"
	      Position		      [485, 620, 700, 640]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_TX_SEL_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto5"
	      SID		      "4891"
	      Position		      [485, 680, 700, 700]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_TX_DOUT_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto6"
	      SID		      "4892"
	      Position		      [485, 590, 700, 610]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_TX_ADDR_SCOPE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory"
	      SID		      "4893"
	      Ports		      [3, 1]
	      Position		      [285, 105, 365, 195]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFD_IQ_Rx_Buffer'"
	      depth		      "NumSamps_Rx_IQ"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "239,295,384,413"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[57.21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.2"
	      "1 46.21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.2"
	      "1 46.21 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.2"
	      "1 35.21 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory1"
	      SID		      "4894"
	      Ports		      [3, 1]
	      Position		      [1060, 111, 1140, 199]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFD_RSSI_Buffer'"
	      depth		      "NumSamps_Rx_RSSI/2"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,384,381"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,88,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 88 88 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 88 88 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[56.21 56.21 67.21 56.21 67.21 67.21 67.21 56.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[45.2"
	      "1 45.21 56.21 56.21 45.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[34.21 34.21 45.2"
	      "1 45.21 34.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[23.21 23.21 34.21 23.21 34.2"
	      "1 34.21 23.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Shared Memory2"
	      SID		      "4895"
	      Ports		      [3, 1]
	      Position		      [285, 450, 365, 540]
	      AttributesFormatString  "<< %<shared_memory_name> >>"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Shared Memory"
	      SourceType	      "Xilinx Shared Memory Random Access Memory Block"
	      shared_memory_name      "'RFD_IQ_Tx_Buffer'"
	      depth		      "NumSamps_Tx_IQ"
	      ownership		      "Locally Owned and Initialized"
	      initVector	      "0"
	      en		      off
	      mutex		      "Unprotected"
	      mode		      "Read and Write"
	      write_mode	      "Read After Write"
	      time_out		      "0"
	      latency		      "1"
	      explicit_data_type      on
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "32"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      implementation	      "Block RAM"
	      use_rpm		      "off"
	      has_advanced_control    "0"
	      sggui_pos		      "1017,382,384,413"
	      block_type	      "shmem"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ]"
	      ",[57.21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.2"
	      "1 46.21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.2"
	      "1 46.21 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.2"
	      "1 35.21 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
	      "con text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('"
	      "black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ic"
	      "on text');"
	    }
	    Block {
	      BlockType		      Terminator
	      Name		      "Terminator"
	      SID		      "4896"
	      Position		      [430, 140, 450, 160]
	      ShowName		      off
	    }
	    Block {
	      BlockType		      Terminator
	      Name		      "Terminator2"
	      SID		      "4897"
	      Position		      [1210, 145, 1230, 165]
	      ShowName		      off
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[13:0]"
	      SID		      "4904"
	      Ports		      [1, 1]
	      Position		      [195, 456, 235, 474]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "14"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "rx_addr[13:0]"
	      SID		      "4908"
	      Ports		      [1, 1]
	      Position		      [165, 111, 205, 129]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "14"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "IQ_TX_DOUT"
	      SID		      "4898"
	      Position		      [470, 488, 500, 502]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "IQ_RX_WEN"
	      SrcPort		      1
	      Points		      [120, 0]
	      Branch {
		Points			[30, 0]
		Branch {
		  DstBlock		  "Shared Memory"
		  DstPort		  3
		}
		Branch {
		  Points		  [0, 80]
		  DstBlock		  "Goto2"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 140]
		DstBlock		"Goto1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "IQ_RX_ADDR"
	      SrcPort		      1
	      DstBlock		      "rx_addr[13:0]"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Shared Memory"
	      SrcPort		      1
	      DstBlock		      "Terminator"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "IQ_RX_DIN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Shared Memory1"
	      SrcPort		      1
	      DstBlock		      "Terminator2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RSSI_ADDR"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RSSI_DIN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "RSSI_WEN"
	      SrcPort		      1
	      DstBlock		      "Shared Memory1"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "IQ_TX_ADDR"
	      SrcPort		      1
	      Points		      [35, 0]
	      Branch {
		Points			[0, 135]
		DstBlock		"Goto6"
		DstPort			1
	      }
	      Branch {
		DstBlock		"b[13:0]"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		DstBlock		"Shared Memory2"
		DstPort			3
	      }
	      Branch {
		Points			[0, 105]
		DstBlock		"Goto4"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "Shared Memory2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Shared Memory2"
	      SrcPort		      1
	      Points		      [50, 0]
	      Branch {
		Points			[15, 0]
		Branch {
		  DstBlock		  "IQ_TX_DOUT"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 165]
		  DstBlock		  "Goto3"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 195]
		DstBlock		"Goto5"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "b[13:0]"
	      SrcPort		      1
	      DstBlock		      "Shared Memory2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "rx_addr[13:0]"
	      SrcPort		      1
	      Points		      [10, 0]
	      Branch {
		DstBlock		"Shared Memory"
		DstPort			1
	      }
	      Branch {
		Points			[0, 170]
		DstBlock		"Goto26"
		DstPort			1
	      }
	    }
	    Annotation {
	      Name		      "RX IQ Interface"
	      Position		      [117, 77]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	    Annotation {
	      Name		      "TX IQ Interface"
	      Position		      [112, 412]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	    Annotation {
	      Name		      "RX RSSI Interface"
	      Position		      [862, 77]
	      FontSize		      20
	      FontWeight	      "bold"
	    }
	  }
	}
	Line {
	  SrcBlock		  "From"
	  SrcPort		  1
	  DstBlock		  "RFA Buffers"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From1"
	  SrcPort		  1
	  DstBlock		  "RFA Buffers"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "From2"
	  SrcPort		  1
	  DstBlock		  "RFA Buffers"
	  DstPort		  7
	}
	Line {
	  SrcBlock		  "RFA Buffers"
	  SrcPort		  1
	  DstBlock		  "Goto26"
	  DstPort		  1
	}
	Line {
	  Labels		  [0, 0]
	  SrcBlock		  "From12"
	  SrcPort		  1
	  DstBlock		  "RFA Buffers"
	  DstPort		  1
	}
	Line {
	  Labels		  [0, 0]
	  SrcBlock		  "From16"
	  SrcPort		  1
	  DstBlock		  "RFA Buffers"
	  DstPort		  2
	}
	Line {
	  Labels		  [0, 0]
	  SrcBlock		  "From13"
	  SrcPort		  1
	  DstBlock		  "RFA Buffers"
	  DstPort		  3
	}
	Line {
	  Labels		  [0, 0]
	  SrcBlock		  "From24"
	  SrcPort		  1
	  DstBlock		  "RFA Buffers"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From17"
	  SrcPort		  1
	  DstBlock		  "RFB Buffers"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From19"
	  SrcPort		  1
	  DstBlock		  "RFB Buffers"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From18"
	  SrcPort		  1
	  DstBlock		  "RFB Buffers"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From26"
	  SrcPort		  1
	  DstBlock		  "RFB Buffers"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From3"
	  SrcPort		  1
	  DstBlock		  "RFB Buffers"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From4"
	  SrcPort		  1
	  DstBlock		  "RFB Buffers"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "From5"
	  SrcPort		  1
	  DstBlock		  "RFB Buffers"
	  DstPort		  7
	}
	Line {
	  SrcBlock		  "RFB Buffers"
	  SrcPort		  1
	  DstBlock		  "Goto28"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From20"
	  SrcPort		  1
	  DstBlock		  "RFC Buffers"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From22"
	  SrcPort		  1
	  DstBlock		  "RFC Buffers"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From21"
	  SrcPort		  1
	  DstBlock		  "RFC Buffers"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From28"
	  SrcPort		  1
	  DstBlock		  "RFC Buffers"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From6"
	  SrcPort		  1
	  DstBlock		  "RFC Buffers"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From7"
	  SrcPort		  1
	  DstBlock		  "RFC Buffers"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "From8"
	  SrcPort		  1
	  DstBlock		  "RFC Buffers"
	  DstPort		  7
	}
	Line {
	  SrcBlock		  "RFC Buffers"
	  SrcPort		  1
	  DstBlock		  "Goto30"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From23"
	  SrcPort		  1
	  DstBlock		  "RFD Buffers"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From15"
	  SrcPort		  1
	  DstBlock		  "RFD Buffers"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From14"
	  SrcPort		  1
	  DstBlock		  "RFD Buffers"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From30"
	  SrcPort		  1
	  DstBlock		  "RFD Buffers"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From9"
	  SrcPort		  1
	  DstBlock		  "RFD Buffers"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From10"
	  SrcPort		  1
	  DstBlock		  "RFD Buffers"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "From11"
	  SrcPort		  1
	  DstBlock		  "RFD Buffers"
	  DstPort		  7
	}
	Line {
	  SrcBlock		  "RFD Buffers"
	  SrcPort		  1
	  DstBlock		  "Goto32"
	  DstPort		  1
	}
	Annotation {
	  Name			  "Bus Interfaces to external BRAM blocks"
	  Position		  [245, 46]
	  FontSize		  18
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Chipscope"
      SID		      "2864"
      Ports		      []
      Position		      [430, 23, 475, 68]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Chipscope"
	Location		[115, 82, 2416, 1411]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"120"
	Block {
	  BlockType		  Reference
	  Name			  "ChipScope RFx"
	  SID			  "3287"
	  Ports			  [10]
	  Position		  [1545, 338, 1710, 742]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/ChipScope"
	  SourceType		  "Xilinx ChipScope Block"
	  infoedit		  "Enables run-time debugging and verification of signals by inserting ChipScope Pro ICON and ILA cores.<"
	  "br><br>  Restrictions: <br>Only one ChipScope core can be instantiated in a System Generator design. A design or su"
	  "bsystem containing a ChipScope block must have at least one output port."
	  num_trig_ports	  "2"
	  current_port		  "0"
	  show_trig_port	  "0"
	  match_units		  "1"
	  match_type		  "Basic"
	  data_is_trigger	  off
	  num_data_ports	  "8"
	  data_depth		  "1024"
	  SRL16s		  on
	  add_bufg		  on
	  match_type_t0		  "1"
	  match_type_t1		  "1"
	  match_type_t2		  "1"
	  match_type_t3		  "1"
	  match_type_t4		  "1"
	  match_type_t5		  "1"
	  match_type_t6		  "1"
	  match_type_t7		  "1"
	  match_type_t8		  "1"
	  match_type_t9		  "1"
	  match_type_t10	  "1"
	  match_type_t11	  "1"
	  match_type_t12	  "1"
	  match_type_t13	  "1"
	  match_type_t14	  "1"
	  match_type_t15	  "1"
	  match_units_t0	  "1"
	  match_units_t1	  "1"
	  match_units_t2	  "1"
	  match_units_t3	  "1"
	  match_units_t4	  "1"
	  match_units_t5	  "1"
	  match_units_t6	  "1"
	  match_units_t7	  "1"
	  match_units_t8	  "1"
	  match_units_t9	  "1"
	  match_units_t10	  "1"
	  match_units_t11	  "1"
	  match_units_t12	  "1"
	  match_units_t13	  "1"
	  match_units_t14	  "1"
	  match_units_t15	  "1"
	  dbl_ovrd		  "0"
	  user_scan_chain	  "USER1"
	  has_advanced_control	  "0"
	  sggui_pos		  "296,75,336,526"
	  block_type		  "chipscope"
	  sg_icon_stat		  "165,404,10,0,white,blue,0,c9d31b4d,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 165 165 0 0 ],[0 0 404 404 0 ],[0.77 0.82 "
	  "0.91 ]);\nplot([0 165 165 0 0 ],[0 0 404 404 0 ]);\npatch([30.825 64.06 87.06 110.06 133.06 87.06 53.825 30.825 ],["
	  "227.53 227.53 250.53 227.53 250.53 250.53 250.53 227.53 ],[1 1 1 ]);\npatch([53.825 87.06 64.06 30.825 53.825 ],[20"
	  "4.53 204.53 227.53 227.53 204.53 ],[0.931 0.946 0.973 ]);\npatch([30.825 64.06 87.06 53.825 30.825 ],[181.53 181.53"
	  " 204.53 204.53 181.53 ],[1 1 1 ]);\npatch([53.825 133.06 110.06 87.06 64.06 30.825 53.825 ],[158.53 158.53 181.53 1"
	  "58.53 181.53 181.53 158.53 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
	  ": begin icon text');\ncolor('black');port_label('input',1,'RFx_IQ_RX_WEN_TRIG');\ncolor('black');port_label('input'"
	  ",2,'RFx_IQ_TX_EN');\ncolor('black');port_label('input',3,'RFx_IQ_RX_ADDR');\ncolor('black');port_label('input',4,'R"
	  "Fx_IQ_RX_DOUT');\ncolor('black');port_label('input',5,'RFx_IQ_RX_WEN');\ncolor('black');port_label('input',6,'RFx_I"
	  "Q_TX_ADDR');\ncolor('black');port_label('input',7,'RFx_IQ_TX_DOUT');\ncolor('black');port_label('input',8,'RFx_IQ_T"
	  "X_SEL');\ncolor('black');port_label('input',9,'RFx_IQ_TX_DOUT_RAW');\ncolor('black');port_label('input',10,'RFx_IQ_"
	  "TX_DATA');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Disregard Subsystem"
	  SID			  "3894"
	  Tag			  "discardX"
	  Ports			  []
	  Position		  [98, 135, 156, 193]
	  ShowName		  off
	  AttributesFormatString  "Disregard Subsystem\\nFor Generation"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Disregard Subsystem"
	  SourceType		  "Xilinx Disregard Subsystem For Generation Block"
	  infoedit		  "Place this block into a subsystem to have System Generator ignore the subsystem during code generation"
	  ". This block can be used in combination with the Simulation Multiplexer block to provide an alternative simulation "
	  "model for another subsystem (e.g., to provide a simulation model for a black box)."
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "disregard"
	  sg_icon_stat		  "58,58,-1,-1,darkgray,black,0,07734,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 0 ],[0 0 58 58 0 ],[0.1 0.1 0.1 ])"
	  ";\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\npatch([11.2 22.76 30.76 38.76 46.76 30.76 19.2 11.2 ],[37.88 37.88 45.88 3"
	  "7.88 45.88 45.88 45.88 37.88 ],[0.33 0.33 0.33 ]);\npatch([19.2 30.76 22.76 11.2 19.2 ],[29.88 29.88 37.88 37.88 29"
	  ".88 ],[0.261 0.261 0.261 ]);\npatch([11.2 22.76 30.76 19.2 11.2 ],[21.88 21.88 29.88 29.88 21.88 ],[0.33 0.33 0.33 "
	  "]);\npatch([19.2 46.76 38.76 30.76 22.76 11.2 19.2 ],[13.88 13.88 21.88 13.88 21.88 21.88 13.88 ],[0.261 0.261 0.26"
	  "1 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From1"
	  SID			  "3248"
	  Position		  [550, 986, 745, 1004]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_TX_DATA"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From10"
	  SID			  "3347"
	  Position		  [550, 671, 745, 689]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_TX_DOUT_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From11"
	  SID			  "3348"
	  Position		  [550, 776, 745, 794]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_TX_SEL_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From12"
	  SID			  "3349"
	  Position		  [550, 881, 745, 899]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_TX_DOUT_RAW_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From13"
	  SID			  "3350"
	  Position		  [550, 271, 745, 289]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_RX_ADDR_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From14"
	  SID			  "3351"
	  Position		  [550, 376, 745, 394]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_RX_DOUT_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From15"
	  SID			  "3352"
	  Position		  [550, 481, 745, 499]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_RX_WEN_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From16"
	  SID			  "3249"
	  Position		  [550, 41, 745, 59]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_RX_WE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From17"
	  SID			  "3356"
	  Position		  [550, 691, 745, 709]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_TX_DOUT_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From18"
	  SID			  "3357"
	  Position		  [550, 796, 745, 814]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_TX_SEL_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From19"
	  SID			  "3358"
	  Position		  [550, 901, 745, 919]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_TX_DOUT_RAW_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From2"
	  SID			  "3312"
	  Position		  [550, 1006, 745, 1024]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_TX_DATA"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From20"
	  SID			  "3698"
	  Position		  [550, 81, 745, 99]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_RX_WE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From21"
	  SID			  "3699"
	  Position		  [550, 101, 745, 119]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_RX_WE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From22"
	  SID			  "3700"
	  Position		  [550, 186, 745, 204]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_EN"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From23"
	  SID			  "3701"
	  Position		  [550, 206, 745, 224]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_EN"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From24"
	  SID			  "3250"
	  Position		  [550, 566, 745, 584]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_TX_ADDR_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From25"
	  SID			  "3251"
	  Position		  [550, 146, 745, 164]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_TX_EN"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From26"
	  SID			  "3702"
	  Position		  [550, 291, 745, 309]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_RX_ADDR_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From27"
	  SID			  "3703"
	  Position		  [550, 311, 745, 329]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_RX_ADDR_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From28"
	  SID			  "3704"
	  Position		  [550, 396, 745, 414]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_RX_DOUT_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From29"
	  SID			  "3705"
	  Position		  [550, 416, 745, 434]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_RX_DOUT_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From3"
	  SID			  "3313"
	  Position		  [550, 61, 745, 79]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_RX_WE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From30"
	  SID			  "3706"
	  Position		  [550, 501, 745, 519]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_RX_WEN_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From31"
	  SID			  "3707"
	  Position		  [550, 521, 745, 539]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_RX_WEN_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From32"
	  SID			  "3708"
	  Position		  [550, 606, 745, 624]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_ADDR_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From33"
	  SID			  "3709"
	  Position		  [550, 626, 745, 644]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_ADDR_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From34"
	  SID			  "3710"
	  Position		  [550, 711, 745, 729]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_DOUT_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From35"
	  SID			  "3711"
	  Position		  [550, 731, 745, 749]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_DOUT_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From36"
	  SID			  "3712"
	  Position		  [550, 816, 745, 834]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_SEL_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From37"
	  SID			  "3713"
	  Position		  [550, 836, 745, 854]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_SEL_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From38"
	  SID			  "3714"
	  Position		  [550, 921, 745, 939]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_DOUT_RAW_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From39"
	  SID			  "3715"
	  Position		  [550, 941, 745, 959]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_DOUT_RAW_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From4"
	  SID			  "3314"
	  Position		  [550, 586, 745, 604]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_TX_ADDR_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From40"
	  SID			  "3716"
	  Position		  [550, 1026, 745, 1044]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_DATA"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From41"
	  SID			  "3717"
	  Position		  [550, 1046, 745, 1064]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_DATA"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From5"
	  SID			  "3315"
	  Position		  [550, 166, 745, 184]
	  ShowName		  off
	  GotoTag		  "RFB_IQ_TX_EN"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From6"
	  SID			  "3342"
	  Position		  [340, 21, 535, 39]
	  ShowName		  off
	  GotoTag		  "SCOPE_DATA_SEL"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From7"
	  SID			  "3344"
	  Position		  [550, 251, 745, 269]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_RX_ADDR_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From8"
	  SID			  "3345"
	  Position		  [550, 356, 745, 374]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_RX_DOUT_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From9"
	  SID			  "3346"
	  Position		  [550, 461, 745, 479]
	  ShowName		  off
	  GotoTag		  "RFA_IQ_RX_WEN_SCOPE"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out1"
	  SID			  "3801"
	  Ports			  [1, 1]
	  Position		  [1530, 95, 1560, 105]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out10"
	  SID			  "3810"
	  Ports			  [1, 1]
	  Position		  [1535, 960, 1565, 970]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out2"
	  SID			  "3802"
	  Ports			  [1, 1]
	  Position		  [1530, 135, 1560, 145]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out3"
	  SID			  "3803"
	  Ports			  [1, 1]
	  Position		  [1530, 175, 1560, 185]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out4"
	  SID			  "3804"
	  Ports			  [1, 1]
	  Position		  [1530, 215, 1560, 225]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out5"
	  SID			  "3805"
	  Ports			  [1, 1]
	  Position		  [1530, 255, 1560, 265]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out6"
	  SID			  "3806"
	  Ports			  [1, 1]
	  Position		  [1535, 800, 1565, 810]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out7"
	  SID			  "3807"
	  Ports			  [1, 1]
	  Position		  [1535, 840, 1565, 850]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out8"
	  SID			  "3808"
	  Ports			  [1, 1]
	  Position		  [1535, 880, 1565, 890]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out9"
	  SID			  "3809"
	  Ports			  [1, 1]
	  Position		  [1535, 920, 1565, 930]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "3343"
	  Ports			  [5, 1]
	  Position		  [895, 18, 940, 122]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux1"
	  SID			  "3359"
	  Ports			  [5, 1]
	  Position		  [895, 123, 940, 227]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux2"
	  SID			  "3360"
	  Ports			  [5, 1]
	  Position		  [895, 228, 940, 332]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
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	  SID			  "3361"
	  Ports			  [5, 1]
	  Position		  [895, 333, 940, 437]
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	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
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	  SID			  "3362"
	  Ports			  [5, 1]
	  Position		  [895, 438, 940, 542]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
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	  SID			  "3363"
	  Ports			  [5, 1]
	  Position		  [895, 543, 940, 647]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux6"
	  SID			  "3364"
	  Ports			  [5, 1]
	  Position		  [895, 648, 940, 752]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux7"
	  SID			  "3365"
	  Ports			  [5, 1]
	  Position		  [895, 858, 940, 962]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux8"
	  SID			  "3366"
	  Ports			  [5, 1]
	  Position		  [895, 753, 940, 857]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux9"
	  SID			  "3367"
	  Ports			  [5, 1]
	  Position		  [895, 963, 940, 1067]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('black');d"
	  "isp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select10"
	  SID			  "3289"
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	  Position		  [1355, 508, 1405, 532]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
	  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12.33 15.33 15"
	  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
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	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFx_IQ_RX_WEN"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select11"
	  SID			  "3290"
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	  Position		  [1355, 548, 1405, 572]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
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	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
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	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
	  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12.33 15.33 15"
	  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
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	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFx_IQ_TX_ADDR"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select12"
	  SID			  "3291"
	  Ports			  [1, 1]
	  Position		  [1355, 588, 1405, 612]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
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	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
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	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	  Port {
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	    Name		    "RFx_IQ_TX_DOUT"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
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	Block {
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	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
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	  "f('','COMMENT: end icon text');"
	  Port {
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	    Name		    "RFx_IQ_TX_SEL"
	    RTWStorageClass	    "Auto"
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	Block {
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	  "f('','COMMENT: end icon text');"
	  Port {
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	    RTWStorageClass	    "Auto"
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	Block {
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	  Port {
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	    RTWStorageClass	    "Auto"
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	Block {
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	Block {
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	Block {
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	  Port {
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	Block {
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	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
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	  "f('','COMMENT: end icon text');"
	  Port {
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	    RTWStorageClass	    "Auto"
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	Block {
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	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
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	  Port {
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	Block {
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	  Port {
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	Block {
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	Block {
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	  Position		  [1585, 789, 1670, 981]
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	Line {
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	Line {
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	  SrcBlock		  "RFA Delay Cycle for Select6"
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	  Points		  [40, 0]
	  Branch {
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	  Branch {
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	}
	Line {
	  Name			  "RFx_IQ_TX_EN"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select7"
	  SrcPort		  1
	  Points		  [55, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, -260]
	    DstBlock		    "Gateway Out2"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFx_IQ_RX_ADDR"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select8"
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    3
	  }
	  Branch {
	    Points		    [0, -260]
	    DstBlock		    "Gateway Out3"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFx_IQ_RX_DOUT"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select9"
	  SrcPort		  1
	  Points		  [85, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    4
	  }
	  Branch {
	    Points		    [0, -260]
	    DstBlock		    "Gateway Out4"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFx_IQ_RX_WEN"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select10"
	  SrcPort		  1
	  Points		  [100, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    5
	  }
	  Branch {
	    Points		    [0, -260]
	    DstBlock		    "Gateway Out5"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFx_IQ_TX_ADDR"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select11"
	  SrcPort		  1
	  Points		  [100, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    6
	  }
	  Branch {
	    Points		    [0, 245]
	    DstBlock		    "Gateway Out6"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFx_IQ_TX_DOUT"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select12"
	  SrcPort		  1
	  Points		  [85, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    7
	  }
	  Branch {
	    Points		    [0, 245]
	    DstBlock		    "Gateway Out7"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFx_IQ_TX_SEL"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select13"
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    8
	  }
	  Branch {
	    Points		    [0, 245]
	    DstBlock		    "Gateway Out8"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFx_IQ_TX_DOUT_RAW"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select14"
	  SrcPort		  1
	  Points		  [55, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    9
	  }
	  Branch {
	    Points		    [0, 245]
	    DstBlock		    "Gateway Out9"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFx_IQ_TX_DATA"
	  Labels		  [0, 0]
	  SrcBlock		  "RFA Delay Cycle for Select15"
	  SrcPort		  1
	  Points		  [40, 0]
	  Branch {
	    DstBlock		    "ChipScope RFx"
	    DstPort		    10
	  }
	  Branch {
	    Points		    [0, 245]
	    DstBlock		    "Gateway Out10"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "From16"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From6"
	  SrcPort		  1
	  Points		  [275, 0]
	  Branch {
	    DstBlock		    "Mux"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 105]
	    Branch {
	      DstBlock		      "Mux1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 105]
	      Branch {
		DstBlock		"Mux2"
		DstPort			1
	      }
	      Branch {
		Points			[0, 105]
		Branch {
		  DstBlock		  "Mux3"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 105]
		  Branch {
		    DstBlock		    "Mux4"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 105]
		    Branch {
		    DstBlock		    "Mux5"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 105]
		    Branch {
		    DstBlock		    "Mux6"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 105]
		    Branch {
		    DstBlock		    "Mux8"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 105]
		    Branch {
		    DstBlock		    "Mux7"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 105]
		    DstBlock		    "Mux9"
		    DstPort		    1
		    }
		    }
		    }
		    }
		  }
		}
	      }
	    }
	  }
	}
	Line {
	  SrcBlock		  "From3"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  Points		  [150, 0; 0, 290]
	  DstBlock		  "RFA Delay Cycle for Select18"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  Points		  [140, 0; 0, 225]
	  DstBlock		  "RFA Delay Cycle for Select7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux2"
	  SrcPort		  1
	  Points		  [130, 0; 0, 160]
	  DstBlock		  "RFA Delay Cycle for Select8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux3"
	  SrcPort		  1
	  Points		  [120, 0; 0, 95]
	  DstBlock		  "RFA Delay Cycle for Select9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux4"
	  SrcPort		  1
	  Points		  [120, 0; 0, 30]
	  DstBlock		  "RFA Delay Cycle for Select10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux5"
	  SrcPort		  1
	  Points		  [120, 0; 0, -35]
	  DstBlock		  "RFA Delay Cycle for Select19"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux6"
	  SrcPort		  1
	  Points		  [130, 0; 0, -100]
	  DstBlock		  "RFA Delay Cycle for Select12"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux8"
	  SrcPort		  1
	  Points		  [140, 0; 0, -165]
	  DstBlock		  "RFA Delay Cycle for Select13"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux7"
	  SrcPort		  1
	  Points		  [150, 0; 0, -230]
	  DstBlock		  "RFA Delay Cycle for Select14"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux9"
	  SrcPort		  1
	  Points		  [160, 0; 0, -295]
	  DstBlock		  "RFA Delay Cycle for Select15"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From25"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From5"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From7"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From13"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From8"
	  SrcPort		  1
	  DstBlock		  "Mux3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From14"
	  SrcPort		  1
	  DstBlock		  "Mux3"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From9"
	  SrcPort		  1
	  DstBlock		  "Mux4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From15"
	  SrcPort		  1
	  DstBlock		  "Mux4"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From24"
	  SrcPort		  1
	  DstBlock		  "Mux5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From4"
	  SrcPort		  1
	  DstBlock		  "Mux5"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From10"
	  SrcPort		  1
	  DstBlock		  "Mux6"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From17"
	  SrcPort		  1
	  DstBlock		  "Mux6"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From11"
	  SrcPort		  1
	  DstBlock		  "Mux8"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From18"
	  SrcPort		  1
	  DstBlock		  "Mux8"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From12"
	  SrcPort		  1
	  DstBlock		  "Mux7"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From19"
	  SrcPort		  1
	  DstBlock		  "Mux7"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From1"
	  SrcPort		  1
	  DstBlock		  "Mux9"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From2"
	  SrcPort		  1
	  DstBlock		  "Mux9"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From20"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From21"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From22"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From23"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From26"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From27"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From28"
	  SrcPort		  1
	  DstBlock		  "Mux3"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From29"
	  SrcPort		  1
	  DstBlock		  "Mux3"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From30"
	  SrcPort		  1
	  DstBlock		  "Mux4"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From31"
	  SrcPort		  1
	  DstBlock		  "Mux4"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From32"
	  SrcPort		  1
	  DstBlock		  "Mux5"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From33"
	  SrcPort		  1
	  DstBlock		  "Mux5"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From34"
	  SrcPort		  1
	  DstBlock		  "Mux6"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From35"
	  SrcPort		  1
	  DstBlock		  "Mux6"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From36"
	  SrcPort		  1
	  DstBlock		  "Mux8"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From37"
	  SrcPort		  1
	  DstBlock		  "Mux8"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From38"
	  SrcPort		  1
	  DstBlock		  "Mux7"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From39"
	  SrcPort		  1
	  DstBlock		  "Mux7"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From40"
	  SrcPort		  1
	  DstBlock		  "Mux9"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From41"
	  SrcPort		  1
	  DstBlock		  "Mux9"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "Gateway Out1"
	  SrcPort		  1
	  DstBlock		  "Rx Mem Interface"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gateway Out2"
	  SrcPort		  1
	  DstBlock		  "Rx Mem Interface"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out3"
	  SrcPort		  1
	  DstBlock		  "Rx Mem Interface"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Gateway Out4"
	  SrcPort		  1
	  DstBlock		  "Rx Mem Interface"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Gateway Out5"
	  SrcPort		  1
	  DstBlock		  "Rx Mem Interface"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "Gateway Out6"
	  SrcPort		  1
	  DstBlock		  "Tx Mem Interface"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gateway Out7"
	  SrcPort		  1
	  DstBlock		  "Tx Mem Interface"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out8"
	  SrcPort		  1
	  DstBlock		  "Tx Mem Interface"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Gateway Out9"
	  SrcPort		  1
	  DstBlock		  "Tx Mem Interface"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Gateway Out10"
	  SrcPort		  1
	  DstBlock		  "Tx Mem Interface"
	  DstPort		  5
	}
	Annotation {
	  Name			  "Chipscope for debug signals"
	  Position		  [140, 26]
	  FontSize		  18
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "Constant1"
      SID		      "4667"
      Ports		      [0, 1]
      Position		      [1845, 1020, 1870, 1040]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      const		      "0"
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,400,346"
      block_type	      "constant"
      block_version	      "10.1.2"
      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 "
      "12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 1"
      "2.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ])"
      ";\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o"
      "utput',1,'0');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant13"
      SID		      "4655"
      Ports		      [0, 1]
      Position		      [1845, 880, 1870, 900]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      const		      "0"
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,400,346"
      block_type	      "constant"
      block_version	      "10.1.2"
      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 "
      "12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 1"
      "2.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ])"
      ";\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o"
      "utput',1,'0');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant2"
      SID		      "4670"
      Ports		      [0, 1]
      Position		      [1845, 1160, 1870, 1180]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      const		      "0"
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,400,346"
      block_type	      "constant"
      block_version	      "10.1.2"
      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 "
      "12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 1"
      "2.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ])"
      ";\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o"
      "utput',1,'0');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant3"
      SID		      "4673"
      Ports		      [0, 1]
      Position		      [1845, 1300, 1870, 1320]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      const		      "0"
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,400,346"
      block_type	      "constant"
      block_version	      "10.1.2"
      sg_icon_stat	      "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 "
      "12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 1"
      "2.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ])"
      ";\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o"
      "utput',1,'0');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Convert1"
      SID		      "4719"
      Ports		      [1, 1]
      Position		      [495, 556, 530, 574]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Convert"
      SourceType	      "Xilinx Type Converter Block"
      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do "
      "not."
      gui_display_data_type   "Boolean"
      arith_type	      "Boolean"
      n_bits		      "16"
      bin_pt		      "14"
      float_type	      "Single"
      exp_bits		      "8"
      fraction_bits	      "24"
      quantization	      "Truncate"
      overflow		      "Wrap"
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      pipeline		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,461,375"
      block_type	      "convert"
      block_version	      "8.2"
      sg_icon_stat	      "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11."
      "22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11."
      "22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 "
      "1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.9"
      "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Convert2"
      SID		      "5"
      Ports		      [1, 1]
      Position		      [595, 956, 630, 974]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Convert"
      SourceType	      "Xilinx Type Converter Block"
      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do "
      "not."
      gui_display_data_type   "Fixed-point"
      arith_type	      "Boolean"
      n_bits		      "16"
      bin_pt		      "14"
      float_type	      "Single"
      exp_bits		      "8"
      fraction_bits	      "24"
      quantization	      "Truncate"
      overflow		      "Wrap"
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      pipeline		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,461,375"
      block_type	      "convert"
      block_version	      "8.2"
      sg_icon_stat	      "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11."
      "22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11."
      "22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 "
      "1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.9"
      "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Convert3"
      SID		      "4773"
      Ports		      [1, 1]
      Position		      [290, 1236, 325, 1254]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Convert"
      SourceType	      "Xilinx Type Converter Block"
      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do "
      "not."
      gui_display_data_type   "Fixed-point"
      arith_type	      "Boolean"
      n_bits		      "16"
      bin_pt		      "14"
      float_type	      "Single"
      exp_bits		      "8"
      fraction_bits	      "24"
      quantization	      "Truncate"
      overflow		      "Wrap"
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      pipeline		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,461,375"
      block_type	      "convert"
      block_version	      "8.2"
      sg_icon_stat	      "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11."
      "22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11."
      "22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 "
      "1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.9"
      "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "EDK Processor"
      SID		      "4899"
      Ports		      []
      Position		      [95, 15, 157, 79]
      CopyFcn		      "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallback(gcbh);"
      DeleteFcn		      "xlDestroyGui(gcbh);"
      LoadFcn		      "xlBlockLoadCallback(gcbh);"
      ModelCloseFcn	      "xlDestroyGui(gcbh);"
      PreSaveFcn	      "xlBlockPreSaveCallback(gcbh);"
      PostSaveFcn	      "xlBlockPostSaveCallback(gcbh);"
      DestroyFcn	      "xlDestroyGui(gcbh);"
      OpenFcn		      "bh=gcbh;xlProcBlockCallbacks('populatesharedmemorylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.x"
      "ml', @xlProcBlockEnablement, @xlProcBlockAction);"
      CloseFcn		      "xlDestroyGui(gcbh);"
      MoveFcn		      "xlBlockMoveCallback(gcbh);"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      MaskType		      "Xilinx EDK Processor Block"
      MaskDescription	      "Xilinx EDK Processor"
      MaskHelp		      "eval('');xlDoc('-book','sysgen','-topic','EDK_Processor');"
      MaskPromptString	      "Configure Processor for|XPS Project| |Available Memories| | |Bus Type|Base Address| |Loc"
      "k| |Dual Clocks| |Register Read-Back|Constraint File| |Inherit Device Type|Initial Program| |Enable Co-Debug wit"
      "h Xilinx SDK (Beta)| | | | | | | | | | | | | | | | "
      MaskStyleString	      "popup(EDK pcore generation|HDL netlisting),edit,edit,edit,edit,edit,popup(AXI|PLB),edit,e"
      "dit,checkbox,edit,checkbox,edit,checkbox,edit,edit,checkbox,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edi"
      "t,edit,edit,edit,edit,edit,edit,edit,edit,edit"
      MaskVariables	      "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemories=&4;portInterfaceTable=&5;bus_type_sgadvanc"
      "ed=&6;bus_type=&7;baseaddr=&8;baseaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clock"
      "=@12;reg_readback_sgadvanced=&13;reg_readback=@14;ucf_file=&15;inheritDeviceType_sgadvanced=&16;inheritDeviceTyp"
      "e=@17;elf_file=&18;codebug_sgadvanced=&19;codebug=@20;clock_name=&21;internalPortList=&22;resetPolarity=&23;memx"
      "table=&24;procinfo=&25;memmapdirty=&26;blockname=&27;xpsintstyle=&28;has_advanced_control=@29;sggui_pos=&30;bloc"
      "k_type=&31;block_version=&32;sg_icon_stat=&33;sg_mask_display=&34;sg_list_contents=&35;sg_blockgui_xml=&36;"
      MaskTunableValueString  "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,"
      "on,on,on,on,on,on,on"
      MaskCallbackString      "|||||||||||||||||||||||||||||||||||"
      MaskEnableString	      "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,o"
      "n,on,on,on,on,on,on"
      MaskVisibilityString    "on,on,off,on,on,off,on,on,off,on,off,on,off,on,on,off,on,on,off,on,off,off,off,off,off,"
      "off,off,off,off,off,off,off,off,off,off,off"
      MaskToolTipString	      "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,"
      "on,on,on,on,on,on,on"
      MaskInitialization      "try\n  tmp_gcb = gcb;\n  tmp_gcbh = gcbh;\n  if (strcmp('SysGenIndex',get_param(bdroot("
      "tmp_gcbh),'tag')) && ~isempty(regexp(bdroot(tmp_gcb), '^xbs', 'once')))\n    return;\n  end;\n  xlMungeMaskParam"
      "s;\n\n  block_type='edkprocessor';\n\n  serialized_declarations = '{''block_type''=>''String''}';\n  xledkproces"
      "sor_init();\n  ptable_ = xlblockprep(get_param(tmp_gcb, 'MaskWSVariables'));\n  try\n    xlBlockMoveCallback(tmp"
      "_gcbh);\n  catch \n     clear global xl_updateicon_recursion_guard;\n  end;\ncatch\n  global dbgsysgen;\n  if(~i"
      "sempty(dbgsysgen) && dbgsysgen)\n    e = regexprep(lasterr, '\\n', '\\nError: ');\n    disp(['Error: While runni"
      "ng MaskInit code on block ' tmp_gcb ': ' e]);\n    error(e);\n  end\nend\n"
      MaskSelfModifiable      on
      MaskDisplay	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 62 62 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0"
      ".91 ]);\nplot([0 62 62 0 0 ],[0 0 64 64 0 ]);\npatch([13.2 24.76 32.76 40.76 48.76 32.76 21.2 13.2 ],[40.88 40.8"
      "8 48.88 40.88 48.88 48.88 48.88 40.88 ],[1 1 1 ]);\npatch([21.2 32.76 24.76 13.2 21.2 ],[32.88 32.88 40.88 40.88"
      " 32.88 ],[0.931 0.946 0.973 ]);\npatch([13.2 24.76 32.76 21.2 13.2 ],[24.88 24.88 32.88 32.88 24.88 ],[1 1 1 ]);"
      "\npatch([21.2 48.76 40.76 32.76 24.76 13.2 21.2 ],[16.88 16.88 24.88 16.88 24.88 24.88 16.88 ],[0.931 0.946 0.97"
      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ndisp('');\n\nfprintf("
      "'','COMMENT: end icon text');"
      MaskIconFrame	      off
      MaskIconOpaque	      on
      MaskIconRotate	      "none"
      MaskPortRotate	      "default"
      MaskIconUnits	      "autoscale"
      MaskValueString	      "EDK pcore generation||<qt bgcolor=\"#FFFFFF\"><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/s"
      "ysgen/data/images/registerplus.gif\"> &lt;&lt;TX_DELAY&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/IS"
      "E/sysgen/data/images/registerplus.gif\"> &lt;&lt;RF_RX_IQ_BUF_RD_BYTE_OFFSET&gt;&gt;<br></div><div><img src=\"C:"
      "/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;LOAD_TIMER_64_LSB&gt;&gt;<br></div><div><"
      "img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;RF_RX_IQ_THRESHOLD&gt;&gt;<br"
      "></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;RX_LENGTH&gt;&gt"
      ";<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TX_LENGTH&gt"
      ";&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;RF_RX_IQ"
      "_BUF_WR_BYTE_OFFSET&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.g"
      "if\"> &lt;&lt;RF_BUFFER_SEL&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/regist"
      "erplus.gif\"> &lt;&lt;RX_BUF_EN&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/re"
      "gisterplus.gif\"> &lt;&lt;RF_TX_IQ_THRESHOLD&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/d"
      "ata/images/registerplus.gif\"> &lt;&lt;CONFIG&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/"
      "data/images/registerplus.gif\"> &lt;&lt;RF_ERROR_CLR&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/"
      "sysgen/data/images/registerplus.gif\"> &lt;&lt;RF_TX_IQ_BUF_WR_BYTE_OFFSET&gt;&gt;<br></div><div><img src=\"C:/X"
      "ilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;LOAD_TIMER_64_MSB&gt;&gt;<br></div><div><im"
      "g src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TX_BUF_EN&gt;&gt;<br></div><div"
      "><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;RF_TX_IQ_BUF_OCCUPANCY&gt;&"
      "gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;RF_TX_IQ_B"
      "UF_RD_BYTE_OFFSET&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif"
      "\"> &lt;&lt;AGC_GAINS&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus"
      ".gif\"> &lt;&lt;RF_RX_IQ_BUF_OCCUPANCY&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/im"
      "ages/registerplus.gif\"> &lt;&lt;RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE&gt;&gt;<br></div><div><img src=\"C:/Xilinx/1"
      "4.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;INT_STATUS&gt;&gt;<br></div><div><img src=\"C:/Xil"
      "inx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;BUFF_SIZES&gt;&gt;<br></div><div><img src=\"C"
      ":/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;DESIGN_VER&gt;&gt;<br></div><div><img sr"
      "c=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;RF_TX_IQ_STATUS&gt;&gt;<br></div><d"
      "iv><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;STATUS&gt;&gt;<br></div><"
      "div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;RFCD_AGC_DONE_RSSI&gt;&g"
      "t;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;RFAB_AGC_DO"
      "NE_RSSI&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&l"
      "t;TIMER_64_MSB&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\">"
      " &lt;&lt;TIMER_64_LSB&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus"
      ".gif\"> &lt;&lt;AGC_DONE_ADDR&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memo"
      "ryplus.gif\"> &lt;&lt;RFD_IQ_Tx_Buffer&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/im"
      "ages/memoryplus.gif\"> &lt;&lt;RFD_RSSI_Buffer&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen"
      "/data/images/memoryplus.gif\"> &lt;&lt;RFD_IQ_Rx_Buffer&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/I"
      "SE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;RFC_IQ_Tx_Buffer&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4"
      "/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;RFC_RSSI_Buffer&gt;&gt;<br></div><div><img src=\"C:/Xil"
      "inx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;RFC_IQ_Rx_Buffer&gt;&gt;<br></div><div><img src"
      "=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;RFB_IQ_Tx_Buffer&gt;&gt;<br></div><div"
      "><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;RFB_RSSI_Buffer&gt;&gt;<br></"
      "div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;RFB_IQ_Rx_Buffer&gt;&"
      "gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;RFA_IQ_Tx_Bu"
      "ffer&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;RFA"
      "_RSSI_Buffer&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt"
      ";&lt;RFA_IQ_Rx_Buffer&gt;&gt;<br></div></qt>|<empty>|{'exposed'=>[],'portdir'=>[],'portname'=>[],'shortname'=>[]"
      "}||PLB|0x80000000||off||on||on|||off|||on|plb|{}|0|{'mladdr'=>[0.00000000000000000,1.00000000000000000,2.0000000"
      "0000000000,3.00000000000000000,4.00000000000000000,5.00000000000000000,6.00000000000000000,7.00000000000000000,8"
      ".00000000000000000,9.00000000000000000,10.00000000000000000,11.00000000000000000,12.00000000000000000,13.0000000"
      "0000000000,14.00000000000000000,0.00000000000000000,1.00000000000000000,2.00000000000000000,3.00000000000000000,"
      "4.00000000000000000,5.00000000000000000,6.00000000000000000,7.00000000000000000,8.00000000000000000,9.0000000000"
      "0000000,10.00000000000000000,11.00000000000000000,12.00000000000000000,13.00000000000000000,14.00000000000000000"
      ",-1.00000000000000000,-1.00000000000000000,-1.00000000000000000,-1.00000000000000000,-1.00000000000000000,-1.000"
      "00000000000000,-1.00000000000000000,-1.00000000000000000,-1.00000000000000000,-1.00000000000000000,-1.0000000000"
      "0000000,-1.00000000000000000],'mlist'=>['w2_warplab_buffers/Memory-mapped Registers/TxDelay','w2_warplab_buffers"
      "/Memory-mapped Registers/From Register9','w2_warplab_buffers/Memory-mapped Registers/From Register8','w2_warplab"
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	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
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	  Port {
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	    Name		    "TIMER_64_MSB_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register13"
	  SID			  "4899:278"
	  Ports			  [0, 1]
	  Position		  [400, 2492, 460, 2548]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TIMER_64_LSB'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "TIMER_64_LSB_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register14"
	  SID			  "4899:279"
	  Ports			  [0, 1]
	  Position		  [400, 2602, 460, 2658]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'AGC_DONE_ADDR'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "AGC_DONE_ADDR_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register2"
	  SID			  "4899:267"
	  Ports			  [0, 1]
	  Position		  [400, 1337, 460, 1393]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'AGC_GAINS'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "AGC_GAINS_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register3"
	  SID			  "4899:268"
	  Ports			  [0, 1]
	  Position		  [400, 1442, 460, 1498]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_BUF_OCCUPANCY'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_RX_IQ_BUF_OCCUPANCY_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register4"
	  SID			  "4899:269"
	  Ports			  [0, 1]
	  Position		  [400, 1547, 460, 1603]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register5"
	  SID			  "4899:270"
	  Ports			  [0, 1]
	  Position		  [400, 1652, 460, 1708]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'INT_STATUS'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "INT_STATUS_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register6"
	  SID			  "4899:271"
	  Ports			  [0, 1]
	  Position		  [400, 1757, 460, 1813]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'BUFF_SIZES'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "BUFF_SIZES_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register7"
	  SID			  "4899:272"
	  Ports			  [0, 1]
	  Position		  [400, 1862, 460, 1918]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'DESIGN_VER'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "DESIGN_VER_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register8"
	  SID			  "4899:273"
	  Ports			  [0, 1]
	  Position		  [400, 1967, 460, 2023]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_TX_IQ_STATUS'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_TX_IQ_STATUS_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register9"
	  SID			  "4899:274"
	  Ports			  [0, 1]
	  Position		  [400, 2072, 460, 2128]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'STATUS'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "STATUS_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "PLB_ABus"
	  SID			  "4899:254"
	  Ports			  [1, 1]
	  Position		  [175, 455, 245, 475]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_ABus'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	  Port {
	    PortNumber		    1
	    Name		    "PLB_ABus"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "PLB_PAValid"
	  SID			  "4899:256"
	  Ports			  [1, 1]
	  Position		  [175, 520, 245, 540]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_PAValid'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	  Port {
	    PortNumber		    1
	    Name		    "PLB_PAValid"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "PLB_RNW"
	  SID			  "4899:258"
	  Ports			  [1, 1]
	  Position		  [175, 590, 245, 610]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_RNW'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	  Port {
	    PortNumber		    1
	    Name		    "PLB_RNW"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "PLB_wrDBus"
	  SID			  "4899:260"
	  Ports			  [1, 1]
	  Position		  [175, 660, 245, 680]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_wrDBus'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	  Port {
	    PortNumber		    1
	    Name		    "PLB_wrDBus"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "SPLB_Rst"
	  SID			  "4899:252"
	  Ports			  [1, 1]
	  Position		  [175, 385, 245, 405]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'SPLB_Rst'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	  Port {
	    PortNumber		    1
	    Name		    "SPLB_Rst"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory"
	  SID			  "4899:295"
	  Ports			  [3, 1]
	  Position		  [885, 2039, 965, 2131]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFD_IQ_Tx_Buffer'"
	  depth			  "16384"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFD_IQ_Tx_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory1"
	  SID			  "4899:296"
	  Ports			  [3, 1]
	  Position		  [885, 2179, 965, 2271]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFD_RSSI_Buffer'"
	  depth			  "2048"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFD_RSSI_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory10"
	  SID			  "4899:305"
	  Ports			  [3, 1]
	  Position		  [885, 3439, 965, 3531]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFA_RSSI_Buffer'"
	  depth			  "2048"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFA_RSSI_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory11"
	  SID			  "4899:306"
	  Ports			  [3, 1]
	  Position		  [885, 3579, 965, 3671]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFA_IQ_Rx_Buffer'"
	  depth			  "16384"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFA_IQ_Rx_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory2"
	  SID			  "4899:297"
	  Ports			  [3, 1]
	  Position		  [885, 2319, 965, 2411]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFD_IQ_Rx_Buffer'"
	  depth			  "16384"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFD_IQ_Rx_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory3"
	  SID			  "4899:298"
	  Ports			  [3, 1]
	  Position		  [885, 2459, 965, 2551]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFC_IQ_Tx_Buffer'"
	  depth			  "16384"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFC_IQ_Tx_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory4"
	  SID			  "4899:299"
	  Ports			  [3, 1]
	  Position		  [885, 2599, 965, 2691]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFC_RSSI_Buffer'"
	  depth			  "2048"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFC_RSSI_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory5"
	  SID			  "4899:300"
	  Ports			  [3, 1]
	  Position		  [885, 2739, 965, 2831]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFC_IQ_Rx_Buffer'"
	  depth			  "16384"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFC_IQ_Rx_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory6"
	  SID			  "4899:301"
	  Ports			  [3, 1]
	  Position		  [885, 2879, 965, 2971]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFB_IQ_Tx_Buffer'"
	  depth			  "16384"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFB_IQ_Tx_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory7"
	  SID			  "4899:302"
	  Ports			  [3, 1]
	  Position		  [885, 3019, 965, 3111]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFB_RSSI_Buffer'"
	  depth			  "2048"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFB_RSSI_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory8"
	  SID			  "4899:303"
	  Ports			  [3, 1]
	  Position		  [885, 3159, 965, 3251]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFB_IQ_Rx_Buffer'"
	  depth			  "16384"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFB_IQ_Rx_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory9"
	  SID			  "4899:304"
	  Ports			  [3, 1]
	  Position		  [885, 3299, 965, 3391]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'RFA_IQ_Tx_Buffer'"
	  depth			  "16384"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  off
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RFA_IQ_Tx_Buffer_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_addrAck"
	  SID			  "4899:238"
	  Ports			  [1, 1]
	  Position		  [670, 70, 730, 90]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_addrAck'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_rdComp"
	  SID			  "4899:240"
	  Ports			  [1, 1]
	  Position		  [670, 170, 730, 190]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdComp'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_rdDAck"
	  SID			  "4899:242"
	  Ports			  [1, 1]
	  Position		  [670, 610, 730, 630]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDAck'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_rdDBus"
	  SID			  "4899:244"
	  Ports			  [1, 1]
	  Position		  [670, 700, 730, 720]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDBus'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_wait"
	  SID			  "4899:246"
	  Ports			  [1, 1]
	  Position		  [180, 315, 240, 335]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wait'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_wrComp"
	  SID			  "4899:250"
	  Ports			  [1, 1]
	  Position		  [670, 520, 730, 540]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrComp'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_wrDAck"
	  SID			  "4899:248"
	  Ports			  [1, 1]
	  Position		  [670, 310, 730, 330]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrDAck'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator"
	  SID			  "4899:237"
	  Position		  [915, 50, 935, 70]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "4899:239"
	  Position		  [915, 120, 935, 140]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "4899:241"
	  Position		  [915, 320, 935, 340]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator3"
	  SID			  "4899:243"
	  Position		  [915, 390, 935, 410]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator4"
	  SID			  "4899:245"
	  Position		  [420, 315, 440, 335]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator5"
	  SID			  "4899:247"
	  Position		  [915, 185, 935, 205]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator6"
	  SID			  "4899:249"
	  Position		  [915, 255, 935, 275]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register"
	  SID			  "4899:280"
	  Ports			  [2, 1]
	  Position		  [895, 457, 955, 513]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TX_DELAY'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "TX_DELAY_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register1"
	  SID			  "4899:281"
	  Ports			  [2, 1]
	  Position		  [895, 562, 955, 618]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_BUF_RD_BYTE_OFFSET'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_RX_IQ_BUF_RD_BYTE_OFFSET_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register10"
	  SID			  "4899:290"
	  Ports			  [2, 1]
	  Position		  [895, 1512, 955, 1568]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'CONFIG'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "CONFIG_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register11"
	  SID			  "4899:291"
	  Ports			  [2, 1]
	  Position		  [895, 1617, 955, 1673]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_ERROR_CLR'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "9"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_ERROR_CLR_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register12"
	  SID			  "4899:292"
	  Ports			  [2, 1]
	  Position		  [895, 1722, 955, 1778]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_TX_IQ_BUF_WR_BYTE_OFFSET'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_TX_IQ_BUF_WR_BYTE_OFFSET_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register13"
	  SID			  "4899:293"
	  Ports			  [2, 1]
	  Position		  [895, 1827, 955, 1883]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'LOAD_TIMER_64_MSB'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "LOAD_TIMER_64_MSB_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register14"
	  SID			  "4899:294"
	  Ports			  [2, 1]
	  Position		  [895, 1932, 955, 1988]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TX_BUF_EN'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "TX_BUF_EN_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register2"
	  SID			  "4899:282"
	  Ports			  [2, 1]
	  Position		  [895, 667, 955, 723]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'LOAD_TIMER_64_LSB'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "LOAD_TIMER_64_LSB_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register3"
	  SID			  "4899:283"
	  Ports			  [2, 1]
	  Position		  [895, 772, 955, 828]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_THRESHOLD'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_RX_IQ_THRESHOLD_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register4"
	  SID			  "4899:284"
	  Ports			  [2, 1]
	  Position		  [895, 882, 955, 938]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RX_LENGTH'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RX_LENGTH_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register5"
	  SID			  "4899:285"
	  Ports			  [2, 1]
	  Position		  [895, 987, 955, 1043]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TX_LENGTH'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "TX_LENGTH_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register6"
	  SID			  "4899:286"
	  Ports			  [2, 1]
	  Position		  [895, 1092, 955, 1148]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_BUF_WR_BYTE_OFFSET'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_RX_IQ_BUF_WR_BYTE_OFFSET_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register7"
	  SID			  "4899:287"
	  Ports			  [2, 1]
	  Position		  [895, 1197, 955, 1253]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_BUFFER_SEL'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_BUFFER_SEL_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register8"
	  SID			  "4899:288"
	  Ports			  [2, 1]
	  Position		  [895, 1302, 955, 1358]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RX_BUF_EN'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RX_BUF_EN_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register9"
	  SID			  "4899:289"
	  Ports			  [2, 1]
	  Position		  [895, 1407, 955, 1463]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_TX_IQ_THRESHOLD'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "RF_TX_IQ_THRESHOLD_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "plb_decode"
	  SID			  "4899:264"
	  Ports			  [7, 9]
	  Position		  [345, 384, 515, 796]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/MCode"
	  SourceType		  "Xilinx MCode Block Block"
	  infoedit		  "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of t"
	  "he block are input arguments of the function. The output ports of the block are output arguments of the function."
	  mfname		  "xlmax"
	  explicit_period	  off
	  period		  "1"
	  dbl_ovrd		  off
	  enable_stdout		  off
	  enable_debug		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  mfilecontent		  "function [wrDBusReg, addrAck, rdComp, wrDAck, bankAddr, RNWReg, rdDAck, rdDBus, linearAddr] = plb_"
	  "bus_decode(plbRst, plbABus, plbPAValid, plbRNW, plbWrDBus, rdData, addrPref)\n\n% constant variables (TODO: should "
	  "pass from outside)\nADDRPREF_LEN = 10;\nBANKADDR_LEN = 2;\nLINEARADDR_LEN = 18;\nABUS_LEN = 32;\nDBUS_LEN = 32;\n\n"
	  "% declare and initialize persistent variables\n% register input bus signals\npersistent plbRstReg_, plbRstReg_ = xl"
	  "_state(0, {xlBoolean});\npersistent plbABusReg_, plbABusReg_ = xl_state(0, {xlUnsigned, ABUS_LEN, 0});\npersistent "
	  "plbPAValidReg_, plbPAValidReg_ = xl_state(0, {xlBoolean});\npersistent plbRNWReg_, plbRNWReg_ = xl_state(0, {xlUnsi"
	  "gned, 1, 0});\npersistent plbWrDBusReg_, plbWrDBusReg_ = xl_state(0, {xlUnsigned, DBUS_LEN, 0});\n\n% ===== rest of"
	  " the outputs =====\n\nbankAddr   = xl_slice(plbABusReg_, 2+BANKADDR_LEN+LINEARADDR_LEN-1, 2+LINEARADDR_LEN);\nlinea"
	  "rAddr = xl_slice(plbABusReg_, 2+LINEARADDR_LEN-1, 2);\nRNWReg = plbRNWReg_;\nwrDBusReg = plbWrDBusReg_;\n\n% ===== "
	  "p_select =====\n\n% register PAValid\npersistent aValidReg, aValidReg = xl_state(0, {xlBoolean});\naValidReg = plbP"
	  "AValidReg_;\n\n% extract and register the address prefix\naddrPref_in = xl_slice(plbABusReg_, xl_nbits(plbABusReg_)"
	  "-1, xl_nbits(plbABusReg_)-ADDRPREF_LEN);\nif addrPref_in == addrPref\n    ps1 = true;\nelse \n    ps1 = false;\nend"
	  " \n\npersistent ps1Reg, ps1Reg = xl_state(0, ps1);\nps1Reg = ps1;\n\nps = xl_and(ps1Reg, aValidReg);\n\n% ===== add"
	  "rAck =====\n\n% register ps\npersistent psReg, psReg = xl_state(0, ps);\n\naddrAck = xfix({xlUnsigned, 1, 0}, xl_an"
	  "d(xl_not(plbRstReg_), ps, xl_not(psReg)));\n\npsReg = ps;\n\n% ===== rdComp, rd/wr DAck =====\n \nrdComp1 = xfix({x"
	  "lUnsigned, 1, 0}, xl_and(addrAck, RNWReg));\n\nNUM_rdCompDelay = 3;\npersistent rdCompDelay, rdCompDelay = xl_state"
	  "(zeros(1, NUM_rdCompDelay), rdComp1, NUM_rdCompDelay);\nrdComp2 = rdCompDelay.back;\nrdCompDelay.push_front_pop_bac"
	  "k(rdComp1);\n\npersistent rdCompReg, rdCompReg = xl_state(0, rdComp1);\nrdComp = rdCompReg;\nrdCompReg = rdComp2;\n"
	  "\npersistent rdDAckReg, rdDAckReg = xl_state(0, rdComp1);\nrdDAck = rdDAckReg;\nrdDAckReg = rdComp;\n\npersistent w"
	  "rDAckReg, wrDAckReg = xl_state(0, addrAck);\nwrDAck = wrDAckReg;\nwrDAckReg = xl_and(addrAck, xl_not(RNWReg));\n\n%"
	  " ===== rdDBus =====\n\nrdSel = xl_or(rdComp2, rdComp);\n\nif rdSel == 1\n    rdDBus1 = rdData;\nelse\n    rdDBus1 ="
	  " 0;\nend % if\n\npersistent rdDBusReg, rdDBusReg = xl_state(0, rdDBus1);\nrdDBus = rdDBusReg;\nrdDBusReg = rdDBus1;"
	  "\n\n% rdDBus = xl_concat(rdDBus32, rdDBus32);\n% rdDBus = rdDBus32;\n\n% ===== update the persistent variables ===="
	  "=\n\nplbRstReg_ = plbRst;\nplbABusReg_ = plbABus;\nplbPAValidReg_ = plbPAValid;\nplbRNWReg_ = plbRNW;\nplbWrDBusReg"
	  "_ = xl_slice(plbWrDBus, DBUS_LEN-1, 0);\n"
	  suppress_output	  "on"
	  defparams		  "{}"
	  hide_port_list	  "{}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mcode"
	  sg_icon_stat		  "170,412,7,9,white,blue,0,43a237d5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 0 ],[0 0 412 412 0 ],[0.77 0.82 "
	  "0.91 ]);\nplot([0 170 170 0 0 ],[0 0 412 412 0 ]);\npatch([31.6 66.28 90.28 114.28 138.28 90.28 55.6 31.6 ],[232.64"
	  " 232.64 256.64 232.64 256.64 256.64 256.64 232.64 ],[1 1 1 ]);\npatch([55.6 90.28 66.28 31.6 55.6 ],[208.64 208.64 "
	  "232.64 232.64 208.64 ],[0.931 0.946 0.973 ]);\npatch([31.6 66.28 90.28 55.6 31.6 ],[184.64 184.64 208.64 208.64 184"
	  ".64 ],[1 1 1 ]);\npatch([55.6 138.28 114.28 90.28 66.28 31.6 55.6 ],[160.64 160.64 184.64 160.64 184.64 184.64 160."
	  "64 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nco"
	  "lor('black');port_label('input',1,'plbRst');\ncolor('black');port_label('input',2,'plbABus');\ncolor('black');port_"
	  "label('input',3,'plbPAValid');\ncolor('black');port_label('input',4,'plbRNW');\ncolor('black');port_label('input',5"
	  ",'plbWrDBus');\ncolor('black');port_label('input',6,'rdData');\ncolor('black');port_label('input',7,'addrPref');\nc"
	  "olor('black');port_label('output',1,'wrDBusReg');\ncolor('black');port_label('output',2,'addrAck');\ncolor('black')"
	  ";port_label('output',3,'rdComp');\ncolor('black');port_label('output',4,'wrDAck');\ncolor('black');port_label('outp"
	  "ut',5,'bankAddr');\ncolor('black');port_label('output',6,'RNWReg');\ncolor('black');port_label('output',7,'rdDAck')"
	  ";\ncolor('black');port_label('output',8,'rdDBus');\ncolor('black');port_label('output',9,'linearAddr');\ncolor('bla"
	  "ck');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "wrDBusReg"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    2
	    Name		    "Sl_addrAck"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    3
	    Name		    "Sl_rdComp"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    4
	    Name		    "Sl_wrDAck"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    5
	    Name		    "bankAddr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    6
	    Name		    "RNWReg"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    7
	    Name		    "Sl_rdDAck"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    8
	    Name		    "Sl_rdDBus"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    9
	    Name		    "linearAddr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "plb_memmap"
	  SID			  "4899:307"
	  Ports			  [47, 67]
	  Position		  [615, 1799, 785, 2131]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/MCode"
	  SourceType		  "Xilinx MCode Block Block"
	  infoedit		  "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of t"
	  "he block are input arguments of the function. The output ports of the block are output arguments of the function."
	  mfname		  "xlmax"
	  explicit_period	  off
	  period		  "1"
	  dbl_ovrd		  off
	  enable_stdout		  off
	  enable_debug		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  mfilecontent		  "function [read_bank_out, sm_TX_DELAY_din, sm_TX_DELAY_en, sm_RF_RX_IQ_BUF_RD_BYTE_OFFSET_din, sm_R"
	  "F_RX_IQ_BUF_RD_BYTE_OFFSET_en, sm_LOAD_TIMER_64_LSB_din, sm_LOAD_TIMER_64_LSB_en, sm_RF_RX_IQ_THRESHOLD_din, sm_RF_"
	  "RX_IQ_THRESHOLD_en, sm_RX_LENGTH_din, sm_RX_LENGTH_en, sm_TX_LENGTH_din, sm_TX_LENGTH_en, sm_RF_RX_IQ_BUF_WR_BYTE_O"
	  "FFSET_din, sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_en, sm_RF_BUFFER_SEL_din, sm_RF_BUFFER_SEL_en, sm_RX_BUF_EN_din, sm_RX_BU"
	  "F_EN_en, sm_RF_TX_IQ_THRESHOLD_din, sm_RF_TX_IQ_THRESHOLD_en, sm_CONFIG_din, sm_CONFIG_en, sm_RF_ERROR_CLR_din, sm_"
	  "RF_ERROR_CLR_en, sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_din, sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_en, sm_LOAD_TIMER_64_MSB_din, s"
	  "m_LOAD_TIMER_64_MSB_en, sm_TX_BUF_EN_din, sm_TX_BUF_EN_en, sm_RFD_IQ_Tx_Buffer_addr, sm_RFD_IQ_Tx_Buffer_din, sm_RF"
	  "D_IQ_Tx_Buffer_we, sm_RFD_RSSI_Buffer_addr, sm_RFD_RSSI_Buffer_din, sm_RFD_RSSI_Buffer_we, sm_RFD_IQ_Rx_Buffer_addr"
	  ", sm_RFD_IQ_Rx_Buffer_din, sm_RFD_IQ_Rx_Buffer_we, sm_RFC_IQ_Tx_Buffer_addr, sm_RFC_IQ_Tx_Buffer_din, sm_RFC_IQ_Tx_"
	  "Buffer_we, sm_RFC_RSSI_Buffer_addr, sm_RFC_RSSI_Buffer_din, sm_RFC_RSSI_Buffer_we, sm_RFC_IQ_Rx_Buffer_addr, sm_RFC"
	  "_IQ_Rx_Buffer_din, sm_RFC_IQ_Rx_Buffer_we, sm_RFB_IQ_Tx_Buffer_addr, sm_RFB_IQ_Tx_Buffer_din, sm_RFB_IQ_Tx_Buffer_w"
	  "e, sm_RFB_RSSI_Buffer_addr, sm_RFB_RSSI_Buffer_din, sm_RFB_RSSI_Buffer_we, sm_RFB_IQ_Rx_Buffer_addr, sm_RFB_IQ_Rx_B"
	  "uffer_din, sm_RFB_IQ_Rx_Buffer_we, sm_RFA_IQ_Tx_Buffer_addr, sm_RFA_IQ_Tx_Buffer_din, sm_RFA_IQ_Tx_Buffer_we, sm_RF"
	  "A_RSSI_Buffer_addr, sm_RFA_RSSI_Buffer_din, sm_RFA_RSSI_Buffer_we, sm_RFA_IQ_Rx_Buffer_addr, sm_RFA_IQ_Rx_Buffer_di"
	  "n, sm_RFA_IQ_Rx_Buffer_we] = plb_memmap(wrDBus, bankAddr, linearAddr, RNWReg, addrAck, sm_RF_TX_IQ_BUF_OCCUPANCY, s"
	  "m_RF_TX_IQ_BUF_RD_BYTE_OFFSET, sm_AGC_GAINS, sm_RF_RX_IQ_BUF_OCCUPANCY, sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE, sm_I"
	  "NT_STATUS, sm_BUFF_SIZES, sm_DESIGN_VER, sm_RF_TX_IQ_STATUS, sm_STATUS, sm_RFCD_AGC_DONE_RSSI, sm_RFAB_AGC_DONE_RSS"
	  "I, sm_TIMER_64_MSB, sm_TIMER_64_LSB, sm_AGC_DONE_ADDR, sm_TX_DELAY, sm_RF_RX_IQ_BUF_RD_BYTE_OFFSET, sm_LOAD_TIMER_6"
	  "4_LSB, sm_RF_RX_IQ_THRESHOLD, sm_RX_LENGTH, sm_TX_LENGTH, sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET, sm_RF_BUFFER_SEL, sm_RX_B"
	  "UF_EN, sm_RF_TX_IQ_THRESHOLD, sm_CONFIG, sm_RF_ERROR_CLR, sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET, sm_LOAD_TIMER_64_MSB, sm_"
	  "TX_BUF_EN, sm_RFD_IQ_Tx_Buffer, sm_RFD_RSSI_Buffer, sm_RFD_IQ_Rx_Buffer, sm_RFC_IQ_Tx_Buffer, sm_RFC_RSSI_Buffer, s"
	  "m_RFC_IQ_Rx_Buffer, sm_RFB_IQ_Tx_Buffer, sm_RFB_RSSI_Buffer, sm_RFB_IQ_Rx_Buffer, sm_RFA_IQ_Tx_Buffer, sm_RFA_RSSI_"
	  "Buffer, sm_RFA_IQ_Rx_Buffer)\n\n\n% connvert the input data to UFix_32_0 (the bus data type)\n% 'From Register' blo"
	  "cks\n% sm_RF_TX_IQ_BUF_OCCUPANCY_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_TX_IQ_BUF_OCCUPANCY_bus = xl_force(sm_R"
	  "F_TX_IQ_BUF_OCCUPANCY, xlUnsigned, 0);\n\n% sm_RF_TX_IQ_BUF_RD_BYTE_OFFSET_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_"
	  "RF_TX_IQ_BUF_RD_BYTE_OFFSET_bus = xl_force(sm_RF_TX_IQ_BUF_RD_BYTE_OFFSET, xlUnsigned, 0);\n\n% sm_AGC_GAINS_bus = "
	  "xfix({xlUnsigned, 32, 0}, 0);\nsm_AGC_GAINS_bus = xl_force(sm_AGC_GAINS, xlUnsigned, 0);\n\n% sm_RF_RX_IQ_BUF_OCCUP"
	  "ANCY_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_RX_IQ_BUF_OCCUPANCY_bus = xl_force(sm_RF_RX_IQ_BUF_OCCUPANCY, xlUns"
	  "igned, 0);\n\n% sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_RX_IQ_BUF_WR_BYTE_"
	  "OFFSET_UPDATE_bus = xl_force(sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE, xlUnsigned, 0);\n\n% sm_INT_STATUS_bus = xfix({"
	  "xlUnsigned, 32, 0}, 0);\nsm_INT_STATUS_bus = xl_force(sm_INT_STATUS, xlUnsigned, 0);\n\n% sm_BUFF_SIZES_bus = xfix("
	  "{xlUnsigned, 32, 0}, 0);\nsm_BUFF_SIZES_bus = xl_force(sm_BUFF_SIZES, xlUnsigned, 0);\n\n% sm_DESIGN_VER_bus = xfix"
	  "({xlUnsigned, 32, 0}, 0);\nsm_DESIGN_VER_bus = xl_force(sm_DESIGN_VER, xlUnsigned, 0);\n\n% sm_RF_TX_IQ_STATUS_bus "
	  "= xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_TX_IQ_STATUS_bus = xl_force(sm_RF_TX_IQ_STATUS, xlUnsigned, 0);\n\n% sm_STAT"
	  "US_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_STATUS_bus = xl_force(sm_STATUS, xlUnsigned, 0);\n\n% sm_RFCD_AGC_DONE_R"
	  "SSI_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFCD_AGC_DONE_RSSI_bus = xl_force(sm_RFCD_AGC_DONE_RSSI, xlUnsigned, 0)"
	  ";\n\n% sm_RFAB_AGC_DONE_RSSI_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFAB_AGC_DONE_RSSI_bus = xl_force(sm_RFAB_AGC_"
	  "DONE_RSSI, xlUnsigned, 0);\n\n% sm_TIMER_64_MSB_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_TIMER_64_MSB_bus = xl_force"
	  "(sm_TIMER_64_MSB, xlUnsigned, 0);\n\n% sm_TIMER_64_LSB_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_TIMER_64_LSB_bus = x"
	  "l_force(sm_TIMER_64_LSB, xlUnsigned, 0);\n\n% sm_AGC_DONE_ADDR_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_AGC_DONE_ADD"
	  "R_bus = xl_force(sm_AGC_DONE_ADDR, xlUnsigned, 0);\n\n% 'To Register' blocks\n\n% sm_TX_DELAY_dout = xfix({xlUnsign"
	  "ed, 32, 0}, 0);\nsm_TX_DELAY_dout = xl_force(sm_TX_DELAY, xlUnsigned, 0);\n\n% sm_RF_RX_IQ_BUF_RD_BYTE_OFFSET_dout "
	  "= xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_RX_IQ_BUF_RD_BYTE_OFFSET_dout = xl_force(sm_RF_RX_IQ_BUF_RD_BYTE_OFFSET, xlU"
	  "nsigned, 0);\n\n% sm_LOAD_TIMER_64_LSB_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_LOAD_TIMER_64_LSB_dout = xl_force(s"
	  "m_LOAD_TIMER_64_LSB, xlUnsigned, 0);\n\n% sm_RF_RX_IQ_THRESHOLD_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_RX_IQ_T"
	  "HRESHOLD_dout = xl_force(sm_RF_RX_IQ_THRESHOLD, xlUnsigned, 0);\n\n% sm_RX_LENGTH_dout = xfix({xlUnsigned, 32, 0}, "
	  "0);\nsm_RX_LENGTH_dout = xl_force(sm_RX_LENGTH, xlUnsigned, 0);\n\n% sm_TX_LENGTH_dout = xfix({xlUnsigned, 32, 0}, "
	  "0);\nsm_TX_LENGTH_dout = xl_force(sm_TX_LENGTH, xlUnsigned, 0);\n\n% sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_dout = xfix({xl"
	  "Unsigned, 32, 0}, 0);\nsm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_dout = xl_force(sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET, xlUnsigned, 0"
	  ");\n\n% sm_RF_BUFFER_SEL_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_BUFFER_SEL_dout = xl_force(sm_RF_BUFFER_SEL, x"
	  "lUnsigned, 0);\n\n% sm_RX_BUF_EN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RX_BUF_EN_dout = xl_force(sm_RX_BUF_EN, x"
	  "lUnsigned, 0);\n\n% sm_RF_TX_IQ_THRESHOLD_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_TX_IQ_THRESHOLD_dout = xl_for"
	  "ce(sm_RF_TX_IQ_THRESHOLD, xlUnsigned, 0);\n\n% sm_CONFIG_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_CONFIG_dout = xl_"
	  "force(sm_CONFIG, xlUnsigned, 0);\n\n% sm_RF_ERROR_CLR_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RF_ERROR_CLR_dout = "
	  "xl_force(sm_RF_ERROR_CLR, xlUnsigned, 0);\n\n% sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_dout = xfix({xlUnsigned, 32, 0}, 0);\n"
	  "sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_dout = xl_force(sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET, xlUnsigned, 0);\n\n% sm_LOAD_TIMER_6"
	  "4_MSB_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_LOAD_TIMER_64_MSB_dout = xl_force(sm_LOAD_TIMER_64_MSB, xlUnsigned, "
	  "0);\n\n% sm_TX_BUF_EN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TX_BUF_EN_dout = xl_force(sm_TX_BUF_EN, xlUnsigned, "
	  "0);\n\n\n% 'From FIFO' blocks\n% 'To FIFO' blocks\n% 'Shared Memory' blocks\n% RFD_IQ_Tx_Buffer_bus = xfix({xlUnsig"
	  "ned, 32, 0}, 0);\nsm_RFD_IQ_Tx_Buffer_bus = xl_force(sm_RFD_IQ_Tx_Buffer, xlUnsigned, 0);\n\n% RFD_RSSI_Buffer_bus "
	  "= xfix({xlUnsigned, 32, 0}, 0);\nsm_RFD_RSSI_Buffer_bus = xl_force(sm_RFD_RSSI_Buffer, xlUnsigned, 0);\n\n% RFD_IQ_"
	  "Rx_Buffer_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFD_IQ_Rx_Buffer_bus = xl_force(sm_RFD_IQ_Rx_Buffer, xlUnsigned, "
	  "0);\n\n% RFC_IQ_Tx_Buffer_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFC_IQ_Tx_Buffer_bus = xl_force(sm_RFC_IQ_Tx_Buff"
	  "er, xlUnsigned, 0);\n\n% RFC_RSSI_Buffer_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFC_RSSI_Buffer_bus = xl_force(sm_"
	  "RFC_RSSI_Buffer, xlUnsigned, 0);\n\n% RFC_IQ_Rx_Buffer_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFC_IQ_Rx_Buffer_bus"
	  " = xl_force(sm_RFC_IQ_Rx_Buffer, xlUnsigned, 0);\n\n% RFB_IQ_Tx_Buffer_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFB_"
	  "IQ_Tx_Buffer_bus = xl_force(sm_RFB_IQ_Tx_Buffer, xlUnsigned, 0);\n\n% RFB_RSSI_Buffer_bus = xfix({xlUnsigned, 32, 0"
	  "}, 0);\nsm_RFB_RSSI_Buffer_bus = xl_force(sm_RFB_RSSI_Buffer, xlUnsigned, 0);\n\n% RFB_IQ_Rx_Buffer_bus = xfix({xlU"
	  "nsigned, 32, 0}, 0);\nsm_RFB_IQ_Rx_Buffer_bus = xl_force(sm_RFB_IQ_Rx_Buffer, xlUnsigned, 0);\n\n% RFA_IQ_Tx_Buffer"
	  "_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFA_IQ_Tx_Buffer_bus = xl_force(sm_RFA_IQ_Tx_Buffer, xlUnsigned, 0);\n\n% "
	  "RFA_RSSI_Buffer_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFA_RSSI_Buffer_bus = xl_force(sm_RFA_RSSI_Buffer, xlUnsign"
	  "ed, 0);\n\n% RFA_IQ_Rx_Buffer_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RFA_IQ_Rx_Buffer_bus = xl_force(sm_RFA_IQ_Rx_"
	  "Buffer, xlUnsigned, 0);\n\n\n% 'dout' ports of 'From Register' blocks\n\n% registered register mux output\npersiste"
	  "nt reg_bank_out_reg; reg_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nreg_bank_out = reg_bank_out_reg;\n\nif l"
	  "inearAddr == 15\n    reg_bank_out_reg = sm_RF_TX_IQ_BUF_OCCUPANCY_bus;\nelseif linearAddr == 16\n    reg_bank_out_r"
	  "eg = sm_RF_TX_IQ_BUF_RD_BYTE_OFFSET_bus;\nelseif linearAddr == 17\n    reg_bank_out_reg = sm_AGC_GAINS_bus;\nelseif"
	  " linearAddr == 18\n    reg_bank_out_reg = sm_RF_RX_IQ_BUF_OCCUPANCY_bus;\nelseif linearAddr == 19\n    reg_bank_out"
	  "_reg = sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE_bus;\nelseif linearAddr == 20\n    reg_bank_out_reg = sm_INT_STATUS_bu"
	  "s;\nelseif linearAddr == 21\n    reg_bank_out_reg = sm_BUFF_SIZES_bus;\nelseif linearAddr == 22\n    reg_bank_out_r"
	  "eg = sm_DESIGN_VER_bus;\nelseif linearAddr == 23\n    reg_bank_out_reg = sm_RF_TX_IQ_STATUS_bus;\nelseif linearAddr"
	  " == 24\n    reg_bank_out_reg = sm_STATUS_bus;\nelseif linearAddr == 25\n    reg_bank_out_reg = sm_RFCD_AGC_DONE_RSS"
	  "I_bus;\nelseif linearAddr == 26\n    reg_bank_out_reg = sm_RFAB_AGC_DONE_RSSI_bus;\nelseif linearAddr == 27\n    re"
	  "g_bank_out_reg = sm_TIMER_64_MSB_bus;\nelseif linearAddr == 28\n    reg_bank_out_reg = sm_TIMER_64_LSB_bus;\nelseif"
	  " linearAddr == 29\n    reg_bank_out_reg = sm_AGC_DONE_ADDR_bus;\nelseif linearAddr == 0\n    reg_bank_out_reg = sm_"
	  "TX_DELAY_dout;\nelseif linearAddr == 1\n    reg_bank_out_reg = sm_RF_RX_IQ_BUF_RD_BYTE_OFFSET_dout;\nelseif linearA"
	  "ddr == 2\n    reg_bank_out_reg = sm_LOAD_TIMER_64_LSB_dout;\nelseif linearAddr == 3\n    reg_bank_out_reg = sm_RF_R"
	  "X_IQ_THRESHOLD_dout;\nelseif linearAddr == 4\n    reg_bank_out_reg = sm_RX_LENGTH_dout;\nelseif linearAddr == 5\n  "
	  "  reg_bank_out_reg = sm_TX_LENGTH_dout;\nelseif linearAddr == 6\n    reg_bank_out_reg = sm_RF_RX_IQ_BUF_WR_BYTE_OFF"
	  "SET_dout;\nelseif linearAddr == 7\n    reg_bank_out_reg = sm_RF_BUFFER_SEL_dout;\nelseif linearAddr == 8\n    reg_b"
	  "ank_out_reg = sm_RX_BUF_EN_dout;\nelseif linearAddr == 9\n    reg_bank_out_reg = sm_RF_TX_IQ_THRESHOLD_dout;\nelsei"
	  "f linearAddr == 10\n    reg_bank_out_reg = sm_CONFIG_dout;\nelseif linearAddr == 11\n    reg_bank_out_reg = sm_RF_E"
	  "RROR_CLR_dout;\nelseif linearAddr == 12\n    reg_bank_out_reg = sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_dout;\nelseif linear"
	  "Addr == 13\n    reg_bank_out_reg = sm_LOAD_TIMER_64_MSB_dout;\nelseif linearAddr == 14\n    reg_bank_out_reg = sm_T"
	  "X_BUF_EN_dout;\n\nend\n\n\n% 'From FIFO' and 'To FIFO' blocks\n\n\n\n\n\nopCode = xl_concat(addrAck, RNWReg, bankAd"
	  "dr, linearAddr);\n\n% 'Shared Memory' blocks\n\nsm_RFD_IQ_Tx_Buffer_sel_value = xl_concat(xl_slice(linearAddr, ...\n"
	  "                                        xl_nbits(linearAddr) - 1, ...\n                                        14) "
	  "...\n                                    );\nif sm_RFD_IQ_Tx_Buffer_sel_value == xfix({xlUnsigned, ...\n           "
	  "                             xl_nbits(linearAddr) - 14, ...\n                                        0}, ...\n     "
	  "                                   0);\n    sm_RFD_IQ_Tx_Buffer_sel = true;\nelse\n    sm_RFD_IQ_Tx_Buffer_sel = fa"
	  "lse;\nend\nsm_RFD_RSSI_Buffer_sel_value = xl_concat(xl_slice(linearAddr, ...\n                                     "
	  "   xl_nbits(linearAddr) - 1, ...\n                                        11) ...\n                                "
	  "    );\nif sm_RFD_RSSI_Buffer_sel_value == xfix({xlUnsigned, ...\n                                        xl_nbits("
	  "linearAddr) - 11, ...\n                                        0}, ...\n                                        64)"
	  ";\n    sm_RFD_RSSI_Buffer_sel = true;\nelse\n    sm_RFD_RSSI_Buffer_sel = false;\nend\nsm_RFD_IQ_Rx_Buffer_sel_valu"
	  "e = xl_concat(xl_slice(linearAddr, ...\n                                        xl_nbits(linearAddr) - 1, ...\n    "
	  "                                    14) ...\n                                    );\nif sm_RFD_IQ_Rx_Buffer_sel_val"
	  "ue == xfix({xlUnsigned, ...\n                                        xl_nbits(linearAddr) - 14, ...\n              "
	  "                          0}, ...\n                                        1);\n    sm_RFD_IQ_Rx_Buffer_sel = true;"
	  "\nelse\n    sm_RFD_IQ_Rx_Buffer_sel = false;\nend\nsm_RFC_IQ_Tx_Buffer_sel_value = xl_concat(xl_slice(linearAddr, ."
	  "..\n                                        xl_nbits(linearAddr) - 1, ...\n                                        "
	  "14) ...\n                                    );\nif sm_RFC_IQ_Tx_Buffer_sel_value == xfix({xlUnsigned, ...\n       "
	  "                                 xl_nbits(linearAddr) - 14, ...\n                                        0}, ...\n "
	  "                                       2);\n    sm_RFC_IQ_Tx_Buffer_sel = true;\nelse\n    sm_RFC_IQ_Tx_Buffer_sel "
	  "= false;\nend\nsm_RFC_RSSI_Buffer_sel_value = xl_concat(xl_slice(linearAddr, ...\n                                 "
	  "       xl_nbits(linearAddr) - 1, ...\n                                        11) ...\n                            "
	  "        );\nif sm_RFC_RSSI_Buffer_sel_value == xfix({xlUnsigned, ...\n                                        xl_nb"
	  "its(linearAddr) - 11, ...\n                                        0}, ...\n                                       "
	  " 65);\n    sm_RFC_RSSI_Buffer_sel = true;\nelse\n    sm_RFC_RSSI_Buffer_sel = false;\nend\nsm_RFC_IQ_Rx_Buffer_sel_"
	  "value = xl_concat(xl_slice(linearAddr, ...\n                                        xl_nbits(linearAddr) - 1, ...\n"
	  "                                        14) ...\n                                    );\nif sm_RFC_IQ_Rx_Buffer_sel"
	  "_value == xfix({xlUnsigned, ...\n                                        xl_nbits(linearAddr) - 14, ...\n          "
	  "                              0}, ...\n                                        3);\n    sm_RFC_IQ_Rx_Buffer_sel = t"
	  "rue;\nelse\n    sm_RFC_IQ_Rx_Buffer_sel = false;\nend\nsm_RFB_IQ_Tx_Buffer_sel_value = xl_concat(xl_slice(linearAdd"
	  "r, ...\n                                        xl_nbits(linearAddr) - 1, ...\n                                    "
	  "    14) ...\n                                    );\nif sm_RFB_IQ_Tx_Buffer_sel_value == xfix({xlUnsigned, ...\n   "
	  "                                     xl_nbits(linearAddr) - 14, ...\n                                        0}, .."
	  ".\n                                        4);\n    sm_RFB_IQ_Tx_Buffer_sel = true;\nelse\n    sm_RFB_IQ_Tx_Buffer_"
	  "sel = false;\nend\nsm_RFB_RSSI_Buffer_sel_value = xl_concat(xl_slice(linearAddr, ...\n                             "
	  "           xl_nbits(linearAddr) - 1, ...\n                                        11) ...\n                        "
	  "            );\nif sm_RFB_RSSI_Buffer_sel_value == xfix({xlUnsigned, ...\n                                        x"
	  "l_nbits(linearAddr) - 11, ...\n                                        0}, ...\n                                   "
	  "     66);\n    sm_RFB_RSSI_Buffer_sel = true;\nelse\n    sm_RFB_RSSI_Buffer_sel = false;\nend\nsm_RFB_IQ_Rx_Buffer_"
	  "sel_value = xl_concat(xl_slice(linearAddr, ...\n                                        xl_nbits(linearAddr) - 1, ."
	  "..\n                                        14) ...\n                                    );\nif sm_RFB_IQ_Rx_Buffer"
	  "_sel_value == xfix({xlUnsigned, ...\n                                        xl_nbits(linearAddr) - 14, ...\n      "
	  "                                  0}, ...\n                                        5);\n    sm_RFB_IQ_Rx_Buffer_sel"
	  " = true;\nelse\n    sm_RFB_IQ_Rx_Buffer_sel = false;\nend\nsm_RFA_IQ_Tx_Buffer_sel_value = xl_concat(xl_slice(linea"
	  "rAddr, ...\n                                        xl_nbits(linearAddr) - 1, ...\n                                "
	  "        14) ...\n                                    );\nif sm_RFA_IQ_Tx_Buffer_sel_value == xfix({xlUnsigned, ...\n"
	  "                                        xl_nbits(linearAddr) - 14, ...\n                                        0},"
	  " ...\n                                        6);\n    sm_RFA_IQ_Tx_Buffer_sel = true;\nelse\n    sm_RFA_IQ_Tx_Buff"
	  "er_sel = false;\nend\nsm_RFA_RSSI_Buffer_sel_value = xl_concat(xl_slice(linearAddr, ...\n                          "
	  "              xl_nbits(linearAddr) - 1, ...\n                                        11) ...\n                     "
	  "               );\nif sm_RFA_RSSI_Buffer_sel_value == xfix({xlUnsigned, ...\n                                      "
	  "  xl_nbits(linearAddr) - 11, ...\n                                        0}, ...\n                                "
	  "        67);\n    sm_RFA_RSSI_Buffer_sel = true;\nelse\n    sm_RFA_RSSI_Buffer_sel = false;\nend\nsm_RFA_IQ_Rx_Buff"
	  "er_sel_value = xl_concat(xl_slice(linearAddr, ...\n                                        xl_nbits(linearAddr) - 1"
	  ", ...\n                                        14) ...\n                                    );\nif sm_RFA_IQ_Rx_Buf"
	  "fer_sel_value == xfix({xlUnsigned, ...\n                                        xl_nbits(linearAddr) - 14, ...\n   "
	  "                                     0}, ...\n                                        7);\n    sm_RFA_IQ_Rx_Buffer_"
	  "sel = true;\nelse\n    sm_RFA_IQ_Rx_Buffer_sel = false;\nend\n\n\n% registered Shared Memory mux output\npersistent"
	  " ram_bank_out_reg; ram_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nram_bank_out = ram_bank_out_reg;\nif sm_RF"
	  "D_IQ_Tx_Buffer_sel\n    ram_bank_out_reg = sm_RFD_IQ_Tx_Buffer_bus;\nelseif sm_RFD_RSSI_Buffer_sel\n    ram_bank_ou"
	  "t_reg = sm_RFD_RSSI_Buffer_bus;\nelseif sm_RFD_IQ_Rx_Buffer_sel\n    ram_bank_out_reg = sm_RFD_IQ_Rx_Buffer_bus;\ne"
	  "lseif sm_RFC_IQ_Tx_Buffer_sel\n    ram_bank_out_reg = sm_RFC_IQ_Tx_Buffer_bus;\nelseif sm_RFC_RSSI_Buffer_sel\n    "
	  "ram_bank_out_reg = sm_RFC_RSSI_Buffer_bus;\nelseif sm_RFC_IQ_Rx_Buffer_sel\n    ram_bank_out_reg = sm_RFC_IQ_Rx_Buf"
	  "fer_bus;\nelseif sm_RFB_IQ_Tx_Buffer_sel\n    ram_bank_out_reg = sm_RFB_IQ_Tx_Buffer_bus;\nelseif sm_RFB_RSSI_Buffe"
	  "r_sel\n    ram_bank_out_reg = sm_RFB_RSSI_Buffer_bus;\nelseif sm_RFB_IQ_Rx_Buffer_sel\n    ram_bank_out_reg = sm_RF"
	  "B_IQ_Rx_Buffer_bus;\nelseif sm_RFA_IQ_Tx_Buffer_sel\n    ram_bank_out_reg = sm_RFA_IQ_Tx_Buffer_bus;\nelseif sm_RFA"
	  "_RSSI_Buffer_sel\n    ram_bank_out_reg = sm_RFA_RSSI_Buffer_bus;\nelseif sm_RFA_IQ_Rx_Buffer_sel\n    ram_bank_out_"
	  "reg = sm_RFA_IQ_Rx_Buffer_bus;\nend\n\n% 'din' ports of 'Shared Memory' blocks\nsm_RFD_IQ_Tx_Buffer_din = xl_force("
	  "xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n                               "
	  "  0);\nsm_RFD_RSSI_Buffer_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsig"
	  "ned, ...\n                                 0);\nsm_RFD_IQ_Rx_Buffer_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ..."
	  "\n                                 xlUnsigned, ...\n                                 0);\nsm_RFC_IQ_Tx_Buffer_din ="
	  " xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n                     "
	  "            0);\nsm_RFC_RSSI_Buffer_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                              "
	  "   xlUnsigned, ...\n                                 0);\nsm_RFC_IQ_Rx_Buffer_din = xl_force(xl_slice(wrDBus, 32 - "
	  "1, 0), ...\n                                 xlUnsigned, ...\n                                 0);\nsm_RFB_IQ_Tx_Bu"
	  "ffer_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n           "
	  "                      0);\nsm_RFB_RSSI_Buffer_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                    "
	  "             xlUnsigned, ...\n                                 0);\nsm_RFB_IQ_Rx_Buffer_din = xl_force(xl_slice(wrD"
	  "Bus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n                                 0);\nsm_RF"
	  "A_IQ_Tx_Buffer_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n "
	  "                                0);\nsm_RFA_RSSI_Buffer_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n          "
	  "                       xlUnsigned, ...\n                                 0);\nsm_RFA_IQ_Rx_Buffer_din = xl_force(xl"
	  "_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n                                 "
	  "0);\n\n\n% 'we' ports of 'Shared Memory' blocks\npersistent sm_RFD_IQ_Tx_Buffer_we_reg; sm_RFD_IQ_Tx_Buffer_we_reg "
	  "= xl_state(false, {xlBoolean});\nsm_RFD_IQ_Tx_Buffer_we = sm_RFD_IQ_Tx_Buffer_we_reg;\nopCode_sm_RFD_IQ_Tx_Buffer ="
	  " xl_concat(addrAck, ...\n                                     RNWReg, ...\n                                     ban"
	  "kAddr, ...\n                                     xl_slice(linearAddr, ...\n                                        "
	  "      xl_nbits(linearAddr) - 1, ...\n                                              14) ...\n                       "
	  "             );\nif opCode_sm_RFD_IQ_Tx_Buffer == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n                     "
	  "                    xfix({xlUnsigned, ...\n                                               xl_nbits(linearAddr) - 14"
	  ", ...\n                                               0}, ...\n                                               0) .."
	  ".\n                                        );\n    sm_RFD_IQ_Tx_Buffer_we_reg = true;\nelse\n    sm_RFD_IQ_Tx_Buffe"
	  "r_we_reg = false;\nend\npersistent sm_RFD_RSSI_Buffer_we_reg; sm_RFD_RSSI_Buffer_we_reg = xl_state(false, {xlBoolea"
	  "n});\nsm_RFD_RSSI_Buffer_we = sm_RFD_RSSI_Buffer_we_reg;\nopCode_sm_RFD_RSSI_Buffer = xl_concat(addrAck, ...\n     "
	  "                                RNWReg, ...\n                                     bankAddr, ...\n                  "
	  "                   xl_slice(linearAddr, ...\n                                              xl_nbits(linearAddr) - 1"
	  ", ...\n                                              11) ...\n                                    );\nif opCode_sm_"
	  "RFD_RSSI_Buffer == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n                                         xfix({xlUns"
	  "igned, ...\n                                               xl_nbits(linearAddr) - 11, ...\n                        "
	  "                       0}, ...\n                                               64) ...\n                           "
	  "             );\n    sm_RFD_RSSI_Buffer_we_reg = true;\nelse\n    sm_RFD_RSSI_Buffer_we_reg = false;\nend\npersiste"
	  "nt sm_RFD_IQ_Rx_Buffer_we_reg; sm_RFD_IQ_Rx_Buffer_we_reg = xl_state(false, {xlBoolean});\nsm_RFD_IQ_Rx_Buffer_we ="
	  " sm_RFD_IQ_Rx_Buffer_we_reg;\nopCode_sm_RFD_IQ_Rx_Buffer = xl_concat(addrAck, ...\n                                "
	  "     RNWReg, ...\n                                     bankAddr, ...\n                                     xl_slice"
	  "(linearAddr, ...\n                                              xl_nbits(linearAddr) - 1, ...\n                    "
	  "                          14) ...\n                                    );\nif opCode_sm_RFD_IQ_Rx_Buffer == xl_conc"
	  "at(xfix({xlUnsigned, 4, 0}, 8), ...\n                                         xfix({xlUnsigned, ...\n              "
	  "                                 xl_nbits(linearAddr) - 14, ...\n                                               0},"
	  " ...\n                                               1) ...\n                                        );\n    sm_RFD"
	  "_IQ_Rx_Buffer_we_reg = true;\nelse\n    sm_RFD_IQ_Rx_Buffer_we_reg = false;\nend\npersistent sm_RFC_IQ_Tx_Buffer_we"
	  "_reg; sm_RFC_IQ_Tx_Buffer_we_reg = xl_state(false, {xlBoolean});\nsm_RFC_IQ_Tx_Buffer_we = sm_RFC_IQ_Tx_Buffer_we_r"
	  "eg;\nopCode_sm_RFC_IQ_Tx_Buffer = xl_concat(addrAck, ...\n                                     RNWReg, ...\n       "
	  "                              bankAddr, ...\n                                     xl_slice(linearAddr, ...\n       "
	  "                                       xl_nbits(linearAddr) - 1, ...\n                                             "
	  " 14) ...\n                                    );\nif opCode_sm_RFC_IQ_Tx_Buffer == xl_concat(xfix({xlUnsigned, 4, 0"
	  "}, 8), ...\n                                         xfix({xlUnsigned, ...\n                                       "
	  "        xl_nbits(linearAddr) - 14, ...\n                                               0}, ...\n                   "
	  "                            2) ...\n                                        );\n    sm_RFC_IQ_Tx_Buffer_we_reg = tr"
	  "ue;\nelse\n    sm_RFC_IQ_Tx_Buffer_we_reg = false;\nend\npersistent sm_RFC_RSSI_Buffer_we_reg; sm_RFC_RSSI_Buffer_w"
	  "e_reg = xl_state(false, {xlBoolean});\nsm_RFC_RSSI_Buffer_we = sm_RFC_RSSI_Buffer_we_reg;\nopCode_sm_RFC_RSSI_Buffe"
	  "r = xl_concat(addrAck, ...\n                                     RNWReg, ...\n                                     "
	  "bankAddr, ...\n                                     xl_slice(linearAddr, ...\n                                     "
	  "         xl_nbits(linearAddr) - 1, ...\n                                              11) ...\n                    "
	  "                );\nif opCode_sm_RFC_RSSI_Buffer == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n                   "
	  "                      xfix({xlUnsigned, ...\n                                               xl_nbits(linearAddr) - "
	  "11, ...\n                                               0}, ...\n                                               65)"
	  " ...\n                                        );\n    sm_RFC_RSSI_Buffer_we_reg = true;\nelse\n    sm_RFC_RSSI_Buff"
	  "er_we_reg = false;\nend\npersistent sm_RFC_IQ_Rx_Buffer_we_reg; sm_RFC_IQ_Rx_Buffer_we_reg = xl_state(false, {xlBoo"
	  "lean});\nsm_RFC_IQ_Rx_Buffer_we = sm_RFC_IQ_Rx_Buffer_we_reg;\nopCode_sm_RFC_IQ_Rx_Buffer = xl_concat(addrAck, ...\n"
	  "                                     RNWReg, ...\n                                     bankAddr, ...\n             "
	  "                        xl_slice(linearAddr, ...\n                                              xl_nbits(linearAddr"
	  ") - 1, ...\n                                              14) ...\n                                    );\nif opCod"
	  "e_sm_RFC_IQ_Rx_Buffer == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n                                         xfix("
	  "{xlUnsigned, ...\n                                               xl_nbits(linearAddr) - 14, ...\n                  "
	  "                             0}, ...\n                                               3) ...\n                      "
	  "                  );\n    sm_RFC_IQ_Rx_Buffer_we_reg = true;\nelse\n    sm_RFC_IQ_Rx_Buffer_we_reg = false;\nend\np"
	  "ersistent sm_RFB_IQ_Tx_Buffer_we_reg; sm_RFB_IQ_Tx_Buffer_we_reg = xl_state(false, {xlBoolean});\nsm_RFB_IQ_Tx_Buff"
	  "er_we = sm_RFB_IQ_Tx_Buffer_we_reg;\nopCode_sm_RFB_IQ_Tx_Buffer = xl_concat(addrAck, ...\n                         "
	  "            RNWReg, ...\n                                     bankAddr, ...\n                                     x"
	  "l_slice(linearAddr, ...\n                                              xl_nbits(linearAddr) - 1, ...\n             "
	  "                                 14) ...\n                                    );\nif opCode_sm_RFB_IQ_Tx_Buffer == "
	  "xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n                                         xfix({xlUnsigned, ...\n       "
	  "                                        xl_nbits(linearAddr) - 14, ...\n                                           "
	  "    0}, ...\n                                               4) ...\n                                        );\n   "
	  " sm_RFB_IQ_Tx_Buffer_we_reg = true;\nelse\n    sm_RFB_IQ_Tx_Buffer_we_reg = false;\nend\npersistent sm_RFB_RSSI_Buf"
	  "fer_we_reg; sm_RFB_RSSI_Buffer_we_reg = xl_state(false, {xlBoolean});\nsm_RFB_RSSI_Buffer_we = sm_RFB_RSSI_Buffer_w"
	  "e_reg;\nopCode_sm_RFB_RSSI_Buffer = xl_concat(addrAck, ...\n                                     RNWReg, ...\n     "
	  "                                bankAddr, ...\n                                     xl_slice(linearAddr, ...\n     "
	  "                                         xl_nbits(linearAddr) - 1, ...\n                                           "
	  "   11) ...\n                                    );\nif opCode_sm_RFB_RSSI_Buffer == xl_concat(xfix({xlUnsigned, 4, "
	  "0}, 8), ...\n                                         xfix({xlUnsigned, ...\n                                      "
	  "         xl_nbits(linearAddr) - 11, ...\n                                               0}, ...\n                  "
	  "                             66) ...\n                                        );\n    sm_RFB_RSSI_Buffer_we_reg = t"
	  "rue;\nelse\n    sm_RFB_RSSI_Buffer_we_reg = false;\nend\npersistent sm_RFB_IQ_Rx_Buffer_we_reg; sm_RFB_IQ_Rx_Buffer"
	  "_we_reg = xl_state(false, {xlBoolean});\nsm_RFB_IQ_Rx_Buffer_we = sm_RFB_IQ_Rx_Buffer_we_reg;\nopCode_sm_RFB_IQ_Rx_"
	  "Buffer = xl_concat(addrAck, ...\n                                     RNWReg, ...\n                                "
	  "     bankAddr, ...\n                                     xl_slice(linearAddr, ...\n                                "
	  "              xl_nbits(linearAddr) - 1, ...\n                                              14) ...\n               "
	  "                     );\nif opCode_sm_RFB_IQ_Rx_Buffer == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n             "
	  "                            xfix({xlUnsigned, ...\n                                               xl_nbits(linearAd"
	  "dr) - 14, ...\n                                               0}, ...\n                                            "
	  "   5) ...\n                                        );\n    sm_RFB_IQ_Rx_Buffer_we_reg = true;\nelse\n    sm_RFB_IQ_"
	  "Rx_Buffer_we_reg = false;\nend\npersistent sm_RFA_IQ_Tx_Buffer_we_reg; sm_RFA_IQ_Tx_Buffer_we_reg = xl_state(false,"
	  " {xlBoolean});\nsm_RFA_IQ_Tx_Buffer_we = sm_RFA_IQ_Tx_Buffer_we_reg;\nopCode_sm_RFA_IQ_Tx_Buffer = xl_concat(addrAc"
	  "k, ...\n                                     RNWReg, ...\n                                     bankAddr, ...\n     "
	  "                                xl_slice(linearAddr, ...\n                                              xl_nbits(li"
	  "nearAddr) - 1, ...\n                                              14) ...\n                                    );\n"
	  "if opCode_sm_RFA_IQ_Tx_Buffer == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n                                      "
	  "   xfix({xlUnsigned, ...\n                                               xl_nbits(linearAddr) - 14, ...\n          "
	  "                                     0}, ...\n                                               6) ...\n              "
	  "                          );\n    sm_RFA_IQ_Tx_Buffer_we_reg = true;\nelse\n    sm_RFA_IQ_Tx_Buffer_we_reg = false;"
	  "\nend\npersistent sm_RFA_RSSI_Buffer_we_reg; sm_RFA_RSSI_Buffer_we_reg = xl_state(false, {xlBoolean});\nsm_RFA_RSSI"
	  "_Buffer_we = sm_RFA_RSSI_Buffer_we_reg;\nopCode_sm_RFA_RSSI_Buffer = xl_concat(addrAck, ...\n                      "
	  "               RNWReg, ...\n                                     bankAddr, ...\n                                   "
	  "  xl_slice(linearAddr, ...\n                                              xl_nbits(linearAddr) - 1, ...\n          "
	  "                                    11) ...\n                                    );\nif opCode_sm_RFA_RSSI_Buffer ="
	  "= xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n                                         xfix({xlUnsigned, ...\n     "
	  "                                          xl_nbits(linearAddr) - 11, ...\n                                         "
	  "      0}, ...\n                                               67) ...\n                                        );\n"
	  "    sm_RFA_RSSI_Buffer_we_reg = true;\nelse\n    sm_RFA_RSSI_Buffer_we_reg = false;\nend\npersistent sm_RFA_IQ_Rx_B"
	  "uffer_we_reg; sm_RFA_IQ_Rx_Buffer_we_reg = xl_state(false, {xlBoolean});\nsm_RFA_IQ_Rx_Buffer_we = sm_RFA_IQ_Rx_Buf"
	  "fer_we_reg;\nopCode_sm_RFA_IQ_Rx_Buffer = xl_concat(addrAck, ...\n                                     RNWReg, ...\n"
	  "                                     bankAddr, ...\n                                     xl_slice(linearAddr, ...\n"
	  "                                              xl_nbits(linearAddr) - 1, ...\n                                      "
	  "        14) ...\n                                    );\nif opCode_sm_RFA_IQ_Rx_Buffer == xl_concat(xfix({xlUnsigne"
	  "d, 4, 0}, 8), ...\n                                         xfix({xlUnsigned, ...\n                                "
	  "               xl_nbits(linearAddr) - 14, ...\n                                               0}, ...\n            "
	  "                                   7) ...\n                                        );\n    sm_RFA_IQ_Rx_Buffer_we_r"
	  "eg = true;\nelse\n    sm_RFA_IQ_Rx_Buffer_we_reg = false;\nend\n\n\n% 'addr' ports of 'Shared Memory' blocks\npersi"
	  "stent sm_RFD_IQ_Tx_Buffer_addr_reg; \nsm_RFD_IQ_Tx_Buffer_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RFD_IQ_T"
	  "x_Buffer_addr = sm_RFD_IQ_Tx_Buffer_addr_reg;\nif addrAck == 1\n    sm_RFD_IQ_Tx_Buffer_addr_reg = xl_slice(linearA"
	  "ddr, 14, 0);\nelse\n    sm_RFD_IQ_Tx_Buffer_addr_reg = sm_RFD_IQ_Tx_Buffer_addr_reg;\nend\npersistent sm_RFD_RSSI_B"
	  "uffer_addr_reg; \nsm_RFD_RSSI_Buffer_addr_reg = xl_state(0, {xlUnsigned, 11, 0});\nsm_RFD_RSSI_Buffer_addr = sm_RFD"
	  "_RSSI_Buffer_addr_reg;\nif addrAck == 1\n    sm_RFD_RSSI_Buffer_addr_reg = xl_slice(linearAddr, 11, 0);\nelse\n    "
	  "sm_RFD_RSSI_Buffer_addr_reg = sm_RFD_RSSI_Buffer_addr_reg;\nend\npersistent sm_RFD_IQ_Rx_Buffer_addr_reg; \nsm_RFD_"
	  "IQ_Rx_Buffer_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RFD_IQ_Rx_Buffer_addr = sm_RFD_IQ_Rx_Buffer_addr_reg;"
	  "\nif addrAck == 1\n    sm_RFD_IQ_Rx_Buffer_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n    sm_RFD_IQ_Rx_Buffer_a"
	  "ddr_reg = sm_RFD_IQ_Rx_Buffer_addr_reg;\nend\npersistent sm_RFC_IQ_Tx_Buffer_addr_reg; \nsm_RFC_IQ_Tx_Buffer_addr_r"
	  "eg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RFC_IQ_Tx_Buffer_addr = sm_RFC_IQ_Tx_Buffer_addr_reg;\nif addrAck == 1\n"
	  "    sm_RFC_IQ_Tx_Buffer_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n    sm_RFC_IQ_Tx_Buffer_addr_reg = sm_RFC_IQ"
	  "_Tx_Buffer_addr_reg;\nend\npersistent sm_RFC_RSSI_Buffer_addr_reg; \nsm_RFC_RSSI_Buffer_addr_reg = xl_state(0, {xlU"
	  "nsigned, 11, 0});\nsm_RFC_RSSI_Buffer_addr = sm_RFC_RSSI_Buffer_addr_reg;\nif addrAck == 1\n    sm_RFC_RSSI_Buffer_"
	  "addr_reg = xl_slice(linearAddr, 11, 0);\nelse\n    sm_RFC_RSSI_Buffer_addr_reg = sm_RFC_RSSI_Buffer_addr_reg;\nend\n"
	  "persistent sm_RFC_IQ_Rx_Buffer_addr_reg; \nsm_RFC_IQ_Rx_Buffer_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RFC"
	  "_IQ_Rx_Buffer_addr = sm_RFC_IQ_Rx_Buffer_addr_reg;\nif addrAck == 1\n    sm_RFC_IQ_Rx_Buffer_addr_reg = xl_slice(li"
	  "nearAddr, 14, 0);\nelse\n    sm_RFC_IQ_Rx_Buffer_addr_reg = sm_RFC_IQ_Rx_Buffer_addr_reg;\nend\npersistent sm_RFB_I"
	  "Q_Tx_Buffer_addr_reg; \nsm_RFB_IQ_Tx_Buffer_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RFB_IQ_Tx_Buffer_addr "
	  "= sm_RFB_IQ_Tx_Buffer_addr_reg;\nif addrAck == 1\n    sm_RFB_IQ_Tx_Buffer_addr_reg = xl_slice(linearAddr, 14, 0);\n"
	  "else\n    sm_RFB_IQ_Tx_Buffer_addr_reg = sm_RFB_IQ_Tx_Buffer_addr_reg;\nend\npersistent sm_RFB_RSSI_Buffer_addr_reg"
	  "; \nsm_RFB_RSSI_Buffer_addr_reg = xl_state(0, {xlUnsigned, 11, 0});\nsm_RFB_RSSI_Buffer_addr = sm_RFB_RSSI_Buffer_a"
	  "ddr_reg;\nif addrAck == 1\n    sm_RFB_RSSI_Buffer_addr_reg = xl_slice(linearAddr, 11, 0);\nelse\n    sm_RFB_RSSI_Bu"
	  "ffer_addr_reg = sm_RFB_RSSI_Buffer_addr_reg;\nend\npersistent sm_RFB_IQ_Rx_Buffer_addr_reg; \nsm_RFB_IQ_Rx_Buffer_a"
	  "ddr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RFB_IQ_Rx_Buffer_addr = sm_RFB_IQ_Rx_Buffer_addr_reg;\nif addrAck ="
	  "= 1\n    sm_RFB_IQ_Rx_Buffer_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n    sm_RFB_IQ_Rx_Buffer_addr_reg = sm_R"
	  "FB_IQ_Rx_Buffer_addr_reg;\nend\npersistent sm_RFA_IQ_Tx_Buffer_addr_reg; \nsm_RFA_IQ_Tx_Buffer_addr_reg = xl_state("
	  "0, {xlUnsigned, 14, 0});\nsm_RFA_IQ_Tx_Buffer_addr = sm_RFA_IQ_Tx_Buffer_addr_reg;\nif addrAck == 1\n    sm_RFA_IQ_"
	  "Tx_Buffer_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n    sm_RFA_IQ_Tx_Buffer_addr_reg = sm_RFA_IQ_Tx_Buffer_add"
	  "r_reg;\nend\npersistent sm_RFA_RSSI_Buffer_addr_reg; \nsm_RFA_RSSI_Buffer_addr_reg = xl_state(0, {xlUnsigned, 11, 0"
	  "});\nsm_RFA_RSSI_Buffer_addr = sm_RFA_RSSI_Buffer_addr_reg;\nif addrAck == 1\n    sm_RFA_RSSI_Buffer_addr_reg = xl_"
	  "slice(linearAddr, 11, 0);\nelse\n    sm_RFA_RSSI_Buffer_addr_reg = sm_RFA_RSSI_Buffer_addr_reg;\nend\npersistent sm"
	  "_RFA_IQ_Rx_Buffer_addr_reg; \nsm_RFA_IQ_Rx_Buffer_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RFA_IQ_Rx_Buffer"
	  "_addr = sm_RFA_IQ_Rx_Buffer_addr_reg;\nif addrAck == 1\n    sm_RFA_IQ_Rx_Buffer_addr_reg = xl_slice(linearAddr, 14,"
	  " 0);\nelse\n    sm_RFA_IQ_Rx_Buffer_addr_reg = sm_RFA_IQ_Rx_Buffer_addr_reg;\nend\n\n\n% 're' ports of 'From FIFO' "
	  "blocks\n\n\n% 'en' ports of 'To Register' blocks\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n       "
	  "                xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 0))\n    sm_TX_DELAY_en = true;\nelse\n    sm_TX_DELAY_"
	  "en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                       xfix({xlUnsigned"
	  ", xl_nbits(linearAddr), 0}, 1))\n    sm_RF_RX_IQ_BUF_RD_BYTE_OFFSET_en = true;\nelse\n    sm_RF_RX_IQ_BUF_RD_BYTE_O"
	  "FFSET_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                       xfix({xlUn"
	  "signed, xl_nbits(linearAddr), 0}, 2))\n    sm_LOAD_TIMER_64_LSB_en = true;\nelse\n    sm_LOAD_TIMER_64_LSB_en = fal"
	  "se;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                       xfix({xlUnsigned, xl_nbi"
	  "ts(linearAddr), 0}, 3))\n    sm_RF_RX_IQ_THRESHOLD_en = true;\nelse\n    sm_RF_RX_IQ_THRESHOLD_en = false;\nend\nif"
	  " opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                       xfix({xlUnsigned, xl_nbits(linearAdd"
	  "r), 0}, 4))\n    sm_RX_LENGTH_en = true;\nelse\n    sm_RX_LENGTH_en = false;\nend\nif opCode == xl_concat(xfix({xlU"
	  "nsigned, 4, 0}, 10), ...\n                       xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 5))\n    sm_TX_LENGTH_"
	  "en = true;\nelse\n    sm_TX_LENGTH_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n    "
	  "                   xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 6))\n    sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_en = true;\n"
	  "else\n    sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ..."
	  "\n                       xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 7))\n    sm_RF_BUFFER_SEL_en = true;\nelse\n  "
	  "  sm_RF_BUFFER_SEL_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                    "
	  "   xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 8))\n    sm_RX_BUF_EN_en = true;\nelse\n    sm_RX_BUF_EN_en = false;"
	  "\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                       xfix({xlUnsigned, xl_nbits("
	  "linearAddr), 0}, 9))\n    sm_RF_TX_IQ_THRESHOLD_en = true;\nelse\n    sm_RF_TX_IQ_THRESHOLD_en = false;\nend\nif op"
	  "Code == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                       xfix({xlUnsigned, xl_nbits(linearAddr),"
	  " 0}, 10))\n    sm_CONFIG_en = true;\nelse\n    sm_CONFIG_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned,"
	  " 4, 0}, 10), ...\n                       xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 11))\n    sm_RF_ERROR_CLR_en ="
	  " true;\nelse\n    sm_RF_ERROR_CLR_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n     "
	  "                  xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 12))\n    sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_en = true;\n"
	  "else\n    sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ..."
	  "\n                       xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 13))\n    sm_LOAD_TIMER_64_MSB_en = true;\nels"
	  "e\n    sm_LOAD_TIMER_64_MSB_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n           "
	  "            xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 14))\n    sm_TX_BUF_EN_en = true;\nelse\n    sm_TX_BUF_EN_e"
	  "n = false;\nend\n\n\n% 'din' ports of 'To FIFO' blocks\n\n\n% 'we' ports of 'To FIFO' blocks\n\n\n% 'din' ports of "
	  "'To Register' blocks\nsm_TX_DELAY_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                "
	  " xlUnsigned, ...\n                                 0);\nsm_RF_RX_IQ_BUF_RD_BYTE_OFFSET_din = xl_force(xl_slice(wrDB"
	  "us, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n                                 0);\nsm_LOA"
	  "D_TIMER_64_LSB_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n "
	  "                                0);\nsm_RF_RX_IQ_THRESHOLD_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n       "
	  "                          xlUnsigned, ...\n                                 0);\nsm_RX_LENGTH_din = xl_force(xl_sli"
	  "ce(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n                                 0);\n"
	  "sm_TX_LENGTH_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n   "
	  "                              0);\nsm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n"
	  "                                 xlUnsigned, ...\n                                 0);\nsm_RF_BUFFER_SEL_din = xl_f"
	  "orce(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n                          "
	  "       0);\nsm_RX_BUF_EN_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsign"
	  "ed, ...\n                                 0);\nsm_RF_TX_IQ_THRESHOLD_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), .."
	  ".\n                                 xlUnsigned, ...\n                                 0);\nsm_CONFIG_din = xl_force"
	  "(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n                              "
	  "   0);\nsm_RF_ERROR_CLR_din = xl_force(xl_slice(wrDBus, 9 - 1, 0), ...\n                                 xlUnsigned"
	  ", ...\n                                 0);\nsm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_din = xl_force(xl_slice(wrDBus, 32 - 1,"
	  " 0), ...\n                                 xlUnsigned, ...\n                                 0);\nsm_LOAD_TIMER_64_"
	  "MSB_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                                 xlUnsigned, ...\n            "
	  "                     0);\nsm_TX_BUF_EN_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n                           "
	  "      xlUnsigned, ...\n                                 0);\n\n\npersistent read_bank_out_reg; read_bank_out_reg = "
	  "xl_state(0, {xlUnsigned, 32, 0});\nread_bank_out = read_bank_out_reg;\n\npersistent bankAddr_reg; bankAddr_reg = xl"
	  "_state(0, bankAddr);\n\nif bankAddr_reg == 0\n    % Bank 0: Shared Memories\n    read_bank_out_reg = ram_bank_out;\n"
	  "elseif bankAddr_reg == 1\n    % Bank 1: From/To FIFOs\n    read_bank_out_reg =  0;\nelseif bankAddr_reg == 2\n    %"
	  " Bank 2: From/To Registers\n    read_bank_out_reg = reg_bank_out;\nelseif bankAddr_reg == 3\n    % Bank 3: Configur"
	  "ation Registers\n    read_bank_out_reg = 0;\nend\n\nbankAddr_reg = bankAddr;\n"
	  suppress_output	  "on"
	  defparams		  "{}"
	  hide_port_list	  "{}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mcode"
	  sg_icon_stat		  "170,332,47,67,white,blue,0,84c202a3,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 0 ],[0 0 332 332 0 ],[0.77 0.82 "
	  "0.91 ]);\nplot([0 170 170 0 0 ],[0 0 332 332 0 ]);\npatch([31.6 66.28 90.28 114.28 138.28 90.28 55.6 31.6 ],[192.64"
	  " 192.64 216.64 192.64 216.64 216.64 216.64 192.64 ],[1 1 1 ]);\npatch([55.6 90.28 66.28 31.6 55.6 ],[168.64 168.64 "
	  "192.64 192.64 168.64 ],[0.931 0.946 0.973 ]);\npatch([31.6 66.28 90.28 55.6 31.6 ],[144.64 144.64 168.64 168.64 144"
	  ".64 ],[1 1 1 ]);\npatch([55.6 138.28 114.28 90.28 66.28 31.6 55.6 ],[120.64 120.64 144.64 120.64 144.64 144.64 120."
	  "64 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nco"
	  "lor('black');port_label('input',1,'wrDBus');\ncolor('black');port_label('input',2,'bankAddr');\ncolor('black');port"
	  "_label('input',3,'linearAddr');\ncolor('black');port_label('input',4,'RNWReg');\ncolor('black');port_label('input',"
	  "5,'addrAck');\ncolor('black');port_label('input',6,'sm_RF_TX_IQ_BUF_OCCUPANCY');\ncolor('black');port_label('input'"
	  ",7,'sm_RF_TX_IQ_BUF_RD_BYTE_OFFSET');\ncolor('black');port_label('input',8,'sm_AGC_GAINS');\ncolor('black');port_la"
	  "bel('input',9,'sm_RF_RX_IQ_BUF_OCCUPANCY');\ncolor('black');port_label('input',10,'sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_U"
	  "PDATE');\ncolor('black');port_label('input',11,'sm_INT_STATUS');\ncolor('black');port_label('input',12,'sm_BUFF_SIZ"
	  "ES');\ncolor('black');port_label('input',13,'sm_DESIGN_VER');\ncolor('black');port_label('input',14,'sm_RF_TX_IQ_ST"
	  "ATUS');\ncolor('black');port_label('input',15,'sm_STATUS');\ncolor('black');port_label('input',16,'sm_RFCD_AGC_DONE"
	  "_RSSI');\ncolor('black');port_label('input',17,'sm_RFAB_AGC_DONE_RSSI');\ncolor('black');port_label('input',18,'sm_"
	  "TIMER_64_MSB');\ncolor('black');port_label('input',19,'sm_TIMER_64_LSB');\ncolor('black');port_label('input',20,'sm"
	  "_AGC_DONE_ADDR');\ncolor('black');port_label('input',21,'sm_TX_DELAY');\ncolor('black');port_label('input',22,'sm_R"
	  "F_RX_IQ_BUF_RD_BYTE_OFFSET');\ncolor('black');port_label('input',23,'sm_LOAD_TIMER_64_LSB');\ncolor('black');port_l"
	  "abel('input',24,'sm_RF_RX_IQ_THRESHOLD');\ncolor('black');port_label('input',25,'sm_RX_LENGTH');\ncolor('black');po"
	  "rt_label('input',26,'sm_TX_LENGTH');\ncolor('black');port_label('input',27,'sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET');\ncolo"
	  "r('black');port_label('input',28,'sm_RF_BUFFER_SEL');\ncolor('black');port_label('input',29,'sm_RX_BUF_EN');\ncolor"
	  "('black');port_label('input',30,'sm_RF_TX_IQ_THRESHOLD');\ncolor('black');port_label('input',31,'sm_CONFIG');\ncolo"
	  "r('black');port_label('input',32,'sm_RF_ERROR_CLR');\ncolor('black');port_label('input',33,'sm_RF_TX_IQ_BUF_WR_BYTE"
	  "_OFFSET');\ncolor('black');port_label('input',34,'sm_LOAD_TIMER_64_MSB');\ncolor('black');port_label('input',35,'sm"
	  "_TX_BUF_EN');\ncolor('black');port_label('input',36,'sm_RFD_IQ_Tx_Buffer');\ncolor('black');port_label('input',37,'"
	  "sm_RFD_RSSI_Buffer');\ncolor('black');port_label('input',38,'sm_RFD_IQ_Rx_Buffer');\ncolor('black');port_label('inp"
	  "ut',39,'sm_RFC_IQ_Tx_Buffer');\ncolor('black');port_label('input',40,'sm_RFC_RSSI_Buffer');\ncolor('black');port_la"
	  "bel('input',41,'sm_RFC_IQ_Rx_Buffer');\ncolor('black');port_label('input',42,'sm_RFB_IQ_Tx_Buffer');\ncolor('black'"
	  ");port_label('input',43,'sm_RFB_RSSI_Buffer');\ncolor('black');port_label('input',44,'sm_RFB_IQ_Rx_Buffer');\ncolor"
	  "('black');port_label('input',45,'sm_RFA_IQ_Tx_Buffer');\ncolor('black');port_label('input',46,'sm_RFA_RSSI_Buffer')"
	  ";\ncolor('black');port_label('input',47,'sm_RFA_IQ_Rx_Buffer');\ncolor('black');port_label('output',1,'read_bank_ou"
	  "t');\ncolor('black');port_label('output',2,'sm_TX_DELAY_din');\ncolor('black');port_label('output',3,'sm_TX_DELAY_e"
	  "n');\ncolor('black');port_label('output',4,'sm_RF_RX_IQ_BUF_RD_BYTE_OFFSET_din');\ncolor('black');port_label('outpu"
	  "t',5,'sm_RF_RX_IQ_BUF_RD_BYTE_OFFSET_en');\ncolor('black');port_label('output',6,'sm_LOAD_TIMER_64_LSB_din');\ncolo"
	  "r('black');port_label('output',7,'sm_LOAD_TIMER_64_LSB_en');\ncolor('black');port_label('output',8,'sm_RF_RX_IQ_THR"
	  "ESHOLD_din');\ncolor('black');port_label('output',9,'sm_RF_RX_IQ_THRESHOLD_en');\ncolor('black');port_label('output"
	  "',10,'sm_RX_LENGTH_din');\ncolor('black');port_label('output',11,'sm_RX_LENGTH_en');\ncolor('black');port_label('ou"
	  "tput',12,'sm_TX_LENGTH_din');\ncolor('black');port_label('output',13,'sm_TX_LENGTH_en');\ncolor('black');port_label"
	  "('output',14,'sm_RF_RX_IQ_BUF_WR_BYTE_OFFSET_din');\ncolor('black');port_label('output',15,'sm_RF_RX_IQ_BUF_WR_BYTE"
	  "_OFFSET_en');\ncolor('black');port_label('output',16,'sm_RF_BUFFER_SEL_din');\ncolor('black');port_label('output',1"
	  "7,'sm_RF_BUFFER_SEL_en');\ncolor('black');port_label('output',18,'sm_RX_BUF_EN_din');\ncolor('black');port_label('o"
	  "utput',19,'sm_RX_BUF_EN_en');\ncolor('black');port_label('output',20,'sm_RF_TX_IQ_THRESHOLD_din');\ncolor('black');"
	  "port_label('output',21,'sm_RF_TX_IQ_THRESHOLD_en');\ncolor('black');port_label('output',22,'sm_CONFIG_din');\ncolor"
	  "('black');port_label('output',23,'sm_CONFIG_en');\ncolor('black');port_label('output',24,'sm_RF_ERROR_CLR_din');\nc"
	  "olor('black');port_label('output',25,'sm_RF_ERROR_CLR_en');\ncolor('black');port_label('output',26,'sm_RF_TX_IQ_BUF"
	  "_WR_BYTE_OFFSET_din');\ncolor('black');port_label('output',27,'sm_RF_TX_IQ_BUF_WR_BYTE_OFFSET_en');\ncolor('black')"
	  ";port_label('output',28,'sm_LOAD_TIMER_64_MSB_din');\ncolor('black');port_label('output',29,'sm_LOAD_TIMER_64_MSB_e"
	  "n');\ncolor('black');port_label('output',30,'sm_TX_BUF_EN_din');\ncolor('black');port_label('output',31,'sm_TX_BUF_"
	  "EN_en');\ncolor('black');port_label('output',32,'sm_RFD_IQ_Tx_Buffer_addr');\ncolor('black');port_label('output',33"
	  ",'sm_RFD_IQ_Tx_Buffer_din');\ncolor('black');port_label('output',34,'sm_RFD_IQ_Tx_Buffer_we');\ncolor('black');port"
	  "_label('output',35,'sm_RFD_RSSI_Buffer_addr');\ncolor('black');port_label('output',36,'sm_RFD_RSSI_Buffer_din');\nc"
	  "olor('black');port_label('output',37,'sm_RFD_RSSI_Buffer_we');\ncolor('black');port_label('output',38,'sm_RFD_IQ_Rx"
	  "_Buffer_addr');\ncolor('black');port_label('output',39,'sm_RFD_IQ_Rx_Buffer_din');\ncolor('black');port_label('outp"
	  "ut',40,'sm_RFD_IQ_Rx_Buffer_we');\ncolor('black');port_label('output',41,'sm_RFC_IQ_Tx_Buffer_addr');\ncolor('black"
	  "');port_label('output',42,'sm_RFC_IQ_Tx_Buffer_din');\ncolor('black');port_label('output',43,'sm_RFC_IQ_Tx_Buffer_w"
	  "e');\ncolor('black');port_label('output',44,'sm_RFC_RSSI_Buffer_addr');\ncolor('black');port_label('output',45,'sm_"
	  "RFC_RSSI_Buffer_din');\ncolor('black');port_label('output',46,'sm_RFC_RSSI_Buffer_we');\ncolor('black');port_label("
	  "'output',47,'sm_RFC_IQ_Rx_Buffer_addr');\ncolor('black');port_label('output',48,'sm_RFC_IQ_Rx_Buffer_din');\ncolor("
	  "'black');port_label('output',49,'sm_RFC_IQ_Rx_Buffer_we');\ncolor('black');port_label('output',50,'sm_RFB_IQ_Tx_Buf"
	  "fer_addr');\ncolor('black');port_label('output',51,'sm_RFB_IQ_Tx_Buffer_din');\ncolor('black');port_label('output',"
	  "52,'sm_RFB_IQ_Tx_Buffer_we');\ncolor('black');port_label('output',53,'sm_RFB_RSSI_Buffer_addr');\ncolor('black');po"
	  "rt_label('output',54,'sm_RFB_RSSI_Buffer_din');\ncolor('black');port_label('output',55,'sm_RFB_RSSI_Buffer_we');\nc"
	  "olor('black');port_label('output',56,'sm_RFB_IQ_Rx_Buffer_addr');\ncolor('black');port_label('output',57,'sm_RFB_IQ"
	  "_Rx_Buffer_din');\ncolor('black');port_label('output',58,'sm_RFB_IQ_Rx_Buffer_we');\ncolor('black');port_label('out"
	  "put',59,'sm_RFA_IQ_Tx_Buffer_addr');\ncolor('black');port_label('output',60,'sm_RFA_IQ_Tx_Buffer_din');\ncolor('bla"
	  "ck');port_label('output',61,'sm_RFA_IQ_Tx_Buffer_we');\ncolor('black');port_label('output',62,'sm_RFA_RSSI_Buffer_a"
	  "ddr');\ncolor('black');port_label('output',63,'sm_RFA_RSSI_Buffer_din');\ncolor('black');port_label('output',64,'sm"
	  "_RFA_RSSI_Buffer_we');\ncolor('black');port_label('output',65,'sm_RFA_IQ_Rx_Buffer_addr');\ncolor('black');port_lab"
	  "el('output',66,'sm_RFA_IQ_Rx_Buffer_din');\ncolor('black');port_label('output',67,'sm_RFA_IQ_Rx_Buffer_we');\ncolor"
	  "('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	  Port {
	    PortNumber		    1
	    Name		    "rdData"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    2
	    Name		    "TX_DELAY_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    3
	    Name		    "TX_DELAY_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    4
	    Name		    "RF_RX_IQ_BUF_RD_BYTE_OFFSET_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    5
	    Name		    "RF_RX_IQ_BUF_RD_BYTE_OFFSET_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    6
	    Name		    "LOAD_TIMER_64_LSB_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    7
	    Name		    "LOAD_TIMER_64_LSB_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    8
	    Name		    "RF_RX_IQ_THRESHOLD_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    9
	    Name		    "RF_RX_IQ_THRESHOLD_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    10
	    Name		    "RX_LENGTH_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    11
	    Name		    "RX_LENGTH_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    12
	    Name		    "TX_LENGTH_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    13
	    Name		    "TX_LENGTH_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    14
	    Name		    "RF_RX_IQ_BUF_WR_BYTE_OFFSET_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    15
	    Name		    "RF_RX_IQ_BUF_WR_BYTE_OFFSET_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    16
	    Name		    "RF_BUFFER_SEL_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    17
	    Name		    "RF_BUFFER_SEL_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    18
	    Name		    "RX_BUF_EN_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    19
	    Name		    "RX_BUF_EN_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    20
	    Name		    "RF_TX_IQ_THRESHOLD_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    21
	    Name		    "RF_TX_IQ_THRESHOLD_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    22
	    Name		    "CONFIG_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    23
	    Name		    "CONFIG_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    24
	    Name		    "RF_ERROR_CLR_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    25
	    Name		    "RF_ERROR_CLR_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    26
	    Name		    "RF_TX_IQ_BUF_WR_BYTE_OFFSET_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    27
	    Name		    "RF_TX_IQ_BUF_WR_BYTE_OFFSET_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    28
	    Name		    "LOAD_TIMER_64_MSB_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    29
	    Name		    "LOAD_TIMER_64_MSB_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    30
	    Name		    "TX_BUF_EN_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    31
	    Name		    "TX_BUF_EN_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    32
	    Name		    "RFD_IQ_Tx_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    33
	    Name		    "RFD_IQ_Tx_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    34
	    Name		    "RFD_IQ_Tx_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    35
	    Name		    "RFD_RSSI_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    36
	    Name		    "RFD_RSSI_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    37
	    Name		    "RFD_RSSI_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    38
	    Name		    "RFD_IQ_Rx_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    39
	    Name		    "RFD_IQ_Rx_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    40
	    Name		    "RFD_IQ_Rx_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    41
	    Name		    "RFC_IQ_Tx_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    42
	    Name		    "RFC_IQ_Tx_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    43
	    Name		    "RFC_IQ_Tx_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    44
	    Name		    "RFC_RSSI_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    45
	    Name		    "RFC_RSSI_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    46
	    Name		    "RFC_RSSI_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    47
	    Name		    "RFC_IQ_Rx_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    48
	    Name		    "RFC_IQ_Rx_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    49
	    Name		    "RFC_IQ_Rx_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    50
	    Name		    "RFB_IQ_Tx_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    51
	    Name		    "RFB_IQ_Tx_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    52
	    Name		    "RFB_IQ_Tx_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    53
	    Name		    "RFB_RSSI_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    54
	    Name		    "RFB_RSSI_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    55
	    Name		    "RFB_RSSI_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    56
	    Name		    "RFB_IQ_Rx_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    57
	    Name		    "RFB_IQ_Rx_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    58
	    Name		    "RFB_IQ_Rx_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    59
	    Name		    "RFA_IQ_Tx_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    60
	    Name		    "RFA_IQ_Tx_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    61
	    Name		    "RFA_IQ_Tx_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    62
	    Name		    "RFA_RSSI_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    63
	    Name		    "RFA_RSSI_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    64
	    Name		    "RFA_RSSI_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    65
	    Name		    "RFA_IQ_Rx_Buffer_addr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    66
	    Name		    "RFA_IQ_Rx_Buffer_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    67
	    Name		    "RFA_IQ_Rx_Buffer_we"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "sg_plb_addrpref"
	  SID			  "4899:263"
	  Ports			  [1, 1]
	  Position		  [175, 755, 245, 775]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "10"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'sg_plb_addrpref'}},'iopad'=>{'constraint'=>'"
	  "#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	  Port {
	    PortNumber		    1
	    Name		    "addrPref"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Line {
	  Name			  "Sl_addrAck"
	  SrcBlock		  "plb_decode"
	  SrcPort		  2
	  Points		  [0, 0]
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "plb_memmap"
	    DstPort		    5
	  }
	  Branch {
	    Labels		    [0, 0]
	    DstBlock		    "Sl_addrAck"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "Sl_wrDAck"
	  SrcBlock		  "plb_decode"
	  SrcPort		  4
	  Points		  [0, 0]
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "Sl_wrDAck"
	    DstPort		    1
	  }
	  Branch {
	    Labels		    [0, 0]
	    DstBlock		    "Sl_wrComp"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "RFA_IQ_Rx_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  67
	  DstBlock		  "Shared Memory11"
	  DstPort		  3
	}
	Line {
	  Name			  "RFA_IQ_Rx_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  66
	  DstBlock		  "Shared Memory11"
	  DstPort		  2
	}
	Line {
	  Name			  "RFA_IQ_Rx_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  65
	  DstBlock		  "Shared Memory11"
	  DstPort		  1
	}
	Line {
	  Name			  "RFA_RSSI_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  64
	  DstBlock		  "Shared Memory10"
	  DstPort		  3
	}
	Line {
	  Name			  "RFA_RSSI_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  63
	  DstBlock		  "Shared Memory10"
	  DstPort		  2
	}
	Line {
	  Name			  "RFA_RSSI_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  62
	  DstBlock		  "Shared Memory10"
	  DstPort		  1
	}
	Line {
	  Name			  "RFA_IQ_Tx_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  61
	  DstBlock		  "Shared Memory9"
	  DstPort		  3
	}
	Line {
	  Name			  "RFA_IQ_Tx_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  60
	  DstBlock		  "Shared Memory9"
	  DstPort		  2
	}
	Line {
	  Name			  "RFA_IQ_Tx_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  59
	  DstBlock		  "Shared Memory9"
	  DstPort		  1
	}
	Line {
	  Name			  "RFB_IQ_Rx_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  58
	  DstBlock		  "Shared Memory8"
	  DstPort		  3
	}
	Line {
	  Name			  "RFB_IQ_Rx_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  57
	  DstBlock		  "Shared Memory8"
	  DstPort		  2
	}
	Line {
	  Name			  "RFB_IQ_Rx_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  56
	  DstBlock		  "Shared Memory8"
	  DstPort		  1
	}
	Line {
	  Name			  "RFB_RSSI_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  55
	  DstBlock		  "Shared Memory7"
	  DstPort		  3
	}
	Line {
	  Name			  "RFB_RSSI_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  54
	  DstBlock		  "Shared Memory7"
	  DstPort		  2
	}
	Line {
	  Name			  "RFB_RSSI_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  53
	  DstBlock		  "Shared Memory7"
	  DstPort		  1
	}
	Line {
	  Name			  "RFB_IQ_Tx_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  52
	  DstBlock		  "Shared Memory6"
	  DstPort		  3
	}
	Line {
	  Name			  "RFB_IQ_Tx_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  51
	  DstBlock		  "Shared Memory6"
	  DstPort		  2
	}
	Line {
	  Name			  "RFB_IQ_Tx_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  50
	  DstBlock		  "Shared Memory6"
	  DstPort		  1
	}
	Line {
	  Name			  "RFC_IQ_Rx_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  49
	  DstBlock		  "Shared Memory5"
	  DstPort		  3
	}
	Line {
	  Name			  "RFC_IQ_Rx_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  48
	  DstBlock		  "Shared Memory5"
	  DstPort		  2
	}
	Line {
	  Name			  "RFC_IQ_Rx_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  47
	  DstBlock		  "Shared Memory5"
	  DstPort		  1
	}
	Line {
	  Name			  "RFC_RSSI_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  46
	  DstBlock		  "Shared Memory4"
	  DstPort		  3
	}
	Line {
	  Name			  "RFC_RSSI_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  45
	  DstBlock		  "Shared Memory4"
	  DstPort		  2
	}
	Line {
	  Name			  "RFC_RSSI_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  44
	  DstBlock		  "Shared Memory4"
	  DstPort		  1
	}
	Line {
	  Name			  "RFC_IQ_Tx_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  43
	  DstBlock		  "Shared Memory3"
	  DstPort		  3
	}
	Line {
	  Name			  "RFC_IQ_Tx_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  42
	  DstBlock		  "Shared Memory3"
	  DstPort		  2
	}
	Line {
	  Name			  "RFC_IQ_Tx_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  41
	  DstBlock		  "Shared Memory3"
	  DstPort		  1
	}
	Line {
	  Name			  "RFD_IQ_Rx_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  40
	  DstBlock		  "Shared Memory2"
	  DstPort		  3
	}
	Line {
	  Name			  "RFD_IQ_Rx_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  39
	  DstBlock		  "Shared Memory2"
	  DstPort		  2
	}
	Line {
	  Name			  "RFD_IQ_Rx_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  38
	  DstBlock		  "Shared Memory2"
	  DstPort		  1
	}
	Line {
	  Name			  "RFD_RSSI_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  37
	  DstBlock		  "Shared Memory1"
	  DstPort		  3
	}
	Line {
	  Name			  "RFD_RSSI_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  36
	  DstBlock		  "Shared Memory1"
	  DstPort		  2
	}
	Line {
	  Name			  "RFD_RSSI_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  35
	  DstBlock		  "Shared Memory1"
	  DstPort		  1
	}
	Line {
	  Name			  "RFD_IQ_Tx_Buffer_we"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  34
	  DstBlock		  "Shared Memory"
	  DstPort		  3
	}
	Line {
	  Name			  "RFD_IQ_Tx_Buffer_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  33
	  DstBlock		  "Shared Memory"
	  DstPort		  2
	}
	Line {
	  Name			  "RFD_IQ_Tx_Buffer_addr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  32
	  DstBlock		  "Shared Memory"
	  DstPort		  1
	}
	Line {
	  Name			  "TX_BUF_EN_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  31
	  DstBlock		  "To Register14"
	  DstPort		  2
	}
	Line {
	  Name			  "TX_BUF_EN_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  30
	  DstBlock		  "To Register14"
	  DstPort		  1
	}
	Line {
	  Name			  "LOAD_TIMER_64_MSB_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  29
	  DstBlock		  "To Register13"
	  DstPort		  2
	}
	Line {
	  Name			  "LOAD_TIMER_64_MSB_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  28
	  DstBlock		  "To Register13"
	  DstPort		  1
	}
	Line {
	  Name			  "RF_TX_IQ_BUF_WR_BYTE_OFFSET_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  27
	  DstBlock		  "To Register12"
	  DstPort		  2
	}
	Line {
	  Name			  "RF_TX_IQ_BUF_WR_BYTE_OFFSET_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  26
	  DstBlock		  "To Register12"
	  DstPort		  1
	}
	Line {
	  Name			  "RF_ERROR_CLR_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  25
	  DstBlock		  "To Register11"
	  DstPort		  2
	}
	Line {
	  Name			  "RF_ERROR_CLR_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  24
	  DstBlock		  "To Register11"
	  DstPort		  1
	}
	Line {
	  Name			  "CONFIG_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  23
	  DstBlock		  "To Register10"
	  DstPort		  2
	}
	Line {
	  Name			  "CONFIG_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  22
	  DstBlock		  "To Register10"
	  DstPort		  1
	}
	Line {
	  Name			  "RF_TX_IQ_THRESHOLD_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  21
	  DstBlock		  "To Register9"
	  DstPort		  2
	}
	Line {
	  Name			  "RF_TX_IQ_THRESHOLD_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  20
	  DstBlock		  "To Register9"
	  DstPort		  1
	}
	Line {
	  Name			  "RX_BUF_EN_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  19
	  DstBlock		  "To Register8"
	  DstPort		  2
	}
	Line {
	  Name			  "RX_BUF_EN_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  18
	  DstBlock		  "To Register8"
	  DstPort		  1
	}
	Line {
	  Name			  "RF_BUFFER_SEL_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  17
	  DstBlock		  "To Register7"
	  DstPort		  2
	}
	Line {
	  Name			  "RF_BUFFER_SEL_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  16
	  DstBlock		  "To Register7"
	  DstPort		  1
	}
	Line {
	  Name			  "RF_RX_IQ_BUF_WR_BYTE_OFFSET_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  15
	  DstBlock		  "To Register6"
	  DstPort		  2
	}
	Line {
	  Name			  "RF_RX_IQ_BUF_WR_BYTE_OFFSET_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  14
	  DstBlock		  "To Register6"
	  DstPort		  1
	}
	Line {
	  Name			  "TX_LENGTH_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  13
	  DstBlock		  "To Register5"
	  DstPort		  2
	}
	Line {
	  Name			  "TX_LENGTH_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  12
	  DstBlock		  "To Register5"
	  DstPort		  1
	}
	Line {
	  Name			  "RX_LENGTH_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  11
	  DstBlock		  "To Register4"
	  DstPort		  2
	}
	Line {
	  Name			  "RX_LENGTH_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  10
	  DstBlock		  "To Register4"
	  DstPort		  1
	}
	Line {
	  Name			  "RF_RX_IQ_THRESHOLD_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  9
	  DstBlock		  "To Register3"
	  DstPort		  2
	}
	Line {
	  Name			  "RF_RX_IQ_THRESHOLD_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  8
	  DstBlock		  "To Register3"
	  DstPort		  1
	}
	Line {
	  Name			  "LOAD_TIMER_64_LSB_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  7
	  DstBlock		  "To Register2"
	  DstPort		  2
	}
	Line {
	  Name			  "LOAD_TIMER_64_LSB_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  6
	  DstBlock		  "To Register2"
	  DstPort		  1
	}
	Line {
	  Name			  "RF_RX_IQ_BUF_RD_BYTE_OFFSET_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  5
	  DstBlock		  "To Register1"
	  DstPort		  2
	}
	Line {
	  Name			  "RF_RX_IQ_BUF_RD_BYTE_OFFSET_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  4
	  DstBlock		  "To Register1"
	  DstPort		  1
	}
	Line {
	  Name			  "TX_DELAY_en"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  3
	  DstBlock		  "To Register"
	  DstPort		  2
	}
	Line {
	  Name			  "TX_DELAY_din"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  2
	  DstBlock		  "To Register"
	  DstPort		  1
	}
	Line {
	  Name			  "rdData"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  6
	}
	Line {
	  Name			  "RFA_IQ_Rx_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory11"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  47
	}
	Line {
	  Name			  "RFA_RSSI_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory10"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  46
	}
	Line {
	  Name			  "RFA_IQ_Tx_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory9"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  45
	}
	Line {
	  Name			  "RFB_IQ_Rx_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory8"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  44
	}
	Line {
	  Name			  "RFB_RSSI_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory7"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  43
	}
	Line {
	  Name			  "RFB_IQ_Tx_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory6"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  42
	}
	Line {
	  Name			  "RFC_IQ_Rx_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory5"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  41
	}
	Line {
	  Name			  "RFC_RSSI_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory4"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  40
	}
	Line {
	  Name			  "RFC_IQ_Tx_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory3"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  39
	}
	Line {
	  Name			  "RFD_IQ_Rx_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory2"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  38
	}
	Line {
	  Name			  "RFD_RSSI_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory1"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  37
	}
	Line {
	  Name			  "RFD_IQ_Tx_Buffer_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Shared Memory"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  36
	}
	Line {
	  Name			  "TX_BUF_EN_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register14"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  35
	}
	Line {
	  Name			  "LOAD_TIMER_64_MSB_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register13"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  34
	}
	Line {
	  Name			  "RF_TX_IQ_BUF_WR_BYTE_OFFSET_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register12"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  33
	}
	Line {
	  Name			  "RF_ERROR_CLR_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register11"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  32
	}
	Line {
	  Name			  "CONFIG_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register10"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  31
	}
	Line {
	  Name			  "RF_TX_IQ_THRESHOLD_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register9"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  30
	}
	Line {
	  Name			  "RX_BUF_EN_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register8"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  29
	}
	Line {
	  Name			  "RF_BUFFER_SEL_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register7"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  28
	}
	Line {
	  Name			  "RF_RX_IQ_BUF_WR_BYTE_OFFSET_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register6"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  27
	}
	Line {
	  Name			  "TX_LENGTH_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register5"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  26
	}
	Line {
	  Name			  "RX_LENGTH_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register4"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  25
	}
	Line {
	  Name			  "RF_RX_IQ_THRESHOLD_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register3"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  24
	}
	Line {
	  Name			  "LOAD_TIMER_64_LSB_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register2"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  23
	}
	Line {
	  Name			  "RF_RX_IQ_BUF_RD_BYTE_OFFSET_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register1"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  22
	}
	Line {
	  Name			  "TX_DELAY_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "To Register"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  21
	}
	Line {
	  Name			  "AGC_DONE_ADDR_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register14"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  20
	}
	Line {
	  Name			  "TIMER_64_LSB_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register13"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  19
	}
	Line {
	  Name			  "TIMER_64_MSB_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register12"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  18
	}
	Line {
	  Name			  "RFAB_AGC_DONE_RSSI_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register11"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  17
	}
	Line {
	  Name			  "RFCD_AGC_DONE_RSSI_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register10"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  16
	}
	Line {
	  Name			  "STATUS_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register9"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  15
	}
	Line {
	  Name			  "RF_TX_IQ_STATUS_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register8"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  14
	}
	Line {
	  Name			  "DESIGN_VER_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register7"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  13
	}
	Line {
	  Name			  "BUFF_SIZES_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register6"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  12
	}
	Line {
	  Name			  "INT_STATUS_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register5"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  11
	}
	Line {
	  Name			  "RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register4"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  10
	}
	Line {
	  Name			  "RF_RX_IQ_BUF_OCCUPANCY_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register3"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  9
	}
	Line {
	  Name			  "AGC_GAINS_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register2"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  8
	}
	Line {
	  Name			  "RF_TX_IQ_BUF_RD_BYTE_OFFSET_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register1"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  7
	}
	Line {
	  Name			  "RF_TX_IQ_BUF_OCCUPANCY_dout"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "From Register"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  6
	}
	Line {
	  Name			  "RNWReg"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  6
	  DstBlock		  "plb_memmap"
	  DstPort		  4
	}
	Line {
	  Name			  "linearAddr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  9
	  DstBlock		  "plb_memmap"
	  DstPort		  3
	}
	Line {
	  Name			  "bankAddr"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  5
	  DstBlock		  "plb_memmap"
	  DstPort		  2
	}
	Line {
	  Name			  "wrDBusReg"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  1
	  DstBlock		  "plb_memmap"
	  DstPort		  1
	}
	Line {
	  Name			  "Sl_rdDBus"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  8
	  DstBlock		  "Sl_rdDBus"
	  DstPort		  1
	}
	Line {
	  Name			  "Sl_rdDAck"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  7
	  DstBlock		  "Sl_rdDAck"
	  DstPort		  1
	}
	Line {
	  Name			  "Sl_rdComp"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  3
	  DstBlock		  "Sl_rdComp"
	  DstPort		  1
	}
	Line {
	  Name			  "addrPref"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "sg_plb_addrpref"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  7
	}
	Line {
	  Name			  "PLB_wrDBus"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "PLB_wrDBus"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  5
	}
	Line {
	  Name			  "PLB_RNW"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "PLB_RNW"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  4
	}
	Line {
	  Name			  "PLB_PAValid"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "PLB_PAValid"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  3
	}
	Line {
	  Name			  "PLB_ABus"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "PLB_ABus"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  2
	}
	Line {
	  Name			  "SPLB_Rst"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "SPLB_Rst"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant6"
	  SrcPort		  1
	  DstBlock		  "sg_plb_addrpref"
	  DstPort		  1
	}
	Line {
	  Name			  "Sl_wait"
	  Labels		  [0, 0; 0, 0]
	  SrcBlock		  "Constant5"
	  SrcPort		  1
	  DstBlock		  "Sl_wait"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant4"
	  SrcPort		  1
	  DstBlock		  "PLB_wrDBus"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant3"
	  SrcPort		  1
	  DstBlock		  "PLB_RNW"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant2"
	  SrcPort		  1
	  DstBlock		  "PLB_PAValid"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "PLB_ABus"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "SPLB_Rst"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_wrComp"
	  SrcPort		  1
	  DstBlock		  "Terminator6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_wrDAck"
	  SrcPort		  1
	  DstBlock		  "Terminator5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_wait"
	  SrcPort		  1
	  DstBlock		  "Terminator4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_rdDBus"
	  SrcPort		  1
	  DstBlock		  "Terminator3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_rdDAck"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_rdComp"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_addrAck"
	  SrcPort		  1
	  DstBlock		  "Terminator"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      From
      Name		      "From1"
      SID		      "7"
      Position		      [160, 846, 295, 864]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "STOP_TX"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From10"
      SID		      "1137"
      Position		      [1290, 191, 1425, 209]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFA_RX_BUF_EN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From11"
      SID		      "1138"
      Position		      [1295, 376, 1430, 394]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFB_RX_BUF_EN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From12"
      SID		      "1139"
      Position		      [1295, 556, 1430, 574]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFC_RX_BUF_EN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From13"
      SID		      "1140"
      Position		      [1295, 736, 1430, 754]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFD_RX_BUF_EN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From14"
      SID		      "3394"
      Position		      [1020, 1196, 1155, 1214]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFD_BUFFER_SEL"
      IconDisplay	      "Signal name"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From15"
      SID		      "3739"
      Position		      [1020, 269, 1170, 291]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFB_AGC_IQ_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From16"
      SID		      "3740"
      Position		      [1020, 449, 1170, 471]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFC_AGC_IQ_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From17"
      SID		      "3741"
      Position		      [1020, 629, 1170, 651]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFD_AGC_IQ_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From18"
      SID		      "16"
      Position		      [1020, 84, 1170, 106]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFA_AGC_IQ_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From19"
      SID		      "4676"
      Position		      [60, 1076, 240, 1094]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "DEBUG_TX_BUF_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From2"
      SID		      "18"
      Position		      [160, 866, 295, 884]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "CONTINUOUS_TX"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From20"
      SID		      "4662"
      Position		      [60, 1056, 240, 1074]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "DEBUG_TX_OUTPUT_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From21"
      SID		      "4677"
      Position		      [60, 1096, 240, 1114]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFA_IS_ZERO"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From22"
      SID		      "4678"
      Position		      [60, 1116, 240, 1134]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFB_IS_ZERO"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From23"
      SID		      "4679"
      Position		      [60, 1136, 240, 1154]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFC_IS_ZERO"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From24"
      SID		      "4680"
      Position		      [60, 1156, 240, 1174]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFD_IS_ZERO"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From25"
      SID		      "4700"
      Position		      [60, 1236, 240, 1254]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RF_TX_IQ_INT"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From26"
      SID		      "4701"
      Position		      [60, 1256, 240, 1274]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "AGC_Done_Detect"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From27"
      SID		      "4703"
      Position		      [60, 1276, 240, 1294]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "TRIGGER_IN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From28"
      SID		      "4726"
      Position		      [1265, 21, 1425, 39]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "TX_RX_LOOPBACK_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From3"
      SID		      "3391"
      Position		      [1020, 776, 1155, 794]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFA_BUFFER_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From4"
      SID		      "3392"
      Position		      [1020, 916, 1155, 934]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFB_BUFFER_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From5"
      SID		      "1141"
      Position		      [1020, 846, 1155, 864]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFA_TX_BUF_EN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From6"
      SID		      "1142"
      Position		      [1020, 986, 1155, 1004]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFB_TX_BUF_EN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From7"
      SID		      "1143"
      Position		      [1020, 1126, 1155, 1144]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFC_TX_BUF_EN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From8"
      SID		      "1144"
      Position		      [1020, 1266, 1155, 1284]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFD_TX_BUF_EN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From9"
      SID		      "3393"
      Position		      [1020, 1056, 1155, 1074]
      ShowName		      off
      CloseFcn		      "tagdialog Close"
      GotoTag		      "RFC_BUFFER_SEL"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      "Goto1"
      SID		      "26"
      Position		      [1020, 40, 1170, 60]
      ShowName		      off
      GotoTag		      "WR_ADDR"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      "Goto2"
      SID		      "4657"
      Position		      [2035, 870, 2185, 890]
      ShowName		      off
      GotoTag		      "RFA_IS_ZERO"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      "Goto3"
      SID		      "28"
      Position		      [680, 952, 840, 978]
      ShowName		      off
      GotoTag		      "AGC_Done_Detect"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      "Goto4"
      SID		      "4668"
      Position		      [2035, 1010, 2185, 1030]
      ShowName		      off
      GotoTag		      "RFB_IS_ZERO"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      "Goto5"
      SID		      "4671"
      Position		      [2035, 1150, 2185, 1170]
      ShowName		      off
      GotoTag		      "RFC_IS_ZERO"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      "Goto6"
      SID		      "4674"
      Position		      [2035, 1290, 2185, 1310]
      ShowName		      off
      GotoTag		      "RFD_IS_ZERO"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      "Goto7"
      SID		      "4702"
      Position		      [585, 555, 735, 575]
      ShowName		      off
      GotoTag		      "TRIGGER_IN"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Reference
      Name		      "Inverter"
      SID		      "32"
      Ports		      [1, 1]
      Position		      [930, 856, 955, 874]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Inverter"
      SourceType	      "Xilinx Inverter Block"
      infoedit		      "Bitwise logical negation (one's complement) operator."
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "inv"
      block_version	      "8.2"
      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 "
      "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11."
      "22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npa"
      "tch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfpri"
      "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\n"
      "fprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Inverter1"
      SID		      "4682"
      Ports		      [1, 1]
      Position		      [290, 1096, 315, 1114]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Inverter"
      SourceType	      "Xilinx Inverter Block"
      infoedit		      "Bitwise logical negation (one's complement) operator."
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "inv"
      block_version	      "8.2"
      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 "
      "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11."
      "22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npa"
      "tch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfpri"
      "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\n"
      "fprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Inverter2"
      SID		      "4683"
      Ports		      [1, 1]
      Position		      [290, 1116, 315, 1134]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Inverter"
      SourceType	      "Xilinx Inverter Block"
      infoedit		      "Bitwise logical negation (one's complement) operator."
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "inv"
      block_version	      "8.2"
      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 "
      "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11."
      "22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npa"
      "tch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfpri"
      "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\n"
      "fprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Inverter3"
      SID		      "4684"
      Ports		      [1, 1]
      Position		      [290, 1136, 315, 1154]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Inverter"
      SourceType	      "Xilinx Inverter Block"
      infoedit		      "Bitwise logical negation (one's complement) operator."
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "inv"
      block_version	      "8.2"
      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 "
      "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11."
      "22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npa"
      "tch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfpri"
      "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\n"
      "fprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Inverter4"
      SID		      "4685"
      Ports		      [1, 1]
      Position		      [290, 1156, 315, 1174]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Inverter"
      SourceType	      "Xilinx Inverter Block"
      infoedit		      "Bitwise logical negation (one's complement) operator."
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "inv"
      block_version	      "8.2"
      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 "
      "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11."
      "22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npa"
      "tch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfpri"
      "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\n"
      "fprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Memory-mapped Registers"
      SID		      "34"
      Ports		      []
      Position		      [225, 25, 269, 69]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Memory-mapped Registers"
	Location		[36, 113, 2344, 1305]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Reference
	  Name			  "AGCDoneAddr"
	  SID			  "938"
	  Ports			  [2, 1]
	  Position		  [975, 112, 1035, 168]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'AGC_DONE_ADDR'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,266"
	  block_type		  "toreg"
	  block_version		  "10.1.3"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "AGCDoneAddr1"
	  SID			  "3940"
	  Ports			  [2, 1]
	  Position		  [1885, 702, 1945, 758]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TIMER_64_LSB'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,266"
	  block_type		  "toreg"
	  block_version		  "10.1.3"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "AGCDoneAddr2"
	  SID			  "3978"
	  Ports			  [2, 1]
	  Position		  [1885, 622, 1945, 678]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TIMER_64_MSB'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,266"
	  block_type		  "toreg"
	  block_version		  "10.1.3"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat"
	  SID			  "3754"
	  Ports			  [3, 1]
	  Position		  [1615, 321, 1665, 359]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "3"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "50,38,3,1,white,blue,0,61ef8218,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 38 38 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[24.55 24.55 29."
	  "55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[19.55 19.55 24.55 24.55 19."
	  "55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\np"
	  "atch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nf"
	  "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input"
	  "',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on')"
	  ";\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat1"
	  SID			  "1417"
	  Ports			  [2, 1]
	  Position		  [845, 605, 900, 645]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "55,40,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 40 40 0 ]);\npatch([15.875 23.1 28.1 33.1 38.1 28.1 20.875 15.875 ],[25.55 25.55 30."
	  "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([20.875 28.1 23.1 15.875 20.875 ],[20.55 20.55 25.55 25.55 20."
	  "55 ],[0.931 0.946 0.973 ]);\npatch([15.875 23.1 28.1 20.875 15.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\np"
	  "atch([20.875 38.1 33.1 28.1 23.1 15.875 20.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ])"
	  ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
	  "nput',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on"
	  "');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat10"
	  SID			  "3758"
	  Ports			  [3, 1]
	  Position		  [1615, 201, 1665, 239]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "3"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "50,38,3,1,white,blue,0,61ef8218,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 38 38 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[24.55 24.55 29."
	  "55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[19.55 19.55 24.55 24.55 19."
	  "55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\np"
	  "atch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nf"
	  "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input"
	  "',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on')"
	  ";\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat11"
	  SID			  "4630"
	  Ports			  [2, 1]
	  Position		  [1420, 1215, 1475, 1255]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "55,40,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 40 40 0 ]);\npatch([15.875 23.1 28.1 33.1 38.1 28.1 20.875 15.875 ],[25.55 25.55 30."
	  "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([20.875 28.1 23.1 15.875 20.875 ],[20.55 20.55 25.55 25.55 20."
	  "55 ],[0.931 0.946 0.973 ]);\npatch([15.875 23.1 28.1 20.875 15.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\np"
	  "atch([20.875 38.1 33.1 28.1 23.1 15.875 20.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ])"
	  ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
	  "nput',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on"
	  "');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat12"
	  SID			  "4643"
	  Ports			  [2, 1]
	  Position		  [1420, 1315, 1475, 1355]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "55,40,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 40 40 0 ]);\npatch([15.875 23.1 28.1 33.1 38.1 28.1 20.875 15.875 ],[25.55 25.55 30."
	  "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([20.875 28.1 23.1 15.875 20.875 ],[20.55 20.55 25.55 25.55 20."
	  "55 ],[0.931 0.946 0.973 ]);\npatch([15.875 23.1 28.1 20.875 15.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\np"
	  "atch([20.875 38.1 33.1 28.1 23.1 15.875 20.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ])"
	  ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
	  "nput',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on"
	  "');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat2"
	  SID			  "2012"
	  Ports			  [4, 1]
	  Position		  [845, 185, 900, 240]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "55,55,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\"
	  "}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat3"
	  SID			  "2017"
	  Ports			  [4, 1]
	  Position		  [845, 275, 900, 330]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "55,55,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\"
	  "}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat4"
	  SID			  "3550"
	  Ports			  [6, 1]
	  Position		  [385, 1454, 415, 1566]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "6"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "30,112,6,1,white,blue,0,c44eeefa,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 112 112 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 30 30 0 0 ],[0 0 112 112 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[60.44 60.44 64"
	  ".44 60.44 64.44 64.44 64.44 60.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[56.44 56.44 60.44 60.44 56.44 ]"
	  ",[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[52.44 52.44 56.44 56.44 52.44 ],[1 1 1 ]);\npatch([10.1"
	  " 23.88 19.88 15.88 11.88 6.1 10.1 ],[48.44 48.44 52.44 48.44 52.44 52.44 48.44 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	  ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi')"
	  ";\n\n\n\n\ncolor('black');port_label('input',6,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat5"
	  SID			  "3667"
	  Ports			  [2, 1]
	  Position		  [365, 1235, 420, 1275]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "55,40,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 40 40 0 ]);\npatch([15.875 23.1 28.1 33.1 38.1 28.1 20.875 15.875 ],[25.55 25.55 30."
	  "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([20.875 28.1 23.1 15.875 20.875 ],[20.55 20.55 25.55 25.55 20."
	  "55 ],[0.931 0.946 0.973 ]);\npatch([15.875 23.1 28.1 20.875 15.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\np"
	  "atch([20.875 38.1 33.1 28.1 23.1 15.875 20.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ])"
	  ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
	  "nput',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on"
	  "');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat6"
	  SID			  "3686"
	  Ports			  [6, 1]
	  Position		  [845, 363, 900, 462]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "6"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "55,99,6,1,white,blue,0,c44eeefa,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 99 99 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 99 99 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[56.77 56.7"
	  "7 63.77 56.77 63.77 63.77 63.77 56.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[49.77 49.77 56.77 56"
	  ".77 49.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[42.77 42.77 49.77 49.77 42.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[35.77 35.77 42.77 35.77 42.77 42.77 35.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'hi');\n\n\n\n\ncolor('black');port_label('input',6,'lo');\n\ncolor('black');disp('\\fontsize{"
	  "20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat7"
	  SID			  "3755"
	  Ports			  [4, 1]
	  Position		  [1730, 200, 1780, 360]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "50,160,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 160 160 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 50 50 0 0 ],[0 0 160 160 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[87.77 87"
	  ".77 94.77 87.77 94.77 94.77 94.77 87.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[80.77 80.77 87.77 8"
	  "7.77 80.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[73.77 73.77 80.77 80.77 73.77 ],[1 1 "
	  "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[66.77 66.77 73.77 66.77 73.77 73.77 66.77 ],[0.931 0.9"
	  "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po"
	  "rt_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}"
	  "','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat8"
	  SID			  "3756"
	  Ports			  [3, 1]
	  Position		  [1615, 281, 1665, 319]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "3"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "50,38,3,1,white,blue,0,61ef8218,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 38 38 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[24.55 24.55 29."
	  "55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[19.55 19.55 24.55 24.55 19."
	  "55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\np"
	  "atch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nf"
	  "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input"
	  "',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on')"
	  ";\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat9"
	  SID			  "3757"
	  Ports			  [3, 1]
	  Position		  [1615, 241, 1665, 279]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "3"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "50,38,3,1,white,blue,0,61ef8218,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 38 38 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[24.55 24.55 29."
	  "55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[19.55 19.55 24.55 24.55 19."
	  "55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\np"
	  "atch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nf"
	  "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input"
	  "',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on')"
	  ";\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Config Bits"
	  SID			  "1981"
	  Ports			  [1]
	  Position		  [185, 316, 235, 354]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Config Bits"
	    Location		    [474, 654, 694, 829]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "160"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "1982"
	      Position		      [185, 48, 215, 62]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto1"
	      SID		      "960"
	      Position		      [395, 82, 555, 98]
	      ShowName		      off
	      GotoTag		      "STOP_TX"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto10"
	      SID		      "3737"
	      Position		      [395, 257, 555, 273]
	      ShowName		      off
	      GotoTag		      "RFD_AGC_IQ_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto12"
	      SID		      "3857"
	      Position		      [395, 537, 555, 553]
	      ShowName		      off
	      GotoTag		      "TX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto13"
	      SID		      "3981"
	      Position		      [395, 362, 555, 378]
	      ShowName		      off
	      GotoTag		      "LOAD_TIMER_64"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto14"
	      SID		      "4649"
	      Position		      [395, 747, 555, 763]
	      ShowName		      off
	      GotoTag		      "DEBUG_TX_OUTPUT_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto15"
	      SID		      "4651"
	      Position		      [395, 782, 555, 798]
	      ShowName		      off
	      GotoTag		      "DEBUG_TX_BUF_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto16"
	      SID		      "4723"
	      Position		      [395, 607, 555, 623]
	      ShowName		      off
	      GotoTag		      "TX_RX_LOOPBACK_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto18"
	      SID		      "969"
	      Position		      [395, 152, 555, 168]
	      ShowName		      off
	      GotoTag		      "RFA_AGC_IQ_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto2"
	      SID		      "2346"
	      Position		      [395, 572, 555, 588]
	      ShowName		      off
	      GotoTag		      "COUNTER_DATA_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto3"
	      SID		      "976"
	      Position		      [395, 47, 555, 63]
	      ShowName		      off
	      GotoTag		      "CONTINUOUS_TX"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto4"
	      SID		      "977"
	      Position		      [395, 292, 555, 308]
	      ShowName		      off
	      GotoTag		      "RSSI_CLK_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto6"
	      SID		      "1190"
	      Position		      [395, 467, 555, 483]
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto7"
	      SID		      "3733"
	      Position		      [395, 187, 555, 203]
	      ShowName		      off
	      GotoTag		      "RFB_AGC_IQ_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto8"
	      SID		      "3340"
	      Position		      [395, 677, 555, 693]
	      ShowName		      off
	      GotoTag		      "SCOPE_DATA_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto9"
	      SID		      "3735"
	      Position		      [395, 222, 555, 238]
	      ShowName		      off
	      GotoTag		      "RFC_AGC_IQ_SEL"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b0"
	      SID		      "1979"
	      Ports		      [1, 1]
	      Position		      [260, 46, 300, 64]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b1"
	      SID		      "1980"
	      Ports		      [1, 1]
	      Position		      [260, 81, 300, 99]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "1"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b12"
	      SID		      "3982"
	      Ports		      [1, 1]
	      Position		      [260, 361, 300, 379]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "12"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b17"
	      SID		      "1991"
	      Ports		      [1, 1]
	      Position		      [260, 466, 300, 484]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "17"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b19"
	      SID		      "3859"
	      Ports		      [1, 1]
	      Position		      [260, 536, 300, 554]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "19"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b20"
	      SID		      "2347"
	      Ports		      [1, 1]
	      Position		      [260, 571, 300, 589]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "20"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b21"
	      SID		      "4724"
	      Ports		      [1, 1]
	      Position		      [260, 606, 300, 624]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "21"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b24:25"
	      SID		      "3341"
	      Ports		      [1, 1]
	      Position		      [260, 676, 300, 694]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "2"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b28"
	      SID		      "4650"
	      Ports		      [1, 1]
	      Position		      [260, 746, 300, 764]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "28"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b29:31"
	      SID		      "4652"
	      Ports		      [1, 1]
	      Position		      [260, 781, 300, 799]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "3"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "29"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b4"
	      SID		      "1989"
	      Ports		      [1, 1]
	      Position		      [260, 151, 300, 169]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "4"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b5"
	      SID		      "3734"
	      Ports		      [1, 1]
	      Position		      [260, 186, 300, 204]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "5"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b6"
	      SID		      "3736"
	      Ports		      [1, 1]
	      Position		      [260, 221, 300, 239]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "6"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b7"
	      SID		      "3738"
	      Ports		      [1, 1]
	      Position		      [260, 256, 300, 274]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "7"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b8:9"
	      SID		      "1992"
	      Ports		      [1, 1]
	      Position		      [260, 291, 300, 309]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "2"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		Points			[0, 35]
		Branch {
		  DstBlock		  "b1"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 70]
		  Branch {
		    DstBlock		    "b4"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b5"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b6"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b7"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 210]
		    Branch {
		    DstBlock		    "b17"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, -175]
		    Branch {
		    DstBlock		    "b8:9"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 70]
		    Branch {
		    DstBlock		    "b12"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 175]
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b20"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    Points		    [0, 70]
		    Branch {
		    DstBlock		    "b24:25"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 70]
		    Branch {
		    DstBlock		    "b28"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    DstBlock		    "b29:31"
		    DstPort		    1
		    }
		    }
		    }
		    Branch {
		    DstBlock		    "b21"
		    DstPort		    1
		    }
		    }
		    }
		    Branch {
		    DstBlock		    "b19"
		    DstPort		    1
		    }
		    }
		    }
		    }
		    }
		    }
		    }
		  }
		}
	      }
	      Branch {
		DstBlock		"b0"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "b0"
	      SrcPort		      1
	      DstBlock		      "Goto3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b1"
	      SrcPort		      1
	      DstBlock		      "Goto1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b4"
	      SrcPort		      1
	      DstBlock		      "Goto18"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b17"
	      SrcPort		      1
	      DstBlock		      "Goto6"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b8:9"
	      SrcPort		      1
	      DstBlock		      "Goto4"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b20"
	      SrcPort		      1
	      DstBlock		      "Goto2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b24:25"
	      SrcPort		      1
	      DstBlock		      "Goto8"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b5"
	      SrcPort		      1
	      DstBlock		      "Goto7"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b6"
	      SrcPort		      1
	      DstBlock		      "Goto9"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b7"
	      SrcPort		      1
	      DstBlock		      "Goto10"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b19"
	      SrcPort		      1
	      DstBlock		      "Goto12"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b12"
	      SrcPort		      1
	      DstBlock		      "Goto13"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b28"
	      SrcPort		      1
	      DstBlock		      "Goto14"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b29:31"
	      SrcPort		      1
	      DstBlock		      "Goto15"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b21"
	      SrcPort		      1
	      DstBlock		      "Goto16"
	      DstPort		      1
	    }
	    Annotation {
	      Position		      [187, 361]
	    }
	    Annotation {
	      Name		      "Bit 16:  Reserved for RX_WORD_ORDER"
	      Position		      [460, 441]
	    }
	    Annotation {
	      Name		      "Bit 18:  Reserved for TX_WORD_ORDER"
	      Position		      [460, 511]
	    }
	  }
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant1"
	  SID			  "3845"
	  Position		  [1295, 285, 1325, 315]
	  ZOrder		  -5
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant10"
	  SID			  "3781"
	  Position		  [1295, 125, 1325, 155]
	  ZOrder		  -5
	  ShowName		  off
	  Value			  "5"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant11"
	  SID			  "3842"
	  Position		  [1295, 405, 1325, 435]
	  ZOrder		  -5
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant12"
	  SID			  "3848"
	  Position		  [1295, 165, 1325, 195]
	  ZOrder		  -5
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant13"
	  SID			  "3851"
	  Position		  [1295, 45, 1325, 75]
	  ZOrder		  -5
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant14"
	  SID			  "3946"
	  Position		  [565, 375, 595, 405]
	  ShowName		  off
	  Value			  "0"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant2"
	  SID			  "3685"
	  Position		  [645, 505, 675, 535]
	  ShowName		  off
	  Value			  "0"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant3"
	  SID			  "3768"
	  Position		  [1295, 325, 1325, 355]
	  ZOrder		  -5
	  ShowName		  off
	  Value			  "2"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant4"
	  SID			  "3769"
	  Position		  [1295, 365, 1325, 395]
	  ZOrder		  -5
	  ShowName		  off
	  Value			  "5"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant5"
	  SID			  "3774"
	  Position		  [1295, 205, 1325, 235]
	  ZOrder		  -5
	  ShowName		  off
	  Value			  "2"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant6"
	  SID			  "3762"
	  Position		  [1295, 445, 1325, 475]
	  ZOrder		  -5
	  ShowName		  off
	  Value			  "2"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant7"
	  SID			  "3763"
	  Position		  [1295, 485, 1325, 515]
	  ZOrder		  -5
	  ShowName		  off
	  Value			  "5"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant8"
	  SID			  "3775"
	  Position		  [1295, 245, 1325, 275]
	  ZOrder		  -5
	  ShowName		  off
	  Value			  "5"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant9"
	  SID			  "3780"
	  Position		  [1295, 85, 1325, 115]
	  ZOrder		  -5
	  ShowName		  off
	  Value			  "2"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "3796"
	  Ports			  [1, 1]
	  Position		  [2015, 272, 2040, 288]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,461,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12.2"
	  "2 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0."
	  "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16.44 "
	  "14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en"
	  "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert4"
	  SID			  "1425"
	  Ports			  [1, 1]
	  Position		  [880, 117, 905, 133]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,461,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12.2"
	  "2 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0."
	  "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16.44 "
	  "14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en"
	  "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "DESIGN_VER"
	  SID			  "1406"
	  Ports			  [1, 1]
	  Position		  [720, 514, 775, 526]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "1"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,432"
	  block_type		  "gatewayin"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ],[7.11 7.11 "
	  "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7.11 7.11 6.11 ],["
	  "0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([25."
	  "775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.895 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\f"
	  "ontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "DRAM_INIT_DONE"
	  SID			  "3947"
	  Ports			  [1, 1]
	  Position		  [640, 384, 695, 396]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "1"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,432"
	  block_type		  "gatewayin"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ],[7.11 7.11 "
	  "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7.11 7.11 6.11 ],["
	  "0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([25."
	  "775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.895 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\f"
	  "ontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay1"
	  SID			  "3770"
	  Ports			  [1, 1]
	  Position		  [1485, 325, 1515, 355]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay10"
	  SID			  "3846"
	  Ports			  [1, 1]
	  Position		  [1485, 285, 1515, 315]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay11"
	  SID			  "3849"
	  Ports			  [1, 1]
	  Position		  [1485, 165, 1515, 195]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay12"
	  SID			  "3852"
	  Ports			  [1, 1]
	  Position		  [1485, 45, 1515, 75]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay2"
	  SID			  "3771"
	  Ports			  [1, 1]
	  Position		  [1485, 365, 1515, 395]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay3"
	  SID			  "3776"
	  Ports			  [1, 1]
	  Position		  [1485, 205, 1515, 235]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay4"
	  SID			  "3764"
	  Ports			  [1, 1]
	  Position		  [1485, 445, 1515, 475]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay5"
	  SID			  "3765"
	  Ports			  [1, 1]
	  Position		  [1485, 485, 1515, 515]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay6"
	  SID			  "3777"
	  Ports			  [1, 1]
	  Position		  [1485, 245, 1515, 275]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay7"
	  SID			  "3782"
	  Ports			  [1, 1]
	  Position		  [1485, 85, 1515, 115]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay8"
	  SID			  "3783"
	  Ports			  [1, 1]
	  Position		  [1485, 125, 1515, 155]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay9"
	  SID			  "3843"
	  Ports			  [1, 1]
	  Position		  [1485, 405, 1515, 435]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register1"
	  SID			  "943"
	  Ports			  [0, 1]
	  Position		  [75, 225, 120, 255]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TX_BUF_EN'"
	  init			  "tx_buf_en"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register10"
	  SID			  "3976"
	  Ports			  [0, 1]
	  Position		  [1460, 660, 1505, 690]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'LOAD_TIMER_64_MSB'"
	  init			  "0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register11"
	  SID			  "4485"
	  Ports			  [0, 1]
	  Position		  [1555, 1050, 1600, 1080]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_TX_IQ_BUF_WR_BYTE_OFFSET'"
	  init			  "rf_tx_iq_buf_wr_byte_offset"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register12"
	  SID			  "3606"
	  Ports			  [0, 1]
	  Position		  [810, 1480, 855, 1510]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_ERROR_CLR'"
	  init			  "rf_error_clr"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "9"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register13"
	  SID			  "1988"
	  Ports			  [0, 1]
	  Position		  [70, 322, 125, 348]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'CONFIG'"
	  init			  "wl_buffers_config_init"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "55,26,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
	  "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
	  ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
	  " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
	  " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
	  "_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register14"
	  SID			  "4486"
	  Ports			  [0, 1]
	  Position		  [1555, 990, 1600, 1020]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_TX_IQ_THRESHOLD'"
	  init			  "rf_tx_iq_threshold"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register16"
	  SID			  "947"
	  Ports			  [0, 1]
	  Position		  [75, 135, 120, 165]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RX_BUF_EN'"
	  init			  "rx_buf_en"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register2"
	  SID			  "3381"
	  Ports			  [0, 1]
	  Position		  [75, 620, 120, 650]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_BUFFER_SEL'"
	  init			  "wl_buffers_rf_buffer_sel"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register4"
	  SID			  "3638"
	  Ports			  [0, 1]
	  Position		  [500, 1090, 545, 1120]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_BUF_WR_BYTE_OFFSET'"
	  init			  "rf_rx_iq_buf_wr_byte_offset"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register5"
	  SID			  "631"
	  Ports			  [0, 1]
	  Position		  [75, 465, 120, 495]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TX_LENGTH'"
	  init			  "tx_length"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register6"
	  SID			  "1427"
	  Ports			  [0, 1]
	  Position		  [75, 530, 120, 560]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RX_LENGTH'"
	  init			  "rx_length"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register7"
	  SID			  "3532"
	  Ports			  [0, 1]
	  Position		  [500, 990, 545, 1020]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_THRESHOLD'"
	  init			  "rf_rx_iq_threshold"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register8"
	  SID			  "3939"
	  Ports			  [0, 1]
	  Position		  [1460, 715, 1505, 745]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'LOAD_TIMER_64_LSB'"
	  init			  "0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register9"
	  SID			  "3536"
	  Ports			  [0, 1]
	  Position		  [500, 1040, 545, 1070]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_BUF_RD_BYTE_OFFSET'"
	  init			  "rf_rx_iq_buf_rd_byte_offset"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From1"
	  SID			  "953"
	  Position		  [640, 116, 775, 134]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "WR_ADDR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From10"
	  SID			  "954"
	  Position		  [640, 226, 775, 244]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RFA_RSSI"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From11"
	  SID			  "3622"
	  Position		  [15, 1151, 315, 1169]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From12"
	  SID			  "3673"
	  Position		  [100, 1256, 300, 1274]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_RX_IQ_BUF_OCCUPANCY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From13"
	  SID			  "3983"
	  Position		  [1435, 611, 1570, 629]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "LOAD_TIMER_64"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From14"
	  SID			  "4497"
	  Position		  [1070, 1121, 1370, 1139]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_TX_IQ_BUF_RD_BYTE_OFFSET"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From15"
	  SID			  "4631"
	  Position		  [1145, 1236, 1345, 1254]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_TX_IQ_BUF_OCCUPANCY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From16"
	  SID			  "4639"
	  Position		  [15, 1551, 315, 1569]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_RX_IQ_RSSI_INT"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From17"
	  SID			  "4640"
	  Position		  [15, 1471, 315, 1489]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_TX_IQ_ERROR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From18"
	  SID			  "4644"
	  Position		  [1145, 1336, 1345, 1354]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "TX_TMP_BUF_WR_DONE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From19"
	  SID			  "4720"
	  Position		  [1905, 306, 2040, 324]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "AGC_Done_Detect"
	  TagVisibility		  "global"
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	Block {
	  BlockType		  From
	  Name			  "From2"
	  SID			  "955"
	  Position		  [640, 146, 775, 164]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "AGC_Done_Detect"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From3"
	  SID			  "3625"
	  Position		  [15, 1491, 315, 1509]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_RX_IQ_RSSI_ERROR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From4"
	  SID			  "957"
	  Position		  [640, 196, 775, 214]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RFB_RSSI"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From5"
	  SID			  "1396"
	  Position		  [640, 411, 775, 429]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RX_RUNNING"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From6"
	  SID			  "958"
	  Position		  [640, 316, 775, 334]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RFC_RSSI"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From7"
	  SID			  "1397"
	  Position		  [640, 441, 775, 459]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "TX_RUNNING"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From8"
	  SID			  "959"
	  Position		  [640, 286, 775, 304]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RFD_RSSI"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From9"
	  SID			  "3626"
	  Position		  [15, 1531, 315, 1549]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_TX_IQ_INT"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto1"
	  SID			  "3383"
	  Position		  [335, 732, 495, 748]
	  ShowName		  off
	  GotoTag		  "RFD_BUFFER_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto10"
	  SID			  "1428"
	  Position		  [190, 532, 350, 558]
	  ShowName		  off
	  GotoTag		  "RX_LENGTH"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto11"
	  SID			  "4513"
	  Position		  [320, 147, 450, 163]
	  ShowName		  off
	  GotoTag		  "RFC_RX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto12"
	  SID			  "4514"
	  Position		  [320, 162, 450, 178]
	  ShowName		  off
	  GotoTag		  "RFD_RX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto13"
	  SID			  "4515"
	  Position		  [320, 207, 450, 223]
	  ShowName		  off
	  GotoTag		  "RFA_TX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto14"
	  SID			  "4516"
	  Position		  [320, 222, 450, 238]
	  ShowName		  off
	  GotoTag		  "RFB_TX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto15"
	  SID			  "4517"
	  Position		  [320, 237, 450, 253]
	  ShowName		  off
	  GotoTag		  "RFC_TX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto16"
	  SID			  "4518"
	  Position		  [320, 252, 450, 268]
	  ShowName		  off
	  GotoTag		  "RFD_TX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto17"
	  SID			  "4638"
	  Position		  [1080, 1522, 1320, 1538]
	  ShowName		  off
	  GotoTag		  "RF_TX_IQ_ERROR_CLR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto18"
	  SID			  "3535"
	  Position		  [670, 1097, 910, 1113]
	  ShowName		  off
	  GotoTag		  "RF_RX_IQ_BUF_WR_BYTE_OFFSET"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto19"
	  SID			  "3384"
	  Position		  [335, 627, 495, 643]
	  ShowName		  off
	  GotoTag		  "RFA_BUFFER_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto2"
	  SID			  "971"
	  Position		  [190, 402, 350, 428]
	  ShowName		  off
	  GotoTag		  "TX_DELAY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto20"
	  SID			  "3537"
	  Position		  [670, 1047, 910, 1063]
	  ShowName		  off
	  GotoTag		  "RF_RX_IQ_BUF_RD_BYTE_OFFSET"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto22"
	  SID			  "4491"
	  Position		  [1720, 997, 1960, 1013]
	  ShowName		  off
	  GotoTag		  "RF_TX_IQ_THRESHOLD"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto23"
	  SID			  "3607"
	  Position		  [1080, 1487, 1320, 1503]
	  ShowName		  off
	  GotoTag		  "RF_RX_IQ_RSSI_ERROR_CLR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto3"
	  SID			  "3385"
	  Position		  [335, 697, 495, 713]
	  ShowName		  off
	  GotoTag		  "RFC_BUFFER_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto4"
	  SID			  "4488"
	  Position		  [1720, 1057, 1960, 1073]
	  ShowName		  off
	  GotoTag		  "RF_TX_IQ_BUF_WR_BYTE_OFFSET"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto5"
	  SID			  "4512"
	  Position		  [320, 132, 450, 148]
	  ShowName		  off
	  GotoTag		  "RFB_RX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto6"
	  SID			  "3533"
	  Position		  [670, 997, 910, 1013]
	  ShowName		  off
	  GotoTag		  "RF_RX_IQ_THRESHOLD"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto7"
	  SID			  "3386"
	  Position		  [335, 662, 495, 678]
	  ShowName		  off
	  GotoTag		  "RFB_BUFFER_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto8"
	  SID			  "1420"
	  Position		  [190, 467, 350, 493]
	  ShowName		  off
	  GotoTag		  "TX_LENGTH"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto9"
	  SID			  "979"
	  Position		  [320, 117, 450, 133]
	  ShowName		  off
	  GotoTag		  "RFA_RX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA_G_BB"
	  SID			  "3766"
	  Ports			  [1, 1]
	  Position		  [1380, 493, 1420, 507]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "5"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "1"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "40,14,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
	  "22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
	  "985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
	  ".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\nfprintf('','COMME"
	  "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{"
	  "11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA_G_RF"
	  SID			  "3767"
	  Ports			  [1, 1]
	  Position		  [1380, 453, 1420, 467]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "2"
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	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
	  "22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
	  "985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
	  ".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\nfprintf('','COMME"
	  "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{"
	  "11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFD_G_RF"
	  SID			  "3785"
	  Ports			  [1, 1]
	  Position		  [1380, 93, 1420, 107]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "2"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "1"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "40,14,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
	  "22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
	  "985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
	  ".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\nfprintf('','COMME"
	  "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{"
	  "11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFD_RXHP"
	  SID			  "3853"
	  Ports			  [1, 1]
	  Position		  [1380, 53, 1420, 67]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "1"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "40,14,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
	  "22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
	  "985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
	  ".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\nfprintf('','COMME"
	  "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{"
	  "11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RFx Sel"
	  SID			  "981"
	  Ports			  [1, 4]
	  Position		  [180, 118, 245, 177]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RFx Sel"
	    Location		    [-1918, 70, -2, 1180]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "982"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b0"
	      SID		      "983"
	      Ports		      [1, 1]
	      Position		      [100, 132, 145, 148]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b1"
	      SID		      "984"
	      Ports		      [1, 1]
	      Position		      [100, 97, 145, 113]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "1"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b2"
	      SID		      "985"
	      Ports		      [1, 1]
	      Position		      [100, 62, 145, 78]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "1"
	      base1		      "MSB of Input"
	      bit0		      "2"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b3"
	      SID		      "986"
	      Ports		      [1, 1]
	      Position		      [100, 27, 145, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "1"
	      base1		      "MSB of Input"
	      bit0		      "3"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "A"
	      SID		      "987"
	      Position		      [170, 133, 200, 147]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "B"
	      SID		      "988"
	      Position		      [170, 98, 200, 112]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "C"
	      SID		      "989"
	      Position		      [170, 63, 200, 77]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "D"
	      SID		      "990"
	      Position		      [170, 28, 200, 42]
	      Port		      "4"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		Points			[0, 35]
		Branch {
		  Points		  [0, 35]
		  Branch {
		    Points		    [0, 35]
		    DstBlock		    "b0"
		    DstPort		    1
		  }
		  Branch {
		    DstBlock		    "b1"
		    DstPort		    1
		  }
		}
		Branch {
		  DstBlock		  "b2"
		  DstPort		  1
		}
	      }
	      Branch {
		DstBlock		"b3"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "b3"
	      SrcPort		      1
	      DstBlock		      "D"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b2"
	      SrcPort		      1
	      DstBlock		      "C"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b1"
	      SrcPort		      1
	      DstBlock		      "B"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b0"
	      SrcPort		      1
	      DstBlock		      "A"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RFx Sel2"
	  SID			  "1001"
	  Ports			  [1, 4]
	  Position		  [180, 208, 245, 267]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RFx Sel2"
	    Location		    [151, 125, 2077, 1440]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "1002"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b0"
	      SID		      "1003"
	      Ports		      [1, 1]
	      Position		      [125, 132, 170, 148]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b1"
	      SID		      "1004"
	      Ports		      [1, 1]
	      Position		      [125, 97, 170, 113]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "1"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b2"
	      SID		      "1005"
	      Ports		      [1, 1]
	      Position		      [125, 62, 170, 78]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "1"
	      base1		      "MSB of Input"
	      bit0		      "2"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b3"
	      SID		      "1006"
	      Ports		      [1, 1]
	      Position		      [125, 27, 170, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "1"
	      base1		      "MSB of Input"
	      bit0		      "3"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "A"
	      SID		      "1007"
	      Position		      [240, 133, 270, 147]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "B"
	      SID		      "1008"
	      Position		      [240, 98, 270, 112]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "C"
	      SID		      "1009"
	      Position		      [240, 63, 270, 77]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "D"
	      SID		      "1010"
	      Position		      [240, 28, 270, 42]
	      Port		      "4"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		Points			[0, 35]
		Branch {
		  Points		  [0, 35]
		  Branch {
		    Points		    [0, 35]
		    DstBlock		    "b0"
		    DstPort		    1
		  }
		  Branch {
		    DstBlock		    "b1"
		    DstPort		    1
		  }
		}
		Branch {
		  DstBlock		  "b2"
		  DstPort		  1
		}
	      }
	      Branch {
		DstBlock		"b3"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "b3"
	      SrcPort		      1
	      DstBlock		      "D"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b2"
	      SrcPort		      1
	      DstBlock		      "C"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b1"
	      SrcPort		      1
	      DstBlock		      "B"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b0"
	      SrcPort		      1
	      DstBlock		      "A"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Radio1AGCDoneRSSI"
	  SID			  "1011"
	  Ports			  [2, 1]
	  Position		  [975, 202, 1035, 258]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RFAB_AGC_DONE_RSSI'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,266"
	  block_type		  "toreg"
	  block_version		  "10.1.3"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Radio3AGCDoneRSSI"
	  SID			  "1013"
	  Ports			  [2, 1]
	  Position		  [975, 292, 1035, 348]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RFCD_AGC_DONE_RSSI'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,266"
	  block_type		  "toreg"
	  block_version		  "10.1.3"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register"
	  SID			  "1409"
	  Ports			  [1, 1]
	  Position		  [865, 506, 900, 534]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "3790"
	  Ports			  [1, 1]
	  Position		  [1945, 266, 1980, 294]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register2"
	  SID			  "3794"
	  Ports			  [1, 1]
	  Position		  [1880, 266, 1915, 294]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register3"
	  SID			  "3795"
	  Ports			  [1, 1]
	  Position		  [1815, 266, 1850, 294]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator"
	  SID			  "1015"
	  Position		  [1090, 130, 1110, 150]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "1016"
	  Position		  [1095, 220, 1115, 240]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator10"
	  SID			  "3941"
	  Position		  [2000, 720, 2020, 740]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator11"
	  SID			  "3979"
	  Position		  [2000, 640, 2020, 660]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator12"
	  SID			  "4498"
	  Position		  [1720, 1140, 1740, 1160]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator13"
	  SID			  "4632"
	  Position		  [1645, 1245, 1665, 1265]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator14"
	  SID			  "4645"
	  Position		  [1645, 1345, 1665, 1365]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "3624"
	  Position		  [670, 1520, 690, 1540]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator3"
	  SID			  "1018"
	  Position		  [1095, 310, 1115, 330]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator4"
	  SID			  "3640"
	  Position		  [665, 1170, 685, 1190]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator5"
	  SID			  "3668"
	  Position		  [615, 1265, 635, 1285]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator6"
	  SID			  "1400"
	  Position		  [1095, 425, 1115, 445]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator7"
	  SID			  "1418"
	  Position		  [1095, 635, 1115, 655]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator8"
	  SID			  "1419"
	  Position		  [1095, 530, 1115, 550]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator9"
	  SID			  "3791"
	  Position		  [2160, 290, 2180, 310]
	  ShowName		  off
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Timer64"
	  SID			  "3929"
	  Ports			  [3, 2]
	  Position		  [1630, 594, 1765, 756]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Timer64"
	    Location		    [-1918, 70, -2, 1180]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Load"
	      SID		      "3975"
	      Position		      [60, 68, 90, 82]
	      NamePlacement	      "alternate"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "Load MSB"
	      SID		      "3930"
	      Position		      [60, 93, 90, 107]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "Load LSB"
	      SID		      "3974"
	      Position		      [60, 128, 90, 142]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "32LSB"
	      SID		      "3951"
	      Ports		      [1, 1]
	      Position		      [670, 103, 710, 117]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "32"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,398"
	      block_type	      "slice"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "32MSB"
	      SID		      "3952"
	      Ports		      [1, 1]
	      Position		      [670, 58, 710, 72]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "32"
	      boolean_output	      off
	      mode		      "Upper Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,398"
	      block_type	      "slice"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "3953"
	      Ports		      [2, 1]
	      Position		      [325, 92, 360, 123]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "2"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "35,31,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 "
	      "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 1"
	      "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','t"
	      "exmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert4"
	      SID		      "3985"
	      Ports		      [1, 1]
	      Position		      [250, 67, 275, 83]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "32"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,461,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.2"
	      "2 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 "
	      "10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Scope
	      Name		      "Counter"
	      SID		      "3997"
	      Ports		      [7]
	      Position		      [1100, 267, 1130, 373]
	      Floating		      off
	      Location		      [1053, 264, 2438, 972]
	      Open		      off
	      NumInputPorts	      "7"
	      ZoomMode		      "yonly"
	      List {
		ListType		AxesTitles
		axes1			"%<SignalLabel>"
		axes2			"%<SignalLabel>"
		axes3			"%<SignalLabel>"
		axes4			"%<SignalLabel>"
		axes5			"%<SignalLabel>"
		axes6			"%<SignalLabel>"
		axes7			"%<SignalLabel>"
	      }
	      TimeRange		      "70000"
	      YMin		      "0~0~0~0~0~-5~-5"
	      YMax		      "1~1~1~100~20000~5~5"
	      SaveName		      "ScopeData7"
	      DataFormat	      "StructureWithTime"
	      LimitDataPoints	      off
	      SampleTime	      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Gateway Out1"
	      SID		      "3992"
	      Ports		      [1, 1]
	      Position		      [965, 270, 995, 280]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway Out"
	      SourceType	      "Xilinx Gateway Out Block"
	      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d"
	      "ouble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are disc"
	      "arded, depending on how they are configured."
	      inherit_from_input      off
	      hdl_port		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsDAC		      off
	      DACChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,336,386"
	      block_type	      "gatewayout"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0"
	      ".88 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ]"
	      ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6."
	      "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1"
	      " 1 1 ]);\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0."
	      "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf"
	      "printf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Gateway Out2"
	      SID		      "3993"
	      Ports		      [1, 1]
	      Position		      [965, 285, 995, 295]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway Out"
	      SourceType	      "Xilinx Gateway Out Block"
	      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d"
	      "ouble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are disc"
	      "arded, depending on how they are configured."
	      inherit_from_input      off
	      hdl_port		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsDAC		      off
	      DACChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,336,386"
	      block_type	      "gatewayout"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0"
	      ".88 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ]"
	      ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6."
	      "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1"
	      " 1 1 ]);\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0."
	      "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf"
	      "printf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Gateway Out3"
	      SID		      "3994"
	      Ports		      [1, 1]
	      Position		      [965, 300, 995, 310]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway Out"
	      SourceType	      "Xilinx Gateway Out Block"
	      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d"
	      "ouble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are disc"
	      "arded, depending on how they are configured."
	      inherit_from_input      off
	      hdl_port		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsDAC		      off
	      DACChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,336,386"
	      block_type	      "gatewayout"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0"
	      ".88 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ]"
	      ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6."
	      "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1"
	      " 1 1 ]);\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0."
	      "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf"
	      "printf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Gateway Out4"
	      SID		      "3995"
	      Ports		      [1, 1]
	      Position		      [965, 315, 995, 325]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway Out"
	      SourceType	      "Xilinx Gateway Out Block"
	      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d"
	      "ouble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are disc"
	      "arded, depending on how they are configured."
	      inherit_from_input      off
	      hdl_port		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsDAC		      off
	      DACChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,336,386"
	      block_type	      "gatewayout"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0"
	      ".88 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ]"
	      ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6."
	      "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1"
	      " 1 1 ]);\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0."
	      "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf"
	      "printf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Gateway Out5"
	      SID		      "3996"
	      Ports		      [1, 1]
	      Position		      [965, 330, 995, 340]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway Out"
	      SourceType	      "Xilinx Gateway Out Block"
	      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d"
	      "ouble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are disc"
	      "arded, depending on how they are configured."
	      inherit_from_input      off
	      hdl_port		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsDAC		      off
	      DACChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,336,386"
	      block_type	      "gatewayout"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0"
	      ".88 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ]"
	      ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6."
	      "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1"
	      " 1 1 ]);\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0."
	      "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf"
	      "printf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Gateway Out6"
	      SID		      "3998"
	      Ports		      [1, 1]
	      Position		      [965, 345, 995, 355]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway Out"
	      SourceType	      "Xilinx Gateway Out Block"
	      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d"
	      "ouble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are disc"
	      "arded, depending on how they are configured."
	      inherit_from_input      off
	      hdl_port		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsDAC		      off
	      DACChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,336,386"
	      block_type	      "gatewayout"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0"
	      ".88 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ]"
	      ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6."
	      "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1"
	      " 1 1 ]);\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0."
	      "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf"
	      "printf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Gateway Out7"
	      SID		      "3999"
	      Ports		      [1, 1]
	      Position		      [965, 360, 995, 370]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway Out"
	      SourceType	      "Xilinx Gateway Out Block"
	      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d"
	      "ouble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are disc"
	      "arded, depending on how they are configured."
	      inherit_from_input      off
	      hdl_port		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsDAC		      off
	      DACChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,336,386"
	      block_type	      "gatewayout"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0"
	      ".88 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ]"
	      ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6."
	      "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1"
	      " 1 1 ]);\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0."
	      "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf"
	      "printf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      SID		      "3955"
	      Ports		      [2, 1]
	      Position		      [435, 127, 465, 158]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "OR"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      sg_icon_stat	      "30,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 "
	      "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1"
	      "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');"
	      "disp('or');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Microsecond\nCounter"
	      SID		      "3956"
	      Ports		      [3, 1]
	      Position		      [520, 59, 580, 161]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Counter"
	      SourceType	      "Xilinx Counter Block"
	      infoedit		      "Hardware notes: Free running counters are the least expensive in hardware.  A count limited co"
	      "unter is implemented by combining a counter with a comparator."
	      cnt_type		      "Free Running"
	      cnt_to		      "Inf"
	      operation		      "Up"
	      start_count	      "0"
	      cnt_by_val	      "1"
	      arith_type	      "Unsigned"
	      n_bits		      "64"
	      bin_pt		      "0"
	      load_pin		      on
	      rst		      off
	      en		      on
	      explicit_period	      "off"
	      period		      "1"
	      dbl_ovrd		      off
	      use_behavioral_HDL      off
	      implementation	      "Fabric"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "counter"
	      sg_icon_stat	      "60,102,3,1,white,blue,0,4f561634,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 102 102 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 102 102 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],["
	      "59.88 59.88 67.88 59.88 67.88 67.88 67.88 59.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[51.88 51.88 "
	      "59.88 59.88 51.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[43.88 43.88 51.88 51.88 43.88 "
	      "],[1 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[35.88 35.88 43.88 35.88 43.88 43.88 35.88 ],[0.9"
	      "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('"
	      "black');port_label('input',1,'load');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('"
	      "input',3,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon"
	      " text');"
	    }
	    Block {
	      BlockType		      SubSystem
	      Name		      "Posedge2"
	      SID		      "3957"
	      Ports		      [1, 1]
	      Position		      [150, 66, 195, 84]
	      NamePlacement	      "alternate"
	      MinAlgLoopOccurrences   off
	      PropExecContextOutsideSubsystem off
	      RTWSystemCode	      "Auto"
	      FunctionWithSeparateData off
	      Opaque		      off
	      RequestExecContextInheritance off
	      MaskHideContents	      off
	      System {
		Name			"Posedge2"
		Location		[88, 301, 2330, 1301]
		Open			off
		ModelBrowserVisibility	off
		ModelBrowserWidth	200
		ScreenColor		"white"
		PaperOrientation	"landscape"
		PaperPositionMode	"auto"
		PaperType		"usletter"
		PaperUnits		"inches"
		TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
		TiledPageScale		1
		ShowPageBoundaries	off
		ZoomFactor		"100"
		Block {
		  BlockType		  Inport
		  Name			  "D"
		  SID			  "3958"
		  Position		  [200, 253, 230, 267]
		  IconDisplay		  "Port number"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Delay"
		  SID			  "3959"
		  Ports			  [1, 1]
		  Position		  [425, 153, 460, 177]
		  ShowName		  off
		  LibraryVersion	  "1.2"
		  SourceBlock		  "xbsIndex_r4/Delay"
		  SourceType		  "Xilinx Delay Block"
		  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r"
		  "egister retiming is enabled, the delay line is a chain of flip-flops."
		  rst			  off
		  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
		  en			  off
		  latency		  "1"
		  dbl_ovrd		  off
		  reg_retiming		  off
		  xl_use_area		  off
		  xl_area		  "[1 1 0 0 0 0 0]"
		  has_advanced_control	  "0"
		  sggui_pos		  "-1,-1,-1,-1"
		  block_type		  "delay"
		  block_version		  "VER_STRING_GOES_HERE"
		  sg_icon_stat		  "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
		  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9"
		  "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15"
		  ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33"
		  " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 "
		  "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 "
		  "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');"
		  "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Inverter"
		  SID			  "3960"
		  Ports			  [1, 1]
		  Position		  [490, 156, 515, 174]
		  ShowName		  off
		  LibraryVersion	  "1.2"
		  SourceBlock		  "xbsIndex_r4/Inverter"
		  SourceType		  "Xilinx Inverter Block"
		  infoedit		  "Bitwise logical negation (one's complement) operator."
		  en			  off
		  latency		  "0"
		  dbl_ovrd		  off
		  xl_use_area		  off
		  xl_area		  "[0 0 0 0 0 0 0]"
		  has_advanced_control	  "0"
		  sggui_pos		  "-1,-1,-1,-1"
		  block_type		  "inv"
		  block_version		  "VER_STRING_GOES_HERE"
		  sg_icon_stat		  "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
		  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9"
		  "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13"
		  ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],"
		  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16"
		  ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
		  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM"
		  "MENT: end icon text');"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Logical1"
		  SID			  "3961"
		  Ports			  [2, 1]
		  Position		  [540, 151, 585, 204]
		  ShowName		  off
		  LibraryVersion	  "1.2"
		  SourceBlock		  "xbsIndex_r4/Logical"
		  SourceType		  "Xilinx Logical Block Block"
		  logical_function	  "AND"
		  inputs		  "2"
		  en			  off
		  latency		  "0"
		  precision		  "Full"
		  arith_type		  "Unsigned"
		  n_bits		  "8"
		  bin_pt		  "2"
		  align_bp		  on
		  dbl_ovrd		  off
		  xl_use_area		  off
		  xl_area		  "[1 0 0 1 0 0 0]"
		  has_advanced_control	  "0"
		  sggui_pos		  "-1,-1,-1,-1"
		  block_type		  "logical"
		  block_version		  "VER_STRING_GOES_HERE"
		  sg_icon_stat		  "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
		  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9"
		  "1 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 3"
		  "8.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26"
		  ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npa"
		  "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ])"
		  ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('"
		  "and');\nfprintf('','COMMENT: end icon text');"
		}
		Block {
		  BlockType		  Outport
		  Name			  "Q"
		  SID			  "3962"
		  Position		  [610, 173, 640, 187]
		  IconDisplay		  "Port number"
		}
		Line {
		  SrcBlock		  "D"
		  SrcPort		  1
		  Points		  [150, 0; 0, -70]
		  Branch {
		    DstBlock		    "Logical1"
		    DstPort		    2
		  }
		  Branch {
		    Points		    [0, -25]
		    DstBlock		    "Delay"
		    DstPort		    1
		  }
		}
		Line {
		  SrcBlock		  "Logical1"
		  SrcPort		  1
		  DstBlock		  "Q"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Inverter"
		  SrcPort		  1
		  DstBlock		  "Logical1"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Delay"
		  SrcPort		  1
		  DstBlock		  "Inverter"
		  DstPort		  1
		}
		Annotation {
		  Name			  "Rising Edge Detection"
		  Position		  [500, 112]
		}
	      }
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "3963"
	      Ports		      [1, 1]
	      Position		      [865, 51, 895, 79]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      sg_icon_stat	      "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "3964"
	      Ports		      [1, 1]
	      Position		      [770, 51, 800, 79]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      sg_icon_stat	      "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "3965"
	      Ports		      [1, 1]
	      Position		      [770, 96, 800, 124]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      sg_icon_stat	      "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register3"
	      SID		      "3966"
	      Ports		      [1, 1]
	      Position		      [865, 96, 895, 124]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      sg_icon_stat	      "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      SubSystem
	      Name		      "usec Pulse"
	      SID		      "3967"
	      Ports		      [1, 1]
	      Position		      [320, 135, 365, 165]
	      MinAlgLoopOccurrences   off
	      PropExecContextOutsideSubsystem off
	      RTWSystemCode	      "Auto"
	      FunctionWithSeparateData off
	      Opaque		      off
	      RequestExecContextInheritance off
	      MaskHideContents	      off
	      System {
		Name			"usec Pulse"
		Location		[45, 102, 1645, 1321]
		Open			off
		ModelBrowserVisibility	off
		ModelBrowserWidth	200
		ScreenColor		"white"
		PaperOrientation	"landscape"
		PaperPositionMode	"auto"
		PaperType		"usletter"
		PaperUnits		"inches"
		TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
		TiledPageScale		1
		ShowPageBoundaries	off
		ZoomFactor		"156"
		Block {
		  BlockType		  Inport
		  Name			  "Rst"
		  SID			  "3968"
		  Position		  [125, 218, 155, 232]
		  IconDisplay		  "Port number"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Clk->usec"
		  SID			  "3969"
		  Ports			  [1, 1]
		  Position		  [295, 198, 360, 242]
		  NamePlacement		  "alternate"
		  LibraryVersion	  "1.2"
		  SourceBlock		  "xbsIndex_r4/Counter"
		  SourceType		  "Xilinx Counter Block"
		  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter i"
		  "s implemented by combining a counter with a comparator."
		  cnt_type		  "Free Running"
		  cnt_to		  "159"
		  operation		  "Up"
		  start_count		  "0"
		  cnt_by_val		  "1"
		  arith_type		  "Unsigned"
		  n_bits		  "8"
		  bin_pt		  "0"
		  load_pin		  off
		  rst			  on
		  en			  off
		  explicit_period	  "off"
		  period		  "1"
		  dbl_ovrd		  off
		  use_behavioral_HDL	  off
		  implementation	  "Fabric"
		  xl_use_area		  off
		  xl_area		  "[0,0,0,0,0,0,0]"
		  has_advanced_control	  "0"
		  sggui_pos		  "-1,-1,-1,-1"
		  block_type		  "counter"
		  sg_icon_stat		  "65,44,1,1,white,blue,0,803eba70,right,,[ ],[ ]"
		  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9"
		  "1 ]);\nplot([0 65 65 0 0 ],[0 0 44 44 0 ]);\npatch([18.65 27.32 33.32 39.32 45.32 33.32 24.65 18.65 ],[28.66 28.66"
		  " 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([24.65 33.32 27.32 18.65 24.65 ],[22.66 22.66 28.66 28.66"
		  " 22.66 ],[0.931 0.946 0.973 ]);\npatch([18.65 27.32 33.32 24.65 18.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ])"
		  ";\npatch([24.65 45.32 39.32 33.32 27.32 18.65 24.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0."
		  "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
		  "abel('input',1,'rst');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end "
		  "icon text');"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Constant1"
		  SID			  "3970"
		  Ports			  [0, 1]
		  Position		  [320, 244, 340, 266]
		  ShowName		  off
		  LibraryVersion	  "1.2"
		  SourceBlock		  "xbsIndex_r4/Constant"
		  SourceType		  "Xilinx Constant Block Block"
		  const			  "39"
		  gui_display_data_type	  "Fixed-point"
		  arith_type		  "Unsigned"
		  n_bits		  "8"
		  bin_pt		  "0"
		  preci_type		  "Single"
		  exp_width		  "8"
		  frac_width		  "24"
		  explicit_period	  off
		  period		  "1"
		  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
		  equ			  "P=C"
		  opselect		  "C"
		  inp2			  "PCIN>>17"
		  opr			  "+"
		  inp1			  "P"
		  carry			  "CIN"
		  dbl_ovrd		  off
		  has_advanced_control	  "0"
		  sggui_pos		  "-1,-1,-1,-1"
		  block_type		  "constant"
		  block_version		  "8.2.02"
		  sg_icon_stat		  "20,22,0,1,white,blue,0,2cb85581,right,,[ ],[ ]"
		  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9"
		  "1 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13.22 15."
		  "22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22 11.22 ]"
		  ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 "
		  "14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME"
		  "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'39');\nfp"
		  "rintf('','COMMENT: end icon text');"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Logical"
		  SID			  "3971"
		  Ports			  [2, 1]
		  Position		  [215, 208, 245, 232]
		  ShowName		  off
		  LibraryVersion	  "1.2"
		  SourceBlock		  "xbsIndex_r4/Logical"
		  SourceType		  "Xilinx Logical Block Block"
		  logical_function	  "OR"
		  inputs		  "2"
		  en			  off
		  latency		  "0"
		  precision		  "Full"
		  arith_type		  "Unsigned"
		  n_bits		  "16"
		  bin_pt		  "0"
		  align_bp		  on
		  dbl_ovrd		  off
		  xl_use_area		  off
		  xl_area		  "[0,0,0,0,0,0,0]"
		  has_advanced_control	  "0"
		  sggui_pos		  "-1,-1,-1,-1"
		  block_type		  "logical"
		  sg_icon_stat		  "30,24,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
		  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9"
		  "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3"
		  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15"
		  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]"
		  ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 "
		  "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp"
		  "('or');\nfprintf('','COMMENT: end icon text');"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Relational"
		  SID			  "3972"
		  Ports			  [2, 1]
		  Position		  [405, 202, 460, 273]
		  ShowName		  off
		  LibraryVersion	  "1.2"
		  SourceBlock		  "xbsIndex_r4/Relational"
		  SourceType		  "Xilinx Arithmetic Relational Operator Block"
		  mode			  "a=b"
		  en			  off
		  latency		  "0"
		  dbl_ovrd		  off
		  xl_use_area		  off
		  xl_area		  "[0,0,0,0,0,0,0]"
		  has_advanced_control	  "0"
		  sggui_pos		  "-1,-1,-1,-1"
		  block_type		  "relational"
		  sg_icon_stat		  "55,71,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
		  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 71 71 0 ],[0.77 0.82 0.9"
		  "1 ]);\nplot([0 55 55 0 0 ],[0 0 71 71 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[42.77 42"
		  ".77 49.77 42.77 49.77 49.77 49.77 42.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[35.77 35.77 42.77"
		  " 42.77 35.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[28.77 28.77 35.77 35.77 28.77 ],"
		  "[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[21.77 21.77 28.77 21.77 28.77 28.77 21.77 ],[0."
		  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
		  "ack');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,"
		  "'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
		}
		Block {
		  BlockType		  Outport
		  Name			  "uSec"
		  SID			  "3973"
		  Position		  [550, 233, 580, 247]
		  IconDisplay		  "Port number"
		}
		Line {
		  SrcBlock		  "Clk->usec"
		  SrcPort		  1
		  DstBlock		  "Relational"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Constant1"
		  SrcPort		  1
		  DstBlock		  "Relational"
		  DstPort		  2
		}
		Line {
		  SrcBlock		  "Relational"
		  SrcPort		  1
		  Points		  [35, 0]
		  Branch {
		    DstBlock		    "uSec"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, -80; -300, 0]
		    DstBlock		    "Logical"
		    DstPort		    1
		  }
		}
		Line {
		  SrcBlock		  "Logical"
		  SrcPort		  1
		  DstBlock		  "Clk->usec"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Rst"
		  SrcPort		  1
		  DstBlock		  "Logical"
		  DstPort		  2
		}
	      }
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "CNT_MSB"
	      SID		      "3936"
	      Position		      [960, 58, 990, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "CNT_LSB"
	      SID		      "3935"
	      Position		      [960, 103, 990, 117]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Microsecond\nCounter"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		Points			[25, 0]
		Branch {
		  DstBlock		  "32LSB"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, -45]
		  DstBlock		  "32MSB"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 225]
		DstBlock		"Gateway Out5"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "32LSB"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32MSB"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		DstBlock		"CNT_MSB"
		DstPort			1
	      }
	      Branch {
		Points			[0, 285]
		DstBlock		"Gateway Out6"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Register3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register3"
	      SrcPort		      1
	      Points		      [20, 0]
	      Branch {
		DstBlock		"CNT_LSB"
		DstPort			1
	      }
	      Branch {
		Points			[0, 255]
		DstBlock		"Gateway Out7"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      DstBlock		      "Microsecond\nCounter"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "usec Pulse"
	      SrcPort		      1
	      Points		      [20, 0]
	      Branch {
		DstBlock		"Logical"
		DstPort			2
	      }
	      Branch {
		Points			[0, 170]
		DstBlock		"Gateway Out4"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Load LSB"
	      SrcPort		      1
	      Points		      [20, 0]
	      Branch {
		Points			[140, 0; 0, -20]
		DstBlock		"Concat"
		DstPort			2
	      }
	      Branch {
		Points			[0, 170]
		DstBlock		"Gateway Out3"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Load MSB"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		DstBlock		"Concat"
		DstPort			1
	      }
	      Branch {
		Points			[0, 190]
		DstBlock		"Gateway Out2"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      DstBlock		      "Microsecond\nCounter"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Load"
	      SrcPort		      1
	      Points		      [30, 0]
	      Branch {
		DstBlock		"Posedge2"
		DstPort			1
	      }
	      Branch {
		Points			[0, 200]
		DstBlock		"Gateway Out1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Posedge2"
	      SrcPort		      1
	      DstBlock		      "Convert4"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert4"
	      SrcPort		      1
	      Points		      [20, 0]
	      Branch {
		Points			[120, 0]
		Branch {
		  DstBlock		  "Microsecond\nCounter"
		  DstPort		  1
		}
		Branch {
		  DstBlock		  "Logical"
		  DstPort		  1
		}
	      }
	      Branch {
		Points			[0, 75]
		DstBlock		"usec Pulse"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Gateway Out5"
	      SrcPort		      1
	      DstBlock		      "Counter"
	      DstPort		      5
	    }
	    Line {
	      SrcBlock		      "Gateway Out4"
	      SrcPort		      1
	      DstBlock		      "Counter"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Gateway Out3"
	      SrcPort		      1
	      DstBlock		      "Counter"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Gateway Out2"
	      SrcPort		      1
	      DstBlock		      "Counter"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Gateway Out1"
	      SrcPort		      1
	      DstBlock		      "Counter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Gateway Out7"
	      SrcPort		      1
	      DstBlock		      "Counter"
	      DstPort		      7
	    }
	    Line {
	      SrcBlock		      "Gateway Out6"
	      SrcPort		      1
	      DstBlock		      "Counter"
	      DstPort		      6
	    }
	    Annotation {
	      Name		      "NOTE:  Counter is set to use 40 MHz clock input.  If that changes, please modify the \"usec Pulse\""
	      " block."
	      Position		      [537, 28]
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register1"
	  SID			  "1394"
	  Ports			  [2, 1]
	  Position		  [980, 396, 1025, 469]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'STATUS'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register10"
	  SID			  "4646"
	  Ports			  [2, 1]
	  Position		  [1555, 1316, 1600, 1389]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_TX_IQ_STATUS'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register2"
	  SID			  "1407"
	  Ports			  [2, 1]
	  Position		  [980, 501, 1025, 574]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'DESIGN_VER'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register3"
	  SID			  "1413"
	  Ports			  [2, 1]
	  Position		  [980, 606, 1025, 679]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'BUFF_SIZES'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register4"
	  SID			  "3554"
	  Ports			  [2, 1]
	  Position		  [500, 1491, 545, 1564]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'INT_STATUS'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register5"
	  SID			  "3621"
	  Ports			  [2, 1]
	  Position		  [500, 1141, 545, 1214]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register6"
	  SID			  "3669"
	  Ports			  [2, 1]
	  Position		  [500, 1236, 545, 1309]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_RX_IQ_BUF_OCCUPANCY'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register7"
	  SID			  "3792"
	  Ports			  [2, 1]
	  Position		  [2075, 261, 2120, 334]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'AGC_GAINS'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register8"
	  SID			  "4499"
	  Ports			  [2, 1]
	  Position		  [1555, 1111, 1600, 1184]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_TX_IQ_BUF_RD_BYTE_OFFSET'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register9"
	  SID			  "4633"
	  Ports			  [2, 1]
	  Position		  [1555, 1216, 1600, 1289]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RF_TX_IQ_BUF_OCCUPANCY'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,270"
	  block_type		  "toreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,73,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 73 73 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 73 73 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[42.66 42.66 48."
	  "66 42.66 48.66 48.66 48.66 42.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[36.66 36.66 42.66 42.66 36.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[30.66 30.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 24.66 30.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
	  "COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "TxDelay"
	  SID			  "1022"
	  Ports			  [0, 1]
	  Position		  [75, 400, 120, 430]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TX_DELAY'"
	  init			  "wl_buffers_tx_delay_init"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,234"
	  block_type		  "fromreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[0]"
	  SID			  "4636"
	  Ports			  [1, 1]
	  Position		  [945, 1486, 985, 1504]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[17:16]"
	  SID			  "3389"
	  Ports			  [1, 1]
	  Position		  [200, 696, 240, 714]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "2"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "16"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[1:0]"
	  SID			  "3387"
	  Ports			  [1, 1]
	  Position		  [200, 626, 240, 644]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "2"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[25:24]"
	  SID			  "3390"
	  Ports			  [1, 1]
	  Position		  [200, 731, 240, 749]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "2"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "24"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[8]"
	  SID			  "4637"
	  Ports			  [1, 1]
	  Position		  [945, 1521, 985, 1539]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "8"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[9:8]"
	  SID			  "3388"
	  Ports			  [1, 1]
	  Position		  [200, 661, 240, 679]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "2"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "8"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "zero1"
	  SID			  "2013"
	  Ports			  [0, 1]
	  Position		  [755, 211, 775, 229]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "6"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "zero10"
	  SID			  "3555"
	  Ports			  [0, 1]
	  Position		  [445, 1536, 465, 1554]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "1"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "zero11"
	  SID			  "3627"
	  Ports			  [0, 1]
	  Position		  [285, 1511, 305, 1529]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "22"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "zero12"
	  SID			  "3641"
	  Ports			  [0, 1]
	  Position		  [445, 1186, 465, 1204]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "1"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','CO"
	  "MMENT: end icon text');"
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	Block {
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	  SID			  "3670"
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	  Position		  [440, 1281, 460, 1299]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "1"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','CO"
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	Block {
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	  SID			  "3674"
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	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
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	  n_bits		  "2"
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	  preci_type		  "Single"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','CO"
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	Block {
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	  SID			  "3687"
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	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
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	  preci_type		  "Single"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
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	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','CO"
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	Block {
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	  SID			  "3688"
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	  Position		  [755, 396, 775, 414]
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	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
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	  n_bits		  "7"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
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	Block {
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	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "15"
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	  preci_type		  "Single"
	  exp_width		  "8"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
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	Block {
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	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
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	  preci_type		  "Single"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
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	  explicit_period	  off
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
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	  block_type		  "constant"
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	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
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	  preci_type		  "Single"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
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	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
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	  preci_type		  "Single"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Block {
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	  SID			  "4634"
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	  SourceType		  "Xilinx Constant Block Block"
	  const			  "1"
	  gui_display_data_type	  "Fixed-point"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
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	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','CO"
	  "MMENT: end icon text');"
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	Block {
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	  SourceType		  "Xilinx Constant Block Block"
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	  explicit_period	  off
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
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	  block_type		  "constant"
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	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
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	  SourceType		  "Xilinx Constant Block Block"
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	  gui_display_data_type	  "Fixed-point"
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	  explicit_period	  off
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
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	  block_type		  "constant"
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	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
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	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
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	  block_type		  "constant"
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	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
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	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
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	  block_type		  "constant"
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	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
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	  sg_icon_stat		  "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
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	  gui_display_data_type	  "Fixed-point"
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
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	  arith_type		  "Unsigned"
	  n_bits		  "16"
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
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	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "6"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "zero8"
	  SID			  "2016"
	  Ports			  [0, 1]
	  Position		  [755, 181, 775, 199]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "6"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "zero9"
	  SID			  "2019"
	  Ports			  [0, 1]
	  Position		  [755, 271, 775, 289]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "6"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13.22"
	  " 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.93"
	  "1 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44 12."
	  "44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end ic"
	  "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Line {
	  SrcBlock		  "TxDelay"
	  SrcPort		  1
	  DstBlock		  "Goto2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From2"
	  SrcPort		  1
	  Points		  [145, 0]
	  Branch {
	    DstBlock		    "AGCDoneAddr"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 90]
	    Branch {
	      DstBlock		      "Radio1AGCDoneRSSI"
	      DstPort		      2
	    }
	    Branch {
	      Points		      [0, 90]
	      DstBlock		      "Radio3AGCDoneRSSI"
	      DstPort		      2
	    }
	  }
	}
	Line {
	  SrcBlock		  "Convert4"
	  SrcPort		  1
	  DstBlock		  "AGCDoneAddr"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat3"
	  SrcPort		  1
	  DstBlock		  "Radio3AGCDoneRSSI"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat2"
	  SrcPort		  1
	  DstBlock		  "Radio1AGCDoneRSSI"
	  DstPort		  1
	}
	Line {
	  Labels		  [0, 0]
	  SrcBlock		  "From Register16"
	  SrcPort		  1
	  DstBlock		  "RFx Sel"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFx Sel"
	  SrcPort		  1
	  DstBlock		  "Goto9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFx Sel"
	  SrcPort		  2
	  DstBlock		  "Goto5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFx Sel"
	  SrcPort		  3
	  DstBlock		  "Goto11"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFx Sel"
	  SrcPort		  4
	  DstBlock		  "Goto12"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register1"
	  SrcPort		  1
	  DstBlock		  "RFx Sel2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFx Sel2"
	  SrcPort		  1
	  DstBlock		  "Goto13"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFx Sel2"
	  SrcPort		  2
	  DstBlock		  "Goto14"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFx Sel2"
	  SrcPort		  3
	  DstBlock		  "Goto15"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFx Sel2"
	  SrcPort		  4
	  DstBlock		  "Goto16"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "AGCDoneAddr"
	  SrcPort		  1
	  DstBlock		  "Terminator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Radio1AGCDoneRSSI"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Radio3AGCDoneRSSI"
	  SrcPort		  1
	  DstBlock		  "Terminator3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero2"
	  SrcPort		  1
	  DstBlock		  "To Register1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "To Register1"
	  SrcPort		  1
	  DstBlock		  "Terminator6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "DESIGN_VER"
	  SrcPort		  1
	  DstBlock		  "Register"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero3"
	  SrcPort		  1
	  DstBlock		  "To Register2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register"
	  SrcPort		  1
	  DstBlock		  "To Register2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero4"
	  SrcPort		  1
	  DstBlock		  "To Register3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Concat1"
	  SrcPort		  1
	  DstBlock		  "To Register3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero5"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero6"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "To Register3"
	  SrcPort		  1
	  DstBlock		  "Terminator7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "To Register2"
	  SrcPort		  1
	  DstBlock		  "Terminator8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register5"
	  SrcPort		  1
	  DstBlock		  "Goto8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From1"
	  SrcPort		  1
	  DstBlock		  "Convert4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register6"
	  SrcPort		  1
	  DstBlock		  "Goto10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register13"
	  SrcPort		  1
	  DstBlock		  "Config Bits"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero1"
	  SrcPort		  1
	  DstBlock		  "Concat2"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From10"
	  SrcPort		  1
	  DstBlock		  "Concat2"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From4"
	  SrcPort		  1
	  DstBlock		  "Concat2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "zero8"
	  SrcPort		  1
	  DstBlock		  "Concat2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero7"
	  SrcPort		  1
	  DstBlock		  "Concat3"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From6"
	  SrcPort		  1
	  DstBlock		  "Concat3"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "zero9"
	  SrcPort		  1
	  DstBlock		  "Concat3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From8"
	  SrcPort		  1
	  DstBlock		  "Concat3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "b[1:0]"
	  SrcPort		  1
	  DstBlock		  "Goto19"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[9:8]"
	  SrcPort		  1
	  DstBlock		  "Goto7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[17:16]"
	  SrcPort		  1
	  DstBlock		  "Goto3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[25:24]"
	  SrcPort		  1
	  DstBlock		  "Goto1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register2"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    DstBlock		    "b[1:0]"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 35]
	    Branch {
	      DstBlock		      "b[9:8]"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 35]
	      Branch {
		DstBlock		"b[17:16]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 35]
		DstBlock		"b[25:24]"
		DstPort			1
	      }
	    }
	  }
	}
	Line {
	  SrcBlock		  "From Register7"
	  SrcPort		  1
	  DstBlock		  "Goto6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register9"
	  SrcPort		  1
	  DstBlock		  "Goto20"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat4"
	  SrcPort		  1
	  DstBlock		  "To Register4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero10"
	  SrcPort		  1
	  DstBlock		  "To Register4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From11"
	  SrcPort		  1
	  DstBlock		  "To Register5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "To Register4"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register4"
	  SrcPort		  1
	  DstBlock		  "Goto18"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "To Register5"
	  SrcPort		  1
	  DstBlock		  "Terminator4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero12"
	  SrcPort		  1
	  DstBlock		  "To Register5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "zero13"
	  SrcPort		  1
	  DstBlock		  "To Register6"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Concat5"
	  SrcPort		  1
	  DstBlock		  "To Register6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "To Register6"
	  SrcPort		  1
	  DstBlock		  "Terminator5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From12"
	  SrcPort		  1
	  DstBlock		  "Concat5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "zero14"
	  SrcPort		  1
	  DstBlock		  "Concat5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant2"
	  SrcPort		  1
	  DstBlock		  "DESIGN_VER"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat6"
	  SrcPort		  1
	  DstBlock		  "To Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From5"
	  SrcPort		  1
	  DstBlock		  "Concat6"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "zero15"
	  SrcPort		  1
	  DstBlock		  "Concat6"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From7"
	  SrcPort		  1
	  DstBlock		  "Concat6"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "zero16"
	  SrcPort		  1
	  DstBlock		  "Concat6"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "RFA_G_RF"
	  SrcPort		  1
	  DstBlock		  "Delay4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFA_G_BB"
	  SrcPort		  1
	  DstBlock		  "Delay5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant6"
	  SrcPort		  1
	  DstBlock		  "RFA_G_RF"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant7"
	  SrcPort		  1
	  DstBlock		  "RFA_G_BB"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFB_G_RF"
	  SrcPort		  1
	  DstBlock		  "Delay1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFB_G_BB"
	  SrcPort		  1
	  DstBlock		  "Delay2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant3"
	  SrcPort		  1
	  DstBlock		  "RFB_G_RF"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant4"
	  SrcPort		  1
	  DstBlock		  "RFB_G_BB"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFC_G_RF"
	  SrcPort		  1
	  DstBlock		  "Delay3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFC_G_BB"
	  SrcPort		  1
	  DstBlock		  "Delay6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant5"
	  SrcPort		  1
	  DstBlock		  "RFC_G_RF"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant8"
	  SrcPort		  1
	  DstBlock		  "RFC_G_BB"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFD_G_RF"
	  SrcPort		  1
	  DstBlock		  "Delay7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFD_G_BB"
	  SrcPort		  1
	  DstBlock		  "Delay8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant9"
	  SrcPort		  1
	  DstBlock		  "RFD_G_RF"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant10"
	  SrcPort		  1
	  DstBlock		  "RFD_G_BB"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From19"
	  SrcPort		  1
	  DstBlock		  "To Register7"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "To Register7"
	  SrcPort		  1
	  DstBlock		  "Terminator9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat7"
	  SrcPort		  1
	  DstBlock		  "Register3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register3"
	  SrcPort		  1
	  DstBlock		  "Register2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register2"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "To Register7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFA_RXHP"
	  SrcPort		  1
	  DstBlock		  "Delay9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant11"
	  SrcPort		  1
	  DstBlock		  "RFA_RXHP"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFB_RXHP"
	  SrcPort		  1
	  DstBlock		  "Delay10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "RFB_RXHP"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFC_RXHP"
	  SrcPort		  1
	  DstBlock		  "Delay11"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant12"
	  SrcPort		  1
	  DstBlock		  "RFC_RXHP"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFD_RXHP"
	  SrcPort		  1
	  DstBlock		  "Delay12"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant13"
	  SrcPort		  1
	  DstBlock		  "RFD_RXHP"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat10"
	  SrcPort		  1
	  DstBlock		  "Concat7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat9"
	  SrcPort		  1
	  DstBlock		  "Concat7"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Concat8"
	  SrcPort		  1
	  DstBlock		  "Concat7"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Concat"
	  SrcPort		  1
	  DstBlock		  "Concat7"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Delay12"
	  SrcPort		  1
	  Points		  [60, 0; 0, 150]
	  DstBlock		  "Concat10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Delay7"
	  SrcPort		  1
	  Points		  [50, 0; 0, 120]
	  DstBlock		  "Concat10"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Delay8"
	  SrcPort		  1
	  Points		  [40, 0; 0, 90]
	  DstBlock		  "Concat10"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Delay11"
	  SrcPort		  1
	  Points		  [30, 0; 0, 70]
	  DstBlock		  "Concat9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Delay3"
	  SrcPort		  1
	  Points		  [20, 0; 0, 40]
	  DstBlock		  "Concat9"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Delay6"
	  SrcPort		  1
	  Points		  [10, 0; 0, 10]
	  DstBlock		  "Concat9"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Delay10"
	  SrcPort		  1
	  Points		  [10, 0; 0, -10]
	  DstBlock		  "Concat8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Delay1"
	  SrcPort		  1
	  Points		  [20, 0; 0, -40]
	  DstBlock		  "Concat8"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Delay2"
	  SrcPort		  1
	  Points		  [30, 0; 0, -70]
	  DstBlock		  "Concat8"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Delay9"
	  SrcPort		  1
	  Points		  [40, 0; 0, -90]
	  DstBlock		  "Concat"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Delay4"
	  SrcPort		  1
	  Points		  [50, 0; 0, -120]
	  DstBlock		  "Concat"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Delay5"
	  SrcPort		  1
	  Points		  [60, 0; 0, -150]
	  DstBlock		  "Concat"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "AGCDoneAddr1"
	  SrcPort		  1
	  DstBlock		  "Terminator10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant14"
	  SrcPort		  1
	  DstBlock		  "DRAM_INIT_DONE"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero18"
	  SrcPort		  1
	  DstBlock		  "Concat6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "DRAM_INIT_DONE"
	  SrcPort		  1
	  DstBlock		  "Concat6"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "zero19"
	  SrcPort		  1
	  DstBlock		  "AGCDoneAddr1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "AGCDoneAddr2"
	  SrcPort		  1
	  DstBlock		  "Terminator11"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero20"
	  SrcPort		  1
	  DstBlock		  "AGCDoneAddr2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From Register10"
	  SrcPort		  1
	  DstBlock		  "Timer64"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From Register8"
	  SrcPort		  1
	  DstBlock		  "Timer64"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Timer64"
	  SrcPort		  1
	  DstBlock		  "AGCDoneAddr2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Timer64"
	  SrcPort		  2
	  DstBlock		  "AGCDoneAddr1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From13"
	  SrcPort		  1
	  DstBlock		  "Timer64"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register14"
	  SrcPort		  1
	  DstBlock		  "Goto22"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register11"
	  SrcPort		  1
	  DstBlock		  "Goto4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From14"
	  SrcPort		  1
	  DstBlock		  "To Register8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "To Register8"
	  SrcPort		  1
	  DstBlock		  "Terminator12"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "zero21"
	  SrcPort		  1
	  DstBlock		  "To Register8"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "zero22"
	  SrcPort		  1
	  DstBlock		  "To Register9"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Concat11"
	  SrcPort		  1
	  DstBlock		  "To Register9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "To Register9"
	  SrcPort		  1
	  DstBlock		  "Terminator13"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From15"
	  SrcPort		  1
	  DstBlock		  "Concat11"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "zero23"
	  SrcPort		  1
	  DstBlock		  "Concat11"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[0]"
	  SrcPort		  1
	  DstBlock		  "Goto23"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[8]"
	  SrcPort		  1
	  DstBlock		  "Goto17"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register12"
	  SrcPort		  1
	  Points		  [50, 0]
	  Branch {
	    DstBlock		    "b[0]"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 35]
	    DstBlock		    "b[8]"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "zero11"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From9"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From16"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "zero24"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From17"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From3"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "zero25"
	  SrcPort		  1
	  DstBlock		  "To Register10"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Concat12"
	  SrcPort		  1
	  DstBlock		  "To Register10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "To Register10"
	  SrcPort		  1
	  DstBlock		  "Terminator14"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From18"
	  SrcPort		  1
	  DstBlock		  "Concat12"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "zero26"
	  SrcPort		  1
	  DstBlock		  "Concat12"
	  DstPort		  1
	}
	Annotation {
	  Name			  "Per-radio registers use the same selection\nmasks as the radio_controller to simplify the C code\nRFA_MAS"
	  "K = 0x1\nRFB_MASK = 0x2\nRFC_MASK = 0x4\nRFD_MASK = 0x8"
	  Position		  [235, 61]
	}
	Annotation {
	  Name			  "RX Control:\n    RF_RX_IQ_THRESHOLD                                      - Number of samples before inter"
	  "rupt is generated to move samples from local storage to DRAM\n    RF_RX_IQ_BUF_WR_BYTE_OFFSET                  - In"
	  "itial write pointer offset within each RF IQ buffer (common for all RF interfaces)\n    RF_RX_IQ_BUF_RD_BYTE_OFFSET"
	  "                   - Current read pointer offset within each RF IQ buffer (last sample written by DMA to DRAM; comm"
	  "on for all RF interterfaces)\n    RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE  - Current write pointer within the RF IQ buff"
	  "er (last sample written by RF interface; common for all RF interfaces)"
	  Position		  [28, 906]
	  HorizontalAlignment	  "left"
	}
	Annotation {
	  Name			  "Status Register for AGC gains.  These gateway inputs could be used in future extensions to \nenable funct"
	  "ionality like selection diveristy."
	  Position		  [1621, 413]
	  HorizontalAlignment	  "left"
	}
	Annotation {
	  Name			  "64 bit microsecond counter.  Used to help with timing events."
	  Position		  [1710, 798]
	}
	Annotation {
	  Name			  "TX Control:\n    RF_TX_IQ_THRESHOLD                                      - Number of samples before inter"
	  "rupt is generated to move samples from DRAM to local storage\n    RF_TX_IQ_BUF_WR_BYTE_OFFSET                  - In"
	  "itial write pointer offset within each RF IQ buffer (common for all RF interfaces)\n    RF_TX_IQ_BUF_RD_BYTE_OFFSET"
	  "                   - Current read pointer offset within each RF IQ buffer (last sample written by DMA to local stor"
	  "age; common for all RF interterfaces"
	  Position		  [1093, 901]
	  HorizontalAlignment	  "left"
	}
	Annotation {
	  Name			  "Interrupt Control:\n    RF_ERROR_CLR                                                   - Register to clea"
	  "r the error bits in the INT_STATUS register\n    INT_STATUS                                                        "
	  "- Interrupt status register; Includes IQ/RSSI Error flag"
	  Position		  [43, 1396]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
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      SID		      "92"
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      Position		      [490, 328, 535, 352]
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      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
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	  SID			  "93"
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	  IconDisplay		  "Port number"
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	Block {
	  BlockType		  Reference
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	  SID			  "94"
	  Ports			  [1, 1]
	  Position		  [145, 45, 175, 75]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If re"
	  "gister retiming is enabled, the delay line is a chain of flip-flops."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
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	  block_type		  "delay"
	  block_version		  "8.2"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
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	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
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	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "95"
	  Ports			  [1, 1]
	  Position		  [90, 47, 120, 73]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "8.2"
	  sg_icon_stat		  "30,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.33 "
	  "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16.33"
	  " 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ])"
	  ";\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('"
	  "not');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "96"
	  Ports			  [2, 1]
	  Position		  [205, 29, 240, 71]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31.55"
	  " 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Q"
	  SID			  "97"
	  Position		  [265, 43, 295, 57]
	  IconDisplay		  "Port number"
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	Line {
	  SrcBlock		  "D"
	  SrcPort		  1
	  Points		  [0, 0; 15, 0]
	  Branch {
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Logical"
	    DstPort		    1
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	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Delay"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Delay"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Q"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
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      SID		      "98"
      Ports		      [1, 1]
      Position		      [490, 793, 535, 817]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Posedge1"
	Location		[132, 719, 452, 817]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
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	Block {
	  BlockType		  Inport
	  Name			  "D"
	  SID			  "99"
	  Position		  [25, 33, 55, 47]
	  IconDisplay		  "Port number"
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	Block {
	  BlockType		  Reference
	  Name			  "Delay"
	  SID			  "100"
	  Ports			  [1, 1]
	  Position		  [145, 45, 175, 75]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If re"
	  "gister retiming is enabled, the delay line is a chain of flip-flops."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  block_version		  "8.2"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "101"
	  Ports			  [1, 1]
	  Position		  [90, 47, 120, 73]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "8.2"
	  sg_icon_stat		  "30,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.33 "
	  "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16.33"
	  " 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ])"
	  ";\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('"
	  "not');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "102"
	  Ports			  [2, 1]
	  Position		  [205, 29, 240, 71]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31.55"
	  " 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Q"
	  SID			  "103"
	  Position		  [265, 43, 295, 57]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Q"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Delay"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Delay"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "D"
	  SrcPort		  1
	  Points		  [0, 0; 15, 0]
	  Branch {
	    DstBlock		    "Logical"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Posedge2"
      SID		      "104"
      Ports		      [1, 1]
      Position		      [490, 828, 535, 852]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Posedge2"
	Location		[132, 719, 452, 817]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "D"
	  SID			  "105"
	  Position		  [25, 33, 55, 47]
	  IconDisplay		  "Port number"
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	Block {
	  BlockType		  Reference
	  Name			  "Delay"
	  SID			  "106"
	  Ports			  [1, 1]
	  Position		  [145, 45, 175, 75]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If re"
	  "gister retiming is enabled, the delay line is a chain of flip-flops."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "delay"
	  block_version		  "8.2"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "107"
	  Ports			  [1, 1]
	  Position		  [90, 47, 120, 73]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "8.2"
	  sg_icon_stat		  "30,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.33 "
	  "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16.33"
	  " 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ])"
	  ";\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('"
	  "not');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "108"
	  Ports			  [2, 1]
	  Position		  [205, 29, 240, 71]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31.55"
	  " 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Q"
	  SID			  "109"
	  Position		  [265, 43, 295, 57]
	  IconDisplay		  "Port number"
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	Line {
	  SrcBlock		  "Logical"
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	  Points		  [0, 0]
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	  DstPort		  1
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	Line {
	  SrcBlock		  "Delay"
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	  Points		  [0, 0]
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Inverter"
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	  DstBlock		  "Delay"
	  DstPort		  1
	}
	Line {
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	  Points		  [0, 0; 15, 0]
	  Branch {
	    DstBlock		    "Logical"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Posedge3"
      SID		      "110"
      Ports		      [1, 1]
      Position		      [480, 953, 525, 977]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Posedge3"
	Location		[132, 719, 452, 817]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "D"
	  SID			  "111"
	  Position		  [25, 33, 55, 47]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay"
	  SID			  "112"
	  Ports			  [1, 1]
	  Position		  [145, 45, 175, 75]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Delay"
	  SourceType		  "Xilinx Delay Block"
	  infoedit		  "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If re"
	  "gister retiming is enabled, the delay line is a chain of flip-flops."
	  rst			  off
	  infoeditControl	  "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  reg_retiming		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
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	  block_type		  "delay"
	  block_version		  "8.2"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 "
	  "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23."
	  "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "113"
	  Ports			  [1, 1]
	  Position		  [90, 47, 120, 73]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "8.2"
	  sg_icon_stat		  "30,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.33 "
	  "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16.33"
	  " 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ])"
	  ";\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('"
	  "not');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "114"
	  Ports			  [2, 1]
	  Position		  [205, 29, 240, 71]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31.55"
	  " 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Q"
	  SID			  "115"
	  Position		  [265, 43, 295, 57]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "D"
	  SrcPort		  1
	  Points		  [0, 0; 15, 0]
	  Branch {
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Logical"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Delay"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Delay"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Q"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      DiscretePulseGenerator
      Name		      "Pulse\nGenerator1"
      SID		      "3372"
      Ports		      [0, 1]
      Position		      [75, 548, 120, 582]
      Period		      "2^20"
      PulseWidth	      "50"
      PhaseDelay	      "100"
    }
    Block {
      BlockType		      DiscretePulseGenerator
      Name		      "Pulse\nGenerator2"
      SID		      "118"
      Ports		      [0, 1]
      Position		      [80, 808, 125, 842]
      Period		      "10 * 2^14"
      PulseWidth	      "50"
      PhaseDelay	      "2.5 * 2^14"
    }
    Block {
      BlockType		      DiscretePulseGenerator
      Name		      "Pulse\nGenerator3"
      SID		      "119"
      Ports		      [0, 1]
      Position		      [80, 948, 125, 982]
      Period		      "20000"
      PulseWidth	      "50"
      PhaseDelay	      "374"
    }
    Block {
      BlockType		      Reference
      Name		      "RF Loopback Select"
      SID		      "4725"
      Ports		      [3, 1]
      Position		      [1840, 84, 1865, 136]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "2"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "25,52,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 7.42857 44.5714 52 0"
      " ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 7.42857 44.5714 52 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12."
      "66 8.325 5.325 ],[29.33 29.33 32.33 29.33 32.33 32.33 32.33 29.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8."
      "325 ],[26.33 26.33 29.33 29.33 26.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[23.33 23.3"
      "3 26.33 26.33 23.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[20.33 20.33 23.33 20.33 23."
      "33 23.33 20.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
      "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla"
      "ck');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon"
      " text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RF Loopback Select1"
      SID		      "4727"
      Ports		      [3, 1]
      Position		      [1840, 269, 1865, 321]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "2"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "25,52,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 7.42857 44.5714 52 0"
      " ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 7.42857 44.5714 52 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12."
      "66 8.325 5.325 ],[29.33 29.33 32.33 29.33 32.33 32.33 32.33 29.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8."
      "325 ],[26.33 26.33 29.33 29.33 26.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[23.33 23.3"
      "3 26.33 26.33 23.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[20.33 20.33 23.33 20.33 23."
      "33 23.33 20.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
      "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla"
      "ck');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon"
      " text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RF Loopback Select2"
      SID		      "4820"
      Ports		      [3, 1]
      Position		      [1840, 629, 1865, 681]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "2"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "25,52,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 7.42857 44.5714 52 0"
      " ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 7.42857 44.5714 52 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12."
      "66 8.325 5.325 ],[29.33 29.33 32.33 29.33 32.33 32.33 32.33 29.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8."
      "325 ],[26.33 26.33 29.33 29.33 26.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[23.33 23.3"
      "3 26.33 26.33 23.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[20.33 20.33 23.33 20.33 23."
      "33 23.33 20.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
      "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla"
      "ck');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon"
      " text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RF Loopback Select3"
      SID		      "4821"
      Ports		      [3, 1]
      Position		      [1840, 449, 1865, 501]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "2"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "25,52,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 7.42857 44.5714 52 0"
      " ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 7.42857 44.5714 52 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12."
      "66 8.325 5.325 ],[29.33 29.33 32.33 29.33 32.33 32.33 32.33 29.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8."
      "325 ],[26.33 26.33 29.33 29.33 26.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[23.33 23.3"
      "3 26.33 26.33 23.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[20.33 20.33 23.33 20.33 23."
      "33 23.33 20.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
      "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla"
      "ck');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon"
      " text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RF Select"
      SID		      "4659"
      Ports		      [9, 1]
      Position		      [620, 1071, 650, 1259]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "8"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "30,188,9,1,white,blue,3,9717d9a5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 26.8571 161.143 188 "
      "0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 26.8571 161.143 188 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15"
      ".88 10.1 6.1 ],[98.44 98.44 102.44 98.44 102.44 102.44 102.44 98.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10"
      ".1 ],[94.44 94.44 98.44 98.44 94.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[90.44 90.44 94."
      "44 94.44 90.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[86.44 86.44 90.44 86.44 90.44 90.44"
      " 86.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text"
      "');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');por"
      "t_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');"
      "\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\ncolor('black');port_la"
      "bel('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\n\ncolor('black');disp('\\bf{}','texmode','on')"
      ";\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFA\nRx Buffers"
      SID		      "122"
      Ports		      [5]
      Position		      [1930, 63, 1995, 217]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFA\nRx Buffers"
	Location		[85, 197, 2290, 1383]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "RSSI"
	  SID			  "123"
	  Position		  [450, 313, 480, 327]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "I/Q"
	  SID			  "124"
	  Position		  [545, 163, 575, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "Addr"
	  SID			  "125"
	  Position		  [325, 128, 355, 142]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "WE"
	  SID			  "126"
	  Position		  [110, 183, 140, 197]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "EN"
	  SID			  "127"
	  Position		  [110, 213, 140, 227]
	  Port			  "5"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "128"
	  Ports			  [1, 1]
	  Position		  [185, 212, 210, 228]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,374,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12.2"
	  "2 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0."
	  "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16.44 "
	  "14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en"
	  "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out"
	  SID			  "129"
	  Ports			  [1, 1]
	  Position		  [500, 30, 530, 40]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out1"
	  SID			  "130"
	  Ports			  [1, 1]
	  Position		  [500, 70, 530, 80]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "I/Q Buffer"
	  SID			  "1145"
	  Ports			  [3]
	  Position		  [645, 118, 700, 222]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "I/Q Buffer"
	    Location		    [322, 165, 2238, 1275]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Addr"
	      SID		      "1146"
	      Position		      [1090, 323, 1120, 337]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "I/Q_32b"
	      SID		      "1147"
	      Position		      [620, 353, 650, 367]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "WE"
	      SID		      "1148"
	      Position		      [1090, 383, 1120, 397]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+0"
	      SID		      "1196"
	      Ports		      [1, 1]
	      Position		      [710, 416, 755, 434]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+16"
	      SID		      "1198"
	      Ports		      [1, 1]
	      Position		      [710, 496, 755, 514]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+24"
	      SID		      "1199"
	      Ports		      [1, 1]
	      Position		      [710, 536, 755, 554]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+8"
	      SID		      "1197"
	      Ports		      [1, 1]
	      Position		      [710, 456, 755, 474]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "1200"
	      Ports		      [4, 1]
	      Position		      [820, 401, 865, 569]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "4"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],"
	      "[90.66 90.66 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84."
	      "66 90.66 90.66 84.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78"
	      ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 "
	      "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc"
	      "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');dis"
	      "p('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      From
	      Name		      "From1"
	      SID		      "3867"
	      Position		      [555, 314, 685, 336]
	      ZOrder		      -9
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto13"
	      SID		      "2181"
	      Position		      [1215, 351, 1365, 369]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_RX_DIN"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto17"
	      SID		      "2182"
	      Position		      [1215, 381, 1365, 399]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_RX_WE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto24"
	      SID		      "2183"
	      Position		      [1215, 321, 1365, 339]
	      ShowName		      off
	      GotoTag		      "RFA_IQ_RX_ADDR"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux"
	      SID		      "1195"
	      Ports		      [3, 1]
	      Position		      [970, 308, 1015, 412]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "14"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "mux"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Line {
	      SrcBlock		      "WE"
	      SrcPort		      1
	      DstBlock		      "Goto17"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "I/Q_32b"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		DstBlock		"Mux"
		DstPort			2
	      }
	      Branch {
		Points			[0, 65]
		Branch {
		  DstBlock		  "8LSB+0"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 40]
		  Branch {
		    DstBlock		    "8LSB+8"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 40]
		    Branch {
		    DstBlock		    "8LSB+16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 40]
		    DstBlock		    "8LSB+24"
		    DstPort		    1
		    }
		  }
		}
	      }
	    }
	    Line {
	      SrcBlock		      "Addr"
	      SrcPort		      1
	      DstBlock		      "Goto24"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Mux"
	      SrcPort		      1
	      DstBlock		      "Goto13"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "From1"
	      SrcPort		      1
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+0"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+8"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+16"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "8LSB+24"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [35, 0; 0, -90]
	      DstBlock		      "Mux"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "131"
	  Ports			  [2, 1]
	  Position		  [255, 175, 310, 235]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37.77 37.7"
	  "7 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30.77 37.77 37"
	  ".77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.77 23.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77 16.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('and');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RSSI Buffer"
	  SID			  "1286"
	  Ports			  [3]
	  Position		  [645, 264, 700, 376]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RSSI Buffer"
	    Location		    [177, 86, 2139, 1414]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Addr"
	      SID		      "1287"
	      Position		      [475, 343, 505, 357]
	      NamePlacement	      "alternate"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI"
	      SID		      "1288"
	      Position		      [245, 403, 275, 417]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "WE"
	      SID		      "1289"
	      Position		      [1295, 473, 1325, 487]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+0"
	      SID		      "1291"
	      Ports		      [1, 1]
	      Position		      [955, 496, 1000, 514]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+16"
	      SID		      "1292"
	      Ports		      [1, 1]
	      Position		      [955, 576, 1000, 594]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+24"
	      SID		      "1293"
	      Ports		      [1, 1]
	      Position		      [955, 616, 1000, 634]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+8"
	      SID		      "1294"
	      Ports		      [1, 1]
	      Position		      [955, 536, 1000, 554]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "BIT[2]"
	      SID		      "1295"
	      Ports		      [1, 1]
	      Position		      [580, 421, 620, 439]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P>"
	      "<P>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      on
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "2"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,407"
	      block_type	      "slice"
	      block_version	      "8.2"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "1296"
	      Ports		      [2, 1]
	      Position		      [835, 401, 875, 479]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "2"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "40,78,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 78 78 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 78 78 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[44.55"
	      " 44.55 49.55 44.55 49.55 49.55 49.55 44.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[39.55 39.55 44"
	      ".55 44.55 39.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[34.55 34.55 39.55 39.55 34.55 "
	      "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[29.55 29.55 34.55 29.55 34.55 34.55 29.55 ],[0."
	      "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor("
	      "'black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\font"
	      "size{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat1"
	      SID		      "1297"
	      Ports		      [4, 1]
	      Position		      [1065, 481, 1110, 649]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "4"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],"
	      "[90.66 90.66 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84."
	      "66 90.66 90.66 84.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78"
	      ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 "
	      "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc"
	      "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');dis"
	      "p('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert"
	      SID		      "1298"
	      Ports		      [1, 1]
	      Position		      [435, 402, 470, 418]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,461,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      From
	      Name		      "From"
	      SID		      "2001"
	      Position		      [945, 394, 1075, 416]
	      ZOrder		      -9
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto1"
	      SID		      "2185"
	      Position		      [1375, 431, 1525, 449]
	      ShowName		      off
	      GotoTag		      "RFA_RSSI_DIN"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto2"
	      SID		      "2186"
	      Position		      [1375, 471, 1525, 489]
	      ShowName		      off
	      GotoTag		      "RFA_RSSI_WE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto5"
	      SID		      "1300"
	      Position		      [435, 267, 595, 293]
	      ShowName		      off
	      GotoTag		      "RFA_RSSI"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto9"
	      SID		      "2187"
	      Position		      [1375, 341, 1525, 359]
	      ShowName		      off
	      GotoTag		      "RFA_RSSI_ADDR"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "1301"
	      Ports		      [1, 1]
	      Position		      [660, 422, 690, 438]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,251"
	      block_type	      "inv"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla"
	      "ck');disp('not');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "LSB + 3"
	      SID		      "1424"
	      Ports		      [1, 1]
	      Position		      [580, 341, 620, 359]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "ceil(log2(NumSamps_Rx_RSSI))-1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "LSB of Input"
	      bit0		      "3"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,407"
	      block_type	      "slice"
	      block_version	      "8.2"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux"
	      SID		      "1302"
	      Ports		      [3, 1]
	      Position		      [1215, 388, 1260, 492]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "14"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "mux"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "1303"
	      Ports		      [2, 1]
	      Position		      [730, 398, 775, 442]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "45,44,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28."
	      "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2"
	      "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('ou"
	      "tput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret1"
	      SID		      "1304"
	      Ports		      [1, 1]
	      Position		      [330, 402, 365, 418]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can changed the signal b"
	      "etween signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs no"
	      "thing.<P><P>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force"
	      "d to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp"
	      "ut of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "436,54,356,312"
	      block_type	      "reinterpret"
	      block_version	      "9.1.01"
	      sg_icon_stat	      "35,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla"
	      "ck');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Line {
	      SrcBlock		      "RSSI"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		Points			[0, -130]
		DstBlock		"Goto5"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Reinterpret1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Convert"
	      SrcPort		      1
	      Points		      [35, 0]
	      Branch {
		DstBlock		"Register"
		DstPort			1
	      }
	      Branch {
		Points			[0, 50]
		DstBlock		"Concat"
		DstPort			2
	      }
	    }
	    Line {
	      SrcBlock		      "Addr"
	      SrcPort		      1
	      Points		      [40, 0]
	      Branch {
		Points			[0, 80]
		DstBlock		"BIT[2]"
		DstPort			1
	      }
	      Branch {
		DstBlock		"LSB + 3"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Reinterpret1"
	      SrcPort		      1
	      DstBlock		      "Convert"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [45, 0]
	      Branch {
		Points			[0, 65]
		Branch {
		  DstBlock		  "8LSB+0"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 40]
		  Branch {
		    DstBlock		    "8LSB+8"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 40]
		    Branch {
		    DstBlock		    "8LSB+16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 40]
		    DstBlock		    "8LSB+24"
		    DstPort		    1
		    }
		  }
		}
	      }
	      Branch {
		Points			[0, 0]
		DstBlock		"Mux"
		DstPort			2
	      }
	    }
	    Line {
	      SrcBlock		      "BIT[2]"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "LSB + 3"
	      SrcPort		      1
	      DstBlock		      "Goto9"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "From"
	      SrcPort		      1
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+0"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+8"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+16"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "8LSB+24"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Concat1"
	      SrcPort		      1
	      Points		      [35, 0; 0, -90]
	      DstBlock		      "Mux"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux"
	      SrcPort		      1
	      DstBlock		      "Goto1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "WE"
	      SrcPort		      1
	      DstBlock		      "Goto2"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Scope
	  Name			  "Scope"
	  SID			  "151"
	  Ports			  [2]
	  Position		  [585, 14, 625, 96]
	  Floating		  off
	  Location		  [6, 49, 1286, 757]
	  Open			  off
	  NumInputPorts		  "2"
	  ZoomMode		  "yonly"
	  List {
	    ListType		    AxesTitles
	    axes1		    "%<SignalLabel>"
	    axes2		    "%<SignalLabel>"
	  }
	  YMin			  "-5~-5"
	  YMax			  "5~5"
	  SaveName		  "ScopeData2"
	  DataFormat		  "StructureWithTime"
	  MaxDataPoints		  "40000"
	  SampleTime		  "0"
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  Points		  [55, 0]
	  Branch {
	    Points		    [95, 0]
	    Branch {
	      Points		      [0, -130]
	      DstBlock		      "Gateway Out1"
	      DstPort		      1
	    }
	    Branch {
	      Labels		      [0, 0]
	      DstBlock		      "I/Q Buffer"
	      DstPort		      3
	    }
	  }
	  Branch {
	    Points		    [0, 150]
	    DstBlock		    "RSSI Buffer"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Addr"
	  SrcPort		  1
	  Points		  [75, 0]
	  Branch {
	    Points		    [0, -100]
	    DstBlock		    "Gateway Out"
	    DstPort		    1
	  }
	  Branch {
	    Labels		    [0, 0]
	    DstBlock		    "I/Q Buffer"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 150]
	    DstBlock		    "RSSI Buffer"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "WE"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "EN"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "I/Q"
	  SrcPort		  1
	  DstBlock		  "I/Q Buffer"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out"
	  SrcPort		  1
	  DstBlock		  "Scope"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gateway Out1"
	  SrcPort		  1
	  DstBlock		  "Scope"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "RSSI"
	  SrcPort		  1
	  DstBlock		  "RSSI Buffer"
	  DstPort		  2
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFA Input Reg 1"
      SID		      "4748"
      Ports		      [1, 1]
      Position		      [1645, 69, 1700, 91]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFA Input Reg 2"
      SID		      "4816"
      Ports		      [1, 1]
      Position		      [1645, 99, 1700, 121]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFA Input Reg 3"
      SID		      "4817"
      Ports		      [1, 1]
      Position		      [1645, 129, 1700, 151]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFA Input Reg 4"
      SID		      "4818"
      Ports		      [1, 1]
      Position		      [1645, 159, 1700, 181]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFA Input Reg 5"
      SID		      "4819"
      Ports		      [1, 1]
      Position		      [1645, 189, 1700, 211]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFA Inputs"
      SID		      "166"
      Ports		      [1, 2]
      Position		      [1240, 63, 1425, 127]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFA Inputs"
	Location		[403, 191, 2103, 1259]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "MGCAGC_AGCDCO_SEL"
	  SID			  "168"
	  Position		  [90, 238, 120, 252]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "ADC I"
	  SID			  "169"
	  Ports			  [1, 1]
	  Position		  [420, 223, 575, 267]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "ADC I"
	    Location		    [2, 82, 2558, 1387]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "MGCAGC_AGCDCO_SEL"
	      SID		      "763"
	      Position		      [175, 73, 205, 87]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "3677"
	      Position		      [55, 240, 85, 270]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant2"
	      SID		      "759"
	      Position		      [55, 150, 85, 180]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux3"
	      SID		      "765"
	      Ports		      [3, 1]
	      Position		      [440, 113, 485, 217]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,303"
	      block_type	      "mux"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFA_ADC_I"
	      SID		      "761"
	      Ports		      [1, 1]
	      Position		      [160, 155, 225, 175]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "14"
	      bin_pt		      "13"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFA_agc_filt_I"
	      SID		      "764"
	      Ports		      [1, 1]
	      Position		      [160, 245, 225, 265]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "16"
	      bin_pt		      "15"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "508,19,348,604"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "760"
	      Ports		      [1, 1]
	      Position		      [690, 151, 725, 179]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret2"
	      SID		      "3887"
	      Ports		      [1, 1]
	      Position		      [550, 155, 615, 175]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can change the signal be"
	      "tween signed and unsigned, and relocate the binary point.<br><br>Hardware notes: In hardware this block costs n"
	      "othing.<br><br>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is fo"
	      "rced to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an o"
	      "utput of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,309"
	      block_type	      "reinterpret"
	      block_version	      "8.2"
	      sg_icon_stat	      "65,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931"
	      " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor"
	      "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "ADC I"
	      SID		      "762"
	      Position		      [795, 158, 825, 172]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "ADC I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "RFA_ADC_I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "MGCAGC_AGCDCO_SEL"
	      SrcPort		      1
	      Points		      [165, 0; 0, 50]
	      DstBlock		      "Mux3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFA_agc_filt_I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFA_ADC_I"
	      SrcPort		      1
	      DstBlock		      "Mux3"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "RFA_agc_filt_I"
	      SrcPort		      1
	      Points		      [145, 0; 0, -55]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux3"
	      SrcPort		      1
	      DstBlock		      "Reinterpret2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Reinterpret2"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "ADC Q"
	  SID			  "185"
	  Ports			  [1, 1]
	  Position		  [420, 349, 575, 391]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "ADC Q"
	    Location		    [66, 91, 1078, 743]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "MGCAGC_AGCDCO_SEL"
	      SID		      "766"
	      Position		      [160, 48, 190, 62]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "3678"
	      Position		      [40, 205, 70, 235]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant2"
	      SID		      "767"
	      Position		      [40, 120, 70, 150]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux3"
	      SID		      "769"
	      Ports		      [3, 1]
	      Position		      [365, 83, 410, 187]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,303"
	      block_type	      "mux"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFA_ADC_Q"
	      SID		      "771"
	      Ports		      [1, 1]
	      Position		      [145, 125, 210, 145]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "14"
	      bin_pt		      "13"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFA_agc_filt_Q"
	      SID		      "768"
	      Ports		      [1, 1]
	      Position		      [145, 210, 210, 230]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "16"
	      bin_pt		      "15"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "770"
	      Ports		      [1, 1]
	      Position		      [620, 121, 655, 149]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret2"
	      SID		      "3891"
	      Ports		      [1, 1]
	      Position		      [480, 125, 545, 145]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can change the signal be"
	      "tween signed and unsigned, and relocate the binary point.<br><br>Hardware notes: In hardware this block costs n"
	      "othing.<br><br>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is fo"
	      "rced to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an o"
	      "utput of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,309"
	      block_type	      "reinterpret"
	      block_version	      "8.2"
	      sg_icon_stat	      "65,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931"
	      " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor"
	      "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "ADC Q"
	      SID		      "772"
	      Position		      [725, 128, 755, 142]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "ADC Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "RFA_ADC_Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFA_agc_filt_Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "MGCAGC_AGCDCO_SEL"
	      SrcPort		      1
	      Points		      [105, 0; 0, 45]
	      DstBlock		      "Mux3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFA_ADC_Q"
	      SrcPort		      1
	      DstBlock		      "Mux3"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "RFA_agc_filt_Q"
	      SrcPort		      1
	      Points		      [85, 0; 0, -50]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux3"
	      SrcPort		      1
	      DstBlock		      "Reinterpret2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Reinterpret2"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat5"
	  SID			  "3742"
	  Ports			  [2, 1]
	  Position		  [985, 265, 1010, 345]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,80,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 80 80 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[43.33 43.33 46"
	  ".33 43.33 46.33 46.33 46.33 43.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[40.33 40.33 43.33 43.33 40.3"
	  "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[37.33 37.33 40.33 40.33 37.33 ],[1 1 1 ]);\npatc"
	  "h([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33 34.33 37.33 37.33 34.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "2359"
	  Ports			  [1, 1]
	  Position		  [215, 105, 260, 135]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  SID			  "2336"
	  Ports			  [1, 1]
	  Position		  [300, 89, 360, 151]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  off
	  en			  on
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "counter"
	  sg_icon_stat		  "60,62,1,1,white,blue,0,b089e9c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 62 62 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 62 62 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[39.88 39.88 47.8"
	  "8 39.88 47.88 47.88 47.88 39.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[31.88 31.88 39.88 39.88 31.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[23.88 23.88 31.88 31.88 23.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[15.88 15.88 23.88 15.88 23.88 23.88 15.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'en"
	  "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From10"
	  SID			  "2351"
	  Position		  [15, 36, 150, 54]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "COUNTER_DATA_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out1"
	  SID			  "3816"
	  Ports			  [1, 1]
	  Position		  [1110, 40, 1140, 50]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out2"
	  SID			  "3817"
	  Ports			  [1, 1]
	  Position		  [1110, 55, 1140, 65]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out3"
	  SID			  "3818"
	  Ports			  [1, 1]
	  Position		  [1110, 70, 1140, 80]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out4"
	  SID			  "3819"
	  Ports			  [1, 1]
	  Position		  [1110, 85, 1140, 95]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out5"
	  SID			  "3820"
	  Ports			  [1, 1]
	  Position		  [1110, 100, 1140, 110]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "2339"
	  Ports			  [1, 1]
	  Position		  [520, 139, 575, 171]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "55,32,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 32 32 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[20.44 20.44 24.4"
	  "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([22."
	  "1 35.88 31.88 27.88 23.88 18.1 22.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf(''"
	  ",'COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "2338"
	  Ports			  [3, 1]
	  Position		  [800, 193, 845, 297]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux1"
	  SID			  "2345"
	  Ports			  [3, 1]
	  Position		  [800, 318, 845, 422]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux2"
	  SID			  "3827"
	  Ports			  [3, 1]
	  Position		  [800, 438, 845, 542]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Scope
	  Name			  "RFA Input"
	  SID			  "3821"
	  Ports			  [5]
	  Position		  [1245, 37, 1275, 113]
	  Floating		  off
	  Location		  [924, 557, 2309, 1265]
	  Open			  off
	  NumInputPorts		  "5"
	  ZoomMode		  "xonly"
	  List {
	    ListType		    AxesTitles
	    axes1		    "%<SignalLabel>"
	    axes2		    "%<SignalLabel>"
	    axes3		    "%<SignalLabel>"
	    axes4		    "%<SignalLabel>"
	    axes5		    "%<SignalLabel>"
	  }
	  TimeRange		  "70000"
	  YMin			  "0~0~0~0~0"
	  YMax			  "1~1~1~100~20000"
	  SaveName		  "ScopeData5"
	  DataFormat		  "StructureWithTime"
	  LimitDataPoints	  off
	  SampleTime		  "0"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RSSI"
	  SID			  "218"
	  Ports			  [0, 1]
	  Position		  [420, 472, 575, 508]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RSSI"
	    Location		    [2, 82, 1184, 734]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "220"
	      Position		      [160, 100, 190, 130]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFA_RSSI"
	      SID		      "223"
	      Ports		      [1, 1]
	      Position		      [280, 109, 335, 121]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, double and fixed point to  Xilinx"
	      " fixed point type.<P><P>Hardware notes:  In hardware these blocks become top level input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "10"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,432"
	      block_type	      "gatewayin"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]"
	      ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7."
	      "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1"
	      " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0."
	      "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "RSSI"
	      SID		      "224"
	      Position		      [740, 108, 770, 122]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFA_RSSI"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFA_RSSI"
	      SrcPort		      1
	      DstBlock		      "RSSI"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "2360"
	  Ports			  [1, 1]
	  Position		  [425, 106, 460, 134]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[11:2]"
	  SID			  "3826"
	  Ports			  [1, 1]
	  Position		  [690, 516, 730, 534]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "10"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "RSSI_OUT"
	  SID			  "226"
	  Position		  [1110, 483, 1140, 497]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "I/Q"
	  SID			  "227"
	  Position		  [1110, 298, 1140, 312]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "MGCAGC_AGCDCO_SEL"
	  SrcPort		  1
	  Points		  [75, 0]
	  Branch {
	    DstBlock		    "ADC I"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 125]
	    DstBlock		    "ADC Q"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "ADC I"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "ADC Q"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From10"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    Points		    [535, 0]
	    Branch {
	      Points		      [0, 165]
	      Branch {
		DstBlock		"Mux"
		DstPort			1
	      }
	      Branch {
		Points			[0, 125]
		Branch {
		  DstBlock		  "Mux1"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 120]
		  DstBlock		  "Mux2"
		  DstPort		  1
		}
	      }
	    }
	    Branch {
	      DstBlock		      "Gateway Out1"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, 75]
	    DstBlock		    "Convert"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  Points		  [20, 0]
	  Branch {
	    Points		    [0, 35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [205, 0; 0, 160]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  Points		  [80, 0; 0, 250]
	  Branch {
	    DstBlock		    "Mux1"
	    DstPort		    3
	  }
	  Branch {
	    Points		    [0, 120]
	    DstBlock		    "b[11:2]"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Concat5"
	  SrcPort		  1
	  Points		  [50, 0]
	  Branch {
	    DstBlock		    "I/Q"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -215]
	    DstBlock		    "Gateway Out4"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  Points		  [60, 0; 0, 40; 45, 0]
	  Branch {
	    DstBlock		    "Concat5"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -225]
	    DstBlock		    "Gateway Out2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  Points		  [60, 0; 0, -45; 60, 0]
	  Branch {
	    DstBlock		    "Concat5"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, -250]
	    DstBlock		    "Gateway Out3"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Gateway Out5"
	  SrcPort		  1
	  DstBlock		  "RFA Input"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "Gateway Out4"
	  SrcPort		  1
	  DstBlock		  "RFA Input"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Gateway Out3"
	  SrcPort		  1
	  DstBlock		  "RFA Input"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Gateway Out2"
	  SrcPort		  1
	  DstBlock		  "RFA Input"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out1"
	  SrcPort		  1
	  DstBlock		  "RFA Input"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux2"
	  SrcPort		  1
	  Points		  [230, 0]
	  Branch {
	    DstBlock		    "RSSI_OUT"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -385]
	    DstBlock		    "Gateway Out5"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "RSSI"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "b[11:2]"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  3
	}
	Annotation {
	  Name			  "NOTE:  We have RSSI use bits [11:2] of the counter since we sample RSSI 4x slower than IQ data."
	  Position		  [781, 574]
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFA Mux"
      SID		      "3373"
      Ports		      [5, 1]
      Position		      [1535, 772, 1565, 878]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "4"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "30,106,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.1429 90.8571 106 "
      "0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.1429 90.8571 106 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15"
      ".88 10.1 6.1 ],[57.44 57.44 61.44 57.44 61.44 61.44 61.44 57.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ]"
      ",[53.44 53.44 57.44 57.44 53.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[49.44 49.44 53.44 5"
      "3.44 49.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[45.44 45.44 49.44 45.44 49.44 49.44 45."
      "44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n"
      "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab"
      "el('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\nc"
      "olor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFA Output Reg "
      SID		      "3377"
      Ports		      [1, 1]
      Position		      [1645, 814, 1700, 836]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFA Outputs"
      SID		      "228"
      Ports		      [1]
      Position		      [1930, 801, 1980, 849]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFA Outputs"
	Location		[742, 491, 1818, 948]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "32b"
	  SID			  "673"
	  Position		  [85, 238, 115, 252]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "16LSB"
	  SID			  "674"
	  Ports			  [1, 1]
	  Position		  [265, 237, 305, 253]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware "
	  "notes: In hardware this block costs nothing."
	  nbits			  "16"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,442,407"
	  block_type		  "slice"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "16MSB"
	  SID			  "675"
	  Ports			  [1, 1]
	  Position		  [265, 181, 305, 199]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware "
	  "notes: In hardware this block costs nothing."
	  nbits			  "16"
	  boolean_output	  off
	  mode			  "Upper Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,442,407"
	  block_type		  "slice"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "676"
	  Ports			  [1, 1]
	  Position		  [480, 175, 525, 205]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Signed  (2's comp)"
	  n_bits		  "16"
	  bin_pt		  "15"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "677"
	  Ports			  [1, 1]
	  Position		  [480, 230, 525, 260]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Signed  (2's comp)"
	  n_bits		  "16"
	  bin_pt		  "15"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA_DAC_I"
	  SID			  "684"
	  Ports			  [1, 1]
	  Position		  [750, 180, 810, 200]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA_DAC_Q"
	  SID			  "685"
	  Ports			  [1, 1]
	  Position		  [750, 235, 810, 255]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register"
	  SID			  "678"
	  Ports			  [1, 1]
	  Position		  [625, 176, 660, 204]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "679"
	  Ports			  [1, 1]
	  Position		  [625, 231, 660, 259]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret"
	  SID			  "680"
	  Ports			  [1, 1]
	  Position		  [365, 180, 410, 200]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the binary representation.   You can changed the signal between s"
	  "igned and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>"
	  "Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned wi"
	  "th 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in "
	  "binary)."
	  force_arith_type	  on
	  arith_type		  "Signed  (2's comp)"
	  force_bin_pt		  on
	  bin_pt		  "15"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,309"
	  block_type		  "reinterpret"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret1"
	  SID			  "681"
	  Ports			  [1, 1]
	  Position		  [365, 235, 410, 255]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the binary representation.   You can changed the signal between s"
	  "igned and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>"
	  "Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned wi"
	  "th 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in "
	  "binary)."
	  force_arith_type	  on
	  arith_type		  "Signed  (2's comp)"
	  force_bin_pt		  on
	  bin_pt		  "15"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,309"
	  block_type		  "reinterpret"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "682"
	  Position		  [870, 180, 890, 200]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "683"
	  Position		  [870, 235, 890, 255]
	  ShowName		  off
	}
	Line {
	  SrcBlock		  "RFA_DAC_Q"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFA_DAC_I"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Reinterpret1"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Reinterpret"
	  SrcPort		  1
	  DstBlock		  "Convert"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "16LSB"
	  SrcPort		  1
	  DstBlock		  "Reinterpret1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "16MSB"
	  SrcPort		  1
	  DstBlock		  "Reinterpret"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register"
	  SrcPort		  1
	  DstBlock		  "RFA_DAC_I"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  DstBlock		  "RFA_DAC_Q"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "32b"
	  SrcPort		  1
	  Points		  [65, 0]
	  Branch {
	    Points		    [0, -55]
	    DstBlock		    "16MSB"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "16LSB"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  DstBlock		  "Register"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFA Tx Buffers"
      SID		      "1081"
      Ports		      [3, 1]
      Position		      [1220, 806, 1300, 864]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFA Tx Buffers"
	Location		[624, 210, 2424, 1361]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "RdAddr"
	  SID			  "1082"
	  Position		  [230, 458, 260, 472]
	  NamePlacement		  "alternate"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "Rst"
	  SID			  "1083"
	  Position		  [470, 258, 500, 272]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "En"
	  SID			  "1084"
	  Position		  [470, 288, 500, 302]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+0"
	  SID			  "1312"
	  Ports			  [1, 1]
	  Position		  [565, 486, 610, 504]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+16"
	  SID			  "1313"
	  Ports			  [1, 1]
	  Position		  [565, 566, 610, 584]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "16"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+24"
	  SID			  "1314"
	  Ports			  [1, 1]
	  Position		  [565, 606, 610, 624]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "24"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+8"
	  SID			  "1315"
	  Ports			  [1, 1]
	  Position		  [565, 526, 610, 544]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "8"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat1"
	  SID			  "1318"
	  Ports			  [4, 1]
	  Position		  [675, 471, 720, 639]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[90.66 90.66"
	  " 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84.66 90.66 90.66 8"
	  "4.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78.66 ],[1 1 1 ]);\npa"
	  "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 ],[0.931 0.946 0.973 ]);"
	  "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
	  "put',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode',"
	  "'on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "1085"
	  Ports			  [0, 1]
	  Position		  [1025, 340, 1050, 360]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
	  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
	  "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprin"
	  "tf('','COMMENT: end icon text');"
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	Block {
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	  SourceType		  "Xilinx Type Converter Block"
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	  gui_display_data_type	  "Fixed-point"
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	Block {
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	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
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	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
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	  align_bp		  on
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	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
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	  sg_icon_stat		  "55,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
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    Block {
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      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFB\nRx Buffers"
	Location		[2, 82, 1270, 734]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "RSSI"
	  SID			  "241"
	  Position		  [450, 313, 480, 327]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "I/Q"
	  SID			  "242"
	  Position		  [545, 163, 575, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "Addr"
	  SID			  "243"
	  Position		  [325, 128, 355, 142]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "WE"
	  SID			  "244"
	  Position		  [110, 183, 140, 197]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "EN"
	  SID			  "245"
	  Position		  [110, 213, 140, 227]
	  Port			  "5"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "246"
	  Ports			  [1, 1]
	  Position		  [185, 212, 210, 228]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,374,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12.2"
	  "2 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0."
	  "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16.44 "
	  "14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en"
	  "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out"
	  SID			  "247"
	  Ports			  [1, 1]
	  Position		  [500, 30, 530, 40]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out1"
	  SID			  "248"
	  Ports			  [1, 1]
	  Position		  [500, 70, 530, 80]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "I/Q Buffer"
	  SID			  "1151"
	  Ports			  [3]
	  Position		  [645, 115, 700, 225]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "I/Q Buffer"
	    Location		    [151, 125, 2077, 1440]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Addr"
	      SID		      "1152"
	      Position		      [1170, 208, 1200, 222]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "I/Q_32b"
	      SID		      "1153"
	      Position		      [700, 238, 730, 252]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "WE"
	      SID		      "1154"
	      Position		      [1170, 268, 1200, 282]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+0"
	      SID		      "1204"
	      Ports		      [1, 1]
	      Position		      [795, 301, 840, 319]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+16"
	      SID		      "1205"
	      Ports		      [1, 1]
	      Position		      [795, 381, 840, 399]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+24"
	      SID		      "1206"
	      Ports		      [1, 1]
	      Position		      [795, 421, 840, 439]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+8"
	      SID		      "1207"
	      Ports		      [1, 1]
	      Position		      [795, 341, 840, 359]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "1208"
	      Ports		      [4, 1]
	      Position		      [905, 286, 950, 454]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "4"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],"
	      "[90.66 90.66 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84."
	      "66 90.66 90.66 84.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78"
	      ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 "
	      "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc"
	      "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');dis"
	      "p('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      From
	      Name		      "From"
	      SID		      "3868"
	      Position		      [650, 199, 780, 221]
	      ZOrder		      -9
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto18"
	      SID		      "2196"
	      Position		      [1305, 236, 1455, 254]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_RX_DIN"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto19"
	      SID		      "2197"
	      Position		      [1305, 266, 1455, 284]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_RX_WE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto20"
	      SID		      "2198"
	      Position		      [1305, 206, 1455, 224]
	      ShowName		      off
	      GotoTag		      "RFB_IQ_RX_ADDR"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux"
	      SID		      "1210"
	      Ports		      [3, 1]
	      Position		      [1055, 193, 1100, 297]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "14"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "mux"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Line {
	      SrcBlock		      "WE"
	      SrcPort		      1
	      DstBlock		      "Goto19"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "I/Q_32b"
	      SrcPort		      1
	      Points		      [30, 0]
	      Branch {
		DstBlock		"Mux"
		DstPort			2
	      }
	      Branch {
		Points			[0, 65]
		Branch {
		  DstBlock		  "8LSB+0"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 40]
		  Branch {
		    DstBlock		    "8LSB+8"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 40]
		    Branch {
		    DstBlock		    "8LSB+16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 40]
		    DstBlock		    "8LSB+24"
		    DstPort		    1
		    }
		  }
		}
	      }
	    }
	    Line {
	      SrcBlock		      "Addr"
	      SrcPort		      1
	      DstBlock		      "Goto20"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Mux"
	      SrcPort		      1
	      DstBlock		      "Goto18"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+0"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+8"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+16"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "8LSB+24"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [35, 0; 0, -90]
	      DstBlock		      "Mux"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "From"
	      SrcPort		      1
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "249"
	  Ports			  [2, 1]
	  Position		  [255, 175, 310, 235]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37.77 37.7"
	  "7 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30.77 37.77 37"
	  ".77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.77 23.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77 16.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('and');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RSSI Buffer"
	  SID			  "1265"
	  Ports			  [3]
	  Position		  [645, 264, 700, 376]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RSSI Buffer"
	    Location		    [-91, 104, 2465, 1410]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Addr"
	      SID		      "1266"
	      Position		      [475, 343, 505, 357]
	      NamePlacement	      "alternate"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI"
	      SID		      "1267"
	      Position		      [245, 403, 275, 417]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "WE"
	      SID		      "1268"
	      Position		      [1295, 473, 1325, 487]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+0"
	      SID		      "1270"
	      Ports		      [1, 1]
	      Position		      [955, 496, 1000, 514]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+16"
	      SID		      "1271"
	      Ports		      [1, 1]
	      Position		      [955, 576, 1000, 594]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+24"
	      SID		      "1272"
	      Ports		      [1, 1]
	      Position		      [955, 616, 1000, 634]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+8"
	      SID		      "1273"
	      Ports		      [1, 1]
	      Position		      [955, 536, 1000, 554]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "BIT[2]"
	      SID		      "1274"
	      Ports		      [1, 1]
	      Position		      [580, 421, 620, 439]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P>"
	      "<P>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      on
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "2"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,407"
	      block_type	      "slice"
	      block_version	      "8.2"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "1275"
	      Ports		      [2, 1]
	      Position		      [835, 401, 875, 479]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "2"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "40,78,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 78 78 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 78 78 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[44.55"
	      " 44.55 49.55 44.55 49.55 49.55 49.55 44.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[39.55 39.55 44"
	      ".55 44.55 39.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[34.55 34.55 39.55 39.55 34.55 "
	      "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[29.55 29.55 34.55 29.55 34.55 34.55 29.55 ],[0."
	      "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor("
	      "'black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\font"
	      "size{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat1"
	      SID		      "1276"
	      Ports		      [4, 1]
	      Position		      [1065, 481, 1110, 649]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "4"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],"
	      "[90.66 90.66 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84."
	      "66 90.66 90.66 84.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78"
	      ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 "
	      "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc"
	      "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');dis"
	      "p('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert"
	      SID		      "1277"
	      Ports		      [1, 1]
	      Position		      [435, 402, 470, 418]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,461,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      From
	      Name		      "From"
	      SID		      "3869"
	      Position		      [955, 394, 1085, 416]
	      ZOrder		      -9
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto1"
	      SID		      "2203"
	      Position		      [1380, 341, 1530, 359]
	      ShowName		      off
	      GotoTag		      "RFB_RSSI_ADDR"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto3"
	      SID		      "2201"
	      Position		      [1380, 431, 1530, 449]
	      ShowName		      off
	      GotoTag		      "RFB_RSSI_DIN"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto4"
	      SID		      "2202"
	      Position		      [1380, 471, 1530, 489]
	      ShowName		      off
	      GotoTag		      "RFB_RSSI_WE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto5"
	      SID		      "1279"
	      Position		      [435, 267, 595, 293]
	      ShowName		      off
	      GotoTag		      "RFB_RSSI"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "1280"
	      Ports		      [1, 1]
	      Position		      [660, 422, 690, 438]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,251"
	      block_type	      "inv"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla"
	      "ck');disp('not');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "LSB + 3"
	      SID		      "1423"
	      Ports		      [1, 1]
	      Position		      [580, 341, 620, 359]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "ceil(log2(NumSamps_Rx_RSSI))-1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "LSB of Input"
	      bit0		      "3"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,407"
	      block_type	      "slice"
	      block_version	      "8.2"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux"
	      SID		      "1281"
	      Ports		      [3, 1]
	      Position		      [1215, 388, 1260, 492]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "14"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "mux"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "1282"
	      Ports		      [2, 1]
	      Position		      [730, 398, 775, 442]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "45,44,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28."
	      "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2"
	      "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('ou"
	      "tput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret1"
	      SID		      "1283"
	      Ports		      [1, 1]
	      Position		      [330, 402, 365, 418]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can changed the signal b"
	      "etween signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs no"
	      "thing.<P><P>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force"
	      "d to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp"
	      "ut of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "436,54,356,312"
	      block_type	      "reinterpret"
	      block_version	      "9.1.01"
	      sg_icon_stat	      "35,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla"
	      "ck');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Line {
	      SrcBlock		      "RSSI"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		Points			[0, -130]
		DstBlock		"Goto5"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Reinterpret1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Convert"
	      SrcPort		      1
	      Points		      [35, 0]
	      Branch {
		DstBlock		"Register"
		DstPort			1
	      }
	      Branch {
		Points			[0, 50]
		DstBlock		"Concat"
		DstPort			2
	      }
	    }
	    Line {
	      SrcBlock		      "Addr"
	      SrcPort		      1
	      Points		      [40, 0]
	      Branch {
		Points			[0, 80]
		DstBlock		"BIT[2]"
		DstPort			1
	      }
	      Branch {
		DstBlock		"LSB + 3"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Reinterpret1"
	      SrcPort		      1
	      DstBlock		      "Convert"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [45, 0]
	      Branch {
		Points			[0, 65]
		Branch {
		  DstBlock		  "8LSB+0"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 40]
		  Branch {
		    DstBlock		    "8LSB+8"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 40]
		    Branch {
		    DstBlock		    "8LSB+16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 40]
		    DstBlock		    "8LSB+24"
		    DstPort		    1
		    }
		  }
		}
	      }
	      Branch {
		Points			[0, 0]
		DstBlock		"Mux"
		DstPort			2
	      }
	    }
	    Line {
	      SrcBlock		      "BIT[2]"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "LSB + 3"
	      SrcPort		      1
	      DstBlock		      "Goto1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+0"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+8"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+16"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "8LSB+24"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Concat1"
	      SrcPort		      1
	      Points		      [35, 0; 0, -90]
	      DstBlock		      "Mux"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux"
	      SrcPort		      1
	      DstBlock		      "Goto3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "WE"
	      SrcPort		      1
	      DstBlock		      "Goto4"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "From"
	      SrcPort		      1
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Scope
	  Name			  "Scope"
	  SID			  "269"
	  Ports			  [2]
	  Position		  [585, 14, 625, 96]
	  Floating		  off
	  Location		  [5, 49, 1285, 757]
	  Open			  off
	  NumInputPorts		  "2"
	  ZoomMode		  "yonly"
	  List {
	    ListType		    AxesTitles
	    axes1		    "%<SignalLabel>"
	    axes2		    "%<SignalLabel>"
	  }
	  YMin			  "-5~-5"
	  YMax			  "5~5"
	  SaveName		  "ScopeData2"
	  DataFormat		  "StructureWithTime"
	  MaxDataPoints		  "40000"
	  SampleTime		  "0"
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    Points		    [105, 0]
	    Branch {
	      Points		      [0, -130]
	      DstBlock		      "Gateway Out1"
	      DstPort		      1
	    }
	    Branch {
	      Labels		      [0, 0]
	      DstBlock		      "I/Q Buffer"
	      DstPort		      3
	    }
	  }
	  Branch {
	    Points		    [0, 150]
	    DstBlock		    "RSSI Buffer"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Addr"
	  SrcPort		  1
	  Points		  [75, 0]
	  Branch {
	    Points		    [0, -100]
	    DstBlock		    "Gateway Out"
	    DstPort		    1
	  }
	  Branch {
	    Labels		    [0, 0]
	    DstBlock		    "I/Q Buffer"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 150]
	    DstBlock		    "RSSI Buffer"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "WE"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "EN"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "I/Q"
	  SrcPort		  1
	  DstBlock		  "I/Q Buffer"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out"
	  SrcPort		  1
	  DstBlock		  "Scope"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gateway Out1"
	  SrcPort		  1
	  DstBlock		  "Scope"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "RSSI"
	  SrcPort		  1
	  DstBlock		  "RSSI Buffer"
	  DstPort		  2
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFB Input Reg1"
      SID		      "4752"
      Ports		      [1, 1]
      Position		      [1645, 254, 1700, 276]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFB Input Reg2"
      SID		      "4812"
      Ports		      [1, 1]
      Position		      [1645, 284, 1700, 306]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFB Input Reg3"
      SID		      "4813"
      Ports		      [1, 1]
      Position		      [1645, 314, 1700, 336]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFB Input Reg4"
      SID		      "4814"
      Ports		      [1, 1]
      Position		      [1645, 344, 1700, 366]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFB Input Reg5"
      SID		      "4815"
      Ports		      [1, 1]
      Position		      [1645, 374, 1700, 396]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFB Inputs"
      SID		      "784"
      Ports		      [1, 2]
      Position		      [1240, 249, 1425, 311]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFB Inputs"
	Location		[534, 197, 1546, 748]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "MGCAGC_AGCDCO_SEL"
	  SID			  "785"
	  Position		  [140, 248, 170, 262]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "ADC I"
	  SID			  "786"
	  Ports			  [1, 1]
	  Position		  [470, 233, 625, 277]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "ADC I"
	    Location		    [2, 82, 2558, 1387]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "MGCAGC_AGCDCO_SEL"
	      SID		      "787"
	      Position		      [175, 73, 205, 87]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "3679"
	      Position		      [55, 240, 85, 270]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant2"
	      SID		      "788"
	      Position		      [55, 150, 85, 180]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux3"
	      SID		      "790"
	      Ports		      [3, 1]
	      Position		      [370, 113, 415, 217]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,303"
	      block_type	      "mux"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFB_ADC_I"
	      SID		      "792"
	      Ports		      [1, 1]
	      Position		      [160, 155, 225, 175]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "14"
	      bin_pt		      "13"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFB_agc_filt_I"
	      SID		      "789"
	      Ports		      [1, 1]
	      Position		      [160, 245, 225, 265]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "16"
	      bin_pt		      "15"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "791"
	      Ports		      [1, 1]
	      Position		      [605, 151, 640, 179]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret2"
	      SID		      "3895"
	      Ports		      [1, 1]
	      Position		      [475, 155, 540, 175]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can change the signal be"
	      "tween signed and unsigned, and relocate the binary point.<br><br>Hardware notes: In hardware this block costs n"
	      "othing.<br><br>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is fo"
	      "rced to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an o"
	      "utput of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,309"
	      block_type	      "reinterpret"
	      block_version	      "8.2"
	      sg_icon_stat	      "65,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931"
	      " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor"
	      "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "ADC I"
	      SID		      "793"
	      Position		      [710, 158, 740, 172]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "RFB_ADC_I"
	      SrcPort		      1
	      DstBlock		      "Mux3"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "MGCAGC_AGCDCO_SEL"
	      SrcPort		      1
	      Points		      [120, 0; 0, 50]
	      DstBlock		      "Mux3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "RFB_ADC_I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "ADC I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFB_agc_filt_I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFB_agc_filt_I"
	      SrcPort		      1
	      Points		      [100, 0; 0, -55]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux3"
	      SrcPort		      1
	      DstBlock		      "Reinterpret2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Reinterpret2"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "ADC Q"
	  SID			  "794"
	  Ports			  [1, 1]
	  Position		  [470, 359, 625, 401]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "ADC Q"
	    Location		    [66, 91, 1078, 743]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "MGCAGC_AGCDCO_SEL"
	      SID		      "795"
	      Position		      [160, 43, 190, 57]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "3680"
	      Position		      [40, 210, 70, 240]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant2"
	      SID		      "796"
	      Position		      [40, 120, 70, 150]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux3"
	      SID		      "798"
	      Ports		      [3, 1]
	      Position		      [355, 83, 400, 187]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,303"
	      block_type	      "mux"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFB_ADC_Q"
	      SID		      "800"
	      Ports		      [1, 1]
	      Position		      [145, 125, 210, 145]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "14"
	      bin_pt		      "13"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFB_agc_filt_Q"
	      SID		      "797"
	      Ports		      [1, 1]
	      Position		      [145, 215, 210, 235]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "16"
	      bin_pt		      "15"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "799"
	      Ports		      [1, 1]
	      Position		      [595, 121, 630, 149]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret2"
	      SID		      "3896"
	      Ports		      [1, 1]
	      Position		      [465, 125, 530, 145]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can change the signal be"
	      "tween signed and unsigned, and relocate the binary point.<br><br>Hardware notes: In hardware this block costs n"
	      "othing.<br><br>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is fo"
	      "rced to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an o"
	      "utput of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,309"
	      block_type	      "reinterpret"
	      block_version	      "8.2"
	      sg_icon_stat	      "65,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931"
	      " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor"
	      "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "ADC Q"
	      SID		      "801"
	      Position		      [700, 128, 730, 142]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "RFB_ADC_Q"
	      SrcPort		      1
	      DstBlock		      "Mux3"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "MGCAGC_AGCDCO_SEL"
	      SrcPort		      1
	      Points		      [120, 0; 0, 50]
	      DstBlock		      "Mux3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "RFB_ADC_Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "ADC Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFB_agc_filt_Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFB_agc_filt_Q"
	      SrcPort		      1
	      Points		      [100, 0; 0, -55]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux3"
	      SrcPort		      1
	      DstBlock		      "Reinterpret2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Reinterpret2"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat5"
	  SID			  "3745"
	  Ports			  [2, 1]
	  Position		  [1050, 275, 1075, 355]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,80,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 80 80 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[43.33 43.33 46"
	  ".33 43.33 46.33 46.33 46.33 43.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[40.33 40.33 43.33 43.33 40.3"
	  "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[37.33 37.33 40.33 40.33 37.33 ],[1 1 1 ]);\npatc"
	  "h([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33 34.33 37.33 37.33 34.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "2676"
	  Ports			  [1, 1]
	  Position		  [265, 115, 310, 145]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  SID			  "2677"
	  Ports			  [1, 1]
	  Position		  [350, 100, 410, 160]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  off
	  en			  on
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "counter"
	  sg_icon_stat		  "60,60,1,1,white,blue,0,b089e9c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'en"
	  "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From10"
	  SID			  "2678"
	  Position		  [15, 46, 150, 64]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "COUNTER_DATA_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "2679"
	  Ports			  [1, 1]
	  Position		  [570, 149, 625, 181]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "55,32,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 32 32 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[20.44 20.44 24.4"
	  "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([22."
	  "1 35.88 31.88 27.88 23.88 18.1 22.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf(''"
	  ",'COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "2680"
	  Ports			  [3, 1]
	  Position		  [850, 203, 895, 307]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux1"
	  SID			  "2681"
	  Ports			  [3, 1]
	  Position		  [850, 328, 895, 432]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux2"
	  SID			  "3828"
	  Ports			  [3, 1]
	  Position		  [850, 458, 895, 562]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RSSI"
	  SID			  "813"
	  Ports			  [0, 1]
	  Position		  [470, 492, 625, 528]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RSSI"
	    Location		    [2, 82, 1184, 734]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "814"
	      Position		      [160, 100, 190, 130]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFB_RSSI"
	      SID		      "815"
	      Ports		      [1, 1]
	      Position		      [280, 109, 335, 121]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, double and fixed point to  Xilinx"
	      " fixed point type.<P><P>Hardware notes:  In hardware these blocks become top level input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "10"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,432"
	      block_type	      "gatewayin"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]"
	      ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7."
	      "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1"
	      " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0."
	      "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "RSSI"
	      SID		      "816"
	      Position		      [740, 108, 770, 122]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "RFB_RSSI"
	      SrcPort		      1
	      DstBlock		      "RSSI"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFB_RSSI"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "2682"
	  Ports			  [1, 1]
	  Position		  [475, 116, 510, 144]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[11:2]"
	  SID			  "3829"
	  Ports			  [1, 1]
	  Position		  [740, 536, 780, 554]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "10"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "RSSI_OUT"
	  SID			  "817"
	  Position		  [1145, 503, 1175, 517]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "I/Q"
	  SID			  "818"
	  Position		  [1145, 308, 1175, 322]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "MGCAGC_AGCDCO_SEL"
	  SrcPort		  1
	  Points		  [75, 0]
	  Branch {
	    DstBlock		    "ADC I"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 125]
	    DstBlock		    "ADC Q"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "ADC I"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "ADC Q"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From10"
	  SrcPort		  1
	  Points		  [90, 0]
	  Branch {
	    Points		    [525, 0; 0, 165]
	    Branch {
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 125]
	      Branch {
		DstBlock		"Mux1"
		DstPort			1
	      }
	      Branch {
		Points			[0, 130]
		DstBlock		"Mux2"
		DstPort			1
	      }
	    }
	  }
	  Branch {
	    Points		    [0, 75]
	    DstBlock		    "Convert"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  Points		  [20, 0]
	  Branch {
	    Points		    [0, 35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [205, 0; 0, 160]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  Points		  [80, 0; 0, 250]
	  Branch {
	    DstBlock		    "Mux1"
	    DstPort		    3
	  }
	  Branch {
	    Points		    [0, 130]
	    DstBlock		    "b[11:2]"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  Points		  [65, 0; 0, 40]
	  DstBlock		  "Concat5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  Points		  [65, 0; 0, -45]
	  DstBlock		  "Concat5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Concat5"
	  SrcPort		  1
	  DstBlock		  "I/Q"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[11:2]"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Mux2"
	  SrcPort		  1
	  DstBlock		  "RSSI_OUT"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RSSI"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  2
	}
	Annotation {
	  Name			  "NOTE:  We have RSSI use bits [11:2] of the counter since we sample RSSI 4x slower than IQ data."
	  Position		  [776, 599]
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFB Mux"
      SID		      "3374"
      Ports		      [5, 1]
      Position		      [1535, 912, 1565, 1018]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "4"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "30,106,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.1429 90.8571 106 "
      "0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.1429 90.8571 106 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15"
      ".88 10.1 6.1 ],[57.44 57.44 61.44 57.44 61.44 61.44 61.44 57.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ]"
      ",[53.44 53.44 57.44 57.44 53.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[49.44 49.44 53.44 5"
      "3.44 49.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[45.44 45.44 49.44 45.44 49.44 49.44 45."
      "44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n"
      "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab"
      "el('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\nc"
      "olor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFB Output Reg"
      SID		      "3378"
      Ports		      [1, 1]
      Position		      [1645, 954, 1700, 976]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFB Outputs"
      SID		      "686"
      Ports		      [1]
      Position		      [1930, 941, 1980, 989]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFB Outputs"
	Location		[2, 82, 1078, 539]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "32b"
	  SID			  "687"
	  Position		  [85, 238, 115, 252]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "16LSB"
	  SID			  "688"
	  Ports			  [1, 1]
	  Position		  [265, 237, 305, 253]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware "
	  "notes: In hardware this block costs nothing."
	  nbits			  "16"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,442,407"
	  block_type		  "slice"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "16MSB"
	  SID			  "689"
	  Ports			  [1, 1]
	  Position		  [265, 181, 305, 199]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware "
	  "notes: In hardware this block costs nothing."
	  nbits			  "16"
	  boolean_output	  off
	  mode			  "Upper Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,442,407"
	  block_type		  "slice"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "690"
	  Ports			  [1, 1]
	  Position		  [480, 175, 525, 205]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Signed  (2's comp)"
	  n_bits		  "16"
	  bin_pt		  "15"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "691"
	  Ports			  [1, 1]
	  Position		  [480, 230, 525, 260]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Signed  (2's comp)"
	  n_bits		  "16"
	  bin_pt		  "15"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFB_DAC_I"
	  SID			  "698"
	  Ports			  [1, 1]
	  Position		  [750, 180, 810, 200]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFB_DAC_Q"
	  SID			  "699"
	  Ports			  [1, 1]
	  Position		  [750, 235, 810, 255]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register"
	  SID			  "692"
	  Ports			  [1, 1]
	  Position		  [625, 176, 660, 204]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "693"
	  Ports			  [1, 1]
	  Position		  [625, 231, 660, 259]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret"
	  SID			  "694"
	  Ports			  [1, 1]
	  Position		  [365, 180, 410, 200]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the binary representation.   You can changed the signal between s"
	  "igned and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>"
	  "Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned wi"
	  "th 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in "
	  "binary)."
	  force_arith_type	  on
	  arith_type		  "Signed  (2's comp)"
	  force_bin_pt		  on
	  bin_pt		  "15"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,309"
	  block_type		  "reinterpret"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret1"
	  SID			  "695"
	  Ports			  [1, 1]
	  Position		  [365, 235, 410, 255]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the binary representation.   You can changed the signal between s"
	  "igned and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>"
	  "Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned wi"
	  "th 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in "
	  "binary)."
	  force_arith_type	  on
	  arith_type		  "Signed  (2's comp)"
	  force_bin_pt		  on
	  bin_pt		  "15"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,309"
	  block_type		  "reinterpret"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "696"
	  Position		  [870, 180, 890, 200]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "697"
	  Position		  [870, 235, 890, 255]
	  ShowName		  off
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  DstBlock		  "Register"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "32b"
	  SrcPort		  1
	  Points		  [65, 0]
	  Branch {
	    DstBlock		    "16LSB"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -55]
	    DstBlock		    "16MSB"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  DstBlock		  "RFB_DAC_Q"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register"
	  SrcPort		  1
	  DstBlock		  "RFB_DAC_I"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "16MSB"
	  SrcPort		  1
	  DstBlock		  "Reinterpret"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "16LSB"
	  SrcPort		  1
	  DstBlock		  "Reinterpret1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Reinterpret"
	  SrcPort		  1
	  DstBlock		  "Convert"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Reinterpret1"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFB_DAC_I"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFB_DAC_Q"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFB Tx Buffers"
      SID		      "1328"
      Ports		      [3, 1]
      Position		      [1220, 944, 1300, 1006]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFB Tx Buffers"
	Location		[-69, 89, 2487, 1395]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "RdAddr"
	  SID			  "1329"
	  Position		  [230, 458, 260, 472]
	  NamePlacement		  "alternate"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "Rst"
	  SID			  "1330"
	  Position		  [455, 258, 485, 272]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "En"
	  SID			  "1331"
	  Position		  [455, 288, 485, 302]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+0"
	  SID			  "1332"
	  Ports			  [1, 1]
	  Position		  [565, 486, 610, 504]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+16"
	  SID			  "1333"
	  Ports			  [1, 1]
	  Position		  [565, 566, 610, 584]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "16"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+24"
	  SID			  "1334"
	  Ports			  [1, 1]
	  Position		  [565, 606, 610, 624]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "24"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+8"
	  SID			  "1335"
	  Ports			  [1, 1]
	  Position		  [565, 526, 610, 544]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "8"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat1"
	  SID			  "1336"
	  Ports			  [4, 1]
	  Position		  [675, 471, 720, 639]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[90.66 90.66"
	  " 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84.66 90.66 90.66 8"
	  "4.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78.66 ],[1 1 1 ]);\npa"
	  "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 ],[0.931 0.946 0.973 ]);"
	  "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
	  "put',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode',"
	  "'on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "1337"
	  Ports			  [0, 1]
	  Position		  [1025, 340, 1050, 360]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
	  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
	  "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "1340"
	  Ports			  [1, 1]
	  Position		  [990, 273, 1015, 287]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,374,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.22 11.22 "
	  "9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931 0."
	  "946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.55 16.44 14.44 "
	  "12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon"
	  " graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprintf('',"
	  "'COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "1341"
	  Ports			  [1, 1]
	  Position		  [740, 288, 760, 302]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
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	  fraction_bits		  "24"
	  quantization		  "Truncate"
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	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
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	  sg_icon_stat		  "20,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 9"
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	  "44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon gra"
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	Block {
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	Block {
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	Block {
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	Block {
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	  dbl_ovrd		  off
	  xl_use_area		  off
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	Block {
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	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
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	  align_bp		  on
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	  xl_use_area		  off
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	  sg_icon_stat		  "55,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
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	  block_type		  "register"
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	Line {
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	Line {
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      block_type	      "register"
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    Block {
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	  block_version		  "8.2"
	  sg_icon_stat		  "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12.2"
	  "2 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0."
	  "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16.44 "
	  "14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en"
	  "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out"
	  SID			  "365"
	  Ports			  [1, 1]
	  Position		  [500, 30, 530, 40]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out1"
	  SID			  "366"
	  Ports			  [1, 1]
	  Position		  [500, 70, 530, 80]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "I/Q Buffer"
	  SID			  "1157"
	  Ports			  [3]
	  Position		  [650, 115, 705, 225]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "I/Q Buffer"
	    Location		    [151, 125, 2077, 1440]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Addr"
	      SID		      "1158"
	      Position		      [1185, 223, 1215, 237]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "I/Q_32b"
	      SID		      "1159"
	      Position		      [695, 253, 725, 267]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "WE"
	      SID		      "1160"
	      Position		      [1185, 283, 1215, 297]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+0"
	      SID		      "1216"
	      Ports		      [1, 1]
	      Position		      [790, 316, 835, 334]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+16"
	      SID		      "1217"
	      Ports		      [1, 1]
	      Position		      [790, 396, 835, 414]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+24"
	      SID		      "1218"
	      Ports		      [1, 1]
	      Position		      [790, 436, 835, 454]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+8"
	      SID		      "1219"
	      Ports		      [1, 1]
	      Position		      [790, 356, 835, 374]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "1220"
	      Ports		      [4, 1]
	      Position		      [900, 301, 945, 469]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "4"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],"
	      "[90.66 90.66 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84."
	      "66 90.66 90.66 84.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78"
	      ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 "
	      "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc"
	      "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');dis"
	      "p('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      From
	      Name		      "From"
	      SID		      "3870"
	      Position		      [645, 214, 775, 236]
	      ZOrder		      -9
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto21"
	      SID		      "2211"
	      Position		      [1290, 251, 1440, 269]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_RX_DIN"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto22"
	      SID		      "2212"
	      Position		      [1290, 281, 1440, 299]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_RX_WE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto23"
	      SID		      "2213"
	      Position		      [1290, 221, 1440, 239]
	      ShowName		      off
	      GotoTag		      "RFC_IQ_RX_ADDR"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux"
	      SID		      "1222"
	      Ports		      [3, 1]
	      Position		      [1050, 208, 1095, 312]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "14"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "mux"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Line {
	      SrcBlock		      "I/Q_32b"
	      SrcPort		      1
	      Points		      [30, 0]
	      Branch {
		DstBlock		"Mux"
		DstPort			2
	      }
	      Branch {
		Points			[0, 65]
		Branch {
		  DstBlock		  "8LSB+0"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 40]
		  Branch {
		    DstBlock		    "8LSB+8"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 40]
		    Branch {
		    DstBlock		    "8LSB+16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 40]
		    DstBlock		    "8LSB+24"
		    DstPort		    1
		    }
		  }
		}
	      }
	    }
	    Line {
	      SrcBlock		      "Mux"
	      SrcPort		      1
	      DstBlock		      "Goto21"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+0"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+8"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+16"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "8LSB+24"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [35, 0; 0, -90]
	      DstBlock		      "Mux"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Addr"
	      SrcPort		      1
	      DstBlock		      "Goto23"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "WE"
	      SrcPort		      1
	      DstBlock		      "Goto22"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "From"
	      SrcPort		      1
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "367"
	  Ports			  [2, 1]
	  Position		  [255, 175, 310, 235]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37.77 37.7"
	  "7 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30.77 37.77 37"
	  ".77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.77 23.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77 16.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('and');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RSSI Buffer"
	  SID			  "1244"
	  Ports			  [3]
	  Position		  [650, 264, 705, 376]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RSSI Buffer"
	    Location		    [-80, 88, 2476, 1394]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Addr"
	      SID		      "1245"
	      Position		      [475, 343, 505, 357]
	      NamePlacement	      "alternate"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI"
	      SID		      "1246"
	      Position		      [245, 403, 275, 417]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "WE"
	      SID		      "1247"
	      Position		      [1295, 473, 1325, 487]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+0"
	      SID		      "1249"
	      Ports		      [1, 1]
	      Position		      [955, 496, 1000, 514]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+16"
	      SID		      "1250"
	      Ports		      [1, 1]
	      Position		      [955, 576, 1000, 594]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+24"
	      SID		      "1251"
	      Ports		      [1, 1]
	      Position		      [955, 616, 1000, 634]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+8"
	      SID		      "1252"
	      Ports		      [1, 1]
	      Position		      [955, 536, 1000, 554]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "BIT[2]"
	      SID		      "1253"
	      Ports		      [1, 1]
	      Position		      [580, 421, 620, 439]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P>"
	      "<P>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      on
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "2"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,407"
	      block_type	      "slice"
	      block_version	      "8.2"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "1254"
	      Ports		      [2, 1]
	      Position		      [835, 401, 875, 479]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "2"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "40,78,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 78 78 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 78 78 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[44.55"
	      " 44.55 49.55 44.55 49.55 49.55 49.55 44.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[39.55 39.55 44"
	      ".55 44.55 39.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[34.55 34.55 39.55 39.55 34.55 "
	      "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[29.55 29.55 34.55 29.55 34.55 34.55 29.55 ],[0."
	      "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor("
	      "'black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\font"
	      "size{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat1"
	      SID		      "1255"
	      Ports		      [4, 1]
	      Position		      [1065, 481, 1110, 649]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "4"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],"
	      "[90.66 90.66 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84."
	      "66 90.66 90.66 84.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78"
	      ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 "
	      "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc"
	      "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');dis"
	      "p('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert"
	      SID		      "1256"
	      Ports		      [1, 1]
	      Position		      [435, 402, 470, 418]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,461,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      From
	      Name		      "From"
	      SID		      "3871"
	      Position		      [955, 394, 1085, 416]
	      ZOrder		      -9
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto5"
	      SID		      "1258"
	      Position		      [435, 267, 595, 293]
	      ShowName		      off
	      GotoTag		      "RFC_RSSI"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto6"
	      SID		      "2216"
	      Position		      [1380, 431, 1530, 449]
	      ShowName		      off
	      GotoTag		      "RFC_RSSI_DIN"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto7"
	      SID		      "2217"
	      Position		      [1380, 471, 1530, 489]
	      ShowName		      off
	      GotoTag		      "RFC_RSSI_WE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto8"
	      SID		      "2218"
	      Position		      [1380, 341, 1530, 359]
	      ShowName		      off
	      GotoTag		      "RFC_RSSI_ADDR"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "1259"
	      Ports		      [1, 1]
	      Position		      [660, 422, 690, 438]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,251"
	      block_type	      "inv"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla"
	      "ck');disp('not');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "LSB + 3"
	      SID		      "1422"
	      Ports		      [1, 1]
	      Position		      [580, 341, 620, 359]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "ceil(log2(NumSamps_Rx_RSSI))-1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "LSB of Input"
	      bit0		      "3"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,407"
	      block_type	      "slice"
	      block_version	      "8.2"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux"
	      SID		      "1260"
	      Ports		      [3, 1]
	      Position		      [1215, 388, 1260, 492]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "14"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "mux"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "1261"
	      Ports		      [2, 1]
	      Position		      [730, 398, 775, 442]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "45,44,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28."
	      "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2"
	      "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('ou"
	      "tput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret1"
	      SID		      "1262"
	      Ports		      [1, 1]
	      Position		      [330, 402, 365, 418]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can changed the signal b"
	      "etween signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs no"
	      "thing.<P><P>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force"
	      "d to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp"
	      "ut of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "436,54,356,312"
	      block_type	      "reinterpret"
	      block_version	      "9.1.01"
	      sg_icon_stat	      "35,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla"
	      "ck');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Line {
	      SrcBlock		      "RSSI"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		Points			[0, -130]
		DstBlock		"Goto5"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Reinterpret1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Convert"
	      SrcPort		      1
	      Points		      [35, 0]
	      Branch {
		DstBlock		"Register"
		DstPort			1
	      }
	      Branch {
		Points			[0, 50]
		DstBlock		"Concat"
		DstPort			2
	      }
	    }
	    Line {
	      SrcBlock		      "Addr"
	      SrcPort		      1
	      Points		      [40, 0]
	      Branch {
		Points			[0, 80]
		DstBlock		"BIT[2]"
		DstPort			1
	      }
	      Branch {
		DstBlock		"LSB + 3"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Reinterpret1"
	      SrcPort		      1
	      DstBlock		      "Convert"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [45, 0]
	      Branch {
		Points			[0, 65]
		Branch {
		  DstBlock		  "8LSB+0"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 40]
		  Branch {
		    DstBlock		    "8LSB+8"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 40]
		    Branch {
		    DstBlock		    "8LSB+16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 40]
		    DstBlock		    "8LSB+24"
		    DstPort		    1
		    }
		  }
		}
	      }
	      Branch {
		Points			[0, 0]
		DstBlock		"Mux"
		DstPort			2
	      }
	    }
	    Line {
	      SrcBlock		      "BIT[2]"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "LSB + 3"
	      SrcPort		      1
	      DstBlock		      "Goto8"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+0"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+8"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+16"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "8LSB+24"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Concat1"
	      SrcPort		      1
	      Points		      [35, 0; 0, -90]
	      DstBlock		      "Mux"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux"
	      SrcPort		      1
	      DstBlock		      "Goto6"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "WE"
	      SrcPort		      1
	      DstBlock		      "Goto7"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "From"
	      SrcPort		      1
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Scope
	  Name			  "Scope"
	  SID			  "387"
	  Ports			  [2]
	  Position		  [585, 14, 625, 96]
	  Floating		  off
	  Location		  [5, 49, 1285, 757]
	  Open			  off
	  NumInputPorts		  "2"
	  ZoomMode		  "yonly"
	  List {
	    ListType		    AxesTitles
	    axes1		    "%<SignalLabel>"
	    axes2		    "%<SignalLabel>"
	  }
	  YMin			  "-5~-5"
	  YMax			  "5~5"
	  SaveName		  "ScopeData2"
	  DataFormat		  "StructureWithTime"
	  MaxDataPoints		  "40000"
	  SampleTime		  "0"
	}
	Line {
	  SrcBlock		  "Gateway Out1"
	  SrcPort		  1
	  DstBlock		  "Scope"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out"
	  SrcPort		  1
	  DstBlock		  "Scope"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "I/Q"
	  SrcPort		  1
	  DstBlock		  "I/Q Buffer"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "EN"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "WE"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Addr"
	  SrcPort		  1
	  Points		  [75, 0]
	  Branch {
	    Points		    [0, -100]
	    DstBlock		    "Gateway Out"
	    DstPort		    1
	  }
	  Branch {
	    Labels		    [0, 0]
	    DstBlock		    "I/Q Buffer"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 150]
	    DstBlock		    "RSSI Buffer"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  Points		  [65, 0]
	  Branch {
	    Points		    [85, 0]
	    Branch {
	      Points		      [0, -130]
	      DstBlock		      "Gateway Out1"
	      DstPort		      1
	    }
	    Branch {
	      Labels		      [0, 0]
	      DstBlock		      "I/Q Buffer"
	      DstPort		      3
	    }
	  }
	  Branch {
	    Points		    [0, 150]
	    DstBlock		    "RSSI Buffer"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "RSSI"
	  SrcPort		  1
	  DstBlock		  "RSSI Buffer"
	  DstPort		  2
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFC Input Reg1"
      SID		      "4802"
      Ports		      [1, 1]
      Position		      [1645, 434, 1700, 456]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFC Input Reg2"
      SID		      "4803"
      Ports		      [1, 1]
      Position		      [1645, 464, 1700, 486]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFC Input Reg3"
      SID		      "4804"
      Ports		      [1, 1]
      Position		      [1645, 494, 1700, 516]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFC Input Reg4"
      SID		      "4805"
      Ports		      [1, 1]
      Position		      [1645, 524, 1700, 546]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFC Input Reg5"
      SID		      "4806"
      Ports		      [1, 1]
      Position		      [1645, 554, 1700, 576]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFC Inputs"
      SID		      "819"
      Ports		      [1, 2]
      Position		      [1240, 431, 1425, 489]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFC Inputs"
	Location		[534, 197, 1546, 748]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "MGCAGC_AGCDCO_SEL"
	  SID			  "820"
	  Position		  [95, 233, 125, 247]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "ADC I"
	  SID			  "821"
	  Ports			  [1, 1]
	  Position		  [430, 218, 585, 262]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "ADC I"
	    Location		    [2, 82, 2558, 1387]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "MGCAGC_AGCDCO_SEL"
	      SID		      "822"
	      Position		      [175, 73, 205, 87]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "3681"
	      Position		      [55, 235, 85, 265]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant2"
	      SID		      "823"
	      Position		      [55, 150, 85, 180]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux3"
	      SID		      "825"
	      Ports		      [3, 1]
	      Position		      [370, 113, 415, 217]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,303"
	      block_type	      "mux"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFC_ADC_I"
	      SID		      "827"
	      Ports		      [1, 1]
	      Position		      [160, 155, 225, 175]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "14"
	      bin_pt		      "13"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFC_agc_filt_I"
	      SID		      "824"
	      Ports		      [1, 1]
	      Position		      [160, 240, 225, 260]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "16"
	      bin_pt		      "15"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "826"
	      Ports		      [1, 1]
	      Position		      [610, 151, 645, 179]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret2"
	      SID		      "3897"
	      Ports		      [1, 1]
	      Position		      [480, 155, 545, 175]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can change the signal be"
	      "tween signed and unsigned, and relocate the binary point.<br><br>Hardware notes: In hardware this block costs n"
	      "othing.<br><br>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is fo"
	      "rced to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an o"
	      "utput of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,309"
	      block_type	      "reinterpret"
	      block_version	      "8.2"
	      sg_icon_stat	      "65,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931"
	      " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor"
	      "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "ADC I"
	      SID		      "828"
	      Position		      [715, 158, 745, 172]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "ADC I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "RFC_ADC_I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "MGCAGC_AGCDCO_SEL"
	      SrcPort		      1
	      Points		      [120, 0; 0, 50]
	      DstBlock		      "Mux3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFC_ADC_I"
	      SrcPort		      1
	      DstBlock		      "Mux3"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFC_agc_filt_I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFC_agc_filt_I"
	      SrcPort		      1
	      Points		      [100, 0; 0, -50]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux3"
	      SrcPort		      1
	      DstBlock		      "Reinterpret2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Reinterpret2"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "ADC Q"
	  SID			  "829"
	  Ports			  [1, 1]
	  Position		  [430, 344, 585, 386]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "ADC Q"
	    Location		    [66, 91, 1078, 743]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "MGCAGC_AGCDCO_SEL"
	      SID		      "830"
	      Position		      [160, 43, 190, 57]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "3682"
	      Position		      [40, 205, 70, 235]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant2"
	      SID		      "831"
	      Position		      [40, 120, 70, 150]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux3"
	      SID		      "833"
	      Ports		      [3, 1]
	      Position		      [355, 83, 400, 187]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,303"
	      block_type	      "mux"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFC_ADC_Q"
	      SID		      "835"
	      Ports		      [1, 1]
	      Position		      [145, 125, 210, 145]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "14"
	      bin_pt		      "13"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFC_agc_filt_Q"
	      SID		      "832"
	      Ports		      [1, 1]
	      Position		      [145, 210, 210, 230]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "16"
	      bin_pt		      "15"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "834"
	      Ports		      [1, 1]
	      Position		      [595, 121, 630, 149]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret2"
	      SID		      "3898"
	      Ports		      [1, 1]
	      Position		      [465, 125, 530, 145]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can change the signal be"
	      "tween signed and unsigned, and relocate the binary point.<br><br>Hardware notes: In hardware this block costs n"
	      "othing.<br><br>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is fo"
	      "rced to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an o"
	      "utput of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,309"
	      block_type	      "reinterpret"
	      block_version	      "8.2"
	      sg_icon_stat	      "65,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931"
	      " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor"
	      "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "ADC Q"
	      SID		      "836"
	      Position		      [700, 128, 730, 142]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "ADC Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "RFC_ADC_Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "MGCAGC_AGCDCO_SEL"
	      SrcPort		      1
	      Points		      [120, 0; 0, 50]
	      DstBlock		      "Mux3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFC_ADC_Q"
	      SrcPort		      1
	      DstBlock		      "Mux3"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFC_agc_filt_Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFC_agc_filt_Q"
	      SrcPort		      1
	      Points		      [100, 0; 0, -50]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux3"
	      SrcPort		      1
	      DstBlock		      "Reinterpret2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Reinterpret2"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat5"
	  SID			  "3748"
	  Ports			  [2, 1]
	  Position		  [990, 260, 1015, 340]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,80,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 80 80 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[43.33 43.33 46"
	  ".33 43.33 46.33 46.33 46.33 43.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[40.33 40.33 43.33 43.33 40.3"
	  "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[37.33 37.33 40.33 40.33 37.33 ],[1 1 1 ]);\npatc"
	  "h([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33 34.33 37.33 37.33 34.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "2718"
	  Ports			  [1, 1]
	  Position		  [225, 100, 270, 130]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  SID			  "2719"
	  Ports			  [1, 1]
	  Position		  [310, 85, 370, 145]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  off
	  en			  on
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "counter"
	  sg_icon_stat		  "60,60,1,1,white,blue,0,b089e9c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'en"
	  "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From10"
	  SID			  "2720"
	  Position		  [15, 31, 150, 49]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "COUNTER_DATA_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "2721"
	  Ports			  [1, 1]
	  Position		  [530, 134, 585, 166]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "55,32,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 32 32 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[20.44 20.44 24.4"
	  "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([22."
	  "1 35.88 31.88 27.88 23.88 18.1 22.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf(''"
	  ",'COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "2722"
	  Ports			  [3, 1]
	  Position		  [805, 188, 850, 292]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux1"
	  SID			  "2723"
	  Ports			  [3, 1]
	  Position		  [805, 313, 850, 417]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux2"
	  SID			  "3830"
	  Ports			  [3, 1]
	  Position		  [805, 438, 850, 542]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RSSI"
	  SID			  "848"
	  Ports			  [0, 1]
	  Position		  [430, 471, 585, 509]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RSSI"
	    Location		    [2, 82, 1184, 734]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "849"
	      Position		      [160, 100, 190, 130]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFC_RSSI"
	      SID		      "850"
	      Ports		      [1, 1]
	      Position		      [280, 109, 335, 121]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, double and fixed point to  Xilinx"
	      " fixed point type.<P><P>Hardware notes:  In hardware these blocks become top level input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "10"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,432"
	      block_type	      "gatewayin"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]"
	      ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7."
	      "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1"
	      " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0."
	      "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "RSSI"
	      SID		      "851"
	      Position		      [740, 108, 770, 122]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFC_RSSI"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFC_RSSI"
	      SrcPort		      1
	      DstBlock		      "RSSI"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "2724"
	  Ports			  [1, 1]
	  Position		  [440, 101, 475, 129]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[11:2]"
	  SID			  "3831"
	  Ports			  [1, 1]
	  Position		  [700, 516, 740, 534]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "10"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "RSSI_OUT"
	  SID			  "852"
	  Position		  [1085, 483, 1115, 497]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "I/Q"
	  SID			  "853"
	  Position		  [1085, 293, 1115, 307]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "MGCAGC_AGCDCO_SEL"
	  SrcPort		  1
	  Points		  [80, 0]
	  Branch {
	    DstBlock		    "ADC I"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 125]
	    DstBlock		    "ADC Q"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "ADC I"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "ADC Q"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From10"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    Points		    [530, 0; 0, 165]
	    Branch {
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 125]
	      Branch {
		DstBlock		"Mux1"
		DstPort			1
	      }
	      Branch {
		Points			[0, 125]
		DstBlock		"Mux2"
		DstPort			1
	      }
	    }
	  }
	  Branch {
	    Points		    [0, 75]
	    DstBlock		    "Convert"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    Points		    [0, 35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [205, 0; 0, 160]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  Points		  [80, 0; 0, 250]
	  Branch {
	    DstBlock		    "Mux1"
	    DstPort		    3
	  }
	  Branch {
	    Points		    [0, 125]
	    DstBlock		    "b[11:2]"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Concat5"
	  SrcPort		  1
	  DstBlock		  "I/Q"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  Points		  [65, 0; 0, 40]
	  DstBlock		  "Concat5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  Points		  [65, 0; 0, -45]
	  DstBlock		  "Concat5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "b[11:2]"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Mux2"
	  SrcPort		  1
	  DstBlock		  "RSSI_OUT"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RSSI"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  2
	}
	Annotation {
	  Name			  "NOTE:  We have RSSI use bits [11:2] of the counter since we sample RSSI 4x slower than IQ data."
	  Position		  [781, 569]
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFC Mux"
      SID		      "3375"
      Ports		      [5, 1]
      Position		      [1535, 1052, 1565, 1158]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "4"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "30,106,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.1429 90.8571 106 "
      "0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.1429 90.8571 106 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15"
      ".88 10.1 6.1 ],[57.44 57.44 61.44 57.44 61.44 61.44 61.44 57.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ]"
      ",[53.44 53.44 57.44 57.44 53.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[49.44 49.44 53.44 5"
      "3.44 49.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[45.44 45.44 49.44 45.44 49.44 49.44 45."
      "44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n"
      "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab"
      "el('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\nc"
      "olor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFC Output Reg"
      SID		      "3379"
      Ports		      [1, 1]
      Position		      [1645, 1094, 1700, 1116]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFC Outputs"
      SID		      "700"
      Ports		      [1]
      Position		      [1930, 1081, 1980, 1129]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFC Outputs"
	Location		[2, 82, 1078, 539]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "32b"
	  SID			  "701"
	  Position		  [85, 238, 115, 252]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "16LSB"
	  SID			  "702"
	  Ports			  [1, 1]
	  Position		  [265, 237, 305, 253]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware "
	  "notes: In hardware this block costs nothing."
	  nbits			  "16"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,442,407"
	  block_type		  "slice"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "16MSB"
	  SID			  "703"
	  Ports			  [1, 1]
	  Position		  [265, 181, 305, 199]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware "
	  "notes: In hardware this block costs nothing."
	  nbits			  "16"
	  boolean_output	  off
	  mode			  "Upper Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,442,407"
	  block_type		  "slice"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "704"
	  Ports			  [1, 1]
	  Position		  [480, 175, 525, 205]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Signed  (2's comp)"
	  n_bits		  "16"
	  bin_pt		  "15"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "705"
	  Ports			  [1, 1]
	  Position		  [480, 230, 525, 260]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Signed  (2's comp)"
	  n_bits		  "16"
	  bin_pt		  "15"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFC_DAC_I"
	  SID			  "712"
	  Ports			  [1, 1]
	  Position		  [750, 180, 810, 200]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFC_DAC_Q"
	  SID			  "713"
	  Ports			  [1, 1]
	  Position		  [750, 235, 810, 255]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register"
	  SID			  "706"
	  Ports			  [1, 1]
	  Position		  [625, 176, 660, 204]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "707"
	  Ports			  [1, 1]
	  Position		  [625, 231, 660, 259]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret"
	  SID			  "708"
	  Ports			  [1, 1]
	  Position		  [365, 180, 410, 200]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the binary representation.   You can changed the signal between s"
	  "igned and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>"
	  "Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned wi"
	  "th 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in "
	  "binary)."
	  force_arith_type	  on
	  arith_type		  "Signed  (2's comp)"
	  force_bin_pt		  on
	  bin_pt		  "15"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,309"
	  block_type		  "reinterpret"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret1"
	  SID			  "709"
	  Ports			  [1, 1]
	  Position		  [365, 235, 410, 255]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the binary representation.   You can changed the signal between s"
	  "igned and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>"
	  "Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned wi"
	  "th 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in "
	  "binary)."
	  force_arith_type	  on
	  arith_type		  "Signed  (2's comp)"
	  force_bin_pt		  on
	  bin_pt		  "15"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,309"
	  block_type		  "reinterpret"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "710"
	  Position		  [870, 180, 890, 200]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "711"
	  Position		  [870, 235, 890, 255]
	  ShowName		  off
	}
	Line {
	  SrcBlock		  "RFC_DAC_Q"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFC_DAC_I"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Reinterpret1"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Reinterpret"
	  SrcPort		  1
	  DstBlock		  "Convert"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "16LSB"
	  SrcPort		  1
	  DstBlock		  "Reinterpret1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "16MSB"
	  SrcPort		  1
	  DstBlock		  "Reinterpret"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register"
	  SrcPort		  1
	  DstBlock		  "RFC_DAC_I"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  DstBlock		  "RFC_DAC_Q"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "32b"
	  SrcPort		  1
	  Points		  [65, 0]
	  Branch {
	    Points		    [0, -55]
	    DstBlock		    "16MSB"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "16LSB"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  DstBlock		  "Register"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFC Tx Buffers"
      SID		      "1349"
      Ports		      [3, 1]
      Position		      [1220, 1086, 1300, 1144]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFC Tx Buffers"
	Location		[-172, 121, 2384, 1427]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "RdAddr"
	  SID			  "1350"
	  Position		  [230, 458, 260, 472]
	  NamePlacement		  "alternate"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "Rst"
	  SID			  "1351"
	  Position		  [480, 258, 510, 272]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "En"
	  SID			  "1352"
	  Position		  [480, 288, 510, 302]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+0"
	  SID			  "1353"
	  Ports			  [1, 1]
	  Position		  [565, 486, 610, 504]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+16"
	  SID			  "1354"
	  Ports			  [1, 1]
	  Position		  [565, 566, 610, 584]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "16"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+24"
	  SID			  "1355"
	  Ports			  [1, 1]
	  Position		  [565, 606, 610, 624]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "24"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+8"
	  SID			  "1356"
	  Ports			  [1, 1]
	  Position		  [565, 526, 610, 544]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "8"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat1"
	  SID			  "1357"
	  Ports			  [4, 1]
	  Position		  [675, 471, 720, 639]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[90.66 90.66"
	  " 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84.66 90.66 90.66 8"
	  "4.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78.66 ],[1 1 1 ]);\npa"
	  "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 ],[0.931 0.946 0.973 ]);"
	  "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
	  "put',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode',"
	  "'on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "1358"
	  Ports			  [0, 1]
	  Position		  [1025, 340, 1050, 360]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
	  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
	  "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "1361"
	  Ports			  [1, 1]
	  Position		  [990, 273, 1015, 287]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,374,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.22 11.22 "
	  "9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931 0."
	  "946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.55 16.44 14.44 "
	  "12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon"
	  " graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprintf('',"
	  "'COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "1362"
	  Ports			  [1, 1]
	  Position		  [740, 288, 760, 302]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,374,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "20,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 9"
	  ".22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931 0.94"
	  "6 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10."
	  "44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon gra"
	  "phics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprintf('','COM"
	  "MENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From"
	  SID			  "3876"
	  Position		  [565, 384, 695, 406]
	  ZOrder		  -9
	  ShowName		  off
	  GotoTag		  "TX_BYTE_ORDER"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From29"
	  SID			  "2222"
	  Position		  [280, 486, 475, 504]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_DOUT"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto1"
	  SID			  "2795"
	  Position		  [1280, 166, 1430, 184]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto2"
	  SID			  "2813"
	  Position		  [1280, 186, 1430, 204]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_DATA"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto29"
	  SID			  "2223"
	  Position		  [325, 456, 475, 474]
	  ShowName		  off
	  GotoTag		  "RFC_IQ_TX_ADDR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "1364"
	  Ports			  [1, 1]
	  Position		  [790, 286, 820, 304]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "30,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([12"
	  ".55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('"
	  "','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "1365"
	  Ports			  [2, 1]
	  Position		  [855, 250, 910, 310]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,261"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "55,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37.77 37.7"
	  "7 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30.77 37.77 37"
	  ".77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.77 23.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77 16.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "1366"
	  Ports			  [3, 1]
	  Position		  [1145, 263, 1190, 367]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,303"
	  block_type		  "mux"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux1"
	  SID			  "1367"
	  Ports			  [3, 1]
	  Position		  [825, 378, 870, 482]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFC TX Delay for memory"
	  SID			  "2794"
	  Ports			  [1, 1]
	  Position		  [610, 283, 660, 307]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
	  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12.33 15.33 15"
	  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
	  "]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "IQ_32b"
	  SID			  "1369"
	  Position		  [1280, 308, 1310, 322]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  DstBlock		  "Convert"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    DstBlock		    "Mux"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -105]
	    DstBlock		    "Goto1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Rst"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "En"
	  SrcPort		  1
	  DstBlock		  "RFC TX Delay for memory"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Inverter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "RdAddr"
	  SrcPort		  1
	  DstBlock		  "Goto29"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    DstBlock		    "IQ_32b"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -120]
	    DstBlock		    "Goto2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "8LSB+0"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "8LSB+8"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "8LSB+16"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "8LSB+24"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Concat1"
	  SrcPort		  1
	  Points		  [35, 0; 0, -90]
	  DstBlock		  "Mux1"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From29"
	  SrcPort		  1
	  Points		  [50, 0]
	  Branch {
	    DstBlock		    "8LSB+0"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 40]
	    Branch {
	      DstBlock		      "8LSB+8"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 40]
	      Branch {
		DstBlock		"8LSB+16"
		DstPort			1
	      }
	      Branch {
		Points			[0, 40]
		DstBlock		"8LSB+24"
		DstPort			1
	      }
	    }
	  }
	  Branch {
	    Points		    [0, -65]
	    DstBlock		    "Mux1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  Points		  [50, 0; 0, -115]
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "RFC TX Delay for memory"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFC Tx Buffers Reg"
      SID		      "4688"
      Ports		      [1, 1]
      Position		      [1370, 1104, 1425, 1126]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFD\nRx Buffers"
      SID		      "476"
      Ports		      [5]
      Position		      [1930, 615, 1995, 755]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFD\nRx Buffers"
	Location		[2, 82, 1270, 734]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "RSSI"
	  SID			  "477"
	  Position		  [450, 313, 480, 327]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "I/Q"
	  SID			  "478"
	  Position		  [545, 163, 575, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "Addr"
	  SID			  "479"
	  Position		  [325, 128, 355, 142]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "WE"
	  SID			  "480"
	  Position		  [110, 183, 140, 197]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "EN"
	  SID			  "481"
	  Position		  [110, 213, 140, 227]
	  Port			  "5"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "482"
	  Ports			  [1, 1]
	  Position		  [185, 212, 210, 228]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,374,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12.2"
	  "2 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0."
	  "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16.44 "
	  "14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en"
	  "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out"
	  SID			  "483"
	  Ports			  [1, 1]
	  Position		  [500, 30, 530, 40]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out1"
	  SID			  "484"
	  Ports			  [1, 1]
	  Position		  [500, 70, 530, 80]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "I/Q Buffer"
	  SID			  "1163"
	  Ports			  [3]
	  Position		  [650, 115, 705, 225]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "I/Q Buffer"
	    Location		    [151, 125, 2077, 1440]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Addr"
	      SID		      "1164"
	      Position		      [1095, 193, 1125, 207]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "I/Q_32b"
	      SID		      "1165"
	      Position		      [600, 223, 630, 237]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "WE"
	      SID		      "1166"
	      Position		      [1095, 253, 1125, 267]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+0"
	      SID		      "1228"
	      Ports		      [1, 1]
	      Position		      [690, 286, 735, 304]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+16"
	      SID		      "1229"
	      Ports		      [1, 1]
	      Position		      [690, 366, 735, 384]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+24"
	      SID		      "1230"
	      Ports		      [1, 1]
	      Position		      [690, 406, 735, 424]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+8"
	      SID		      "1231"
	      Ports		      [1, 1]
	      Position		      [690, 326, 735, 344]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "1232"
	      Ports		      [4, 1]
	      Position		      [800, 271, 845, 439]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "4"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],"
	      "[90.66 90.66 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84."
	      "66 90.66 90.66 84.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78"
	      ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 "
	      "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc"
	      "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');dis"
	      "p('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      From
	      Name		      "From"
	      SID		      "3872"
	      Position		      [550, 184, 680, 206]
	      ZOrder		      -9
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto14"
	      SID		      "2226"
	      Position		      [1195, 221, 1345, 239]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_RX_DIN"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto15"
	      SID		      "2227"
	      Position		      [1195, 251, 1345, 269]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_RX_WE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto16"
	      SID		      "2228"
	      Position		      [1195, 191, 1345, 209]
	      ShowName		      off
	      GotoTag		      "RFD_IQ_RX_ADDR"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux"
	      SID		      "1234"
	      Ports		      [3, 1]
	      Position		      [950, 178, 995, 282]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "14"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "mux"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Line {
	      SrcBlock		      "I/Q_32b"
	      SrcPort		      1
	      Points		      [25, 0]
	      Branch {
		DstBlock		"Mux"
		DstPort			2
	      }
	      Branch {
		Points			[0, 65]
		Branch {
		  DstBlock		  "8LSB+0"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 40]
		  Branch {
		    DstBlock		    "8LSB+8"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 40]
		    Branch {
		    DstBlock		    "8LSB+16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 40]
		    DstBlock		    "8LSB+24"
		    DstPort		    1
		    }
		  }
		}
	      }
	    }
	    Line {
	      SrcBlock		      "Mux"
	      SrcPort		      1
	      DstBlock		      "Goto14"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+0"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+8"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+16"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "8LSB+24"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [35, 0; 0, -90]
	      DstBlock		      "Mux"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Addr"
	      SrcPort		      1
	      DstBlock		      "Goto16"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "WE"
	      SrcPort		      1
	      DstBlock		      "Goto15"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "From"
	      SrcPort		      1
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "485"
	  Ports			  [2, 1]
	  Position		  [255, 175, 310, 235]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37.77 37.7"
	  "7 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30.77 37.77 37"
	  ".77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.77 23.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77 16.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('and');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RSSI Buffer"
	  SID			  "1067"
	  Ports			  [3]
	  Position		  [650, 264, 705, 376]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RSSI Buffer"
	    Location		    [151, 125, 2077, 1440]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "Addr"
	      SID		      "1068"
	      Position		      [475, 343, 505, 357]
	      NamePlacement	      "alternate"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "RSSI"
	      SID		      "1069"
	      Position		      [245, 403, 275, 417]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "WE"
	      SID		      "1070"
	      Position		      [1295, 473, 1325, 487]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+0"
	      SID		      "1237"
	      Ports		      [1, 1]
	      Position		      [955, 496, 1000, 514]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+16"
	      SID		      "1238"
	      Ports		      [1, 1]
	      Position		      [955, 576, 1000, 594]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+24"
	      SID		      "1239"
	      Ports		      [1, 1]
	      Position		      [955, 616, 1000, 634]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "8LSB+8"
	      SID		      "1240"
	      Ports		      [1, 1]
	      Position		      [955, 536, 1000, 554]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "8"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "BIT[2]"
	      SID		      "1072"
	      Ports		      [1, 1]
	      Position		      [580, 421, 620, 439]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P>"
	      "<P>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      on
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "2"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,407"
	      block_type	      "slice"
	      block_version	      "8.2"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat"
	      SID		      "1073"
	      Ports		      [2, 1]
	      Position		      [835, 401, 875, 479]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "2"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "40,78,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 78 78 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 78 78 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[44.55"
	      " 44.55 49.55 44.55 49.55 49.55 49.55 44.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[39.55 39.55 44"
	      ".55 44.55 39.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[34.55 34.55 39.55 39.55 34.55 "
	      "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[29.55 29.55 34.55 29.55 34.55 34.55 29.55 ],[0."
	      "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor("
	      "'black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\font"
	      "size{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Concat1"
	      SID		      "1241"
	      Ports		      [4, 1]
	      Position		      [1065, 481, 1110, 649]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Concat"
	      SourceType	      "Xilinx Bus Concatenator Block"
	      infoedit		      "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary poi"
	      "nt at zero."
	      num_inputs	      "4"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "concat"
	      sg_icon_stat	      "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77"
	      " 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],"
	      "[90.66 90.66 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84."
	      "66 90.66 90.66 84.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78"
	      ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 "
	      "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc"
	      "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');dis"
	      "p('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert"
	      SID		      "1074"
	      Ports		      [1, 1]
	      Position		      [435, 402, 470, 418]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,461,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      From
	      Name		      "From"
	      SID		      "3873"
	      Position		      [955, 394, 1085, 416]
	      ZOrder		      -9
	      ShowName		      off
	      GotoTag		      "RX_BYTE_ORDER"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto10"
	      SID		      "2231"
	      Position		      [1380, 431, 1530, 449]
	      ShowName		      off
	      GotoTag		      "RFD_RSSI_DIN"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto11"
	      SID		      "2232"
	      Position		      [1380, 471, 1530, 489]
	      ShowName		      off
	      GotoTag		      "RFD_RSSI_WE"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto12"
	      SID		      "2233"
	      Position		      [1380, 341, 1530, 359]
	      ShowName		      off
	      GotoTag		      "RFD_RSSI_ADDR"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Goto
	      Name		      "Goto5"
	      SID		      "1075"
	      Position		      [435, 267, 595, 293]
	      ShowName		      off
	      GotoTag		      "RFD_RSSI"
	      TagVisibility	      "global"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "1076"
	      Ports		      [1, 1]
	      Position		      [660, 422, 690, 438]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,251"
	      block_type	      "inv"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla"
	      "ck');disp('not');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "LSB + 3"
	      SID		      "1071"
	      Ports		      [1, 1]
	      Position		      [580, 341, 620, 359]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "ceil(log2(NumSamps_Rx_RSSI))-1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "LSB of Input"
	      bit0		      "3"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,449,407"
	      block_type	      "slice"
	      block_version	      "8.2"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux"
	      SID		      "1243"
	      Ports		      [3, 1]
	      Position		      [1215, 388, 1260, 492]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "14"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "mux"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "1077"
	      Ports		      [2, 1]
	      Position		      [730, 398, 775, 442]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "10.1.2"
	      sg_icon_stat	      "45,44,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28."
	      "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2"
	      "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('ou"
	      "tput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret1"
	      SID		      "1078"
	      Ports		      [1, 1]
	      Position		      [330, 402, 365, 418]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can changed the signal b"
	      "etween signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs no"
	      "thing.<P><P>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force"
	      "d to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp"
	      "ut of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "436,54,356,312"
	      block_type	      "reinterpret"
	      block_version	      "9.1.01"
	      sg_icon_stat	      "35,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla"
	      "ck');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Line {
	      SrcBlock		      "RSSI"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		Points			[0, -130]
		DstBlock		"Goto5"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Reinterpret1"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Convert"
	      SrcPort		      1
	      Points		      [35, 0]
	      Branch {
		DstBlock		"Register"
		DstPort			1
	      }
	      Branch {
		Points			[0, 50]
		DstBlock		"Concat"
		DstPort			2
	      }
	    }
	    Line {
	      SrcBlock		      "Addr"
	      SrcPort		      1
	      Points		      [40, 0]
	      Branch {
		DstBlock		"LSB + 3"
		DstPort			1
	      }
	      Branch {
		Points			[0, 80]
		DstBlock		"BIT[2]"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Reinterpret1"
	      SrcPort		      1
	      DstBlock		      "Convert"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [45, 0]
	      Branch {
		Points			[0, 65]
		Branch {
		  DstBlock		  "8LSB+0"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 40]
		  Branch {
		    DstBlock		    "8LSB+8"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 40]
		    Branch {
		    DstBlock		    "8LSB+16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 40]
		    DstBlock		    "8LSB+24"
		    DstPort		    1
		    }
		  }
		}
	      }
	      Branch {
		Points			[0, 0]
		DstBlock		"Mux"
		DstPort			2
	      }
	    }
	    Line {
	      SrcBlock		      "BIT[2]"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "LSB + 3"
	      SrcPort		      1
	      DstBlock		      "Goto12"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+0"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "8LSB+8"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "8LSB+16"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "8LSB+24"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      4
	    }
	    Line {
	      SrcBlock		      "Concat1"
	      SrcPort		      1
	      Points		      [35, 0; 0, -90]
	      DstBlock		      "Mux"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux"
	      SrcPort		      1
	      DstBlock		      "Goto10"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "WE"
	      SrcPort		      1
	      DstBlock		      "Goto11"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "From"
	      SrcPort		      1
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Scope
	  Name			  "Scope"
	  SID			  "505"
	  Ports			  [2]
	  Position		  [585, 14, 625, 96]
	  Floating		  off
	  Location		  [5, 49, 1285, 757]
	  Open			  off
	  NumInputPorts		  "2"
	  ZoomMode		  "yonly"
	  List {
	    ListType		    AxesTitles
	    axes1		    "%<SignalLabel>"
	    axes2		    "%<SignalLabel>"
	  }
	  YMin			  "-5~-5"
	  YMax			  "5~5"
	  SaveName		  "ScopeData2"
	  DataFormat		  "StructureWithTime"
	  MaxDataPoints		  "40000"
	  SampleTime		  "0"
	}
	Line {
	  SrcBlock		  "Gateway Out1"
	  SrcPort		  1
	  DstBlock		  "Scope"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out"
	  SrcPort		  1
	  DstBlock		  "Scope"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "I/Q"
	  SrcPort		  1
	  DstBlock		  "I/Q Buffer"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "EN"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "WE"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Addr"
	  SrcPort		  1
	  Points		  [75, 0]
	  Branch {
	    Points		    [0, -100]
	    DstBlock		    "Gateway Out"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 150]
	    DstBlock		    "RSSI Buffer"
	    DstPort		    1
	  }
	  Branch {
	    Labels		    [0, 0]
	    DstBlock		    "I/Q Buffer"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  Points		  [65, 0]
	  Branch {
	    Points		    [85, 0]
	    Branch {
	      Points		      [0, -130]
	      DstBlock		      "Gateway Out1"
	      DstPort		      1
	    }
	    Branch {
	      Labels		      [0, 0]
	      DstBlock		      "I/Q Buffer"
	      DstPort		      3
	    }
	  }
	  Branch {
	    Points		    [0, 150]
	    DstBlock		    "RSSI Buffer"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "RSSI"
	  SrcPort		  1
	  DstBlock		  "RSSI Buffer"
	  DstPort		  2
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFD Input Reg1"
      SID		      "4807"
      Ports		      [1, 1]
      Position		      [1645, 614, 1700, 636]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFD Input Reg2"
      SID		      "4808"
      Ports		      [1, 1]
      Position		      [1645, 644, 1700, 666]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFD Input Reg3"
      SID		      "4809"
      Ports		      [1, 1]
      Position		      [1645, 674, 1700, 696]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFD Input Reg4"
      SID		      "4810"
      Ports		      [1, 1]
      Position		      [1645, 704, 1700, 726]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFD Input Reg5"
      SID		      "4811"
      Ports		      [1, 1]
      Position		      [1645, 734, 1700, 756]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFD Inputs"
      SID		      "854"
      Ports		      [1, 2]
      Position		      [1240, 608, 1425, 672]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFD Inputs"
	Location		[-128, 117, 2412, 1423]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "MGCAGC_AGCDCO_SEL"
	  SID			  "855"
	  Position		  [100, 243, 130, 257]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "ADC I"
	  SID			  "856"
	  Ports			  [1, 1]
	  Position		  [435, 228, 590, 272]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "ADC I"
	    Location		    [2, 82, 2558, 1387]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "MGCAGC_AGCDCO_SEL"
	      SID		      "857"
	      Position		      [175, 73, 205, 87]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "3683"
	      Position		      [55, 235, 85, 265]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant2"
	      SID		      "858"
	      Position		      [55, 150, 85, 180]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux3"
	      SID		      "860"
	      Ports		      [3, 1]
	      Position		      [370, 113, 415, 217]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,303"
	      block_type	      "mux"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFD_ADC_I"
	      SID		      "862"
	      Ports		      [1, 1]
	      Position		      [160, 155, 225, 175]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "14"
	      bin_pt		      "13"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFD_agc_filt_I"
	      SID		      "859"
	      Ports		      [1, 1]
	      Position		      [160, 240, 225, 260]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "16"
	      bin_pt		      "15"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "861"
	      Ports		      [1, 1]
	      Position		      [610, 151, 645, 179]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret2"
	      SID		      "3899"
	      Ports		      [1, 1]
	      Position		      [480, 155, 545, 175]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can change the signal be"
	      "tween signed and unsigned, and relocate the binary point.<br><br>Hardware notes: In hardware this block costs n"
	      "othing.<br><br>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is fo"
	      "rced to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an o"
	      "utput of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,309"
	      block_type	      "reinterpret"
	      block_version	      "8.2"
	      sg_icon_stat	      "65,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931"
	      " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor"
	      "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "ADC I"
	      SID		      "863"
	      Position		      [715, 158, 745, 172]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "RFD_ADC_I"
	      SrcPort		      1
	      DstBlock		      "Mux3"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "MGCAGC_AGCDCO_SEL"
	      SrcPort		      1
	      Points		      [120, 0; 0, 50]
	      DstBlock		      "Mux3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "RFD_ADC_I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "ADC I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFD_agc_filt_I"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFD_agc_filt_I"
	      SrcPort		      1
	      Points		      [100, 0; 0, -50]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux3"
	      SrcPort		      1
	      DstBlock		      "Reinterpret2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Reinterpret2"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "ADC Q"
	  SID			  "864"
	  Ports			  [1, 1]
	  Position		  [435, 354, 590, 396]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "ADC Q"
	    Location		    [66, 91, 1078, 743]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "MGCAGC_AGCDCO_SEL"
	      SID		      "865"
	      Position		      [160, 43, 190, 57]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "3684"
	      Position		      [40, 205, 70, 235]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Constant
	      Name		      "Constant2"
	      SID		      "866"
	      Position		      [40, 120, 70, 150]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Mux3"
	      SID		      "868"
	      Ports		      [3, 1]
	      Position		      [355, 83, 400, 187]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Mux"
	      SourceType	      "Xilinx Bus Multiplexer Block"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,303"
	      block_type	      "mux"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104"
	      " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32"
	      " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6"
	      "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 "
	      "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6"
	      "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
	      "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol"
	      "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: "
	      "end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFD_ADC_Q"
	      SID		      "870"
	      Ports		      [1, 1]
	      Position		      [145, 125, 210, 145]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "14"
	      bin_pt		      "13"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFD_agc_filt_Q"
	      SID		      "867"
	      Ports		      [1, 1]
	      Position		      [145, 210, 210, 230]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to"
	      "  Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top l"
	      "evel input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Signed  (2's comp)"
	      n_bits		      "16"
	      bin_pt		      "15"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Round  (unbiased: +/- Inf)"
	      overflow		      "Saturate"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,406"
	      block_type	      "gatewayin"
	      block_version	      "10.1.3"
	      sg_icon_stat	      "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985"
	      " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	      "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' "
	      "');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register1"
	      SID		      "869"
	      Ports		      [1, 1]
	      Position		      [595, 121, 630, 149]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      off
	      en		      off
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 "
	      "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1"
	      "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 "
	      "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Reinterpret2"
	      SID		      "3900"
	      Ports		      [1, 1]
	      Position		      [465, 125, 530, 145]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Reinterpret"
	      SourceType	      "Xilinx Type Reinterpreter Block"
	      infoedit		      "Changes signal type without altering the binary representation.   You can change the signal be"
	      "tween signed and unsigned, and relocate the binary point.<br><br>Hardware notes: In hardware this block costs n"
	      "othing.<br><br>Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is fo"
	      "rced to unsigned with 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an o"
	      "utput of 56 (111000 in binary)."
	      force_arith_type	      on
	      arith_type	      "Unsigned"
	      force_bin_pt	      on
	      bin_pt		      "0"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,309"
	      block_type	      "reinterpret"
	      block_version	      "8.2"
	      sg_icon_stat	      "65,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1"
	      "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2"
	      "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2"
	      "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931"
	      " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor"
	      "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "ADC Q"
	      SID		      "871"
	      Position		      [700, 128, 730, 142]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "RFD_ADC_Q"
	      SrcPort		      1
	      DstBlock		      "Mux3"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "MGCAGC_AGCDCO_SEL"
	      SrcPort		      1
	      Points		      [120, 0; 0, 50]
	      DstBlock		      "Mux3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant2"
	      SrcPort		      1
	      DstBlock		      "RFD_ADC_Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register1"
	      SrcPort		      1
	      DstBlock		      "ADC Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFD_agc_filt_Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "RFD_agc_filt_Q"
	      SrcPort		      1
	      Points		      [100, 0; 0, -50]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Mux3"
	      SrcPort		      1
	      DstBlock		      "Reinterpret2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Reinterpret2"
	      SrcPort		      1
	      DstBlock		      "Register1"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat5"
	  SID			  "3751"
	  Ports			  [2, 1]
	  Position		  [990, 270, 1015, 350]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,80,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 80 80 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[43.33 43.33 46"
	  ".33 43.33 46.33 46.33 46.33 43.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[40.33 40.33 43.33 43.33 40.3"
	  "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[37.33 37.33 40.33 40.33 37.33 ],[1 1 1 ]);\npatc"
	  "h([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33 34.33 37.33 37.33 34.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "2760"
	  Ports			  [1, 1]
	  Position		  [230, 110, 275, 140]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  SID			  "2761"
	  Ports			  [1, 1]
	  Position		  [315, 95, 375, 155]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  off
	  en			  on
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "counter"
	  sg_icon_stat		  "60,60,1,1,white,blue,0,b089e9c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'en"
	  "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From10"
	  SID			  "2762"
	  Position		  [15, 41, 150, 59]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "COUNTER_DATA_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "2763"
	  Ports			  [1, 1]
	  Position		  [535, 144, 590, 176]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "55,32,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 32 32 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[20.44 20.44 24.4"
	  "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([22."
	  "1 35.88 31.88 27.88 23.88 18.1 22.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf(''"
	  ",'COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "2764"
	  Ports			  [3, 1]
	  Position		  [815, 198, 860, 302]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux1"
	  SID			  "2765"
	  Ports			  [3, 1]
	  Position		  [815, 323, 860, 427]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux2"
	  SID			  "3832"
	  Ports			  [3, 1]
	  Position		  [815, 453, 860, 557]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "RSSI"
	  SID			  "883"
	  Ports			  [0, 1]
	  Position		  [435, 487, 585, 523]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "RSSI"
	    Location		    [2, 82, 1184, 734]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Constant
	      Name		      "Constant1"
	      SID		      "884"
	      Position		      [160, 100, 190, 130]
	      ShowName		      off
	      Value		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "RFD_RSSI"
	      SID		      "885"
	      Ports		      [1, 1]
	      Position		      [280, 109, 335, 121]
	      NamePlacement	      "alternate"
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Gateway In"
	      SourceType	      "Xilinx Gateway In Block"
	      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, double and fixed point to  Xilinx"
	      " fixed point type.<P><P>Hardware notes:  In hardware these blocks become top level input ports."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "10"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      period		      "1"
	      dbl_ovrd		      off
	      timing_constraint	      "None"
	      locs_specified	      off
	      LOCs		      "{}"
	      UseAsADC		      off
	      ADCChannel	      "'1'"
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      inherit_from_input      off
	      hdl_port		      "on"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,356,432"
	      block_type	      "gatewayin"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0"
	      ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]"
	      ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7."
	      "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1"
	      " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0."
	      "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black"
	      "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');"
	      "\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "RSSI"
	      SID		      "886"
	      Position		      [740, 108, 770, 122]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "RFD_RSSI"
	      SrcPort		      1
	      DstBlock		      "RSSI"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "RFD_RSSI"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "2766"
	  Ports			  [1, 1]
	  Position		  [445, 111, 480, 139]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[11:2]"
	  SID			  "3833"
	  Ports			  [1, 1]
	  Position		  [705, 531, 745, 549]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "10"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "RSSI_OUT"
	  SID			  "887"
	  Position		  [1080, 498, 1110, 512]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "I/Q"
	  SID			  "888"
	  Position		  [1085, 303, 1115, 317]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "MGCAGC_AGCDCO_SEL"
	  SrcPort		  1
	  Points		  [80, 0]
	  Branch {
	    DstBlock		    "ADC I"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 125]
	    DstBlock		    "ADC Q"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "ADC I"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "ADC Q"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From10"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    Points		    [535, 0; 0, 165]
	    Branch {
	      DstBlock		      "Mux"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 125]
	      Branch {
		DstBlock		"Mux1"
		DstPort			1
	      }
	      Branch {
		Points			[0, 130]
		DstBlock		"Mux2"
		DstPort			1
	      }
	    }
	  }
	  Branch {
	    Points		    [0, 75]
	    DstBlock		    "Convert"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    Points		    [0, 35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [205, 0; 0, 160]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  Points		  [80, 0; 0, 250]
	  Branch {
	    DstBlock		    "Mux1"
	    DstPort		    3
	  }
	  Branch {
	    Points		    [0, 130]
	    DstBlock		    "b[11:2]"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Concat5"
	  SrcPort		  1
	  DstBlock		  "I/Q"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  Points		  [65, 0; 0, 40]
	  DstBlock		  "Concat5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  Points		  [65, 0; 0, -45]
	  DstBlock		  "Concat5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "b[11:2]"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Mux2"
	  SrcPort		  1
	  DstBlock		  "RSSI_OUT"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RSSI"
	  SrcPort		  1
	  DstBlock		  "Mux2"
	  DstPort		  2
	}
	Annotation {
	  Name			  "NOTE:  We have RSSI use bits [11:2] of the counter since we sample RSSI 4x slower than IQ data."
	  Position		  [766, 599]
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFD Mux"
      SID		      "3376"
      Ports		      [5, 1]
      Position		      [1535, 1192, 1565, 1298]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "4"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "30,106,5,1,white,blue,3,d6c79293,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.1429 90.8571 106 "
      "0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.1429 90.8571 106 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15"
      ".88 10.1 6.1 ],[57.44 57.44 61.44 57.44 61.44 61.44 61.44 57.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ]"
      ",[53.44 53.44 57.44 57.44 53.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[49.44 49.44 53.44 5"
      "3.44 49.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[45.44 45.44 49.44 45.44 49.44 49.44 45."
      "44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n"
      "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab"
      "el('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\nc"
      "olor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "RFD Output Reg"
      SID		      "3380"
      Ports		      [1, 1]
      Position		      [1645, 1234, 1700, 1256]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFD Outputs"
      SID		      "714"
      Ports		      [1]
      Position		      [1930, 1221, 1980, 1269]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFD Outputs"
	Location		[2, 82, 1078, 539]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "32b"
	  SID			  "715"
	  Position		  [85, 238, 115, 252]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "16LSB"
	  SID			  "716"
	  Ports			  [1, 1]
	  Position		  [265, 237, 305, 253]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware "
	  "notes: In hardware this block costs nothing."
	  nbits			  "16"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,442,407"
	  block_type		  "slice"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "16MSB"
	  SID			  "717"
	  Ports			  [1, 1]
	  Position		  [265, 181, 305, 199]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware "
	  "notes: In hardware this block costs nothing."
	  nbits			  "16"
	  boolean_output	  off
	  mode			  "Upper Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,442,407"
	  block_type		  "slice"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "718"
	  Ports			  [1, 1]
	  Position		  [480, 175, 525, 205]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Signed  (2's comp)"
	  n_bits		  "16"
	  bin_pt		  "15"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "719"
	  Ports			  [1, 1]
	  Position		  [480, 230, 525, 260]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Signed  (2's comp)"
	  n_bits		  "16"
	  bin_pt		  "15"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
	  "t');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFD_DAC_I"
	  SID			  "726"
	  Ports			  [1, 1]
	  Position		  [750, 180, 810, 200]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFD_DAC_Q"
	  SID			  "727"
	  Ports			  [1, 1]
	  Position		  [750, 235, 810, 255]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register"
	  SID			  "720"
	  Ports			  [1, 1]
	  Position		  [625, 176, 660, 204]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  SID			  "721"
	  Ports			  [1, 1]
	  Position		  [625, 231, 660, 259]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.44 "
	  "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
	  "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
	  "text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret"
	  SID			  "722"
	  Ports			  [1, 1]
	  Position		  [365, 180, 410, 200]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the binary representation.   You can changed the signal between s"
	  "igned and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>"
	  "Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned wi"
	  "th 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in "
	  "binary)."
	  force_arith_type	  on
	  arith_type		  "Signed  (2's comp)"
	  force_bin_pt		  on
	  bin_pt		  "15"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,309"
	  block_type		  "reinterpret"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret1"
	  SID			  "723"
	  Ports			  [1, 1]
	  Position		  [365, 235, 410, 255]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the binary representation.   You can changed the signal between s"
	  "igned and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>"
	  "Example:  Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned wi"
	  "th 0 fractional bits.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in "
	  "binary)."
	  force_arith_type	  on
	  arith_type		  "Signed  (2's comp)"
	  force_bin_pt		  on
	  bin_pt		  "15"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,309"
	  block_type		  "reinterpret"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "724"
	  Position		  [870, 180, 890, 200]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "725"
	  Position		  [870, 235, 890, 255]
	  ShowName		  off
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  DstBlock		  "Register"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "32b"
	  SrcPort		  1
	  Points		  [65, 0]
	  Branch {
	    DstBlock		    "16LSB"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -55]
	    DstBlock		    "16MSB"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Register1"
	  SrcPort		  1
	  DstBlock		  "RFD_DAC_Q"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register"
	  SrcPort		  1
	  DstBlock		  "RFD_DAC_I"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "16MSB"
	  SrcPort		  1
	  DstBlock		  "Reinterpret"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "16LSB"
	  SrcPort		  1
	  DstBlock		  "Reinterpret1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Reinterpret"
	  SrcPort		  1
	  DstBlock		  "Convert"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Reinterpret1"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFD_DAC_I"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFD_DAC_Q"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "RFD Tx Buffers"
      SID		      "1370"
      Ports		      [3, 1]
      Position		      [1220, 1226, 1300, 1284]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RFD Tx Buffers"
	Location		[-146, 102, 2410, 1408]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "RdAddr"
	  SID			  "1371"
	  Position		  [230, 458, 260, 472]
	  NamePlacement		  "alternate"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "Rst"
	  SID			  "1372"
	  Position		  [475, 258, 505, 272]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "En"
	  SID			  "1373"
	  Position		  [475, 288, 505, 302]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+0"
	  SID			  "1374"
	  Ports			  [1, 1]
	  Position		  [565, 486, 610, 504]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+16"
	  SID			  "1375"
	  Ports			  [1, 1]
	  Position		  [565, 566, 610, 584]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "16"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+24"
	  SID			  "1376"
	  Ports			  [1, 1]
	  Position		  [565, 606, 610, 624]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "24"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "8LSB+8"
	  SID			  "1377"
	  Ports			  [1, 1]
	  Position		  [565, 526, 610, 544]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "8"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "8"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([19"
	  ".55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat1"
	  SID			  "1378"
	  Ports			  [4, 1]
	  Position		  [675, 471, 720, 639]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "45,168,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 168 168 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 45 45 0 0 ],[0 0 168 168 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[90.66 90.66"
	  " 96.66 90.66 96.66 96.66 96.66 90.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[84.66 84.66 90.66 90.66 8"
	  "4.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[78.66 78.66 84.66 84.66 78.66 ],[1 1 1 ]);\npa"
	  "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[72.66 72.66 78.66 72.66 78.66 78.66 72.66 ],[0.931 0.946 0.973 ]);"
	  "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
	  "put',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode',"
	  "'on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "1379"
	  Ports			  [0, 1]
	  Position		  [1025, 340, 1050, 360]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
	  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
	  "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  SID			  "1382"
	  Ports			  [1, 1]
	  Position		  [990, 273, 1015, 287]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,374,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.22 11.22 "
	  "9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931 0."
	  "946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.55 16.44 14.44 "
	  "12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon"
	  " graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprintf('',"
	  "'COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  SID			  "1383"
	  Ports			  [1, 1]
	  Position		  [740, 288, 760, 302]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,374,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "20,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 9"
	  ".22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931 0.94"
	  "6 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10."
	  "44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon gra"
	  "phics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprintf('','COM"
	  "MENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From"
	  SID			  "3877"
	  Position		  [565, 384, 695, 406]
	  ZOrder		  -9
	  ShowName		  off
	  GotoTag		  "TX_BYTE_ORDER"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From31"
	  SID			  "2237"
	  Position		  [275, 486, 470, 504]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_DOUT"
	  IconDisplay		  "Signal name"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto1"
	  SID			  "2797"
	  Position		  [1280, 161, 1430, 179]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto2"
	  SID			  "2814"
	  Position		  [1280, 186, 1430, 204]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_DATA"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto31"
	  SID			  "2238"
	  Position		  [320, 456, 470, 474]
	  ShowName		  off
	  GotoTag		  "RFD_IQ_TX_ADDR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "1385"
	  Ports			  [1, 1]
	  Position		  [790, 286, 820, 304]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "30,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([12"
	  ".55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('"
	  "','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  SID			  "1386"
	  Ports			  [2, 1]
	  Position		  [855, 250, 910, 310]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,261"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "55,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37.77 37.7"
	  "7 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30.77 37.77 37"
	  ".77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.77 23.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77 16.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "1387"
	  Ports			  [3, 1]
	  Position		  [1145, 263, 1190, 367]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,303"
	  block_type		  "mux"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux1"
	  SID			  "1388"
	  Ports			  [3, 1]
	  Position		  [825, 378, 870, 482]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65"
	  " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66"
	  " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46"
	  ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0"
	  ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl"
	  "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3"
	  ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFD TX Delay for memory"
	  SID			  "2796"
	  Ports			  [1, 1]
	  Position		  [615, 283, 665, 307]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
	  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12.33 15.33 15"
	  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
	  "]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "IQ_32b"
	  SID			  "1390"
	  Position		  [1280, 308, 1310, 322]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  DstBlock		  "Convert"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert"
	  SrcPort		  1
	  Points		  [35, 0]
	  Branch {
	    DstBlock		    "Mux"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -110]
	    DstBlock		    "Goto1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Rst"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "En"
	  SrcPort		  1
	  DstBlock		  "RFD TX Delay for memory"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Inverter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "RdAddr"
	  SrcPort		  1
	  DstBlock		  "Goto31"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    DstBlock		    "IQ_32b"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -120]
	    DstBlock		    "Goto2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "8LSB+0"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "8LSB+8"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "8LSB+16"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "8LSB+24"
	  SrcPort		  1
	  DstBlock		  "Concat1"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Concat1"
	  SrcPort		  1
	  Points		  [35, 0; 0, -90]
	  DstBlock		  "Mux1"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From31"
	  SrcPort		  1
	  Points		  [55, 0]
	  Branch {
	    DstBlock		    "8LSB+0"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 40]
	    Branch {
	      DstBlock		      "8LSB+8"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 40]
	      Branch {
		DstBlock		"8LSB+16"
		DstPort			1
	      }
	      Branch {
		Points			[0, 40]
		DstBlock		"8LSB+24"
		DstPort			1
	      }
	    }
	  }
	  Branch {
	    Points		    [0, -65]
	    DstBlock		    "Mux1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  Points		  [50, 0; 0, -115]
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "RFD TX Delay for memory"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From"
	  SrcPort		  1
	  DstBlock		  "Mux1"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RFD Tx Buffers Reg"
      SID		      "4689"
      Ports		      [1, 1]
      Position		      [1370, 1244, 1425, 1266]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "RSSI Clock Gen"
      SID		      "1184"
      Ports		      [0, 1]
      Position		      [75, 293, 125, 337]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"RSSI Clock Gen"
	Location		[18, 1100, 370, 1311]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Reference
	  Name			  "1LSB+0"
	  SID			  "1179"
	  Ports			  [1, 1]
	  Position		  [435, 316, 470, 334]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14"
	  ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "1LSB+1"
	  SID			  "1180"
	  Ports			  [1, 1]
	  Position		  [435, 351, 470, 369]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "1"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14"
	  ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "1LSB+2"
	  SID			  "1181"
	  Ports			  [1, 1]
	  Position		  [435, 386, 470, 404]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14"
	  ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From4"
	  SID			  "1187"
	  Position		  [295, 281, 430, 299]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RSSI_CLK_SEL"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "1177"
	  Ports			  [4, 1]
	  Position		  [520, 268, 570, 417]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "50,149,4,1,white,blue,3,58b3489d,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 21.2857 127.714 149 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 50 50 0 0 ],[0 21.2857 127.714 149 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.4"
	  "25 9.425 ],[81.77 81.77 88.77 81.77 88.77 88.77 88.77 81.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],"
	  "[74.77 74.77 81.77 81.77 74.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[67.77 67.77 74.77"
	  " 74.77 67.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[60.77 60.77 67.77 60.77 67.77 67.7"
	  "7 60.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	  ";\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab"
	  "el('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texmode','on');\nf"
	  "printf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RSSI Clock\nGenerator"
	  SID			  "120"
	  Ports			  [0, 1]
	  Position		  [340, 312, 385, 338]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "3"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  off
	  en			  off
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,630"
	  block_type		  "counter"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "45,26,0,1,white,blue,0,7ac47ef5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 26 26 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16.33 16.3"
	  "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13.33 16.33 16"
	  ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
	  " 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
	  " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');di"
	  "sp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Clk"
	  SID			  "1186"
	  Position		  [655, 338, 685, 352]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "1LSB+2"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "1LSB+1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "1LSB+0"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "RSSI Clock\nGenerator"
	  SrcPort		  1
	  Points		  [10, 0]
	  Branch {
	    DstBlock		    "1LSB+0"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 35]
	    Branch {
	      DstBlock		      "1LSB+1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 35]
	      DstBlock		      "1LSB+2"
	      DstPort		      1
	    }
	  }
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "Clk"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From4"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "RSSI_ADC_CLK"
      SID		      "121"
      Ports		      [1, 1]
      Position		      [235, 308, 275, 322]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, do"
      "uble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discar"
      "ded, depending on how they are configured."
      inherit_from_input      off
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      UseAsDAC		      off
      DACChannel	      "'1'"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "gatewayout"
      block_version	      "8.2"
      sg_icon_stat	      "40,14,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0."
      "93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.2"
      "2 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9."
      "22 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\n"
      "patch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
      "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','CO"
      "MMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Register"
      SID		      "594"
      Ports		      [1, 1]
      Position		      [370, 951, 405, 979]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      block_version	      "8.2"
      sg_icon_stat	      "35,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18"
      ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.4"
      "4 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
      "patch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
      "nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
      "f('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Relational1"
      SID		      "4669"
      Ports		      [2, 1]
      Position		      [1930, 994, 1975, 1041]
      NamePlacement	      "alternate"
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Relational"
      SourceType	      "Xilinx Arithmetic Relational Operator Block"
      mode		      "a=b"
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,348,193"
      block_type	      "relational"
      block_version	      "8.2"
      sg_icon_stat	      "45,47,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66"
      " 29.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.6"
      "6 29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1"
      " 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 "
      "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac"
      "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,"
      "'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Relational2"
      SID		      "4672"
      Ports		      [2, 1]
      Position		      [1930, 1134, 1975, 1181]
      NamePlacement	      "alternate"
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Relational"
      SourceType	      "Xilinx Arithmetic Relational Operator Block"
      mode		      "a=b"
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,348,193"
      block_type	      "relational"
      block_version	      "8.2"
      sg_icon_stat	      "45,47,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66"
      " 29.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.6"
      "6 29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1"
      " 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 "
      "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac"
      "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,"
      "'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Relational3"
      SID		      "4675"
      Ports		      [2, 1]
      Position		      [1930, 1274, 1975, 1321]
      NamePlacement	      "alternate"
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Relational"
      SourceType	      "Xilinx Arithmetic Relational Operator Block"
      mode		      "a=b"
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,348,193"
      block_type	      "relational"
      block_version	      "8.2"
      sg_icon_stat	      "45,47,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66"
      " 29.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.6"
      "6 29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1"
      " 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 "
      "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac"
      "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,"
      "'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Relational6"
      SID		      "4656"
      Ports		      [2, 1]
      Position		      [1930, 854, 1975, 901]
      NamePlacement	      "alternate"
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Relational"
      SourceType	      "Xilinx Arithmetic Relational Operator Block"
      mode		      "a=b"
      en		      off
      latency		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,348,193"
      block_type	      "relational"
      block_version	      "8.2"
      sg_icon_stat	      "45,47,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66"
      " 29.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.6"
      "6 29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1"
      " 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 "
      "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac"
      "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,"
      "'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Rx Control"
      SID		      "595"
      Ports		      [1, 2]
      Position		      [730, 311, 825, 369]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Rx Control"
	Location		[2, 82, 1679, 1121]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "Start"
	  SID			  "596"
	  Position		  [15, 488, 45, 502]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat4"
	  SID			  "3616"
	  Ports			  [2, 1]
	  Position		  [1225, 320, 1250, 395]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "25,75,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 75 75 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 75 75 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[40.33 40.33 43"
	  ".33 40.33 43.33 43.33 43.33 40.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[37.33 37.33 40.33 40.33 37.3"
	  "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[34.33 34.33 37.33 37.33 34.33 ],[1 1 1 ]);\npatc"
	  "h([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[31.33 31.33 34.33 31.33 34.33 34.33 31.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant1"
	  SID			  "3586"
	  Ports			  [0, 1]
	  Position		  [1345, 675, 1370, 695]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "1"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
	  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
	  "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin"
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	  equ			  "P=C"
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	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
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	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RF_RX_IQ_RSSI_ERROR_CLR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out1"
	  SID			  "598"
	  Ports			  [1, 1]
	  Position		  [380, 1015, 410, 1025]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
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	  SID			  "599"
	  Ports			  [1, 1]
	  Position		  [380, 1030, 410, 1040]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out3"
	  SID			  "600"
	  Ports			  [1, 1]
	  Position		  [380, 1045, 410, 1055]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
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	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out4"
	  SID			  "601"
	  Ports			  [1, 1]
	  Position		  [380, 1060, 410, 1070]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
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	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out5"
	  SID			  "602"
	  Ports			  [1, 1]
	  Position		  [380, 1075, 410, 1085]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto1"
	  SID			  "1393"
	  Position		  [1325, 106, 1515, 124]
	  ShowName		  off
	  GotoTag		  "RX_RUNNING"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto3"
	  SID			  "3588"
	  Position		  [1895, 616, 2100, 634]
	  ShowName		  off
	  GotoTag		  "RF_RX_IQ_RSSI_INT"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto4"
	  SID			  "3589"
	  Position		  [1030, 531, 1235, 549]
	  ShowName		  off
	  GotoTag		  "RF_RX_IQ_BUF_OCCUPANCY"
	  TagVisibility		  "global"
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	Block {
	  BlockType		  Goto
	  Name			  "Goto5"
	  SID			  "3592"
	  Position		  [1725, 811, 1930, 829]
	  ShowName		  off
	  GotoTag		  "RF_RX_IQ_RSSI_ERROR"
	  TagVisibility		  "global"
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	Block {
	  BlockType		  Goto
	  Name			  "Goto6"
	  SID			  "3620"
	  Position		  [1325, 351, 1630, 369]
	  ShowName		  off
	  GotoTag		  "RF_RX_IQ_BUF_WR_BYTE_OFFSET_UPDATE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto7"
	  SID			  "4006"
	  Position		  [1325, 216, 1630, 234]
	  ShowName		  off
	  GotoTag		  "RX_COUNTER_WRITE_ADDR"
	  TagVisibility		  "global"
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	Block {
	  BlockType		  Reference
	  Name			  "Inverter1"
	  SID			  "604"
	  Ports			  [1, 1]
	  Position		  [750, 196, 775, 214]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "8.2"
	  sg_icon_stat		  "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
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	  "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en"
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	  "end icon text');"
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	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  SID			  "3654"
	  Ports			  [2, 1]
	  Position		  [1330, 910, 1385, 970]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "55,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
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	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
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	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  SID			  "3855"
	  Ports			  [2, 1]
	  Position		  [1790, 595, 1845, 655]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "55,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
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	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77 16.77 ],[0.931 0"
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	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge (2 cycles)"
	  SID			  "4705"
	  Ports			  [1, 1]
	  Position		  [1655, 598, 1700, 622]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
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	  System {
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	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
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	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
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	      Name		      "D"
	      SID		      "4706"
	      Position		      [25, 33, 55, 47]
	      IconDisplay	      "Port number"
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	    Block {
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	      SID		      "4707"
	      Ports		      [1, 1]
	      Position		      [185, 45, 215, 75]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0"
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	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di"
	      "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay1"
	      SID		      "4711"
	      Ports		      [1, 1]
	      Position		      [265, 45, 295, 75]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 "
	      "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1"
	      "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di"
	      "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "4708"
	      Ports		      [1, 1]
	      Position		      [105, 47, 135, 73]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],["
	      "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1"
	      "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13."
	      "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      SID		      "4709"
	      Ports		      [2, 1]
	      Position		      [350, 29, 385, 71]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55"
	      " 26.55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26"
	      ".55 26.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 "
	      "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0."
	      "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "4710"
	      Position		      [440, 43, 470, 57]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [0, 0; 15, 0]
	      Branch {
		Points			[0, 20]
		DstBlock		"Inverter"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Delay1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay1"
	      SrcPort		      1
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 1 (2 cycles)"
	  SID			  "4712"
	  Ports			  [1, 1]
	  Position		  [1655, 628, 1700, 652]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 1 (2 cycles)"
	    Location		    [203, 98, 2406, 1393]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "4713"
	      Position		      [25, 33, 55, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "4714"
	      Ports		      [1, 1]
	      Position		      [185, 45, 215, 75]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 "
	      "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1"
	      "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di"
	      "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay1"
	      SID		      "4715"
	      Ports		      [1, 1]
	      Position		      [265, 45, 295, 75]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 "
	      "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1"
	      "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di"
	      "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "4716"
	      Ports		      [1, 1]
	      Position		      [105, 47, 135, 73]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],["
	      "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1"
	      "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13."
	      "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      SID		      "4717"
	      Ports		      [2, 1]
	      Position		      [350, 29, 385, 71]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55"
	      " 26.55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26"
	      ".55 26.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 "
	      "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0."
	      "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "4718"
	      Position		      [440, 43, 470, 57]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [0, 0; 15, 0]
	      Branch {
		Points			[0, 20]
		DstBlock		"Inverter"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Delay1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay1"
	      SrcPort		      1
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select1"
	  SID			  "3645"
	  Ports			  [1, 1]
	  Position		  [825, 193, 875, 217]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
	  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12.33 15.33 15"
	  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
	  "]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select2"
	  SID			  "3655"
	  Ports			  [2, 1]
	  Position		  [890, 729, 940, 771]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,42,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66 27.66 3"
	  "3.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27.66 27.66 21"
	  ".66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 1 ]);\np"
	  "atch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');"
	  "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select3"
	  SID			  "3824"
	  Ports			  [2, 1]
	  Position		  [1125, 318, 1180, 362]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "55,44,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 44 44 0 ]);\npatch([13.65 22.32 28.32 34.32 40.32 28.32 19.65 13.65 ],[28.66 28.66 3"
	  "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([19.65 28.32 22.32 13.65 19.65 ],[22.66 22.66 28.66 28.66 22"
	  ".66 ],[0.931 0.946 0.973 ]);\npatch([13.65 22.32 28.32 19.65 13.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\np"
	  "atch([19.65 40.32 34.32 28.32 22.32 13.65 19.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ]"
	  ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('"
	  "input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('blac"
	  "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select4"
	  SID			  "3825"
	  Ports			  [1, 1]
	  Position		  [825, 263, 875, 287]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
	  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12.33 15.33 15"
	  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
	  "]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select5"
	  SID			  "3834"
	  Ports			  [1, 1]
	  Position		  [740, 263, 790, 287]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
	  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12.33 15.33 15"
	  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
	  "]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select6"
	  SID			  "4008"
	  Ports			  [1, 1]
	  Position		  [1445, 928, 1495, 952]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15.33 15.3"
	  "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12.33 15.33 15"
	  ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
	  "]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RF_RX_IQ_RSSI_INT"
	  SID			  "3652"
	  Ports			  [1, 1]
	  Position		  [1990, 533, 2030, 547]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,14,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
	  "22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
	  "985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
	  ".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\nfprintf('','COMME"
	  "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor"
	  "('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  SID			  "606"
	  Ports			  [2, 1]
	  Position		  [350, 294, 395, 341]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,6218dc92,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmode'"
	  ",'on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational3"
	  SID			  "3587"
	  Ports			  [2, 1]
	  Position		  [1335, 569, 1380, 616]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>b"
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	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,b5131c97,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmode','on"
	  "');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational4"
	  SID			  "3593"
	  Ports			  [2, 1]
	  Position		  [1335, 739, 1380, 786]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>b"
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	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,b5131c97,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmode','on"
	  "');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Rx Addr Counter"
	  SID			  "3609"
	  Ports			  [4, 1]
	  Position		  [945, 184, 1025, 331]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "30"
	  bin_pt		  "0"
	  load_pin		  on
	  rst			  on
	  en			  on
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,630"
	  block_type		  "counter"
	  block_version		  "8.2"
	  sg_icon_stat		  "80,147,4,1,white,blue,0,cf0879bb,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 147 147 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 80 80 0 0 ],[0 0 147 147 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[85.21 "
	  "85.21 96.21 85.21 96.21 96.21 96.21 85.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[74.21 74.21 85.2"
	  "1 85.21 74.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[63.21 63.21 74.21 74.21 63.21 ],"
	  "[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[52.21 52.21 63.21 52.21 63.21 63.21 52.21 ],[0.9"
	  "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac"
	  "k');port_label('input',1,'load');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3"
	  ",'rst');\ncolor('black');port_label('input',4,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Scope
	  Name			  "Rx Control"
	  SID			  "608"
	  Ports			  [5]
	  Position		  [515, 1012, 545, 1088]
	  Floating		  off
	  Location		  [830, 256, 2215, 964]
	  Open			  off
	  NumInputPorts		  "5"
	  List {
	    ListType		    AxesTitles
	    axes1		    "%<SignalLabel>"
	    axes2		    "%<SignalLabel>"
	    axes3		    "%<SignalLabel>"
	    axes4		    "%<SignalLabel>"
	    axes5		    "%<SignalLabel>"
	  }
	  TimeRange		  "70000"
	  YMin			  "0~0~0~0~0"
	  YMax			  "1~1~1~100~20000"
	  SaveName		  "ScopeData1"
	  DataFormat		  "StructureWithTime"
	  LimitDataPoints	  off
	  SampleTime		  "0"
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	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "609"
	  Ports			  [2, 1]
	  Position		  [615, 292, 655, 328]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [2, 74, 1184, 1000]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "610"
	      Position		      [125, 198, 155, 212]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "611"
	      Position		      [125, 178, 155, 192]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert"
	      SID		      "612"
	      Ports		      [1, 1]
	      Position		      [200, 178, 230, 192]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,374,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "613"
	      Ports		      [1, 1]
	      Position		      [200, 198, 230, 212]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,374,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "614"
	      Ports		      [3, 1]
	      Position		      [280, 153, 330, 217]
	      NamePlacement	      "alternate"
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "50,64,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 64 64 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 64 64 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],["
	      "39.77 39.77 46.77 39.77 46.77 46.77 46.77 39.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[32.77 3"
	      "2.77 39.77 39.77 32.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[25.77 25.77 32.77 32."
	      "77 25.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[18.77 18.77 25.77 18.77 25.77 25.7"
	      "7 18.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
	      "xt');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');p"
	      "ort_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode',"
	      "'on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "zero3"
	      SID		      "615"
	      Ports		      [0, 1]
	      Position		      [215, 156, 235, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22"
	      " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11"
	      ".22 9.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\np"
	      "atch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfpr"
	      "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out"
	      "put',1,'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "616"
	      Position		      [395, 178, 425, 192]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Convert"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "zero3"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch1"
	  SID			  "3595"
	  Ports			  [2, 1]
	  Position		  [1560, 802, 1600, 838]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch1"
	    Location		    [2, 74, 1184, 1000]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "3596"
	      Position		      [125, 198, 155, 212]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "3597"
	      Position		      [125, 178, 155, 192]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert"
	      SID		      "3598"
	      Ports		      [1, 1]
	      Position		      [200, 178, 230, 192]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,374,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "3599"
	      Ports		      [1, 1]
	      Position		      [200, 198, 230, 212]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,374,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "3600"
	      Ports		      [3, 1]
	      Position		      [280, 153, 330, 217]
	      NamePlacement	      "alternate"
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "50,64,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 64 64 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 64 64 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],["
	      "39.77 39.77 46.77 39.77 46.77 46.77 46.77 39.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[32.77 3"
	      "2.77 39.77 39.77 32.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[25.77 25.77 32.77 32."
	      "77 25.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[18.77 18.77 25.77 18.77 25.77 25.7"
	      "7 18.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
	      "xt');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');p"
	      "ort_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode',"
	      "'on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "zero3"
	      SID		      "3601"
	      Ports		      [0, 1]
	      Position		      [215, 156, 235, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22"
	      " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11"
	      ".22 9.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\np"
	      "atch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfpr"
	      "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out"
	      "put',1,'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "3602"
	      Position		      [395, 178, 425, 192]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Convert"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "zero3"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator"
	  SID			  "3653"
	  Position		  [2080, 530, 2100, 550]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "Threshold Mux"
	  SID			  "3585"
	  Ports			  [3, 1]
	  Position		  [1455, 572, 1485, 708]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "30,136,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 19.4286 116.571 136 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6"
	  ".1 ],[72.44 72.44 76.44 72.44 76.44 76.44 76.44 72.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[68.44 68.44"
	  " 72.44 72.44 68.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[64.44 64.44 68.44 68.44 64.44 ],[1 "
	  "1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[60.44 60.44 64.44 60.44 64.44 64.44 60.44 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\n\nc"
	  "olor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "WR - RD"
	  SID			  "3583"
	  Ports			  [2, 1]
	  Position		  [615, 714, 660, 761]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/AddSub"
	  SourceType		  "Xilinx Adder/Subtracter Block"
	  mode			  "Subtraction"
	  use_carryin		  off
	  use_carryout		  off
	  en			  off
	  latency		  "0"
	  precision		  "User Defined"
	  arith_type		  "Unsigned"
	  n_bits		  "30"
	  bin_pt		  "0"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  hw_selection		  "Fabric"
	  pipelined		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "addsub"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}','texmode','"
	  "on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "rd_byte_offset[31:2]"
	  SID			  "3570"
	  Ports			  [1, 1]
	  Position		  [355, 741, 395, 759]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "30"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "rf_rx_iq_int_reg"
	  SID			  "4822"
	  Ports			  [1, 1]
	  Position		  [1895, 529, 1950, 551]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
	  "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
	  ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
	  "]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "wr_byte_offset[31:2]"
	  SID			  "3643"
	  Ports			  [1, 1]
	  Position		  [350, 231, 390, 249]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "30"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "WrAddr"
	  SID			  "618"
	  Position		  [1325, 253, 1355, 267]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "WrEn"
	  SID			  "619"
	  Position		  [1325, 173, 1355, 187]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  Points		  [60, 0]
	  Branch {
	    Points		    [0, -105]
	    Branch {
	      DstBlock		      "Inverter1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, -90; 405, 0]
	      Branch {
		Points			[0, 65]
		DstBlock		"WrEn"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Goto1"
		DstPort			1
	      }
	    }
	  }
	  Branch {
	    Points		    [25, 0]
	    Branch {
	      DstBlock		      "Rx Addr Counter"
	      DstPort		      4
	    }
	    Branch {
	      Points		      [0, 40]
	      Branch {
		DstBlock		"RFA Delay Cycle for Select3"
		DstPort			2
	      }
	      Branch {
		Points			[0, 410]
		DstBlock		"RFA Delay Cycle for Select2"
		DstPort			2
	      }
	    }
	  }
	}
	Line {
	  SrcBlock		  "Gateway Out5"
	  SrcPort		  1
	  DstBlock		  "Rx Control"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "Gateway Out4"
	  SrcPort		  1
	  DstBlock		  "Rx Control"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Gateway Out3"
	  SrcPort		  1
	  DstBlock		  "Rx Control"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Gateway Out2"
	  SrcPort		  1
	  DstBlock		  "Rx Control"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out1"
	  SrcPort		  1
	  DstBlock		  "Rx Control"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From6"
	  SrcPort		  1
	  DstBlock		  "rd_byte_offset[31:2]"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational3"
	  SrcPort		  1
	  DstBlock		  "Threshold Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "Threshold Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Constant2"
	  SrcPort		  1
	  DstBlock		  "Threshold Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From8"
	  SrcPort		  1
	  DstBlock		  "Relational3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational4"
	  SrcPort		  1
	  DstBlock		  "Error Threshold Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant3"
	  SrcPort		  1
	  DstBlock		  "Error Threshold Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Constant4"
	  SrcPort		  1
	  DstBlock		  "Error Threshold Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Error Threshold Mux"
	  SrcPort		  1
	  DstBlock		  "S-R Latch1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant6"
	  SrcPort		  1
	  DstBlock		  "Relational4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From5"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, -45]
	    DstBlock		    "RFA Delay Cycle for Select5"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [140, 0]
	    Branch {
	      DstBlock		      "S-R Latch"
	      DstPort		      2
	    }
	    Branch {
	      Points		      [0, 175; 945, 0; 0, 115]
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	  }
	}
	Line {
	  SrcBlock		  "Rx Addr Counter"
	  SrcPort		  1
	  Points		  [55, 0]
	  Branch {
	    Points		    [40, 0]
	    Branch {
	      Points		      [0, -35]
	      DstBlock		      "Goto7"
	      DstPort		      1
	    }
	    Branch {
	      DstBlock		      "WrAddr"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, 70]
	    DstBlock		    "RFA Delay Cycle for Select3"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant12"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Concat4"
	  SrcPort		  1
	  DstBlock		  "Goto6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S-R Latch1"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  DstBlock		  "Goto5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From7"
	  SrcPort		  1
	  DstBlock		  "wr_byte_offset[31:2]"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "wr_byte_offset[31:2]"
	  SrcPort		  1
	  DstBlock		  "Rx Addr Counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Inverter1"
	  SrcPort		  1
	  DstBlock		  "RFA Delay Cycle for Select1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFA Delay Cycle for Select1"
	  SrcPort		  1
	  DstBlock		  "Rx Addr Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RF_RX_IQ_RSSI_INT"
	  SrcPort		  1
	  DstBlock		  "Terminator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "RFA Delay Cycle for Select6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From9"
	  SrcPort		  1
	  DstBlock		  "Logical1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "RFA Delay Cycle for Select3"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFA Delay Cycle for Select4"
	  SrcPort		  1
	  DstBlock		  "Rx Addr Counter"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "RFA Delay Cycle for Select5"
	  SrcPort		  1
	  DstBlock		  "RFA Delay Cycle for Select4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  Points		  [10, 0]
	  Branch {
	    DstBlock		    "Goto3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -85]
	    DstBlock		    "rf_rx_iq_int_reg"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Threshold Mux"
	  SrcPort		  1
	  DstBlock		  "Posedge 1 (2 cycles)"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert2"
	  SrcPort		  1
	  DstBlock		  "Posedge (2 cycles)"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From4"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From2"
	  SrcPort		  1
	  DstBlock		  "WR - RD"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "rd_byte_offset[31:2]"
	  SrcPort		  1
	  DstBlock		  "WR - RD"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "WR - RD"
	  SrcPort		  1
	  DstBlock		  "RFA Delay Cycle for Select2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFA Delay Cycle for Select2"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    DstBlock		    "Relational4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -170]
	    Branch {
	      Points		      [0, -40]
	      DstBlock		      "Goto4"
	      DstPort		      1
	    }
	    Branch {
	      DstBlock		      "Relational3"
	      DstPort		      1
	    }
	  }
	}
	Line {
	  SrcBlock		  "Start"
	  SrcPort		  1
	  Points		  [470, 0]
	  Branch {
	    Points		    [0, -195]
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 430]
	    DstBlock		    "Logical1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "RFA Delay Cycle for Select6"
	  SrcPort		  1
	  Points		  [30, 0; 0, -110]
	  DstBlock		  "S-R Latch1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From32"
	  SrcPort		  1
	  DstBlock		  "Gateway Out1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From28"
	  SrcPort		  1
	  DstBlock		  "Gateway Out2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From33"
	  SrcPort		  1
	  DstBlock		  "Gateway Out3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From29"
	  SrcPort		  1
	  DstBlock		  "Gateway Out4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From34"
	  SrcPort		  1
	  DstBlock		  "Gateway Out5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Posedge 1 (2 cycles)"
	  SrcPort		  1
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Posedge (2 cycles)"
	  SrcPort		  1
	  DstBlock		  "Logical2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "rf_rx_iq_int_reg"
	  SrcPort		  1
	  DstBlock		  "RF_RX_IQ_RSSI_INT"
	  DstPort		  1
	}
	Annotation {
	  Name			  "if ((Occupancy > Threshold) || (done)) {\n    Interrupt = 1\n} else {\n    Interrupt = 0\n}"
	  Position		  [1916, 681]
	  HorizontalAlignment	  "left"
	}
	Annotation {
	  Name			  "NOTE:  To load value on DIN:  (en == 1) && (rst == 0) && (load == 1)"
	  Position		  [906, 163]
	}
	Annotation {
	  Name			  "if (Occupancy > Num Samples supported by Memory) {\n    Error = 1\n} \n\nif (ERROR_CLR || Start) {\n    E"
	  "rror = 0\n}"
	  Position		  [1666, 906]
	  HorizontalAlignment	  "left"
	}
	Annotation {
	  Name			  "RX Length is given in samples"
	  Position		  [91, 355]
	}
	Annotation {
	  Name			  "Convert to memory address (sample is 4 bytes)"
	  Position		  [1512, 383]
	}
	Annotation {
	  Name			  "Suppress any spurrious interrupts while \naddress comparisions occur."
	  Position		  [1893, 505]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "StopTx"
      SID		      "622"
      Ports		      [1, 1]
      Position		      [235, 819, 290, 831]
      NamePlacement	      "alternate"
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Gateway In"
      SourceType	      "Xilinx Gateway In Block"
      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to "
      " Xilinx fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top lev"
      "el input ports."
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "1"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      quantization	      "Round  (unbiased: +/- Inf)"
      overflow		      "Saturate"
      period		      "1"
      dbl_ovrd		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      UseAsADC		      off
      ADCChannel	      "'1'"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      inherit_from_input      off
      hdl_port		      "on"
      has_advanced_control    "0"
      sggui_pos		      "20,20,356,432"
      block_type	      "gatewayin"
      block_version	      "VER_STRING_GOES_HERE"
      sg_icon_stat	      "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0."
      "93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ],["
      "7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7.11 "
      "7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1"
      " ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0"
      ".895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por"
      "t_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprin"
      "tf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "TX Output Select"
      SID		      "4660"
      Ports		      [3, 1]
      Position		      [745, 1047, 775, 1153]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Mux"
      SourceType	      "Xilinx Bus Multiplexer Block"
      inputs		      "2"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "14"
      quantization	      "Truncate"
      overflow		      "Wrap"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "mux"
      sg_icon_stat	      "30,106,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.1429 90.8571 106 "
      "0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.1429 90.8571 106 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15"
      ".88 10.1 6.1 ],[57.44 57.44 61.44 57.44 61.44 61.44 61.44 57.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ]"
      ",[53.44 53.44 57.44 57.44 53.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[49.44 49.44 53.44 5"
      "3.44 49.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[45.44 45.44 49.44 45.44 49.44 49.44 45."
      "44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n"
      "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab"
      "el('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "TX RX Loopback Reg"
      SID		      "4739"
      Ports		      [1, 1]
      Position		      [1645, 19, 1700, 41]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Terminator
      Name		      "Terminator"
      SID		      "623"
      Position		      [325, 305, 345, 325]
      ShowName		      off
    }
    Block {
      BlockType		      Terminator
      Name		      "Terminator1"
      SID		      "672"
      Position		      [950, 1095, 960, 1105]
      NamePlacement	      "alternate"
      ShowName		      off
    }
    Block {
      BlockType		      Terminator
      Name		      "Terminator2"
      SID		      "671"
      Position		      [765, 680, 775, 690]
      BlockMirror	      on
      ShowName		      off
    }
    Block {
      BlockType		      Terminator
      Name		      "Terminator3"
      SID		      "3676"
      Position		      [495, 910, 505, 920]
      ShowName		      off
    }
    Block {
      BlockType		      SubSystem
      Name		      "Tx Control"
      SID		      "624"
      Ports		      [3, 2]
      Position		      [730, 788, 840, 892]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Tx Control"
	Location		[2, 82, 2082, 1095]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"106"
	Block {
	  BlockType		  Inport
	  Name			  "StartTx"
	  SID			  "625"
	  Position		  [55, 188, 85, 202]
	  NamePlacement		  "alternate"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "StopTx"
	  SID			  "4538"
	  Position		  [55, 1228, 85, 1242]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "ContinuousTx"
	  SID			  "4539"
	  Position		  [55, 1158, 85, 1172]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat4"
	  SID			  "4501"
	  Ports			  [2, 1]
	  Position		  [1175, 190, 1200, 265]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "2"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "25,75,2,1,white,blue,0,16398980,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 75 75 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 75 75 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[40.33 40.33 43"
	  ".33 40.33 43.33 43.33 43.33 40.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[37.33 37.33 40.33 40.33 37.3"
	  "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[34.33 34.33 37.33 37.33 34.33 ],[1 1 1 ]);\npatc"
	  "h([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[31.33 31.33 34.33 31.33 34.33 34.33 31.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant11"
	  SID			  "4566"
	  Ports			  [0, 1]
	  Position		  [470, 450, 495, 470]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
	  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
	  "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant12"
	  SID			  "4502"
	  Ports			  [0, 1]
	  Position		  [1075, 237, 1130, 253]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "2"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "55,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 16 16 0 ]);\npatch([22.55 25.44 27.44 29.44 31.44 27.44 24.55 22.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([24.55 27.44 25.44 22.55 24.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([22.55 25.44 27.44 24.55 22.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([24"
	  ".55 31.44 29.44 27.44 25.44 22.55 24.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');"
	  "\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant13"
	  SID			  "4571"
	  Ports			  [0, 1]
	  Position		  [460, 875, 485, 895]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "30"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
	  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
	  "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant14"
	  SID			  "4590"
	  Ports			  [0, 1]
	  Position		  [1345, 1035, 1370, 1055]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
	  "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
	  "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprin"
	  "tf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant8"
	  SID			  "4522"
	  Ports			  [0, 1]
	  Position		  [35, 1544, 100, 1566]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "NumSamps_Tx_IQ"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "30"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "65,22,0,1,white,blue,0,faa0de5e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 22 22 0 ]);\npatch([25.325 29.66 32.66 35.66 38.66 32.66 28.325 25.325 ],[14.33 14.3"
	  "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([28.325 32.66 29.66 25.325 28.325 ],[11.33 11.33 14.33 14"
	  ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([25.325 29.66 32.66 28.325 25.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
	  "]);\npatch([28.325 38.66 35.66 32.66 29.66 25.325 28.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('output',1,'16384');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant9"
	  SID			  "4555"
	  Ports			  [0, 1]
	  Position		  [460, 980, 485, 1000]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
	  "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
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	}
	Block {
	  BlockType		  From
	  Name			  "From4"
	  SID			  "20"
	  Position		  [490, 243, 585, 257]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "TX_DELAY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From5"
	  SID			  "4541"
	  Position		  [35, 1191, 285, 1209]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "TX_COUNTER_DONE"
	}
	Block {
	  BlockType		  From
	  Name			  "From6"
	  SID			  "4560"
	  Position		  [35, 1011, 285, 1029]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RFB_TX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From7"
	  SID			  "4547"
	  Position		  [35, 691, 285, 709]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "TX_WRITE_ADDR"
	}
	Block {
	  BlockType		  From
	  Name			  "From8"
	  SID			  "4561"
	  Position		  [35, 1036, 285, 1054]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RFC_TX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From9"
	  SID			  "4562"
	  Position		  [35, 1061, 285, 1079]
	  ShowName		  off
	  CloseFcn		  "tagdialog Close"
	  GotoTag		  "RFD_TX_BUF_EN"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out1"
	  SID			  "632"
	  Ports			  [1, 1]
	  Position		  [1465, 810, 1495, 820]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out2"
	  SID			  "633"
	  Ports			  [1, 1]
	  Position		  [1465, 825, 1495, 835]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out3"
	  SID			  "634"
	  Ports			  [1, 1]
	  Position		  [1465, 840, 1495, 850]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out4"
	  SID			  "635"
	  Ports			  [1, 1]
	  Position		  [1465, 855, 1495, 865]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out5"
	  SID			  "636"
	  Ports			  [1, 1]
	  Position		  [1465, 870, 1495, 880]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out6"
	  SID			  "637"
	  Ports			  [1, 1]
	  Position		  [1465, 885, 1495, 895]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out7"
	  SID			  "638"
	  Ports			  [1, 1]
	  Position		  [1465, 900, 1495, 910]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Gateway Out8"
	  SID			  "639"
	  Ports			  [1, 1]
	  Position		  [1465, 915, 1495, 925]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o"
	  "r fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discarded, depen"
	  "ding on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,386"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6.11 6.11 "
	  "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6.11 5.11 ],["
	  "0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([13."
	  "775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('"
	  "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')"
	  ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	  Port {
	    PortNumber		    1
	    Name		    "Tx Addr Ctr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto1"
	  SID			  "4567"
	  Position		  [710, 981, 1015, 999]
	  ShowName		  off
	  GotoTag		  "NOT_FINAL_TX_TMP_BUF_WR"
	  TagVisibility		  "local"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto10"
	  SID			  "4532"
	  Position		  [1265, 351, 1570, 369]
	  ShowName		  off
	  GotoTag		  "TX_RUNNING"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto11"
	  SID			  "4552"
	  Position		  [710, 671, 1015, 689]
	  ShowName		  off
	  GotoTag		  "RF_TX_IQ_BUF_OCCUPANCY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto12"
	  SID			  "4572"
	  Position		  [710, 866, 1015, 884]
	  ShowName		  off
	  GotoTag		  "TX_OCCUPANCY_IS_ZERO"
	  TagVisibility		  "local"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto13"
	  SID			  "4573"
	  Position		  [710, 806, 1015, 824]
	  ShowName		  off
	  GotoTag		  "TX_OCCUPANCY_LESS_THAN_THRESH"
	  TagVisibility		  "local"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto14"
	  SID			  "4612"
	  Position		  [280, 71, 420, 89]
	  ShowName		  off
	  GotoTag		  "TX_START"
	  TagVisibility		  "local"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto15"
	  SID			  "4601"
	  Position		  [1750, 1046, 2055, 1064]
	  ShowName		  off
	  GotoTag		  "RF_TX_IQ_ERROR"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto16"
	  SID			  "4622"
	  Position		  [710, 496, 1015, 514]
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	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical8"
	  SID			  "4603"
	  Ports			  [2, 1]
	  Position		  [1430, 1136, 1465, 1169]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,261"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.44 24.44 "
	  "20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 16.44 ],[0."
	  "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([12.1 25."
	  "88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
	  "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf('','COM"
	  "MENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Occupancy \nSelector"
	  SID			  "4550"
	  Ports			  [3, 1]
	  Position		  [550, 628, 585, 732]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "35,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5."
	  "875 ],[57.55 57.55 62.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 "
	  "52.55 57.55 57.55 52.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47"
	  ".55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge2"
	  SID			  "644"
	  Ports			  [1, 1]
	  Position		  [390, 113, 425, 127]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge2"
	    Location		    [132, 719, 452, 817]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "645"
	      Position		      [25, 33, 55, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "646"
	      Ports		      [1, 1]
	      Position		      [145, 45, 175, 75]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 "
	      "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1"
	      "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 "
	      "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973"
	      " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di"
	      "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "647"
	      Ports		      [1, 1]
	      Position		      [90, 47, 120, 73]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,251"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],["
	      "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1"
	      "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13."
	      "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      SID		      "648"
	      Ports		      [2, 1]
	      Position		      [205, 29, 240, 71]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,261"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55"
	      " 26.55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26"
	      ".55 26.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 "
	      "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0."
	      "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "649"
	      Position		      [265, 43, 295, 57]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [0, 0; 15, 0]
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "RFA Delay Cycle for Select3"
	  SID			  "4503"
	  Ports			  [2, 1]
	  Position		  [1075, 188, 1130, 232]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "55,44,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 44 44 0 ]);\npatch([13.65 22.32 28.32 34.32 40.32 28.32 19.65 13.65 ],[28.66 28.66 3"
	  "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([19.65 28.32 22.32 13.65 19.65 ],[22.66 22.66 28.66 28.66 22"
	  ".66 ],[0.931 0.946 0.973 ]);\npatch([13.65 22.32 28.32 19.65 13.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\np"
	  "atch([19.65 40.32 34.32 28.32 22.32 13.65 19.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ]"
	  ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('"
	  "input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('blac"
	  "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "RF_TX_IQ_INT"
	  SID			  "4574"
	  Ports			  [1, 1]
	  Position		  [905, 453, 945, 467]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,14,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
	  "22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
	  "985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
	  ".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\nfprintf('','COMME"
	  "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor"
	  "('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  SID			  "651"
	  Ports			  [2, 1]
	  Position		  [690, 181, 735, 274]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,93,2,1,white,blue,0,6218dc92,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 93 93 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 93 93 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[52.66 52.66 58."
	  "66 52.66 58.66 58.66 58.66 52.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[46.66 46.66 52.66 52.66 46.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[40.66 40.66 46.66 46.66 40.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[34.66 34.66 40.66 34.66 40.66 40.66 34.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmode'"
	  ",'on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational2"
	  SID			  "4520"
	  Ports			  [2, 1]
	  Position		  [510, 1399, 555, 1446]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a<b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,731fb07f,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa < b','texmode','on"
	  "');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational3"
	  SID			  "4521"
	  Ports			  [2, 1]
	  Position		  [510, 1519, 555, 1566]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,b5131c97,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmode','on"
	  "');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational4"
	  SID			  "4528"
	  Ports			  [2, 1]
	  Position		  [510, 1459, 555, 1506]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a<=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,52e4b236,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\leq b','texmode'"
	  ",'on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational5"
	  SID			  "4568"
	  Ports			  [2, 1]
	  Position		  [545, 789, 590, 836]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a<b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,731fb07f,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa < b','texmode','on"
	  "');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational6"
	  SID			  "4570"
	  Ports			  [2, 1]
	  Position		  [545, 849, 590, 896]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmode','on"
	  "');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "652"
	  Ports			  [2, 1]
	  Position		  [390, 187, 430, 223]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
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	  System {
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	    Location		    [2, 74, 1184, 726]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
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	    PaperType		    "usletter"
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	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
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	    ShowPageBoundaries	    off
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	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "653"
	      Position		      [125, 198, 155, 212]
	      IconDisplay	      "Port number"
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	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "654"
	      Position		      [125, 178, 155, 192]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
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	    Block {
	      BlockType		      Reference
	      Name		      "Convert"
	      SID		      "655"
	      Ports		      [1, 1]
	      Position		      [200, 178, 230, 192]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,374,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "656"
	      Ports		      [1, 1]
	      Position		      [200, 198, 230, 212]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,374,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
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	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "657"
	      Ports		      [3, 1]
	      Position		      [280, 153, 330, 217]
	      NamePlacement	      "alternate"
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "50,64,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 64 64 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 64 64 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],["
	      "39.77 39.77 46.77 39.77 46.77 46.77 46.77 39.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[32.77 3"
	      "2.77 39.77 39.77 32.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[25.77 25.77 32.77 32."
	      "77 25.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[18.77 18.77 25.77 18.77 25.77 25.7"
	      "7 18.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
	      "xt');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');p"
	      "ort_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode',"
	      "'on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "zero3"
	      SID		      "658"
	      Ports		      [0, 1]
	      Position		      [215, 156, 235, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22"
	      " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11"
	      ".22 9.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\np"
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	      "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out"
	      "put',1,'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "659"
	      Position		      [395, 178, 425, 192]
	      IconDisplay	      "Port number"
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	    Line {
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	      DstBlock		      "Register"
	      DstPort		      3
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	    Line {
	      SrcBlock		      "Convert"
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	      DstPort		      2
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	    Line {
	      SrcBlock		      "Register"
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	      DstBlock		      "Q"
	      DstPort		      1
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	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
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	    Line {
	      SrcBlock		      "R"
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	      DstBlock		      "Convert"
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	    Line {
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	      DstBlock		      "Register"
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	Block {
	  BlockType		  SubSystem
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	  SID			  "4593"
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	  Position		  [1590, 1037, 1630, 1073]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
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	  System {
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	    ModelBrowserVisibility  off
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	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
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	    Block {
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	      SID		      "4594"
	      Position		      [125, 198, 155, 212]
	      IconDisplay	      "Port number"
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	    Block {
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	      SID		      "4595"
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	      NamePlacement	      "alternate"
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	    Block {
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	      Position		      [200, 178, 230, 192]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,374,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "4597"
	      Ports		      [1, 1]
	      Position		      [200, 198, 230, 212]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,374,375"
	      block_type	      "convert"
	      block_version	      "8.2"
	      sg_icon_stat	      "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9"
	      ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22"
	      " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
	      "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
	      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
	      "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      SID		      "4598"
	      Ports		      [3, 1]
	      Position		      [280, 153, 330, 217]
	      NamePlacement	      "alternate"
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "8.2"
	      sg_icon_stat	      "50,64,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 64 64 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 64 64 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],["
	      "39.77 39.77 46.77 39.77 46.77 46.77 46.77 39.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[32.77 3"
	      "2.77 39.77 39.77 32.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[25.77 25.77 32.77 32."
	      "77 25.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[18.77 18.77 25.77 18.77 25.77 25.7"
	      "7 18.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
	      "xt');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');p"
	      "ort_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode',"
	      "'on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "zero3"
	      SID		      "4599"
	      Ports		      [0, 1]
	      Position		      [215, 156, 235, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "20,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22"
	      " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11"
	      ".22 9.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\np"
	      "atch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfpr"
	      "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out"
	      "put',1,'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "4600"
	      Position		      [395, 178, 425, 192]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Convert"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "zero3"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "TX_LENGTH - RD"
	  SID			  "4545"
	  Ports			  [2, 1]
	  Position		  [410, 619, 455, 666]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/AddSub"
	  SourceType		  "Xilinx Adder/Subtracter Block"
	  mode			  "Subtraction"
	  use_carryin		  off
	  use_carryout		  off
	  en			  off
	  latency		  "0"
	  precision		  "User Defined"
	  arith_type		  "Unsigned"
	  n_bits		  "30"
	  bin_pt		  "0"
	  quantization		  "Truncate"
	  overflow		  "Saturate"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  hw_selection		  "Fabric"
	  pipelined		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "addsub"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}','texmode','"
	  "on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator"
	  SID			  "4575"
	  Position		  [995, 450, 1015, 470]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "Transmisson\nMode Selector"
	  SID			  "4542"
	  Ports			  [3, 1]
	  Position		  [550, 1148, 585, 1252]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "35,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5."
	  "875 ],[57.55 57.55 62.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 "
	  "52.55 57.55 57.55 52.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47"
	  ".55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Tx Addr Counter"
	  SID			  "661"
	  Ports			  [2, 1]
	  Position		  [930, 125, 1005, 180]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "30"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,630"
	  block_type		  "counter"
	  block_version		  "8.2"
	  sg_icon_stat		  "75,55,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 75 75 0 0 ],[0 0 55 55 0 ]);\npatch([21.425 31.54 38.54 45.54 52.54 38.54 28.425 21.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([28.425 38.54 31.54 21.425 28.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([21.425 31.54 38.54 28.425 21.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([28.425 52.54 45.54 38.54 31.54 21.425 28.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\b"
	  "f++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Scope
	  Name			  "Tx Control"
	  SID			  "662"
	  Ports			  [8]
	  Position		  [1605, 814, 1635, 921]
	  Floating		  off
	  Location		  [814, 220, 2473, 1412]
	  Open			  off
	  NumInputPorts		  "8"
	  ZoomMode		  "yonly"
	  List {
	    ListType		    AxesTitles
	    axes1		    "%<SignalLabel>"
	    axes2		    "%<SignalLabel>"
	    axes3		    "%<SignalLabel>"
	    axes4		    "%<SignalLabel>"
	    axes5		    "%<SignalLabel>"
	    axes6		    "%<SignalLabel>"
	    axes7		    "%<SignalLabel>"
	    axes8		    "%<SignalLabel>"
	  }
	  TimeRange		  "70000"
	  YMin			  "0~0~0~0~0~0~0~0"
	  YMax			  "2~1~1~1~1~100~1~20000"
	  SaveName		  "ScopeData3"
	  DataFormat		  "StructureWithTime"
	  LimitDataPoints	  off
	  SampleTime		  "0"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Tx Delay Counter"
	  SID			  "663"
	  Ports			  [2, 1]
	  Position		  [590, 176, 630, 229]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,630"
	  block_type		  "counter"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,53,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 53 53 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[31.55 31.55 36.55"
	  " 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[26.55 26.55 31.55 31.55 26.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1 1 ]);\npatch("
	  "[13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',"
	  "1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on"
	  "');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Tx Error\nSelector"
	  SID			  "4589"
	  Ports			  [3, 1]
	  Position		  [1430, 993, 1465, 1097]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "35,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5."
	  "875 ],[57.55 57.55 62.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 "
	  "52.55 57.55 57.55 52.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47"
	  ".55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Tx Interrupt\nSelector"
	  SID			  "4565"
	  Ports			  [3, 1]
	  Position		  [555, 408, 590, 512]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "35,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5."
	  "875 ],[57.55 57.55 62.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 "
	  "52.55 57.55 57.55 52.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47"
	  ".55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Tx Interrupt\nSelector1"
	  SID			  "4577"
	  Ports			  [3, 1]
	  Position		  [390, 443, 425, 547]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "35,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5."
	  "875 ],[57.55 57.55 62.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 "
	  "52.55 57.55 57.55 52.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47"
	  ".55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "WR - RD"
	  SID			  "4546"
	  Ports			  [2, 1]
	  Position		  [410, 689, 455, 736]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/AddSub"
	  SourceType		  "Xilinx Adder/Subtracter Block"
	  mode			  "Subtraction"
	  use_carryin		  off
	  use_carryout		  off
	  en			  off
	  latency		  "0"
	  precision		  "User Defined"
	  arith_type		  "Unsigned"
	  n_bits		  "30"
	  bin_pt		  "0"
	  quantization		  "Truncate"
	  overflow		  "Saturate"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  hw_selection		  "Fabric"
	  pipelined		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "addsub"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 35."
	  "66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23.66"
	  " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch("
	  "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfp"
	  "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
	  ",1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}','texmode','"
	  "on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "rf_tx_iq_int_reg"
	  SID			  "4800"
	  Ports			  [1, 1]
	  Position		  [710, 449, 765, 471]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
	  "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
	  ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
	  "]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
	  " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
	  "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
	  "f('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "tx_iq_thresh[30:0]"
	  SID			  "4769"
	  Ports			  [1, 1]
	  Position		  [360, 816, 400, 834]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "30"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "tx_length_0[30:0]"
	  SID			  "4768"
	  Ports			  [1, 1]
	  Position		  [360, 1426, 400, 1444]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "30"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "tx_length_1[30:0]"
	  SID			  "4770"
	  Ports			  [1, 1]
	  Position		  [300, 621, 340, 639]
	  NamePlacement		  "alternate"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "30"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "wr_byte_offset[31:2]"
	  SID			  "4519"
	  Ports			  [1, 1]
	  Position		  [360, 1296, 400, 1314]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "30"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Addr"
	  SID			  "664"
	  Position		  [1265, 148, 1295, 162]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "RdEn"
	  SID			  "665"
	  Position		  [1265, 288, 1295, 302]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Tx Delay Counter"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From4"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "StartTx"
	  SrcPort		  1
	  Points		  [100, 0]
	  Branch {
	    DstBlock		    "Convert1"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -115]
	    DstBlock		    "Goto14"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  DstBlock		  "Tx Delay Counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    Points		    [0, 0]
	    Branch {
	      DstBlock		      "Logical"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 0; 0, -50]
	      Branch {
		DstBlock		"Logical1"
		DstPort			1
	      }
	      Branch {
		Points			[0, -90]
		DstBlock		"Logical3"
		DstPort			2
	      }
	    }
	  }
	  Branch {
	    Points		    [0, 155]
	    DstBlock		    "Goto10"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [50, 0]
	  Branch {
	    Points		    [0, 65]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -60]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  Points		  [-130, 0; 0, -75]
	  DstBlock		  "Logical"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "Tx Addr Counter"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 55]
	    Branch {
	      Points		      [0, 75]
	      DstBlock		      "RdEn"
	      DstPort		      1
	    }
	    Branch {
	      DstBlock		      "RFA Delay Cycle for Select3"
	      DstPort		      2
	    }
	  }
	}
	Line {
	  SrcBlock		  "Tx Addr Counter"
	  SrcPort		  1
	  Points		  [80, 0]
	  Branch {
	    Points		    [-35, 0]
	    Branch {
	      DstBlock		      "Addr"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 45]
	      DstBlock		      "RFA Delay Cycle for Select3"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, -65]
	    DstBlock		    "Goto7"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge2"
	  SrcPort		  1
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  Points		  [20, 0]
	  Branch {
	    Points		    [0, 75]
	    DstBlock		    "Tx Delay Counter"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Logical4"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  Points		  [75, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -75]
	    DstBlock		    "Posedge2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Gateway Out5"
	  SrcPort		  1
	  DstBlock		  "Tx Control"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "Gateway Out4"
	  SrcPort		  1
	  DstBlock		  "Tx Control"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Gateway Out3"
	  SrcPort		  1
	  DstBlock		  "Tx Control"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Gateway Out2"
	  SrcPort		  1
	  DstBlock		  "Tx Control"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Gateway Out1"
	  SrcPort		  1
	  DstBlock		  "Tx Control"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gateway Out6"
	  SrcPort		  1
	  DstBlock		  "Tx Control"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "Gateway Out7"
	  SrcPort		  1
	  DstBlock		  "Tx Control"
	  DstPort		  7
	}
	Line {
	  Name			  "Tx Addr Ctr"
	  Labels		  [0, 0]
	  SrcBlock		  "Gateway Out8"
	  SrcPort		  1
	  DstBlock		  "Tx Control"
	  DstPort		  8
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  Points		  [20, 0; 0, 40]
	  DstBlock		  "Logical4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  Points		  [65, 0; 0, 30]
	  DstBlock		  "Tx Addr Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant12"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Concat4"
	  SrcPort		  1
	  DstBlock		  "Goto6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RFA Delay Cycle for Select3"
	  SrcPort		  1
	  DstBlock		  "Concat4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From2"
	  SrcPort		  1
	  DstBlock		  "wr_byte_offset[31:2]"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "wr_byte_offset[31:2]"
	  SrcPort		  1
	  Points		  [60, 0]
	  Branch {
	    Points		    [0, 105]
	    DstBlock		    "Relational2"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Goto8"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "From1"
	  SrcPort		  1
	  DstBlock		  "tx_length_0[30:0]"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant8"
	  SrcPort		  1
	  DstBlock		  "Relational3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational3"
	  SrcPort		  1
	  DstBlock		  "Goto2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational2"
	  SrcPort		  1
	  Points		  [40, 0]
	  Branch {
	    Points		    [0, -60]
	    DstBlock		    "Inverter1"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Convert2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Inverter1"
	  SrcPort		  1
	  DstBlock		  "Goto5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From10"
	  SrcPort		  1
	  DstBlock		  "Relational4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational4"
	  SrcPort		  1
	  DstBlock		  "Goto9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From11"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "ContinuousTx"
	  SrcPort		  1
	  Points		  [190, 0]
	  Branch {
	    DstBlock		    "Transmisson\nMode Selector"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Logical6"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "StopTx"
	  SrcPort		  1
	  DstBlock		  "Convert3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert3"
	  SrcPort		  1
	  DstBlock		  "Transmisson\nMode Selector"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From5"
	  SrcPort		  1
	  DstBlock		  "Transmisson\nMode Selector"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Transmisson\nMode Selector"
	  SrcPort		  1
	  DstBlock		  "Goto3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From12"
	  SrcPort		  1
	  Points		  [60, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, -110]
	    DstBlock		    "Logical2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "From15"
	  SrcPort		  1
	  Points		  [240, 0; 0, 50]
	  DstBlock		  "Occupancy \nSelector"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Occupancy \nSelector"
	  SrcPort		  1
	  Points		  [55, 0]
	  Branch {
	    DstBlock		    "Goto11"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 90; -180, 0; 0, 30]
	    Branch {
	      DstBlock		      "Relational5"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 60]
	      DstBlock		      "Relational6"
	      DstPort		      1
	    }
	  }
	}
	Line {
	  SrcBlock		  "From16"
	  SrcPort		  1
	  DstBlock		  "Final Buf WR \nSelector"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From14"
	  SrcPort		  1
	  DstBlock		  "tx_length_1[30:0]"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From13"
	  SrcPort		  1
	  Points		  [55, 0]
	  Branch {
	    DstBlock		    "TX_LENGTH - RD"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 70]
	    DstBlock		    "WR - RD"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "From7"
	  SrcPort		  1
	  DstBlock		  "WR - RD"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "TX_LENGTH - RD"
	  SrcPort		  1
	  Points		  [35, 0; 0, 35]
	  DstBlock		  "Occupancy \nSelector"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "WR - RD"
	  SrcPort		  1
	  DstBlock		  "Occupancy \nSelector"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Constant9"
	  SrcPort		  1
	  DstBlock		  "Final Buf WR \nSelector"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From17"
	  SrcPort		  1
	  DstBlock		  "Logical6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From3"
	  SrcPort		  1
	  DstBlock		  "Logical5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From6"
	  SrcPort		  1
	  DstBlock		  "Logical5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From8"
	  SrcPort		  1
	  DstBlock		  "Logical5"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From9"
	  SrcPort		  1
	  DstBlock		  "Logical5"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Logical5"
	  SrcPort		  1
	  Points		  [25, 0; 0, 30]
	  DstBlock		  "Logical7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical6"
	  SrcPort		  1
	  Points		  [25, 0; 0, -40]
	  DstBlock		  "Logical7"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical7"
	  SrcPort		  1
	  Points		  [15, 0; 0, -50]
	  DstBlock		  "Final Buf WR \nSelector"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Constant11"
	  SrcPort		  1
	  DstBlock		  "Tx Interrupt\nSelector"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Final Buf WR \nSelector"
	  SrcPort		  1
	  DstBlock		  "Goto1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant13"
	  SrcPort		  1
	  DstBlock		  "Relational6"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From18"
	  SrcPort		  1
	  DstBlock		  "tx_iq_thresh[30:0]"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational6"
	  SrcPort		  1
	  DstBlock		  "Goto12"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational5"
	  SrcPort		  1
	  DstBlock		  "Goto13"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "RF_TX_IQ_INT"
	  SrcPort		  1
	  DstBlock		  "Terminator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From21"
	  SrcPort		  1
	  DstBlock		  "Tx Interrupt\nSelector1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From20"
	  SrcPort		  1
	  DstBlock		  "Tx Interrupt\nSelector1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From19"
	  SrcPort		  1
	  DstBlock		  "Tx Interrupt\nSelector1"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From22"
	  SrcPort		  1
	  DstBlock		  "Tx Interrupt\nSelector"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Tx Interrupt\nSelector1"
	  SrcPort		  1
	  DstBlock		  "Convert4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Tx Interrupt\nSelector"
	  SrcPort		  1
	  Points		  [50, 0]
	  Branch {
	    Points		    [0, 45]
	    DstBlock		    "Goto16"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "rf_tx_iq_int_reg"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Convert2"
	  SrcPort		  1
	  DstBlock		  "Goto4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert4"
	  SrcPort		  1
	  DstBlock		  "Tx Interrupt\nSelector"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From25"
	  SrcPort		  1
	  DstBlock		  "Tx Error\nSelector"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From23"
	  SrcPort		  1
	  DstBlock		  "Tx Error\nSelector"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Constant14"
	  SrcPort		  1
	  DstBlock		  "Tx Error\nSelector"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R Latch1"
	  SrcPort		  1
	  DstBlock		  "Convert5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert5"
	  SrcPort		  1
	  DstBlock		  "Goto15"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Tx Error\nSelector"
	  SrcPort		  1
	  DstBlock		  "S-R Latch1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From24"
	  SrcPort		  1
	  DstBlock		  "Logical8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical8"
	  SrcPort		  1
	  Points		  [50, 0; 0, -90]
	  DstBlock		  "S-R Latch1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From26"
	  SrcPort		  1
	  DstBlock		  "Logical8"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From27"
	  SrcPort		  1
	  DstBlock		  "Gateway Out8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From34"
	  SrcPort		  1
	  DstBlock		  "Gateway Out1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From28"
	  SrcPort		  1
	  DstBlock		  "Gateway Out2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From29"
	  SrcPort		  1
	  DstBlock		  "Gateway Out3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From33"
	  SrcPort		  1
	  DstBlock		  "Gateway Out4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From32"
	  SrcPort		  1
	  DstBlock		  "Gateway Out5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From31"
	  SrcPort		  1
	  DstBlock		  "Gateway Out6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From30"
	  SrcPort		  1
	  DstBlock		  "Gateway Out7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "tx_length_0[30:0]"
	  SrcPort		  1
	  Points		  [60, 0]
	  Branch {
	    DstBlock		    "Relational2"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 35]
	    Branch {
	      Points		      [0, 60]
	      DstBlock		      "Relational3"
	      DstPort		      1
	    }
	    Branch {
	      DstBlock		      "Relational4"
	      DstPort		      1
	    }
	  }
	}
	Line {
	  SrcBlock		  "tx_iq_thresh[30:0]"
	  SrcPort		  1
	  DstBlock		  "Relational5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "tx_length_1[30:0]"
	  SrcPort		  1
	  DstBlock		  "TX_LENGTH - RD"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "rf_tx_iq_int_reg"
	  SrcPort		  1
	  DstBlock		  "RF_TX_IQ_INT"
	  DstPort		  1
	}
	Annotation {
	  Name			  "Address Counter will honor TxLength in ContinuousTx mode"
	  Position		  [706, 73]
	}
	Annotation {
	  Name			  "Convert to memory address (sample is 4 bytes)"
	  Position		  [1452, 253]
	}
	Annotation {
	  Name			  "Convert to sample address (sample is 4 bytes)"
	  Position		  [902, 1328]
	}
	Annotation {
	  Position		  [169, 457]
	}
	Annotation {
	  Name			  "Equations:\n  tx_buf_en               = (tx_buf_en_rfa || tx_buf_en_rfb || tx_buf_en_rfc || tx_buf_en_rfd"
	  ")\n\n  tx_tmp_buf_wr_not_done  = (tx_wr_ptr < tx_length)\n\n  tx_tmp_buf_wr_done      = not (tx_tmp_buf_wr_not_done"
	  ")\n  \n  large_tx                = (tx_length > tmp_buf_size)\n\n  tx_done                 = (cont_tx) ? (posedge s"
	  "top_tx) : (tx_rd_ptr >= tx_length)\n  \n  tx_occupancy            = (tx_tmp_buf_wr_not_done) ? (tx_wr_ptr - tx_rd_p"
	  "tr) : (tx_length - tx_rd_ptr)\n\n  not_final_tx_tmp_buf_wr = (large_tx) ? ((tx_tmp_buf_wr_not_done || cont_tx) && t"
	  "x_buf_en) : ( 0 )\n  \n  tx_int                  = (large_tx) ? ((not_final_tx_tmp_buf_wr) ? (tx_occupancy < tx_thr"
	  "eshold) : tx_done) : ( 0 )\n\n  tx_err                  = (not_final_tx_tmp_buf_wr) ? (tx_occupancy == 0) : (0)"
	  Position		  [1071, 557]
	  HorizontalAlignment	  "left"
	  FontName		  "Courier New"
	  FontSize		  12
	}
	Annotation {
	  Name			  "In samples"
	  Position		  [178, 1455]
	}
	Annotation {
	  Name			  "In samples"
	  Position		  [198, 840]
	}
	Annotation {
	  Name			  "Suppress any spurrious interrupts while \naddress comparisions occur."
	  Position		  [708, 425]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "capture_running"
      SID		      "667"
      Ports		      [1, 1]
      Position		      [810, 678, 850, 692]
      BlockMirror	      on
      NamePlacement	      "alternate"
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, do"
      "uble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discar"
      "ded, depending on how they are configured."
      inherit_from_input      off
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      UseAsDAC		      off
      DACChannel	      "'1'"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "gatewayout"
      block_version	      "8.2"
      sg_icon_stat	      "40,14,1,1,white,yellow,1,cc31b7ac,left,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0."
      "93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.2"
      "2 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9."
      "22 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\n"
      "patch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
      "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','CO"
      "MMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "debug_AGC_Done"
      SID		      "666"
      Ports		      [1, 1]
      Position		      [390, 908, 430, 922]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty"
      "pe Simulink integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top"
      " level output ports or are discarded, depending on how they are configured."
      inherit_from_input      off
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      UseAsDAC		      off
      DACChannel	      "'1'"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "gatewayout"
      block_version	      "8.2"
      sg_icon_stat	      "40,14,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0."
      "93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.2"
      "2 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9."
      "22 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\n"
      "patch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
      "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','CO"
      "MMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "transmit_running"
      SID		      "668"
      Ports		      [1, 1]
      Position		      [895, 1093, 935, 1107]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point inputs into ouputs of type Simulink integer, do"
      "uble, or fixed point.<P><P>Hardware notes:  In hardware these blocks become top level output ports or are discar"
      "ded, depending on how they are configured."
      inherit_from_input      off
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      UseAsDAC		      off
      DACChannel	      "'1'"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "gatewayout"
      block_version	      "8.2"
      sg_icon_stat	      "40,14,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0."
      "93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.2"
      "2 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9."
      "22 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\n"
      "patch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\n"
      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
      "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','CO"
      "MMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "trigger_in"
      SID		      "1169"
      Ports		      [1, 1]
      Position		      [235, 559, 290, 571]
      NamePlacement	      "alternate"
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Gateway In"
      SourceType	      "Xilinx Gateway In Block"
      infoedit		      "Gateway in block.  Converts inputs of type Simulink integer, double and fixed point to  Xilinx "
      "fixed point type.<P><P>Hardware notes:  In hardware these blocks become top level input ports."
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "1"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      quantization	      "Round  (unbiased: +/- Inf)"
      overflow		      "Saturate"
      period		      "1"
      dbl_ovrd		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      UseAsADC		      off
      ADCChannel	      "'1'"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      inherit_from_input      off
      hdl_port		      "on"
      has_advanced_control    "0"
      sggui_pos		      "20,20,356,432"
      block_type	      "gatewayin"
      block_version	      "VER_STRING_GOES_HERE"
      sg_icon_stat	      "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0."
      "93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ],["
      "7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7.11 "
      "7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1"
      " ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0"
      ".895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por"
      "t_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprin"
      "tf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg"
      SID		      "4756"
      Ports		      [1, 1]
      Position		      [505, 1234, 560, 1256]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg1"
      SID		      "4757"
      Ports		      [1, 1]
      Position		      [505, 1214, 560, 1236]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg10"
      SID		      "4766"
      Ports		      [1, 1]
      Position		      [730, 1004, 785, 1026]
      BlockMirror	      on
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,left,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg11"
      SID		      "4767"
      Ports		      [1, 1]
      Position		      [805, 1089, 860, 1111]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg2"
      SID		      "4758"
      Ports		      [1, 1]
      Position		      [505, 1194, 560, 1216]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg3"
      SID		      "4759"
      Ports		      [1, 1]
      Position		      [505, 1174, 560, 1196]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg4"
      SID		      "4760"
      Ports		      [1, 1]
      Position		      [505, 1154, 560, 1176]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg5"
      SID		      "4761"
      Ports		      [1, 1]
      Position		      [505, 1134, 560, 1156]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg6"
      SID		      "4762"
      Ports		      [1, 1]
      Position		      [505, 1114, 560, 1136]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg7"
      SID		      "4763"
      Ports		      [1, 1]
      Position		      [505, 1094, 560, 1116]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg8"
      SID		      "4764"
      Ports		      [1, 1]
      Position		      [505, 1074, 560, 1096]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "tx output mux reg9"
      SID		      "4765"
      Ports		      [1, 1]
      Position		      [505, 1054, 560, 1076]
      ShowName		      off
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "55,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 1"
      "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.3"
      "3 8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]"
      ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol"
      "or('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}'"
      ",'texmode','on');\nfprintf('','COMMENT: end icon text');"
    }
    Line {
      SrcBlock		      "From12"
      SrcPort		      1
      DstBlock		      "RFC Input Reg5"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From11"
      SrcPort		      1
      DstBlock		      "RFB Input Reg5"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Posedge"
      SrcPort		      1
      DstBlock		      "Rx Control"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From10"
      SrcPort		      1
      DstBlock		      "RFA Input Reg 5"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From13"
      SrcPort		      1
      DstBlock		      "RFD Input Reg5"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Rx Control"
      SrcPort		      1
      Points		      [140, 0]
      Branch {
	Points			[0, 180]
	Branch {
	  DstBlock		  "RFC Input Reg3"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 180]
	  DstBlock		  "RFD Input Reg3"
	  DstPort		  1
	}
      }
      Branch {
	Points			[0, -185]
	Branch {
	  Points		  [0, -90]
	  DstBlock		  "Goto1"
	  DstPort		  1
	}
	Branch {
	  DstBlock		  "RFA Input Reg 3"
	  DstPort		  1
	}
      }
      Branch {
	DstBlock		"RFB Input Reg3"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Rx Control"
      SrcPort		      2
      Points		      [165, 0]
      Branch {
	Points			[0, 180]
	Branch {
	  Points		  [0, 150]
	  Branch {
	    DstBlock		    "capture_running"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 30]
	    DstBlock		    "RFD Input Reg4"
	    DstPort		    1
	  }
	}
	Branch {
	  DstBlock		  "RFC Input Reg4"
	  DstPort		  1
	}
      }
      Branch {
	Labels			[1, 0]
	DstBlock		"RFB Input Reg4"
	DstPort			1
      }
      Branch {
	Points			[0, -185]
	DstBlock		"RFA Input Reg 4"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Posedge1"
      SrcPort		      1
      DstBlock		      "Tx Control"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From2"
      SrcPort		      1
      DstBlock		      "Tx Control"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Posedge2"
      SrcPort		      1
      DstBlock		      "Tx Control"
      DstPort		      2
    }
    Line {
      SrcBlock		      " 1"
      SrcPort		      1
      DstBlock		      "Posedge2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "StopTx"
      SrcPort		      1
      DstBlock		      " 1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Pulse\nGenerator2"
      SrcPort		      1
      DstBlock		      "StopTx"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From6"
      SrcPort		      1
      DstBlock		      "RFB Tx Buffers"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Tx Control"
      SrcPort		      2
      Points		      [35, 0]
      Branch {
	DstBlock		"Inverter"
	DstPort			1
      }
      Branch {
	Points			[0, 150]
	DstBlock		"tx output mux reg10"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "From7"
      SrcPort		      1
      DstBlock		      "RFC Tx Buffers"
      DstPort		      3
    }
    Line {
      SrcBlock		      "From5"
      SrcPort		      1
      DstBlock		      "RFA Tx Buffers"
      DstPort		      3
    }
    Line {
      SrcBlock		      "From8"
      SrcPort		      1
      DstBlock		      "RFD Tx Buffers"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Tx Control"
      SrcPort		      1
      Points		      [155, 0]
      Branch {
	Points			[0, 140]
	Branch {
	  Points		  [0, 140]
	  Branch {
	    DstBlock		    "RFC Tx Buffers"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 140]
	    DstBlock		    "RFD Tx Buffers"
	    DstPort		    1
	  }
	}
	Branch {
	  DstBlock		  "RFB Tx Buffers"
	  DstPort		  1
	}
      }
      Branch {
	DstBlock		"RFA Tx Buffers"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Inverter"
      SrcPort		      1
      Points		      [55, 0]
      Branch {
	Points			[0, 110]
	Branch {
	  Points		  [0, 140]
	  Branch {
	    DstBlock		    "RFC Tx Buffers"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 140]
	    DstBlock		    "RFD Tx Buffers"
	    DstPort		    2
	  }
	}
	Branch {
	  DstBlock		  "RFB Tx Buffers"
	  DstPort		  2
	}
      }
      Branch {
	Points			[0, -30]
	DstBlock		"RFA Tx Buffers"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "From1"
      SrcPort		      1
      DstBlock		      " 1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "AGC_Done"
      SrcPort		      1
      Points		      [30, 0]
      Branch {
	Points			[0, -50]
	DstBlock		"debug_AGC_Done"
	DstPort			1
      }
      Branch {
	DstBlock		"Register"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Pulse\nGenerator3"
      SrcPort		      1
      DstBlock		      "AGC_Done"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Register"
      SrcPort		      1
      DstBlock		      "Posedge3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Posedge3"
      SrcPort		      1
      DstBlock		      "Convert2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Convert2"
      SrcPort		      1
      DstBlock		      "Goto3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "capture_running"
      SrcPort		      1
      DstBlock		      "Terminator2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "transmit_running"
      SrcPort		      1
      DstBlock		      "Terminator1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFA Inputs"
      SrcPort		      1
      DstBlock		      "RFA Input Reg 1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFB Inputs"
      SrcPort		      1
      DstBlock		      "RFB Input Reg1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFC Inputs"
      SrcPort		      1
      DstBlock		      "RFC Input Reg1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFD Inputs"
      SrcPort		      1
      DstBlock		      "RFD Input Reg1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "trigger_in"
      SrcPort		      1
      Points		      [120, 0]
      Branch {
	Points			[0, 240]
	DstBlock		"Posedge1"
	DstPort			1
      }
      Branch {
	Points			[0, -225]
	DstBlock		"Posedge"
	DstPort			1
      }
      Branch {
	DstBlock		"Convert1"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "RSSI_ADC_CLK"
      SrcPort		      1
      DstBlock		      "Terminator"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RSSI Clock Gen"
      SrcPort		      1
      DstBlock		      "RSSI_ADC_CLK"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Pulse\nGenerator1"
      SrcPort		      1
      DstBlock		      "trigger_in"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFA Tx Buffers"
      SrcPort		      1
      DstBlock		      "RFA Tx Buffers Reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFB Tx Buffers"
      SrcPort		      1
      DstBlock		      "RFB Tx Buffers Reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFC Tx Buffers"
      SrcPort		      1
      DstBlock		      "RFC Tx Buffers Reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFD Tx Buffers"
      SrcPort		      1
      DstBlock		      "RFD Tx Buffers Reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFA Output Reg "
      SrcPort		      1
      Points		      [80, 0]
      Branch {
	Points			[110, 0]
	Branch {
	  DstBlock		  "RFA Outputs"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 40]
	  DstBlock		  "Relational6"
	  DstPort		  1
	}
      }
      Branch {
	Points			[0, -515]
	DstBlock		"RF Loopback Select1"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "RFB Output Reg"
      SrcPort		      1
      Points		      [65, 0]
      Branch {
	Points			[125, 0]
	Branch {
	  DstBlock		  "RFB Outputs"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 40]
	  DstBlock		  "Relational1"
	  DstPort		  1
	}
      }
      Branch {
	Points			[0, -840]
	DstBlock		"RF Loopback Select"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "RFC Output Reg"
      SrcPort		      1
      Points		      [110, 0]
      Branch {
	Points			[80, 0]
	Branch {
	  DstBlock		  "RFC Outputs"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 40]
	  DstBlock		  "Relational2"
	  DstPort		  1
	}
      }
      Branch {
	Points			[0, -435]
	DstBlock		"RF Loopback Select2"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "RFD Output Reg"
      SrcPort		      1
      Points		      [95, 0]
      Branch {
	Points			[95, 0]
	Branch {
	  DstBlock		  "RFD Outputs"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 40]
	  DstBlock		  "Relational3"
	  DstPort		  1
	}
      }
      Branch {
	Points			[0, -755]
	DstBlock		"RF Loopback Select3"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "RFD Mux"
      SrcPort		      1
      DstBlock		      "RFD Output Reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFC Mux"
      SrcPort		      1
      DstBlock		      "RFC Output Reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFB Mux"
      SrcPort		      1
      DstBlock		      "RFB Output Reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFA Mux"
      SrcPort		      1
      DstBlock		      "RFA Output Reg "
      DstPort		      1
    }
    Line {
      SrcBlock		      "From3"
      SrcPort		      1
      DstBlock		      "RFA Mux"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From4"
      SrcPort		      1
      DstBlock		      "RFB Mux"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From9"
      SrcPort		      1
      DstBlock		      "RFC Mux"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From14"
      SrcPort		      1
      DstBlock		      "RFD Mux"
      DstPort		      1
    }
    Line {
      SrcBlock		      "debug_AGC_Done"
      SrcPort		      1
      DstBlock		      "Terminator3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From18"
      SrcPort		      1
      DstBlock		      "RFA Inputs"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From15"
      SrcPort		      1
      DstBlock		      "RFB Inputs"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From16"
      SrcPort		      1
      DstBlock		      "RFC Inputs"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From17"
      SrcPort		      1
      DstBlock		      "RFD Inputs"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant13"
      SrcPort		      1
      DstBlock		      "Relational6"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Relational6"
      SrcPort		      1
      DstBlock		      "Goto2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From20"
      SrcPort		      1
      DstBlock		      "tx output mux reg9"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RF Select"
      SrcPort		      1
      Points		      [35, 0; 0, -30]
      DstBlock		      "TX Output Select"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Constant1"
      SrcPort		      1
      DstBlock		      "Relational1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Relational1"
      SrcPort		      1
      DstBlock		      "Goto4"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant2"
      SrcPort		      1
      DstBlock		      "Relational2"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Relational2"
      SrcPort		      1
      DstBlock		      "Goto5"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant3"
      SrcPort		      1
      DstBlock		      "Relational3"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Relational3"
      SrcPort		      1
      DstBlock		      "Goto6"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From19"
      SrcPort		      1
      DstBlock		      "tx output mux reg8"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From21"
      SrcPort		      1
      DstBlock		      "Inverter1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From22"
      SrcPort		      1
      DstBlock		      "Inverter2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From23"
      SrcPort		      1
      DstBlock		      "Inverter3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From24"
      SrcPort		      1
      DstBlock		      "Inverter4"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Inverter1"
      SrcPort		      1
      Points		      [45, 0]
      Branch {
	Points			[0, 80]
	DstBlock		" 2"
	DstPort			1
      }
      Branch {
	DstBlock		"tx output mux reg7"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Inverter2"
      SrcPort		      1
      Points		      [40, 0]
      Branch {
	Points			[0, 75]
	DstBlock		" 2"
	DstPort			2
      }
      Branch {
	DstBlock		"tx output mux reg6"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Inverter3"
      SrcPort		      1
      Points		      [35, 0]
      Branch {
	Points			[0, 70]
	DstBlock		" 2"
	DstPort			3
      }
      Branch {
	DstBlock		"tx output mux reg5"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Inverter4"
      SrcPort		      1
      Points		      [30, 0]
      Branch {
	Points			[0, 65]
	DstBlock		" 2"
	DstPort			4
      }
      Branch {
	DstBlock		"tx output mux reg4"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "RFA Tx Buffers Reg"
      SrcPort		      1
      Points		      [40, 0]
      Branch {
	Points			[0, -30]
	DstBlock		"RFA Mux"
	DstPort			2
      }
      Branch {
	Points			[0, 110]
	Branch {
	  DstBlock		  "RFB Mux"
	  DstPort		  2
	}
	Branch {
	  Points		  [0, 140]
	  Branch {
	    DstBlock		    "RFC Mux"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 140]
	    DstBlock		    "RFD Mux"
	    DstPort		    2
	  }
	}
      }
    }
    Line {
      SrcBlock		      "RFB Tx Buffers Reg"
      SrcPort		      1
      Points		      [50, 0]
      Branch {
	Points			[0, -150]
	DstBlock		"RFA Mux"
	DstPort			3
      }
      Branch {
	Points			[0, -10]
	Branch {
	  Points		  [0, 140]
	  Branch {
	    DstBlock		    "RFC Mux"
	    DstPort		    3
	  }
	  Branch {
	    Points		    [0, 140]
	    DstBlock		    "RFD Mux"
	    DstPort		    3
	  }
	}
	Branch {
	  DstBlock		  "RFB Mux"
	  DstPort		  3
	}
      }
    }
    Line {
      SrcBlock		      "RFC Tx Buffers Reg"
      SrcPort		      1
      Points		      [60, 0]
      Branch {
	Points			[0, -130]
	Branch {
	  Points		  [0, -140]
	  DstBlock		  "RFA Mux"
	  DstPort		  4
	}
	Branch {
	  DstBlock		  "RFB Mux"
	  DstPort		  4
	}
      }
      Branch {
	Points			[0, 10]
	Branch {
	  DstBlock		  "RFC Mux"
	  DstPort		  4
	}
	Branch {
	  Points		  [0, 140]
	  DstBlock		  "RFD Mux"
	  DstPort		  4
	}
      }
    }
    Line {
      SrcBlock		      "RFD Tx Buffers Reg"
      SrcPort		      1
      Points		      [70, 0]
      Branch {
	Points			[0, 30]
	DstBlock		"RFD Mux"
	DstPort			5
      }
      Branch {
	Points			[0, -110]
	Branch {
	  DstBlock		  "RFC Mux"
	  DstPort		  5
	}
	Branch {
	  Points		  [0, -140]
	  Branch {
	    Points		    [0, -140]
	    DstBlock		    "RFA Mux"
	    DstPort		    5
	  }
	  Branch {
	    DstBlock		    "RFB Mux"
	    DstPort		    5
	  }
	}
      }
    }
    Line {
      SrcBlock		      " 2"
      SrcPort		      1
      Points		      [25, 0; 0, -25]
      DstBlock		      "tx output mux reg3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From25"
      SrcPort		      1
      DstBlock		      "Convert3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From26"
      SrcPort		      1
      Points		      [225, 0; 0, -40]
      DstBlock		      "tx output mux reg1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From27"
      SrcPort		      1
      Points		      [230, 0; 0, -40]
      DstBlock		      "tx output mux reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Convert1"
      SrcPort		      1
      DstBlock		      "Goto7"
      DstPort		      1
    }
    Line {
      SrcBlock		      "From28"
      SrcPort		      1
      DstBlock		      "TX RX Loopback Reg"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFA Inputs"
      SrcPort		      2
      DstBlock		      "RFA Input Reg 2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RF Loopback Select"
      SrcPort		      1
      DstBlock		      "RFA\nRx Buffers"
      DstPort		      2
    }
    Line {
      SrcBlock		      "RF Loopback Select1"
      SrcPort		      1
      DstBlock		      "RFB\nRx Buffers"
      DstPort		      2
    }
    Line {
      SrcBlock		      "RFB Inputs"
      SrcPort		      2
      DstBlock		      "RFB Input Reg2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFC Inputs"
      SrcPort		      2
      DstBlock		      "RFC Input Reg2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFD Inputs"
      SrcPort		      2
      DstBlock		      "RFD Input Reg2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFB Input Reg2"
      SrcPort		      1
      DstBlock		      "RF Loopback Select1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "RFA Input Reg 2"
      SrcPort		      1
      DstBlock		      "RF Loopback Select"
      DstPort		      2
    }
    Line {
      SrcBlock		      "TX RX Loopback Reg"
      SrcPort		      1
      Points		      [50, 0; 0, 65]
      Branch {
	DstBlock		"RF Loopback Select"
	DstPort			1
      }
      Branch {
	Points			[0, 180; 0, 5]
	Branch {
	  DstBlock		  "RF Loopback Select1"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 180; 0, 0]
	  Branch {
	    DstBlock		    "RF Loopback Select3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 180]
	    DstBlock		    "RF Loopback Select2"
	    DstPort		    1
	  }
	}
      }
    }
    Line {
      SrcBlock		      "RFA Input Reg 1"
      SrcPort		      1
      DstBlock		      "RFA\nRx Buffers"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFA Input Reg 3"
      SrcPort		      1
      DstBlock		      "RFA\nRx Buffers"
      DstPort		      3
    }
    Line {
      SrcBlock		      "RFA Input Reg 4"
      SrcPort		      1
      DstBlock		      "RFA\nRx Buffers"
      DstPort		      4
    }
    Line {
      SrcBlock		      "RFA Input Reg 5"
      SrcPort		      1
      DstBlock		      "RFA\nRx Buffers"
      DstPort		      5
    }
    Line {
      SrcBlock		      "RFB Input Reg1"
      SrcPort		      1
      DstBlock		      "RFB\nRx Buffers"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFB Input Reg3"
      SrcPort		      1
      DstBlock		      "RFB\nRx Buffers"
      DstPort		      3
    }
    Line {
      Labels		      [1, 0]
      SrcBlock		      "RFB Input Reg4"
      SrcPort		      1
      DstBlock		      "RFB\nRx Buffers"
      DstPort		      4
    }
    Line {
      SrcBlock		      "RFB Input Reg5"
      SrcPort		      1
      DstBlock		      "RFB\nRx Buffers"
      DstPort		      5
    }
    Line {
      SrcBlock		      "tx output mux reg"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      9
    }
    Line {
      SrcBlock		      "tx output mux reg1"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      8
    }
    Line {
      SrcBlock		      "tx output mux reg2"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      7
    }
    Line {
      SrcBlock		      "tx output mux reg3"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      6
    }
    Line {
      SrcBlock		      "tx output mux reg4"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      5
    }
    Line {
      SrcBlock		      "tx output mux reg5"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      4
    }
    Line {
      SrcBlock		      "tx output mux reg6"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      3
    }
    Line {
      SrcBlock		      "tx output mux reg7"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      2
    }
    Line {
      SrcBlock		      "tx output mux reg8"
      SrcPort		      1
      DstBlock		      "RF Select"
      DstPort		      1
    }
    Line {
      SrcBlock		      "tx output mux reg9"
      SrcPort		      1
      DstBlock		      "TX Output Select"
      DstPort		      1
    }
    Line {
      SrcBlock		      "tx output mux reg10"
      SrcPort		      1
      Points		      [-65, 0; 0, 85]
      DstBlock		      "TX Output Select"
      DstPort		      2
    }
    Line {
      SrcBlock		      "TX Output Select"
      SrcPort		      1
      DstBlock		      "tx output mux reg11"
      DstPort		      1
    }
    Line {
      SrcBlock		      "tx output mux reg11"
      SrcPort		      1
      DstBlock		      "transmit_running"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Convert3"
      SrcPort		      1
      Points		      [135, 0; 0, -40]
      DstBlock		      "tx output mux reg2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFC Input Reg1"
      SrcPort		      1
      DstBlock		      "RFC\nRx Buffers"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFC Input Reg3"
      SrcPort		      1
      DstBlock		      "RFC\nRx Buffers"
      DstPort		      3
    }
    Line {
      SrcBlock		      "RFC Input Reg4"
      SrcPort		      1
      DstBlock		      "RFC\nRx Buffers"
      DstPort		      4
    }
    Line {
      SrcBlock		      "RFC Input Reg5"
      SrcPort		      1
      DstBlock		      "RFC\nRx Buffers"
      DstPort		      5
    }
    Line {
      SrcBlock		      "RFD Input Reg1"
      SrcPort		      1
      DstBlock		      "RFD\nRx Buffers"
      DstPort		      1
    }
    Line {
      SrcBlock		      "RFD Input Reg3"
      SrcPort		      1
      DstBlock		      "RFD\nRx Buffers"
      DstPort		      3
    }
    Line {
      SrcBlock		      "RFD Input Reg4"
      SrcPort		      1
      DstBlock		      "RFD\nRx Buffers"
      DstPort		      4
    }
    Line {
      SrcBlock		      "RFD Input Reg5"
      SrcPort		      1
      DstBlock		      "RFD\nRx Buffers"
      DstPort		      5
    }
    Line {
      SrcBlock		      "RF Loopback Select3"
      SrcPort		      1
      DstBlock		      "RFC\nRx Buffers"
      DstPort		      2
    }
    Line {
      SrcBlock		      "RF Loopback Select2"
      SrcPort		      1
      DstBlock		      "RFD\nRx Buffers"
      DstPort		      2
    }
    Line {
      SrcBlock		      "RFC Input Reg2"
      SrcPort		      1
      DstBlock		      "RF Loopback Select3"
      DstPort		      2
    }
    Line {
      SrcBlock		      "RFD Input Reg2"
      SrcPort		      1
      DstBlock		      "RF Loopback Select2"
      DstPort		      2
    }
    Annotation {
      Name		      "Copyright 2014 Mango Communications, Inc. All rights reserved.\n\nDistributed under the WARP Licens"
      "e:\nhttp://warpproject.org/license"
      Position		      [182, 141]
      DropShadow	      on
    }
    Annotation {
      Name		      "NOTE: For TX/RX Loopback, we have connected RFA to RFB and RFC to RFD.\nThis way, when you transmit"
      " on one interface you can receive on the other."
      Position		      [1791, 38]
      HorizontalAlignment     "left"
    }
    Annotation {
      Name		      "Registers to help\nmeet timing"
      Position		      [496, 1276]
      HorizontalAlignment     "left"
    }
  }
}
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