Model { Name "w2_warplab_trigger_proc" Version 7.7 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.316" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" DataTypeOverrideAppliesTo "AllNumericTypes" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" MaxMDLFileLineLength 120 InitFcn "w2_warplab_trigger_proc_init" StartFcn "w2_warplab_trigger_proc_init" Created "Wed Feb 27 22:39:03 2013" Creator "murphpo" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "mango" ModifiedDateFormat "%" LastModifiedDate "Mon Mar 09 15:57:35 2015" RTWModifiedTimeStamp 347817308 ModelVersionFormat "1.%" ConfigurationManager "None" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes on ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off Object { $PropName "DataLoggingOverride" $ObjectID 1 $ClassName "Simulink.SimulationData.ModelLoggingInfo" model_ "eth_pkt_sniff" signals_ [] overrideMode_ [0.0] Array { Type "Cell" Dimension 1 Cell "eth_pkt_sniff" PropName "logAsSpecifiedByModels_" } Array { Type "Cell" Dimension 1 Cell [] PropName "logAsSpecifiedByModelsSSIDs_" } } RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on CovForceBlockReductionOff on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 2 Version "1.11.0" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 3 Version "1.11.0" StartTime "0.0" StopTime "1000" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" ConcurrentTasks off Solver "ode45" SolverName "ode45" SolverJacobianMethodControl "auto" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 4 Version "1.11.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SignalLoggingSaveFormat "ModelDataLogs" SaveOutput on SaveState off SignalLogging on DSMLogging on InspectSignalLogs off SaveTime on ReturnWorkspaceOutputs off StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" DSMLoggingName "dsmout" OutputOption "RefineOutputTimes" OutputTimes "[]" ReturnWorkspaceOutputsName "out" Refine "1" } Simulink.OptimizationCC { $ObjectID 5 Version "1.11.0" Array { Type "Cell" Dimension 8 Cell "BooleansAsBitfields" Cell "PassReuseOutputArgsAs" Cell "PassReuseOutputArgsThreshold" Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" Cell "UseSpecifiedMinMax" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off UseIntDivNetSlope off UseSpecifiedMinMax off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off ExpressionFolding on BooleansAsBitfields off BitfieldContainerType "uint_T" EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero off NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" MaxStackSize "Inherit from target" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off AccelParallelForEachSubsystem on } Simulink.DebuggingCC { $ObjectID 6 Version "1.11.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "warning" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" MaskedZcDiagnostic "warning" IgnoredZcDiagnostic "warning" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" FixptConstUnderflowMsg "none" FixptConstOverflowMsg "none" FixptConstPrecisionLossMsg "none" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Enable All" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" SimStateInterfaceChecksumMismatchMsg "warning" SimStateOlderReleaseMsg "error" InitInArrayFormatMsg "warning" StrictBusMsg "ErrorLevel1" BusNameAdapt "WarnAndRepair" NonBusSignalsTreatedAsBus "none" LoggingUnavailableSignals "error" BlockIODiagnostic "none" SFUnusedDataAndEventsDiag "warning" SFUnexpectedBacktrackingDiag "warning" SFInvalidInputDataAccessInChartInitDiag "warning" SFNoUnconditionalDefaultTransitionDiag "warning" SFTransitionOutsideNaturalParentDiag "warning" } Simulink.HardwareCC { $ObjectID 7 Version "1.11.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdBitPerFloat 32 ProdBitPerDouble 64 ProdBitPerPointer 32 ProdLargestAtomicInteger "Char" ProdLargestAtomicFloat "None" ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetBitPerFloat 32 TargetBitPerDouble 64 TargetBitPerPointer 32 TargetLargestAtomicInteger "Char" TargetLargestAtomicFloat "None" TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 8 Version "1.11.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" EnableParallelModelReferenceBuilds off ParallelModelReferenceErrorOnInvalidPool on ParallelModelReferenceMATLABWorkerInit "None" ModelReferenceNumInstancesAllowed "Multi" PropagateVarSize "Infer from blocks in model" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off PropagateSignalLabelsOutOfModel off SupportModelReferenceSimTargetCustomCode off } Simulink.SFSimCC { $ObjectID 9 Version "1.11.0" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimCtrlC on SimExtrinsic on SimIntegrity on SimUseLocalCustomCode off SimParseCustomCode on SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 10 Version "1.11.0" Array { Type "Cell" Dimension 8 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" Cell "GenerateSLWebview" Cell "GenerateCodeMetricsReport" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off GenerateSLWebview off GenerateCodeMetricsReport off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" CustomRebuildMode "OnUpdate" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 11 Version "1.11.0" Array { Type "Cell" Dimension 21 Cell "IgnoreCustomStorageClasses" Cell "IgnoreTestpoints" Cell "InsertBlockDesc" Cell "InsertPolySpaceComments" Cell "SFDataObjDesc" Cell "MATLABFcnDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrFcnArg" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" Cell "ReqsInCode" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off MATLABFcnDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrFcnArg "rt$I$N$M" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off InsertPolySpaceComments off SimulinkBlockComments on MATLABSourceComments off EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 12 Version "1.11.0" Array { Type "Cell" Dimension 16 Cell "GeneratePreprocessorConditionals" Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" FunctionExecutionProfile off CodeExecutionProfiling off ERTCodeCoverageTool "None" ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on GeneratePreprocessorConditionals "Disable all" CombineOutputUpdateFcns off CombineSignalStateStructs off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on SupportVariableSizeSignals off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off RTWCAPIRootIO off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Simulation Target" ConfigPrmDlgPosition [ 840, 485, 1720, 1115 ] } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 2 } BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" LockScale off SampleTime "inf" FramePeriod "inf" PreserveConstantTs off } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" Amplitude "1" Period "2" PulseWidth "1" PhaseDelay "0" SampleTime "1" VectorParams1D on } Block { BlockType Display Format "short" Decimation "10" Floating off SampleTime "-1" } Block { BlockType From IconDisplay "Tag" TagVisibility "local" } Block { BlockType Goto IconDisplay "Tag" } Block { BlockType Inport Port "1" OutputFunctionCall off OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: auto" LockScale off BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchInputForFeedbackSignals off Interpolate on } Block { BlockType Outport Port "1" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: auto" LockScale off BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" SignalType "auto" SamplingMode "auto" SourceOfInitialOutputValue "Dialog" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType Step Time "1" Before "0" After "1" SampleTime "-1" VectorParams1D on ZeroCross on } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" DataTypeOverrideAppliesTo "AllNumericTypes" MinMaxOverflowLogging "UseLocalSettings" Variant off GeneratePreprocessorConditionals off } Block { BlockType Terminator } } System { Name "w2_warplab_trigger_proc" Location [132, 109, 2467, 1391] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "96" ReportName "simulink-default.rpt" SIDHighWatermark "8898" Block { BlockType Goto Name " 1" SID "6739" Position [205, 257, 320, 273] ShowName off GotoTag "Num_Inputs" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 2" SID "6740" Position [205, 302, 320, 318] ShowName off GotoTag "Num_Outputs" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 3" SID "6741" Position [205, 347, 320, 363] ShowName off GotoTag "Core_ID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name " System Generator" SID "1760" Tag "genX" Ports [] Position [27, 22, 94, 87] ShowName off AttributesFormatString "System\\nGenerator" LibraryVersion "1.2" UserDataPersistent on UserData "DataTag0" SourceBlock "xbsIndex_r4/ System Generator" SourceType "Xilinx System Generator Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off infoedit " System Generator" xilinxfamily "virtex4" part "xc4vfx100" speed "-11" package "ff1517" synthesis_tool "XST" clock_wrapper "Clock Enables" directory "./trigger_proc" proj_type "Project Navigator" Synth_file "XST Defaults" Impl_file "ISE Defaults" testbench off simulink_period "1" sysclk_period "10" dcm_input_clock_period "10" incr_netlist off trim_vbits "Everywhere in SubSystem" dbl_ovrd "According to Block Masks" core_generation "According to Block Masks" run_coregen off deprecated_control off eval_field "0" has_advanced_control "0" sggui_pos "33,915,464,470" block_type "sysgen" sg_icon_stat "67,65,0,0,token,white,0,58c5b5770fe5f7c311f53dbc6e73f0f6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 67 67 0 0 ],[0 0 65 65 0 ],[1 1 1 ]" ");\npatch([2.9625 22.47 35.97 49.47 62.97 35.97 16.4625 2.9625 ],[46.985 46.985 60.485 46.985 60.485 60.485 60.4" "85 46.985 ],[0.933333 0.203922 0.141176 ]);\npatch([16.4625 35.97 22.47 2.9625 16.4625 ],[33.485 33.485 46.985 4" "6.985 33.485 ],[0.698039 0.0313725 0.219608 ]);\npatch([2.9625 22.47 35.97 16.4625 2.9625 ],[19.985 19.985 33.48" "5 33.485 19.985 ],[0.933333 0.203922 0.141176 ]);\npatch([16.4625 62.97 49.47 35.97 22.47 2.9625 16.4625 ],[6.48" "5 6.485 19.985 6.485 19.985 19.985 6.485 ],[0.698039 0.0313725 0.219608 ]);\nfprintf('','COMMENT: end icon graph" "ics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register 3" SID "6034" Ports [2, 1] Position [1095, 570, 1205, 630] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto t" "he output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device i" "s used, multiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38" ".88 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38." "88 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register 4" SID "6035" Ports [2, 1] Position [1095, 770, 1205, 830] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto t" "he output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device i" "s used, multiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38" ".88 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38." "88 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register 5" SID "6036" Ports [2, 1] Position [1095, 970, 1205, 1030] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto t" "he output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device i" "s used, multiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38" ".88 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38." "88 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register 6" SID "6749" Ports [2, 1] Position [1095, 1170, 1205, 1230] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto t" "he output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device i" "s used, multiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38" ".88 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38." "88 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register1" SID "6032" Ports [2, 1] Position [1095, 170, 1205, 230] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto t" "he output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device i" "s used, multiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38" ".88 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38." "88 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "8617" Ports [0, 1] Position [1130, 417, 1185, 443] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0." "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13" ".33 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 " "7.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "CoreID" SID "6731" Ports [0, 1] Position [90, 342, 145, 368] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0." "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13" ".33 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 " "7.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "EDK Processor" SID "8898" Ports [] Position [110, 22, 172, 86] CopyFcn "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallback(gcbh);" DeleteFcn "xlDestroyGui(gcbh);" LoadFcn "xlBlockLoadCallback(gcbh);" ModelCloseFcn "xlDestroyGui(gcbh);" PreSaveFcn "xlBlockPreSaveCallback(gcbh);" PostSaveFcn "xlBlockPostSaveCallback(gcbh);" DestroyFcn "xlDestroyGui(gcbh);" OpenFcn "bh=gcbh;xlProcBlockCallbacks('populatesharedmemorylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.x" "ml', @xlProcBlockEnablement, @xlProcBlockAction);" CloseFcn "xlDestroyGui(gcbh);" MoveFcn "xlBlockMoveCallback(gcbh);" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Xilinx EDK Processor Block" MaskDescription "Xilinx EDK Processor" MaskHelp "eval('');xlDoc('-book','sysgen','-topic','EDK_Processor');" MaskPromptString "Configure Processor for|XPS Project| |Available Memories| | |Bus Type|Base Address| |Loc" "k| |Dual Clocks| |Register Read-Back|Constraint File| |Inherit Device Type|Initial Program| |Enable Co-Debug wit" "h Xilinx SDK (Beta)| | | | | | | | | | | | | | | | " MaskStyleString "popup(EDK pcore generation|HDL netlisting),edit,edit,edit,edit,edit,popup(AXI|PLB),edit,e" "dit,checkbox,edit,checkbox,edit,checkbox,edit,edit,checkbox,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edi" "t,edit,edit,edit,edit,edit,edit,edit,edit,edit" MaskVariables "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemories=&4;portInterfaceTable=&5;bus_type_sgadvanc" "ed=&6;bus_type=&7;baseaddr=&8;baseaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clock" "=@12;reg_readback_sgadvanced=&13;reg_readback=@14;ucf_file=&15;inheritDeviceType_sgadvanced=&16;inheritDeviceTyp" "e=@17;elf_file=&18;codebug_sgadvanced=&19;codebug=@20;clock_name=&21;internalPortList=&22;resetPolarity=&23;memx" "table=&24;procinfo=&25;memmapdirty=&26;blockname=&27;xpsintstyle=&28;has_advanced_control=@29;sggui_pos=&30;bloc" "k_type=&31;block_version=&32;sg_icon_stat=&33;sg_mask_display=&34;sg_list_contents=&35;sg_blockgui_xml=&36;" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on," "on,on,on,on,on,on,on" MaskCallbackString "|||||||||||||||||||||||||||||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,o" "n,on,on,on,on,on,on" MaskVisibilityString "on,on,off,on,on,off,on,on,off,on,off,on,off,on,on,off,on,on,off,on,off,off,off,off,off," "off,off,off,off,off,off,off,off,off,off,off" MaskToolTipString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on," "on,on,on,on,on,on,on" MaskInitialization "try\n tmp_gcb = gcb;\n tmp_gcbh = gcbh;\n if (strcmp('SysGenIndex',get_param(bdroot(" "tmp_gcbh),'tag')) && ~isempty(regexp(bdroot(tmp_gcb), '^xbs', 'once')))\n return;\n end;\n xlMungeMaskParam" "s;\n\n block_type='edkprocessor';\n\n serialized_declarations = '{''block_type''=>''String''}';\n xledkproces" "sor_init();\n ptable_ = xlblockprep(get_param(tmp_gcb, 'MaskWSVariables'));\n try\n xlBlockMoveCallback(tmp" "_gcbh);\n catch \n clear global xl_updateicon_recursion_guard;\n end;\ncatch\n global dbgsysgen;\n if(~i" "sempty(dbgsysgen) && dbgsysgen)\n e = regexprep(lasterr, '\\n', '\\nError: ');\n disp(['Error: While runni" "ng MaskInit code on block ' tmp_gcb ': ' e]);\n error(e);\n end\nend\n" MaskSelfModifiable on MaskDisplay "fprintf('','COMMENT: begin icon graphics');\npatch([0 62 62 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 62 62 0 0 ],[0 0 64 64 0 ]);\npatch([13.2 24.76 32.76 40.76 48.76 32.76 21.2 13.2 ],[40.88 40.8" "8 48.88 40.88 48.88 48.88 48.88 40.88 ],[1 1 1 ]);\npatch([21.2 32.76 24.76 13.2 21.2 ],[32.88 32.88 40.88 40.88" " 32.88 ],[0.931 0.946 0.973 ]);\npatch([13.2 24.76 32.76 21.2 13.2 ],[24.88 24.88 32.88 32.88 24.88 ],[1 1 1 ]);" "\npatch([21.2 48.76 40.76 32.76 24.76 13.2 21.2 ],[16.88 16.88 24.88 16.88 24.88 24.88 16.88 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ndisp('');\n\nfprintf(" "'','COMMENT: end icon text');" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "EDK pcore generation||
<<RSSI_PKT_DET_CONFIG>>
<<TRIG_IN_CONF_6>>
<<TRIG_IN_CONF_5>>
<<TRIG_IN_CONF_4>>
<<TRIG_IN_CONF_3>>
<<TRIG_IN_CONF_2&g" "t;>
<<TRIG_IN" "_CONF_0>>
<&l" "t;TRIG_IN_CONF_8>>
<<TRIG_IN_CONF_7>>
<<TRIG_OUT_5_CONF_0>>
<<TRIG_OUT_5_CONF_1>>
<<TRIG_OUT_4_CONF_0>>
<<TRIG_OUT_0_CONF_0>>
<<TRIG_OUT_4_CONF_1>>
<<TRIG_OUT_3_CONF_0>>
<<TRIG_OUT_3_CONF_1>" ">
<<TRIG_OUT_" "2_CONF_0>>
<&" "lt;TRIG_OUT_2_CONF_1>>
<<TRIG_OUT_1_CONF_0>>
<<TRIG_OUT_1_CONF_1>>
<<TRIG_OUT_0_CONF_1>>
<<RSSI_PKT_DET_DURATIONS>>
<<RSSI_PKT_DET_THRESHOLDS>>
<<TRIG_IN_CONF_1>>
" "
<<CORE_INFO>>" "
<<TRIG_OUT>&" "gt;
||{'exposed'=>[],'portdir'=>[],'portname'=>[],'shortname'=>[]}||PLB|0x80000000||off||on" "||on|||off|||on|plb|{}|0|{'mladdr'=>[0.00000000000000000,1.00000000000000000,2.00000000000000000,3.0000000000000" "0000,4.00000000000000000,5.00000000000000000,6.00000000000000000,7.00000000000000000,8.00000000000000000,9.00000" "000000000000,10.00000000000000000,11.00000000000000000,12.00000000000000000,13.00000000000000000,14.000000000000" "00000,15.00000000000000000,16.00000000000000000,17.00000000000000000,18.00000000000000000,19.00000000000000000,2" "0.00000000000000000,21.00000000000000000,22.00000000000000000,23.00000000000000000,0.00000000000000000,1.0000000" "0000000000],'mlist'=>['w2_warplab_trigger_proc/Registers/From Register9','w2_warplab_trigger_proc/Registers/From" " Register8','w2_warplab_trigger_proc/Registers/From Register7','w2_warplab_trigger_proc/Registers/From Register6" "','w2_warplab_trigger_proc/Registers/From Register5','w2_warplab_trigger_proc/Registers/From Register4','w2_warp" "lab_trigger_proc/Registers/From Register3','w2_warplab_trigger_proc/Registers/From Register24','w2_warplab_trigg" "er_proc/Registers/From Register23','w2_warplab_trigger_proc/Registers/From Register22','w2_warplab_trigger_proc/" "Registers/From Register21','w2_warplab_trigger_proc/Registers/From Register20','w2_warplab_trigger_proc/Register" "s/From Register2','w2_warplab_trigger_proc/Registers/From Register19','w2_warplab_trigger_proc/Registers/From Re" "gister18','w2_warplab_trigger_proc/Registers/From Register17','w2_warplab_trigger_proc/Registers/From Register16" "','w2_warplab_trigger_proc/Registers/From Register15','w2_warplab_trigger_proc/Registers/From Register14','w2_wa" "rplab_trigger_proc/Registers/From Register13','w2_warplab_trigger_proc/Registers/From Register12','w2_warplab_tr" "igger_proc/Registers/From Register11','w2_warplab_trigger_proc/Registers/From Register10','w2_warplab_trigger_pr" "oc/Registers/From Register1','w2_warplab_trigger_proc/Registers/To Register1','w2_warplab_trigger_proc/Registers" "/To Register'],'mlname'=>['\\\\'RSSI_PKT_DET_CONFIG\\\\'','\\\\'TRIG_IN_CONF_6\\\\'','\\\\'TRIG_IN_CONF_5\\\\''," "'\\\\'TRIG_IN_CONF_4\\\\'','\\\\'TRIG_IN_CONF_3\\\\'','\\\\'TRIG_IN_CONF_2\\\\'','\\\\'TRIG_IN_CONF_0\\\\'','\\\\" "'TRIG_IN_CONF_8\\\\'','\\\\'TRIG_IN_CONF_7\\\\'','\\\\'TRIG_OUT_5_CONF_0\\\\'','\\\\'TRIG_OUT_5_CONF_1\\\\'','\\" "\\'TRIG_OUT_4_CONF_0\\\\'','\\\\'TRIG_OUT_0_CONF_0\\\\'','\\\\'TRIG_OUT_4_CONF_1\\\\'','\\\\'TRIG_OUT_3_CONF_0\\" "\\'','\\\\'TRIG_OUT_3_CONF_1\\\\'','\\\\'TRIG_OUT_2_CONF_0\\\\'','\\\\'TRIG_OUT_2_CONF_1\\\\'','\\\\'TRIG_OUT_1_" "CONF_0\\\\'','\\\\'TRIG_OUT_1_CONF_1\\\\'','\\\\'TRIG_OUT_0_CONF_1\\\\'','\\\\'RSSI_PKT_DET_DURATIONS\\\\'','\\\\" "'RSSI_PKT_DET_THRESHOLDS\\\\'','\\\\'TRIG_IN_CONF_1\\\\'','\\\\'CORE_INFO\\\\'','\\\\'TRIG_OUT\\\\''],'mlstate'=" ">[0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000" "000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0." "00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.000000000000" "00000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.0000" "0000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000]}|{}|off||default|0|-1,-1,-1,-1|edkpro" "cessor|2.7|62,64,-1,-1,white,blue,0,07734,right,,[ ],[ ]|fprintf('','COMMENT: begin icon graphics');\npatch([0 6" "2 62 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0.91 ]);\nplot([0 62 62 0 0 ],[0 0 64 64 0 ]);\npatch([13.2 24.76 32.76 40." "76 48.76 32.76 21.2 13.2 ],[40.88 40.88 48.88 40.88 48.88 48.88 48.88 40.88 ],[1 1 1 ]);\npatch([21.2 32.76 24.7" "6 13.2 21.2 ],[32.88 32.88 40.88 40.88 32.88 ],[0.931 0.946 0.973 ]);\npatch([13.2 24.76 32.76 21.2 13.2 ],[24.8" "8 24.88 32.88 32.88 24.88 ],[1 1 1 ]);\npatch([21.2 48.76 40.76 32.76 24.76 13.2 21.2 ],[16.88 16.88 24.88 16.88" " 24.88 24.88 16.88 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\nfprintf('','COMMENT: end icon text');|{'table'=>{'AvailableMemories'=>'popup()'}}|" System { Name "EDK Processor" Location [514, 91, 900, 269] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "275" Block { BlockType Constant Name "Constant" SID "8898:235" Position [40, 1045, 60, 1065] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant1" SID "8898:237" Position [40, 1110, 60, 1130] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant2" SID "8898:239" Position [40, 1180, 60, 1200] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant3" SID "8898:241" Position [40, 1250, 60, 1270] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant4" SID "8898:243" Position [40, 1315, 60, 1335] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant5" SID "8898:245" Ports [0, 1] Position [20, 972, 75, 998] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "xlGetNormalizedPeriod()" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91" " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1" " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Sl_wait" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Constant Name "Constant6" SID "8898:246" Position [40, 1415, 60, 1435] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "From Register" SID "8898:249" Ports [0, 1] Position [400, 1502, 460, 1558] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'CORE_INFO'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "24" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "CORE_INFO_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register1" SID "8898:250" Ports [0, 1] Position [400, 1607, 460, 1663] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_ABus" SID "8898:238" Ports [1, 1] Position [175, 1110, 245, 1130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_ABus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "PLB_ABus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_PAValid" SID "8898:240" Ports [1, 1] Position [175, 1180, 245, 1200] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_PAValid'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "PLB_PAValid" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_RNW" SID "8898:242" Ports [1, 1] Position [175, 1250, 245, 1270] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_RNW'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "PLB_RNW" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_wrDBus" SID "8898:244" Ports [1, 1] Position [175, 1315, 245, 1335] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_wrDBus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "PLB_wrDBus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "SPLB_Rst" SID "8898:236" Ports [1, 1] Position [175, 1045, 245, 1065] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'SPLB_Rst'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "SPLB_Rst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Sl_addrAck" SID "8898:222" Ports [1, 1] Position [670, 80, 730, 100] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_addrAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_rdComp" SID "8898:224" Ports [1, 1] Position [670, 205, 730, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdComp'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_rdDAck" SID "8898:226" Ports [1, 1] Position [670, 1985, 730, 2005] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_rdDBus" SID "8898:228" Ports [1, 1] Position [670, 2630, 730, 2650] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDBus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_wait" SID "8898:230" Ports [1, 1] Position [180, 975, 240, 995] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wait'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_wrComp" SID "8898:234" Ports [1, 1] Position [670, 705, 730, 725] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrComp'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_wrDAck" SID "8898:232" Ports [1, 1] Position [670, 395, 730, 415] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrDAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Terminator Name "Terminator" SID "8898:221" Position [905, 50, 925, 70] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator1" SID "8898:223" Position [905, 120, 925, 140] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator2" SID "8898:225" Position [905, 2850, 925, 2870] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator3" SID "8898:227" Position [905, 2920, 925, 2940] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator4" SID "8898:229" Position [420, 975, 440, 995] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator5" SID "8898:231" Position [905, 185, 925, 205] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator6" SID "8898:233" Position [905, 255, 925, 275] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "To Register" SID "8898:251" Ports [2, 1] Position [885, 322, 945, 378] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'RSSI_PKT_DET_CONFIG'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "RSSI_PKT_DET_CONFIG_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register1" SID "8898:252" Ports [2, 1] Position [885, 427, 945, 483] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_6'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_6_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register10" SID "8898:261" Ports [2, 1] Position [885, 1377, 945, 1433] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_5_CONF_1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_5_CONF_1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register11" SID "8898:262" Ports [2, 1] Position [885, 1482, 945, 1538] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_4_CONF_0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_4_CONF_0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register12" SID "8898:263" Ports [2, 1] Position [885, 1587, 945, 1643] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_0_CONF_0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_0_CONF_0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register13" SID "8898:264" Ports [2, 1] Position [885, 1692, 945, 1748] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_4_CONF_1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_4_CONF_1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register14" SID "8898:265" Ports [2, 1] Position [885, 1797, 945, 1853] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_3_CONF_0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_3_CONF_0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register15" SID "8898:266" Ports [2, 1] Position [885, 1902, 945, 1958] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_3_CONF_1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_3_CONF_1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register16" SID "8898:267" Ports [2, 1] Position [885, 2007, 945, 2063] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_2_CONF_0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_2_CONF_0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register17" SID "8898:268" Ports [2, 1] Position [885, 2112, 945, 2168] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_2_CONF_1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_2_CONF_1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register18" SID "8898:269" Ports [2, 1] Position [885, 2217, 945, 2273] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_1_CONF_0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_1_CONF_0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register19" SID "8898:270" Ports [2, 1] Position [885, 2322, 945, 2378] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_1_CONF_1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_1_CONF_1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register2" SID "8898:253" Ports [2, 1] Position [885, 532, 945, 588] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_5'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_5_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register20" SID "8898:271" Ports [2, 1] Position [885, 2427, 945, 2483] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_0_CONF_1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_0_CONF_1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register21" SID "8898:272" Ports [2, 1] Position [885, 2532, 945, 2588] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'RSSI_PKT_DET_DURATIONS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "RSSI_PKT_DET_DURATIONS_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register22" SID "8898:273" Ports [2, 1] Position [885, 2642, 945, 2698] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'RSSI_PKT_DET_THRESHOLDS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "RSSI_PKT_DET_THRESHOLDS_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register23" SID "8898:274" Ports [2, 1] Position [885, 2747, 945, 2803] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register3" SID "8898:254" Ports [2, 1] Position [885, 637, 945, 693] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_4'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_4_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register4" SID "8898:255" Ports [2, 1] Position [885, 742, 945, 798] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_3'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_3_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register5" SID "8898:256" Ports [2, 1] Position [885, 847, 945, 903] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_2'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_2_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register6" SID "8898:257" Ports [2, 1] Position [885, 952, 945, 1008] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register7" SID "8898:258" Ports [2, 1] Position [885, 1062, 945, 1118] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_8'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_8_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register8" SID "8898:259" Ports [2, 1] Position [885, 1167, 945, 1223] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_7'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_IN_CONF_7_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register9" SID "8898:260" Ports [2, 1] Position [885, 1272, 945, 1328] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_5_CONF_0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TRIG_OUT_5_CONF_0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "plb_decode" SID "8898:248" Ports [7, 9] Position [345, 1044, 515, 1456] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of t" "he block are input arguments of the function. The output ports of the block are output arguments of the function." mfname "xlmax" explicit_period off period "1" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" mfilecontent "function [wrDBusReg, addrAck, rdComp, wrDAck, bankAddr, RNWReg, rdDAck, rdDBus, linearAddr] = plb_" "bus_decode(plbRst, plbABus, plbPAValid, plbRNW, plbWrDBus, rdData, addrPref)\n\n% constant variables (TODO: should " "pass from outside)\nADDRPREF_LEN = 20;\nBANKADDR_LEN = 2;\nLINEARADDR_LEN = 8;\nABUS_LEN = 32;\nDBUS_LEN = 32;\n\n%" " declare and initialize persistent variables\n% register input bus signals\npersistent plbRstReg_, plbRstReg_ = xl_" "state(0, {xlBoolean});\npersistent plbABusReg_, plbABusReg_ = xl_state(0, {xlUnsigned, ABUS_LEN, 0});\npersistent p" "lbPAValidReg_, plbPAValidReg_ = xl_state(0, {xlBoolean});\npersistent plbRNWReg_, plbRNWReg_ = xl_state(0, {xlUnsig" "ned, 1, 0});\npersistent plbWrDBusReg_, plbWrDBusReg_ = xl_state(0, {xlUnsigned, DBUS_LEN, 0});\n\n% ===== rest of " "the outputs =====\n\nbankAddr = xl_slice(plbABusReg_, 2+BANKADDR_LEN+LINEARADDR_LEN-1, 2+LINEARADDR_LEN);\nlinear" "Addr = xl_slice(plbABusReg_, 2+LINEARADDR_LEN-1, 2);\nRNWReg = plbRNWReg_;\nwrDBusReg = plbWrDBusReg_;\n\n% ===== p" "_select =====\n\n% register PAValid\npersistent aValidReg, aValidReg = xl_state(0, {xlBoolean});\naValidReg = plbPA" "ValidReg_;\n\n% extract and register the address prefix\naddrPref_in = xl_slice(plbABusReg_, xl_nbits(plbABusReg_)-" "1, xl_nbits(plbABusReg_)-ADDRPREF_LEN);\nif addrPref_in == addrPref\n ps1 = true;\nelse \n ps1 = false;\nend " "\n\npersistent ps1Reg, ps1Reg = xl_state(0, ps1);\nps1Reg = ps1;\n\nps = xl_and(ps1Reg, aValidReg);\n\n% ===== addr" "Ack =====\n\n% register ps\npersistent psReg, psReg = xl_state(0, ps);\n\naddrAck = xfix({xlUnsigned, 1, 0}, xl_and" "(xl_not(plbRstReg_), ps, xl_not(psReg)));\n\npsReg = ps;\n\n% ===== rdComp, rd/wr DAck =====\n \nrdComp1 = xfix({xl" "Unsigned, 1, 0}, xl_and(addrAck, RNWReg));\n\nNUM_rdCompDelay = 3;\npersistent rdCompDelay, rdCompDelay = xl_state(" "zeros(1, NUM_rdCompDelay), rdComp1, NUM_rdCompDelay);\nrdComp2 = rdCompDelay.back;\nrdCompDelay.push_front_pop_back" "(rdComp1);\n\npersistent rdCompReg, rdCompReg = xl_state(0, rdComp1);\nrdComp = rdCompReg;\nrdCompReg = rdComp2;\n\n" "persistent rdDAckReg, rdDAckReg = xl_state(0, rdComp1);\nrdDAck = rdDAckReg;\nrdDAckReg = rdComp;\n\npersistent wrD" "AckReg, wrDAckReg = xl_state(0, addrAck);\nwrDAck = wrDAckReg;\nwrDAckReg = xl_and(addrAck, xl_not(RNWReg));\n\n% =" "==== rdDBus =====\n\nrdSel = xl_or(rdComp2, rdComp);\n\nif rdSel == 1\n rdDBus1 = rdData;\nelse\n rdDBus1 = 0" ";\nend % if\n\npersistent rdDBusReg, rdDBusReg = xl_state(0, rdDBus1);\nrdDBus = rdDBusReg;\nrdDBusReg = rdDBus1;\n" "\n% rdDBus = xl_concat(rdDBus32, rdDBus32);\n% rdDBus = rdDBus32;\n\n% ===== update the persistent variables =====\n" "\nplbRstReg_ = plbRst;\nplbABusReg_ = plbABus;\nplbPAValidReg_ = plbPAValid;\nplbRNWReg_ = plbRNW;\nplbWrDBusReg_ =" " xl_slice(plbWrDBus, DBUS_LEN-1, 0);\n" suppress_output "on" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mcode" sg_icon_stat "170,412,7,9,white,blue,0,43a237d5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 0 ],[0 0 412 412 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 170 170 0 0 ],[0 0 412 412 0 ]);\npatch([31.6 66.28 90.28 114.28 138.28 90.28 55.6 31.6 ],[232.64" " 232.64 256.64 232.64 256.64 256.64 256.64 232.64 ],[1 1 1 ]);\npatch([55.6 90.28 66.28 31.6 55.6 ],[208.64 208.64 " "232.64 232.64 208.64 ],[0.931 0.946 0.973 ]);\npatch([31.6 66.28 90.28 55.6 31.6 ],[184.64 184.64 208.64 208.64 184" ".64 ],[1 1 1 ]);\npatch([55.6 138.28 114.28 90.28 66.28 31.6 55.6 ],[160.64 160.64 184.64 160.64 184.64 184.64 160." "64 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nco" "lor('black');port_label('input',1,'plbRst');\ncolor('black');port_label('input',2,'plbABus');\ncolor('black');port_" "label('input',3,'plbPAValid');\ncolor('black');port_label('input',4,'plbRNW');\ncolor('black');port_label('input',5" ",'plbWrDBus');\ncolor('black');port_label('input',6,'rdData');\ncolor('black');port_label('input',7,'addrPref');\nc" "olor('black');port_label('output',1,'wrDBusReg');\ncolor('black');port_label('output',2,'addrAck');\ncolor('black')" ";port_label('output',3,'rdComp');\ncolor('black');port_label('output',4,'wrDAck');\ncolor('black');port_label('outp" "ut',5,'bankAddr');\ncolor('black');port_label('output',6,'RNWReg');\ncolor('black');port_label('output',7,'rdDAck')" ";\ncolor('black');port_label('output',8,'rdDBus');\ncolor('black');port_label('output',9,'linearAddr');\ncolor('bla" "ck');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "wrDBusReg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "Sl_addrAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "Sl_rdComp" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "Sl_wrDAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 5 Name "bankAddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "RNWReg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 7 Name "Sl_rdDAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 8 Name "Sl_rdDBus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 9 Name "linearAddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "plb_memmap" SID "8898:275" Ports [31, 49] Position [615, 1385, 785, 1635] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of t" "he block are input arguments of the function. The output ports of the block are output arguments of the function." mfname "xlmax" explicit_period off period "1" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" mfilecontent "function [read_bank_out, sm_RSSI_PKT_DET_CONFIG_din, sm_RSSI_PKT_DET_CONFIG_en, sm_TRIG_IN_CONF_6_" "din, sm_TRIG_IN_CONF_6_en, sm_TRIG_IN_CONF_5_din, sm_TRIG_IN_CONF_5_en, sm_TRIG_IN_CONF_4_din, sm_TRIG_IN_CONF_4_en" ", sm_TRIG_IN_CONF_3_din, sm_TRIG_IN_CONF_3_en, sm_TRIG_IN_CONF_2_din, sm_TRIG_IN_CONF_2_en, sm_TRIG_IN_CONF_0_din, " "sm_TRIG_IN_CONF_0_en, sm_TRIG_IN_CONF_8_din, sm_TRIG_IN_CONF_8_en, sm_TRIG_IN_CONF_7_din, sm_TRIG_IN_CONF_7_en, sm_" "TRIG_OUT_5_CONF_0_din, sm_TRIG_OUT_5_CONF_0_en, sm_TRIG_OUT_5_CONF_1_din, sm_TRIG_OUT_5_CONF_1_en, sm_TRIG_OUT_4_CO" "NF_0_din, sm_TRIG_OUT_4_CONF_0_en, sm_TRIG_OUT_0_CONF_0_din, sm_TRIG_OUT_0_CONF_0_en, sm_TRIG_OUT_4_CONF_1_din, sm_" "TRIG_OUT_4_CONF_1_en, sm_TRIG_OUT_3_CONF_0_din, sm_TRIG_OUT_3_CONF_0_en, sm_TRIG_OUT_3_CONF_1_din, sm_TRIG_OUT_3_CO" "NF_1_en, sm_TRIG_OUT_2_CONF_0_din, sm_TRIG_OUT_2_CONF_0_en, sm_TRIG_OUT_2_CONF_1_din, sm_TRIG_OUT_2_CONF_1_en, sm_T" "RIG_OUT_1_CONF_0_din, sm_TRIG_OUT_1_CONF_0_en, sm_TRIG_OUT_1_CONF_1_din, sm_TRIG_OUT_1_CONF_1_en, sm_TRIG_OUT_0_CON" "F_1_din, sm_TRIG_OUT_0_CONF_1_en, sm_RSSI_PKT_DET_DURATIONS_din, sm_RSSI_PKT_DET_DURATIONS_en, sm_RSSI_PKT_DET_THRE" "SHOLDS_din, sm_RSSI_PKT_DET_THRESHOLDS_en, sm_TRIG_IN_CONF_1_din, sm_TRIG_IN_CONF_1_en] = plb_memmap(wrDBus, bankAd" "dr, linearAddr, RNWReg, addrAck, sm_CORE_INFO, sm_TRIG_OUT, sm_RSSI_PKT_DET_CONFIG, sm_TRIG_IN_CONF_6, sm_TRIG_IN_C" "ONF_5, sm_TRIG_IN_CONF_4, sm_TRIG_IN_CONF_3, sm_TRIG_IN_CONF_2, sm_TRIG_IN_CONF_0, sm_TRIG_IN_CONF_8, sm_TRIG_IN_CO" "NF_7, sm_TRIG_OUT_5_CONF_0, sm_TRIG_OUT_5_CONF_1, sm_TRIG_OUT_4_CONF_0, sm_TRIG_OUT_0_CONF_0, sm_TRIG_OUT_4_CONF_1," " sm_TRIG_OUT_3_CONF_0, sm_TRIG_OUT_3_CONF_1, sm_TRIG_OUT_2_CONF_0, sm_TRIG_OUT_2_CONF_1, sm_TRIG_OUT_1_CONF_0, sm_T" "RIG_OUT_1_CONF_1, sm_TRIG_OUT_0_CONF_1, sm_RSSI_PKT_DET_DURATIONS, sm_RSSI_PKT_DET_THRESHOLDS, sm_TRIG_IN_CONF_1)\n" "\n\n% connvert the input data to UFix_32_0 (the bus data type)\n% 'From Register' blocks\n% sm_CORE_INFO_bus = xfix" "({xlUnsigned, 32, 0}, 0);\nsm_CORE_INFO_bus = xl_force(sm_CORE_INFO, xlUnsigned, 0);\n\n% sm_TRIG_OUT_bus = xfix({x" "lUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_bus = xl_force(sm_TRIG_OUT, xlUnsigned, 0);\n\n% 'To Register' blocks\n\n% sm_R" "SSI_PKT_DET_CONFIG_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RSSI_PKT_DET_CONFIG_dout = xl_force(sm_RSSI_PKT_DET_CON" "FIG, xlUnsigned, 0);\n\n% sm_TRIG_IN_CONF_6_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_IN_CONF_6_dout = xl_force" "(sm_TRIG_IN_CONF_6, xlUnsigned, 0);\n\n% sm_TRIG_IN_CONF_5_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_IN_CONF_5_" "dout = xl_force(sm_TRIG_IN_CONF_5, xlUnsigned, 0);\n\n% sm_TRIG_IN_CONF_4_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_" "TRIG_IN_CONF_4_dout = xl_force(sm_TRIG_IN_CONF_4, xlUnsigned, 0);\n\n% sm_TRIG_IN_CONF_3_dout = xfix({xlUnsigned, 3" "2, 0}, 0);\nsm_TRIG_IN_CONF_3_dout = xl_force(sm_TRIG_IN_CONF_3, xlUnsigned, 0);\n\n% sm_TRIG_IN_CONF_2_dout = xfix" "({xlUnsigned, 32, 0}, 0);\nsm_TRIG_IN_CONF_2_dout = xl_force(sm_TRIG_IN_CONF_2, xlUnsigned, 0);\n\n% sm_TRIG_IN_CON" "F_0_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_IN_CONF_0_dout = xl_force(sm_TRIG_IN_CONF_0, xlUnsigned, 0);\n\n%" " sm_TRIG_IN_CONF_8_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_IN_CONF_8_dout = xl_force(sm_TRIG_IN_CONF_8, xlUns" "igned, 0);\n\n% sm_TRIG_IN_CONF_7_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_IN_CONF_7_dout = xl_force(sm_TRIG_I" "N_CONF_7, xlUnsigned, 0);\n\n% sm_TRIG_OUT_5_CONF_0_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_5_CONF_0_dout" " = xl_force(sm_TRIG_OUT_5_CONF_0, xlUnsigned, 0);\n\n% sm_TRIG_OUT_5_CONF_1_dout = xfix({xlUnsigned, 32, 0}, 0);\ns" "m_TRIG_OUT_5_CONF_1_dout = xl_force(sm_TRIG_OUT_5_CONF_1, xlUnsigned, 0);\n\n% sm_TRIG_OUT_4_CONF_0_dout = xfix({xl" "Unsigned, 32, 0}, 0);\nsm_TRIG_OUT_4_CONF_0_dout = xl_force(sm_TRIG_OUT_4_CONF_0, xlUnsigned, 0);\n\n% sm_TRIG_OUT_" "0_CONF_0_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_0_CONF_0_dout = xl_force(sm_TRIG_OUT_0_CONF_0, xlUnsigne" "d, 0);\n\n% sm_TRIG_OUT_4_CONF_1_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_4_CONF_1_dout = xl_force(sm_TRIG" "_OUT_4_CONF_1, xlUnsigned, 0);\n\n% sm_TRIG_OUT_3_CONF_0_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_3_CONF_0" "_dout = xl_force(sm_TRIG_OUT_3_CONF_0, xlUnsigned, 0);\n\n% sm_TRIG_OUT_3_CONF_1_dout = xfix({xlUnsigned, 32, 0}, 0" ");\nsm_TRIG_OUT_3_CONF_1_dout = xl_force(sm_TRIG_OUT_3_CONF_1, xlUnsigned, 0);\n\n% sm_TRIG_OUT_2_CONF_0_dout = xfi" "x({xlUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_2_CONF_0_dout = xl_force(sm_TRIG_OUT_2_CONF_0, xlUnsigned, 0);\n\n% sm_TRIG" "_OUT_2_CONF_1_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_2_CONF_1_dout = xl_force(sm_TRIG_OUT_2_CONF_1, xlUn" "signed, 0);\n\n% sm_TRIG_OUT_1_CONF_0_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_1_CONF_0_dout = xl_force(sm" "_TRIG_OUT_1_CONF_0, xlUnsigned, 0);\n\n% sm_TRIG_OUT_1_CONF_1_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TRIG_OUT_1_C" "ONF_1_dout = xl_force(sm_TRIG_OUT_1_CONF_1, xlUnsigned, 0);\n\n% sm_TRIG_OUT_0_CONF_1_dout = xfix({xlUnsigned, 32, " "0}, 0);\nsm_TRIG_OUT_0_CONF_1_dout = xl_force(sm_TRIG_OUT_0_CONF_1, xlUnsigned, 0);\n\n% sm_RSSI_PKT_DET_DURATIONS_" "dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RSSI_PKT_DET_DURATIONS_dout = xl_force(sm_RSSI_PKT_DET_DURATIONS, xlUnsign" "ed, 0);\n\n% sm_RSSI_PKT_DET_THRESHOLDS_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RSSI_PKT_DET_THRESHOLDS_dout = xl_" "force(sm_RSSI_PKT_DET_THRESHOLDS, xlUnsigned, 0);\n\n% sm_TRIG_IN_CONF_1_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_T" "RIG_IN_CONF_1_dout = xl_force(sm_TRIG_IN_CONF_1, xlUnsigned, 0);\n\n\n% 'From FIFO' blocks\n% 'To FIFO' blocks\n% '" "Shared Memory' blocks\n\n% 'dout' ports of 'From Register' blocks\n\n% registered register mux output\npersistent r" "eg_bank_out_reg; reg_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nreg_bank_out = reg_bank_out_reg;\n\nif linea" "rAddr == 24\n reg_bank_out_reg = sm_CORE_INFO_bus;\nelseif linearAddr == 25\n reg_bank_out_reg = sm_TRIG_OUT_" "bus;\nelseif linearAddr == 0\n reg_bank_out_reg = sm_RSSI_PKT_DET_CONFIG_dout;\nelseif linearAddr == 1\n reg_" "bank_out_reg = sm_TRIG_IN_CONF_6_dout;\nelseif linearAddr == 2\n reg_bank_out_reg = sm_TRIG_IN_CONF_5_dout;\nels" "eif linearAddr == 3\n reg_bank_out_reg = sm_TRIG_IN_CONF_4_dout;\nelseif linearAddr == 4\n reg_bank_out_reg =" " sm_TRIG_IN_CONF_3_dout;\nelseif linearAddr == 5\n reg_bank_out_reg = sm_TRIG_IN_CONF_2_dout;\nelseif linearAddr" " == 6\n reg_bank_out_reg = sm_TRIG_IN_CONF_0_dout;\nelseif linearAddr == 7\n reg_bank_out_reg = sm_TRIG_IN_CO" "NF_8_dout;\nelseif linearAddr == 8\n reg_bank_out_reg = sm_TRIG_IN_CONF_7_dout;\nelseif linearAddr == 9\n reg" "_bank_out_reg = sm_TRIG_OUT_5_CONF_0_dout;\nelseif linearAddr == 10\n reg_bank_out_reg = sm_TRIG_OUT_5_CONF_1_do" "ut;\nelseif linearAddr == 11\n reg_bank_out_reg = sm_TRIG_OUT_4_CONF_0_dout;\nelseif linearAddr == 12\n reg_b" "ank_out_reg = sm_TRIG_OUT_0_CONF_0_dout;\nelseif linearAddr == 13\n reg_bank_out_reg = sm_TRIG_OUT_4_CONF_1_dout" ";\nelseif linearAddr == 14\n reg_bank_out_reg = sm_TRIG_OUT_3_CONF_0_dout;\nelseif linearAddr == 15\n reg_ban" "k_out_reg = sm_TRIG_OUT_3_CONF_1_dout;\nelseif linearAddr == 16\n reg_bank_out_reg = sm_TRIG_OUT_2_CONF_0_dout;\n" "elseif linearAddr == 17\n reg_bank_out_reg = sm_TRIG_OUT_2_CONF_1_dout;\nelseif linearAddr == 18\n reg_bank_o" "ut_reg = sm_TRIG_OUT_1_CONF_0_dout;\nelseif linearAddr == 19\n reg_bank_out_reg = sm_TRIG_OUT_1_CONF_1_dout;\nel" "seif linearAddr == 20\n reg_bank_out_reg = sm_TRIG_OUT_0_CONF_1_dout;\nelseif linearAddr == 21\n reg_bank_out" "_reg = sm_RSSI_PKT_DET_DURATIONS_dout;\nelseif linearAddr == 22\n reg_bank_out_reg = sm_RSSI_PKT_DET_THRESHOLDS_" "dout;\nelseif linearAddr == 23\n reg_bank_out_reg = sm_TRIG_IN_CONF_1_dout;\n\nend\n\n\n% 'From FIFO' and 'To FI" "FO' blocks\n\n\n\n\n\nopCode = xl_concat(addrAck, RNWReg, bankAddr, linearAddr);\n\n% 'Shared Memory' blocks\n\n\n\n" "\n\n% 'din' ports of 'Shared Memory' blocks\n\n\n% 'we' ports of 'Shared Memory' blocks\n\n\n% 'addr' ports of 'Sha" "red Memory' blocks\n\n\n% 're' ports of 'From FIFO' blocks\n\n\n% 'en' ports of 'To Register' blocks\nif opCode == " "xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 0))" "\n sm_RSSI_PKT_DET_CONFIG_en = true;\nelse\n sm_RSSI_PKT_DET_CONFIG_en = false;\nend\nif opCode == xl_concat(" "xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 1))\n sm_T" "RIG_IN_CONF_6_en = true;\nelse\n sm_TRIG_IN_CONF_6_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4," " 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 2))\n sm_TRIG_IN_CONF_5_en = t" "rue;\nelse\n sm_TRIG_IN_CONF_5_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 3))\n sm_TRIG_IN_CONF_4_en = true;\nelse\n sm_T" "RIG_IN_CONF_4_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xf" "ix({xlUnsigned, xl_nbits(linearAddr), 0}, 4))\n sm_TRIG_IN_CONF_3_en = true;\nelse\n sm_TRIG_IN_CONF_3_en = f" "alse;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_n" "bits(linearAddr), 0}, 5))\n sm_TRIG_IN_CONF_2_en = true;\nelse\n sm_TRIG_IN_CONF_2_en = false;\nend\nif opCod" "e == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}" ", 6))\n sm_TRIG_IN_CONF_0_en = true;\nelse\n sm_TRIG_IN_CONF_0_en = false;\nend\nif opCode == xl_concat(xfix(" "{xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 7))\n sm_TRIG_I" "N_CONF_8_en = true;\nelse\n sm_TRIG_IN_CONF_8_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, " "10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 8))\n sm_TRIG_IN_CONF_7_en = true;\n" "else\n sm_TRIG_IN_CONF_7_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 9))\n sm_TRIG_OUT_5_CONF_0_en = true;\nelse\n sm_TRIG" "_OUT_5_CONF_0_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xf" "ix({xlUnsigned, xl_nbits(linearAddr), 0}, 10))\n sm_TRIG_OUT_5_CONF_1_en = true;\nelse\n sm_TRIG_OUT_5_CONF_1" "_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigne" "d, xl_nbits(linearAddr), 0}, 11))\n sm_TRIG_OUT_4_CONF_0_en = true;\nelse\n sm_TRIG_OUT_4_CONF_0_en = false;\n" "end\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(li" "nearAddr), 0}, 12))\n sm_TRIG_OUT_0_CONF_0_en = true;\nelse\n sm_TRIG_OUT_0_CONF_0_en = false;\nend\nif opCod" "e == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}" ", 13))\n sm_TRIG_OUT_4_CONF_1_en = true;\nelse\n sm_TRIG_OUT_4_CONF_1_en = false;\nend\nif opCode == xl_conca" "t(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 14))\n s" "m_TRIG_OUT_3_CONF_0_en = true;\nelse\n sm_TRIG_OUT_3_CONF_0_en = false;\nend\nif opCode == xl_concat(xfix({xlUns" "igned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 15))\n sm_TRIG_OUT_3_" "CONF_1_en = true;\nelse\n sm_TRIG_OUT_3_CONF_1_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}," " 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 16))\n sm_TRIG_OUT_2_CONF_0_en = t" "rue;\nelse\n sm_TRIG_OUT_2_CONF_0_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 17))\n sm_TRIG_OUT_2_CONF_1_en = true;\nelse\n " " sm_TRIG_OUT_2_CONF_1_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 18))\n sm_TRIG_OUT_1_CONF_0_en = true;\nelse\n sm_TRIG_OU" "T_1_CONF_0_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix(" "{xlUnsigned, xl_nbits(linearAddr), 0}, 19))\n sm_TRIG_OUT_1_CONF_1_en = true;\nelse\n sm_TRIG_OUT_1_CONF_1_en" " = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, " "xl_nbits(linearAddr), 0}, 20))\n sm_TRIG_OUT_0_CONF_1_en = true;\nelse\n sm_TRIG_OUT_0_CONF_1_en = false;\nen" "d\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(line" "arAddr), 0}, 21))\n sm_RSSI_PKT_DET_DURATIONS_en = true;\nelse\n sm_RSSI_PKT_DET_DURATIONS_en = false;\nend\n" "if opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearA" "ddr), 0}, 22))\n sm_RSSI_PKT_DET_THRESHOLDS_en = true;\nelse\n sm_RSSI_PKT_DET_THRESHOLDS_en = false;\nend\ni" "f opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAd" "dr), 0}, 23))\n sm_TRIG_IN_CONF_1_en = true;\nelse\n sm_TRIG_IN_CONF_1_en = false;\nend\n\n\n% 'din' ports of" " 'To FIFO' blocks\n\n\n% 'we' ports of 'To FIFO' blocks\n\n\n% 'din' ports of 'To Register' blocks\nsm_RSSI_PKT_DET" "_CONFIG_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TRIG_IN_CONF_6_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TRIG_IN_CONF_5_din = xl_force(xl_slice(wrD" "Bus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TR" "IG_IN_CONF_4_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TRIG_IN_CONF_3_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TRIG_IN_CONF_2_din = xl_force(xl_slic" "e(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\n" "sm_TRIG_IN_CONF_0_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ..." "\n 0);\nsm_TRIG_IN_CONF_8_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TRIG_IN_CONF_7_din = xl_force(xl" "_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " "0);\nsm_TRIG_OUT_5_CONF_0_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsig" "ned, ...\n 0);\nsm_TRIG_OUT_5_CONF_1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), .." ".\n xlUnsigned, ...\n 0);\nsm_TRIG_OUT_4_CONF_0_din" " = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TRIG_OUT_0_CONF_0_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TRIG_OUT_4_CONF_1_din = xl_force(xl_slice(wrDBus, " "32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TRIG_OU" "T_3_CONF_0_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TRIG_OUT_3_CONF_1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TRIG_OUT_2_CONF_0_din = xl_force(xl_" "slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0" ");\nsm_TRIG_OUT_2_CONF_1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsign" "ed, ...\n 0);\nsm_TRIG_OUT_1_CONF_0_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ..." "\n xlUnsigned, ...\n 0);\nsm_TRIG_OUT_1_CONF_1_din " "= xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TRIG_OUT_0_CONF_1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_RSSI_PKT_DET_DURATIONS_din = xl_force(xl_slice(wrDB" "us, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RSS" "I_PKT_DET_THRESHOLDS_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, " "...\n 0);\nsm_TRIG_IN_CONF_1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\n\n\npersistent read_bank_out_reg" "; read_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nread_bank_out = read_bank_out_reg;\n\npersistent bankAddr_" "reg; bankAddr_reg = xl_state(0, bankAddr);\n\nif bankAddr_reg == 0\n % Bank 0: Shared Memories\n read_bank_ou" "t_reg = 0;\nelseif bankAddr_reg == 1\n % Bank 1: From/To FIFOs\n read_bank_out_reg = 0;\nelseif bankAddr_reg" " == 2\n % Bank 2: From/To Registers\n read_bank_out_reg = reg_bank_out;\nelseif bankAddr_reg == 3\n % Bank" " 3: Configuration Registers\n read_bank_out_reg = 0;\nend\n\nbankAddr_reg = bankAddr;\n" suppress_output "on" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mcode" sg_icon_stat "170,250,31,49,white,blue,0,549a1aa4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 0 ],[0 0 250 250 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 170 170 0 0 ],[0 0 250 250 0 ]);\npatch([31.6 66.28 90.28 114.28 138.28 90.28 55.6 31.6 ],[151.64" " 151.64 175.64 151.64 175.64 175.64 175.64 151.64 ],[1 1 1 ]);\npatch([55.6 90.28 66.28 31.6 55.6 ],[127.64 127.64 " "151.64 151.64 127.64 ],[0.931 0.946 0.973 ]);\npatch([31.6 66.28 90.28 55.6 31.6 ],[103.64 103.64 127.64 127.64 103" ".64 ],[1 1 1 ]);\npatch([55.6 138.28 114.28 90.28 66.28 31.6 55.6 ],[79.64 79.64 103.64 79.64 103.64 103.64 79.64 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor(" "'black');port_label('input',1,'wrDBus');\ncolor('black');port_label('input',2,'bankAddr');\ncolor('black');port_lab" "el('input',3,'linearAddr');\ncolor('black');port_label('input',4,'RNWReg');\ncolor('black');port_label('input',5,'a" "ddrAck');\ncolor('black');port_label('input',6,'sm_CORE_INFO');\ncolor('black');port_label('input',7,'sm_TRIG_OUT')" ";\ncolor('black');port_label('input',8,'sm_RSSI_PKT_DET_CONFIG');\ncolor('black');port_label('input',9,'sm_TRIG_IN_" "CONF_6');\ncolor('black');port_label('input',10,'sm_TRIG_IN_CONF_5');\ncolor('black');port_label('input',11,'sm_TRI" "G_IN_CONF_4');\ncolor('black');port_label('input',12,'sm_TRIG_IN_CONF_3');\ncolor('black');port_label('input',13,'s" "m_TRIG_IN_CONF_2');\ncolor('black');port_label('input',14,'sm_TRIG_IN_CONF_0');\ncolor('black');port_label('input'," "15,'sm_TRIG_IN_CONF_8');\ncolor('black');port_label('input',16,'sm_TRIG_IN_CONF_7');\ncolor('black');port_label('in" "put',17,'sm_TRIG_OUT_5_CONF_0');\ncolor('black');port_label('input',18,'sm_TRIG_OUT_5_CONF_1');\ncolor('black');por" "t_label('input',19,'sm_TRIG_OUT_4_CONF_0');\ncolor('black');port_label('input',20,'sm_TRIG_OUT_0_CONF_0');\ncolor('" "black');port_label('input',21,'sm_TRIG_OUT_4_CONF_1');\ncolor('black');port_label('input',22,'sm_TRIG_OUT_3_CONF_0'" ");\ncolor('black');port_label('input',23,'sm_TRIG_OUT_3_CONF_1');\ncolor('black');port_label('input',24,'sm_TRIG_OU" "T_2_CONF_0');\ncolor('black');port_label('input',25,'sm_TRIG_OUT_2_CONF_1');\ncolor('black');port_label('input',26," "'sm_TRIG_OUT_1_CONF_0');\ncolor('black');port_label('input',27,'sm_TRIG_OUT_1_CONF_1');\ncolor('black');port_label(" "'input',28,'sm_TRIG_OUT_0_CONF_1');\ncolor('black');port_label('input',29,'sm_RSSI_PKT_DET_DURATIONS');\ncolor('bla" "ck');port_label('input',30,'sm_RSSI_PKT_DET_THRESHOLDS');\ncolor('black');port_label('input',31,'sm_TRIG_IN_CONF_1'" ");\ncolor('black');port_label('output',1,'read_bank_out');\ncolor('black');port_label('output',2,'sm_RSSI_PKT_DET_C" "ONFIG_din');\ncolor('black');port_label('output',3,'sm_RSSI_PKT_DET_CONFIG_en');\ncolor('black');port_label('output" "',4,'sm_TRIG_IN_CONF_6_din');\ncolor('black');port_label('output',5,'sm_TRIG_IN_CONF_6_en');\ncolor('black');port_l" "abel('output',6,'sm_TRIG_IN_CONF_5_din');\ncolor('black');port_label('output',7,'sm_TRIG_IN_CONF_5_en');\ncolor('bl" "ack');port_label('output',8,'sm_TRIG_IN_CONF_4_din');\ncolor('black');port_label('output',9,'sm_TRIG_IN_CONF_4_en')" ";\ncolor('black');port_label('output',10,'sm_TRIG_IN_CONF_3_din');\ncolor('black');port_label('output',11,'sm_TRIG_" "IN_CONF_3_en');\ncolor('black');port_label('output',12,'sm_TRIG_IN_CONF_2_din');\ncolor('black');port_label('output" "',13,'sm_TRIG_IN_CONF_2_en');\ncolor('black');port_label('output',14,'sm_TRIG_IN_CONF_0_din');\ncolor('black');port" "_label('output',15,'sm_TRIG_IN_CONF_0_en');\ncolor('black');port_label('output',16,'sm_TRIG_IN_CONF_8_din');\ncolor" "('black');port_label('output',17,'sm_TRIG_IN_CONF_8_en');\ncolor('black');port_label('output',18,'sm_TRIG_IN_CONF_7" "_din');\ncolor('black');port_label('output',19,'sm_TRIG_IN_CONF_7_en');\ncolor('black');port_label('output',20,'sm_" "TRIG_OUT_5_CONF_0_din');\ncolor('black');port_label('output',21,'sm_TRIG_OUT_5_CONF_0_en');\ncolor('black');port_la" "bel('output',22,'sm_TRIG_OUT_5_CONF_1_din');\ncolor('black');port_label('output',23,'sm_TRIG_OUT_5_CONF_1_en');\nco" "lor('black');port_label('output',24,'sm_TRIG_OUT_4_CONF_0_din');\ncolor('black');port_label('output',25,'sm_TRIG_OU" "T_4_CONF_0_en');\ncolor('black');port_label('output',26,'sm_TRIG_OUT_0_CONF_0_din');\ncolor('black');port_label('ou" "tput',27,'sm_TRIG_OUT_0_CONF_0_en');\ncolor('black');port_label('output',28,'sm_TRIG_OUT_4_CONF_1_din');\ncolor('bl" "ack');port_label('output',29,'sm_TRIG_OUT_4_CONF_1_en');\ncolor('black');port_label('output',30,'sm_TRIG_OUT_3_CONF" "_0_din');\ncolor('black');port_label('output',31,'sm_TRIG_OUT_3_CONF_0_en');\ncolor('black');port_label('output',32" ",'sm_TRIG_OUT_3_CONF_1_din');\ncolor('black');port_label('output',33,'sm_TRIG_OUT_3_CONF_1_en');\ncolor('black');po" "rt_label('output',34,'sm_TRIG_OUT_2_CONF_0_din');\ncolor('black');port_label('output',35,'sm_TRIG_OUT_2_CONF_0_en')" ";\ncolor('black');port_label('output',36,'sm_TRIG_OUT_2_CONF_1_din');\ncolor('black');port_label('output',37,'sm_TR" "IG_OUT_2_CONF_1_en');\ncolor('black');port_label('output',38,'sm_TRIG_OUT_1_CONF_0_din');\ncolor('black');port_labe" "l('output',39,'sm_TRIG_OUT_1_CONF_0_en');\ncolor('black');port_label('output',40,'sm_TRIG_OUT_1_CONF_1_din');\ncolo" "r('black');port_label('output',41,'sm_TRIG_OUT_1_CONF_1_en');\ncolor('black');port_label('output',42,'sm_TRIG_OUT_0" "_CONF_1_din');\ncolor('black');port_label('output',43,'sm_TRIG_OUT_0_CONF_1_en');\ncolor('black');port_label('outpu" "t',44,'sm_RSSI_PKT_DET_DURATIONS_din');\ncolor('black');port_label('output',45,'sm_RSSI_PKT_DET_DURATIONS_en');\nco" "lor('black');port_label('output',46,'sm_RSSI_PKT_DET_THRESHOLDS_din');\ncolor('black');port_label('output',47,'sm_R" "SSI_PKT_DET_THRESHOLDS_en');\ncolor('black');port_label('output',48,'sm_TRIG_IN_CONF_1_din');\ncolor('black');port_" "label('output',49,'sm_TRIG_IN_CONF_1_en');\ncolor('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT" ": end icon text');" Port { PortNumber 1 Name "rdData" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "RSSI_PKT_DET_CONFIG_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "RSSI_PKT_DET_CONFIG_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "TRIG_IN_CONF_6_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 5 Name "TRIG_IN_CONF_6_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "TRIG_IN_CONF_5_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 7 Name "TRIG_IN_CONF_5_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 8 Name "TRIG_IN_CONF_4_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 9 Name "TRIG_IN_CONF_4_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 10 Name "TRIG_IN_CONF_3_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 11 Name "TRIG_IN_CONF_3_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 12 Name "TRIG_IN_CONF_2_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 13 Name "TRIG_IN_CONF_2_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 14 Name "TRIG_IN_CONF_0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 15 Name "TRIG_IN_CONF_0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 16 Name "TRIG_IN_CONF_8_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 17 Name "TRIG_IN_CONF_8_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 18 Name "TRIG_IN_CONF_7_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 19 Name "TRIG_IN_CONF_7_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 20 Name "TRIG_OUT_5_CONF_0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 21 Name "TRIG_OUT_5_CONF_0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 22 Name "TRIG_OUT_5_CONF_1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 23 Name "TRIG_OUT_5_CONF_1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 24 Name "TRIG_OUT_4_CONF_0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 25 Name "TRIG_OUT_4_CONF_0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 26 Name "TRIG_OUT_0_CONF_0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 27 Name "TRIG_OUT_0_CONF_0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 28 Name "TRIG_OUT_4_CONF_1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 29 Name "TRIG_OUT_4_CONF_1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 30 Name "TRIG_OUT_3_CONF_0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 31 Name "TRIG_OUT_3_CONF_0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 32 Name "TRIG_OUT_3_CONF_1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 33 Name "TRIG_OUT_3_CONF_1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 34 Name "TRIG_OUT_2_CONF_0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 35 Name "TRIG_OUT_2_CONF_0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 36 Name "TRIG_OUT_2_CONF_1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 37 Name "TRIG_OUT_2_CONF_1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 38 Name "TRIG_OUT_1_CONF_0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 39 Name "TRIG_OUT_1_CONF_0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 40 Name "TRIG_OUT_1_CONF_1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 41 Name "TRIG_OUT_1_CONF_1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 42 Name "TRIG_OUT_0_CONF_1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 43 Name "TRIG_OUT_0_CONF_1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 44 Name "RSSI_PKT_DET_DURATIONS_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 45 Name "RSSI_PKT_DET_DURATIONS_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 46 Name "RSSI_PKT_DET_THRESHOLDS_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 47 Name "RSSI_PKT_DET_THRESHOLDS_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 48 Name "TRIG_IN_CONF_1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 49 Name "TRIG_IN_CONF_1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "sg_plb_addrpref" SID "8898:247" Ports [1, 1] Position [175, 1415, 245, 1435] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "20" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'sg_plb_addrpref'}},'iopad'=>{'constraint'=>'" "#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "addrPref" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Line { Name "Sl_addrAck" SrcBlock "plb_decode" SrcPort 2 Points [0, 0] Branch { Labels [1, 0] DstBlock "plb_memmap" DstPort 5 } Branch { Labels [0, 0] DstBlock "Sl_addrAck" DstPort 1 } } Line { Name "Sl_wrDAck" SrcBlock "plb_decode" SrcPort 4 Points [0, 0] Branch { Labels [1, 0] DstBlock "Sl_wrDAck" DstPort 1 } Branch { Labels [0, 0] DstBlock "Sl_wrComp" DstPort 1 } } Line { Name "TRIG_IN_CONF_1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 49 DstBlock "To Register23" DstPort 2 } Line { Name "TRIG_IN_CONF_1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 48 DstBlock "To Register23" DstPort 1 } Line { Name "RSSI_PKT_DET_THRESHOLDS_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 47 DstBlock "To Register22" DstPort 2 } Line { Name "RSSI_PKT_DET_THRESHOLDS_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 46 DstBlock "To Register22" DstPort 1 } Line { Name "RSSI_PKT_DET_DURATIONS_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 45 DstBlock "To Register21" DstPort 2 } Line { Name "RSSI_PKT_DET_DURATIONS_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 44 DstBlock "To Register21" DstPort 1 } Line { Name "TRIG_OUT_0_CONF_1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 43 DstBlock "To Register20" DstPort 2 } Line { Name "TRIG_OUT_0_CONF_1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 42 DstBlock "To Register20" DstPort 1 } Line { Name "TRIG_OUT_1_CONF_1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 41 DstBlock "To Register19" DstPort 2 } Line { Name "TRIG_OUT_1_CONF_1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 40 DstBlock "To Register19" DstPort 1 } Line { Name "TRIG_OUT_1_CONF_0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 39 DstBlock "To Register18" DstPort 2 } Line { Name "TRIG_OUT_1_CONF_0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 38 DstBlock "To Register18" DstPort 1 } Line { Name "TRIG_OUT_2_CONF_1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 37 DstBlock "To Register17" DstPort 2 } Line { Name "TRIG_OUT_2_CONF_1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 36 DstBlock "To Register17" DstPort 1 } Line { Name "TRIG_OUT_2_CONF_0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 35 DstBlock "To Register16" DstPort 2 } Line { Name "TRIG_OUT_2_CONF_0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 34 DstBlock "To Register16" DstPort 1 } Line { Name "TRIG_OUT_3_CONF_1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 33 DstBlock "To Register15" DstPort 2 } Line { Name "TRIG_OUT_3_CONF_1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 32 DstBlock "To Register15" DstPort 1 } Line { Name "TRIG_OUT_3_CONF_0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 31 DstBlock "To Register14" DstPort 2 } Line { Name "TRIG_OUT_3_CONF_0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 30 DstBlock "To Register14" DstPort 1 } Line { Name "TRIG_OUT_4_CONF_1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 29 DstBlock "To Register13" DstPort 2 } Line { Name "TRIG_OUT_4_CONF_1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 28 DstBlock "To Register13" DstPort 1 } Line { Name "TRIG_OUT_0_CONF_0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 27 DstBlock "To Register12" DstPort 2 } Line { Name "TRIG_OUT_0_CONF_0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 26 DstBlock "To Register12" DstPort 1 } Line { Name "TRIG_OUT_4_CONF_0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 25 DstBlock "To Register11" DstPort 2 } Line { Name "TRIG_OUT_4_CONF_0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 24 DstBlock "To Register11" DstPort 1 } Line { Name "TRIG_OUT_5_CONF_1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 23 DstBlock "To Register10" DstPort 2 } Line { Name "TRIG_OUT_5_CONF_1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 22 DstBlock "To Register10" DstPort 1 } Line { Name "TRIG_OUT_5_CONF_0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 21 DstBlock "To Register9" DstPort 2 } Line { Name "TRIG_OUT_5_CONF_0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 20 DstBlock "To Register9" DstPort 1 } Line { Name "TRIG_IN_CONF_7_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 19 DstBlock "To Register8" DstPort 2 } Line { Name "TRIG_IN_CONF_7_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 18 DstBlock "To Register8" DstPort 1 } Line { Name "TRIG_IN_CONF_8_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 17 DstBlock "To Register7" DstPort 2 } Line { Name "TRIG_IN_CONF_8_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 16 DstBlock "To Register7" DstPort 1 } Line { Name "TRIG_IN_CONF_0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 15 DstBlock "To Register6" DstPort 2 } Line { Name "TRIG_IN_CONF_0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 14 DstBlock "To Register6" DstPort 1 } Line { Name "TRIG_IN_CONF_2_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 13 DstBlock "To Register5" DstPort 2 } Line { Name "TRIG_IN_CONF_2_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 12 DstBlock "To Register5" DstPort 1 } Line { Name "TRIG_IN_CONF_3_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 11 DstBlock "To Register4" DstPort 2 } Line { Name "TRIG_IN_CONF_3_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 10 DstBlock "To Register4" DstPort 1 } Line { Name "TRIG_IN_CONF_4_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 9 DstBlock "To Register3" DstPort 2 } Line { Name "TRIG_IN_CONF_4_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 8 DstBlock "To Register3" DstPort 1 } Line { Name "TRIG_IN_CONF_5_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 7 DstBlock "To Register2" DstPort 2 } Line { Name "TRIG_IN_CONF_5_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 6 DstBlock "To Register2" DstPort 1 } Line { Name "TRIG_IN_CONF_6_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 5 DstBlock "To Register1" DstPort 2 } Line { Name "TRIG_IN_CONF_6_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 4 DstBlock "To Register1" DstPort 1 } Line { Name "RSSI_PKT_DET_CONFIG_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 3 DstBlock "To Register" DstPort 2 } Line { Name "RSSI_PKT_DET_CONFIG_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 2 DstBlock "To Register" DstPort 1 } Line { Name "rdData" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 1 DstBlock "plb_decode" DstPort 6 } Line { Name "TRIG_IN_CONF_1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register23" SrcPort 1 DstBlock "plb_memmap" DstPort 31 } Line { Name "RSSI_PKT_DET_THRESHOLDS_dout" Labels [0, 0; 0, 0] SrcBlock "To Register22" SrcPort 1 DstBlock "plb_memmap" DstPort 30 } Line { Name "RSSI_PKT_DET_DURATIONS_dout" Labels [0, 0; 0, 0] SrcBlock "To Register21" SrcPort 1 DstBlock "plb_memmap" DstPort 29 } Line { Name "TRIG_OUT_0_CONF_1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register20" SrcPort 1 DstBlock "plb_memmap" DstPort 28 } Line { Name "TRIG_OUT_1_CONF_1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register19" SrcPort 1 DstBlock "plb_memmap" DstPort 27 } Line { Name "TRIG_OUT_1_CONF_0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register18" SrcPort 1 DstBlock "plb_memmap" DstPort 26 } Line { Name "TRIG_OUT_2_CONF_1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register17" SrcPort 1 DstBlock "plb_memmap" DstPort 25 } Line { Name "TRIG_OUT_2_CONF_0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register16" SrcPort 1 DstBlock "plb_memmap" DstPort 24 } Line { Name "TRIG_OUT_3_CONF_1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register15" SrcPort 1 DstBlock "plb_memmap" DstPort 23 } Line { Name "TRIG_OUT_3_CONF_0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register14" SrcPort 1 DstBlock "plb_memmap" DstPort 22 } Line { Name "TRIG_OUT_4_CONF_1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register13" SrcPort 1 DstBlock "plb_memmap" DstPort 21 } Line { Name "TRIG_OUT_0_CONF_0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register12" SrcPort 1 DstBlock "plb_memmap" DstPort 20 } Line { Name "TRIG_OUT_4_CONF_0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register11" SrcPort 1 DstBlock "plb_memmap" DstPort 19 } Line { Name "TRIG_OUT_5_CONF_1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register10" SrcPort 1 DstBlock "plb_memmap" DstPort 18 } Line { Name "TRIG_OUT_5_CONF_0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register9" SrcPort 1 DstBlock "plb_memmap" DstPort 17 } Line { Name "TRIG_IN_CONF_7_dout" Labels [0, 0; 0, 0] SrcBlock "To Register8" SrcPort 1 DstBlock "plb_memmap" DstPort 16 } Line { Name "TRIG_IN_CONF_8_dout" Labels [0, 0; 0, 0] SrcBlock "To Register7" SrcPort 1 DstBlock "plb_memmap" DstPort 15 } Line { Name "TRIG_IN_CONF_0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register6" SrcPort 1 DstBlock "plb_memmap" DstPort 14 } Line { Name "TRIG_IN_CONF_2_dout" Labels [0, 0; 0, 0] SrcBlock "To Register5" SrcPort 1 DstBlock "plb_memmap" DstPort 13 } Line { Name "TRIG_IN_CONF_3_dout" Labels [0, 0; 0, 0] SrcBlock "To Register4" SrcPort 1 DstBlock "plb_memmap" DstPort 12 } Line { Name "TRIG_IN_CONF_4_dout" Labels [0, 0; 0, 0] SrcBlock "To Register3" SrcPort 1 DstBlock "plb_memmap" DstPort 11 } Line { Name "TRIG_IN_CONF_5_dout" Labels [0, 0; 0, 0] SrcBlock "To Register2" SrcPort 1 DstBlock "plb_memmap" DstPort 10 } Line { Name "TRIG_IN_CONF_6_dout" Labels [0, 0; 0, 0] SrcBlock "To Register1" SrcPort 1 DstBlock "plb_memmap" DstPort 9 } Line { Name "RSSI_PKT_DET_CONFIG_dout" Labels [0, 0; 0, 0] SrcBlock "To Register" SrcPort 1 DstBlock "plb_memmap" DstPort 8 } Line { Name "TRIG_OUT_dout" Labels [0, 0; 0, 0] SrcBlock "From Register1" SrcPort 1 DstBlock "plb_memmap" DstPort 7 } Line { Name "CORE_INFO_dout" Labels [0, 0; 0, 0] SrcBlock "From Register" SrcPort 1 DstBlock "plb_memmap" DstPort 6 } Line { Name "RNWReg" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 6 DstBlock "plb_memmap" DstPort 4 } Line { Name "linearAddr" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 9 DstBlock "plb_memmap" DstPort 3 } Line { Name "bankAddr" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 5 DstBlock "plb_memmap" DstPort 2 } Line { Name "wrDBusReg" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 1 DstBlock "plb_memmap" DstPort 1 } Line { Name "Sl_rdDBus" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 8 DstBlock "Sl_rdDBus" DstPort 1 } Line { Name "Sl_rdDAck" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 7 DstBlock "Sl_rdDAck" DstPort 1 } Line { Name "Sl_rdComp" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 3 DstBlock "Sl_rdComp" DstPort 1 } Line { Name "addrPref" Labels [0, 0; 0, 0] SrcBlock "sg_plb_addrpref" SrcPort 1 DstBlock "plb_decode" DstPort 7 } Line { Name "PLB_wrDBus" Labels [0, 0; 0, 0] SrcBlock "PLB_wrDBus" SrcPort 1 DstBlock "plb_decode" DstPort 5 } Line { Name "PLB_RNW" Labels [0, 0; 0, 0] SrcBlock "PLB_RNW" SrcPort 1 DstBlock "plb_decode" DstPort 4 } Line { Name "PLB_PAValid" Labels [0, 0; 0, 0] SrcBlock "PLB_PAValid" SrcPort 1 DstBlock "plb_decode" DstPort 3 } Line { Name "PLB_ABus" Labels [0, 0; 0, 0] SrcBlock "PLB_ABus" SrcPort 1 DstBlock "plb_decode" DstPort 2 } Line { Name "SPLB_Rst" Labels [0, 0; 0, 0] SrcBlock "SPLB_Rst" SrcPort 1 DstBlock "plb_decode" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "sg_plb_addrpref" DstPort 1 } Line { Name "Sl_wait" Labels [0, 0; 0, 0] SrcBlock "Constant5" SrcPort 1 DstBlock "Sl_wait" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "PLB_wrDBus" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "PLB_RNW" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "PLB_PAValid" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "PLB_ABus" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "SPLB_Rst" DstPort 1 } Line { SrcBlock "Sl_wrComp" SrcPort 1 DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "Sl_wrDAck" SrcPort 1 DstBlock "Terminator5" DstPort 1 } Line { SrcBlock "Sl_wait" SrcPort 1 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "Sl_rdDBus" SrcPort 1 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "Sl_rdDAck" SrcPort 1 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "Sl_rdComp" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "Sl_addrAck" SrcPort 1 DstBlock "Terminator" DstPort 1 } } } Block { BlockType From Name "From1" SID "8543" Position [915, 606, 1035, 624] ShowName off GotoTag "Trig2_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "8544" Position [915, 806, 1035, 824] ShowName off GotoTag "Trig3_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "8545" Position [915, 1006, 1035, 1024] ShowName off GotoTag "Trig4_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "8546" Position [915, 1206, 1035, 1224] ShowName off GotoTag "Trig5_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "8547" Position [915, 391, 1035, 409] ShowName off GotoTag "Trig1_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "8535" Position [915, 206, 1035, 224] ShowName off GotoTag "Trig0_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "8612" Position [915, 471, 1035, 489] ShowName off GotoTag "OUT1_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter" SID "8621" Ports [1, 1] Position [1375, 370, 1415, 390] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" sg_icon_stat "40,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0." "82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8613" Ports [2, 1] Position [1690, 364, 1725, 431] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 3" "8.55 43.55 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55" " 38.55 33.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1" " 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor(" "'black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8615" Ports [2, 1] Position [1525, 364, 1560, 431] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 3" "8.55 43.55 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55" " 38.55 33.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1" " 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor(" "'black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8616" Ports [2, 1] Position [1460, 329, 1495, 396] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 3" "8.55 43.55 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55" " 38.55 33.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1" " 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8619" Ports [2, 1] Position [1460, 399, 1495, 466] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 3" "8.55 43.55 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55" " 38.55 33.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1" " 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Number of Input Triggers" SID "6729" Ports [0, 1] Position [90, 252, 145, 278] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "9" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "55,26,0,1,white,blue,0,350ae870,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0." "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13" ".33 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 " "7.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'9');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Number of Output Triggers" SID "6730" Ports [0, 1] Position [90, 297, 145, 323] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "6" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "55,26,0,1,white,blue,0,f0403ad7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0." "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13" ".33 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 " "7.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'6');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge" SID "8585" Ports [1, 1] Position [915, 318, 970, 342] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Posedge" Location [88, 301, 2330, 1301] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8586" Position [200, 253, 230, 267] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Delay" SID "8587" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If re" "gister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 " "]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8588" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Logical1" SID "8589" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 38." "66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26.66" " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npatch(" "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8590" Position [610, 173, 640, 187] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType SubSystem Name "Pulse Extender (4 cycles)" SID "8889" Ports [1, 1] Position [1770, 386, 1830, 414] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Pulse Extender (4 cycles)" Location [518, 355, 1098, 758] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "IN" SID "8890" Position [25, 33, 55, 47] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "8893" Ports [4, 1] Position [440, 21, 495, 164] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,143,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 143 143 0 ],[0.77 0.82 0." "91 ]);\nplot([0 55 55 0 0 ],[0 0 143 143 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[78.77 " "78.77 85.77 78.77 85.77 85.77 85.77 78.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[71.77 71.77 78.7" "7 78.77 71.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[64.77 64.77 71.77 71.77 64.77 ]," "[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[57.77 57.77 64.77 57.77 64.77 64.77 57.77 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\nc" "olor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8895" Ports [1, 1] Position [135, 60, 185, 90] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20." "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');" } Block { BlockType Reference Name "Register2" SID "8896" Ports [1, 1] Position [225, 95, 275, 125] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20." "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');" } Block { BlockType Reference Name "Register3" SID "8897" Ports [1, 1] Position [315, 130, 365, 160] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20." "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');" } Block { BlockType Outport Name "OUT" SID "8894" Position [530, 88, 560, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "OUT" DstPort 1 } Line { SrcBlock "IN" SrcPort 1 Points [35, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 35] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "Register1" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 2 } Branch { Points [0, 35] DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 3 } Branch { Points [0, 35] DstBlock "Register3" DstPort 1 } } Line { SrcBlock "Register3" SrcPort 1 DstBlock "Logical" DstPort 4 } } } Block { BlockType Reference Name "Register" SID "8689" Ports [1, 1] Position [1890, 185, 1940, 215] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8696" Ports [1, 1] Position [1890, 385, 1940, 415] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register11" SID "8706" Ports [1, 1] Position [1890, 1185, 1940, 1215] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register12" SID "8707" Ports [1, 1] Position [1890, 1235, 1940, 1265] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8697" Ports [1, 1] Position [1890, 585, 1940, 615] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "8698" Ports [1, 1] Position [1890, 635, 1940, 665] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "8700" Ports [1, 1] Position [1890, 785, 1940, 815] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "8701" Ports [1, 1] Position [1890, 835, 1940, 865] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register8" SID "8703" Ports [1, 1] Position [1890, 985, 1940, 1015] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register9" SID "8704" Ports [1, 1] Position [1890, 1035, 1940, 1065] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1" " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Registers" SID "2192" Ports [] Position [190, 25, 254, 87] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Registers" Location [132, 109, 2450, 1391] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Goto Name " " SID "8751" Position [465, 517, 580, 533] ShowName off GotoTag "Debug_0_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 1" SID "8752" Position [465, 77, 580, 93] ShowName off GotoTag "Eth_A_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 10" SID "4994" Position [955, 206, 1120, 224] ShowName off GotoTag "OUT0_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 106" SID "8754" Position [465, 307, 580, 323] ShowName off GotoTag "AGC_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 107" SID "7183" Position [955, 427, 1120, 443] ShowName off GotoTag "OUT0_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 108" SID "7184" Position [955, 756, 1120, 774] ShowName off GotoTag "OUT1_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 109" SID "7185" Position [955, 977, 1120, 993] ShowName off GotoTag "OUT1_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 11" SID "4995" Position [955, 227, 1120, 243] ShowName off GotoTag "OUT0_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 110" SID "7186" Position [955, 777, 1120, 793] ShowName off GotoTag "OUT1_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 111" SID "7187" Position [955, 1031, 1115, 1049] ShowName off GotoTag "Trig1_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 112" SID "7188" Position [955, 817, 1120, 833] ShowName off GotoTag "OUT1_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 113" SID "7189" Position [955, 837, 1120, 853] ShowName off GotoTag "OUT1_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 114" SID "7190" Position [955, 857, 1120, 873] ShowName off GotoTag "OUT1_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 115" SID "7191" Position [955, 877, 1120, 893] ShowName off GotoTag "OUT1_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 116" SID "7192" Position [955, 896, 1120, 914] ShowName off GotoTag "OUT1_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 117" SID "7112" Position [955, 481, 1115, 499] ShowName off GotoTag "Trig0_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 118" SID "7193" Position [955, 917, 1120, 933] ShowName off GotoTag "OUT1_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 119" SID "7194" Position [955, 937, 1120, 953] ShowName off GotoTag "OUT1_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 12" SID "4996" Position [955, 267, 1120, 283] ShowName off GotoTag "OUT0_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 120" SID "7195" Position [955, 957, 1120, 973] ShowName off GotoTag "OUT1_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 121" SID "7196" Position [955, 797, 1120, 813] ShowName off GotoTag "OUT1_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 122" SID "7197" Position [955, 637, 1120, 653] ShowName off GotoTag "OUT1_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 123" SID "7198" Position [955, 657, 1120, 673] ShowName off GotoTag "OUT1_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 124" SID "7199" Position [955, 677, 1120, 693] ShowName off GotoTag "OUT1_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 125" SID "7200" Position [955, 697, 1120, 713] ShowName off GotoTag "OUT1_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 126" SID "7201" Position [955, 717, 1120, 733] ShowName off GotoTag "OUT1_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 127" SID "7202" Position [955, 737, 1120, 753] ShowName off GotoTag "OUT1_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 128" SID "7269" Position [955, 1306, 1120, 1324] ShowName off GotoTag "OUT2_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 129" SID "7270" Position [955, 1527, 1120, 1543] ShowName off GotoTag "OUT2_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 13" SID "4997" Position [955, 287, 1120, 303] ShowName off GotoTag "OUT0_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 130" SID "7271" Position [955, 1327, 1120, 1343] ShowName off GotoTag "OUT2_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 131" SID "7272" Position [955, 1581, 1115, 1599] ShowName off GotoTag "Trig2_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 132" SID "7273" Position [955, 1367, 1120, 1383] ShowName off GotoTag "OUT2_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 133" SID "7274" Position [955, 1387, 1120, 1403] ShowName off GotoTag "OUT2_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 134" SID "7275" Position [955, 1407, 1120, 1423] ShowName off GotoTag "OUT2_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 135" SID "7276" Position [955, 1427, 1120, 1443] ShowName off GotoTag "OUT2_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 136" SID "7277" Position [955, 1446, 1120, 1464] ShowName off GotoTag "OUT2_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 137" SID "7278" Position [955, 1467, 1120, 1483] ShowName off GotoTag "OUT2_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 138" SID "7279" Position [955, 1487, 1120, 1503] ShowName off GotoTag "OUT2_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 139" SID "7280" Position [955, 1507, 1120, 1523] ShowName off GotoTag "OUT2_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 14" SID "4998" Position [955, 307, 1120, 323] ShowName off GotoTag "OUT0_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 140" SID "7281" Position [955, 1347, 1120, 1363] ShowName off GotoTag "OUT2_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 141" SID "7282" Position [955, 1187, 1120, 1203] ShowName off GotoTag "OUT2_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 142" SID "7283" Position [955, 1207, 1120, 1223] ShowName off GotoTag "OUT2_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 143" SID "7284" Position [955, 1227, 1120, 1243] ShowName off GotoTag "OUT2_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 144" SID "7285" Position [955, 1247, 1120, 1263] ShowName off GotoTag "OUT2_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 145" SID "7286" Position [955, 1267, 1120, 1283] ShowName off GotoTag "OUT2_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 146" SID "7287" Position [955, 1287, 1120, 1303] ShowName off GotoTag "OUT2_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 147" SID "7354" Position [1490, 206, 1655, 224] ShowName off GotoTag "OUT3_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 148" SID "7355" Position [1490, 427, 1655, 443] ShowName off GotoTag "OUT3_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 149" SID "7356" Position [1490, 227, 1655, 243] ShowName off GotoTag "OUT3_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 15" SID "4999" Position [955, 327, 1120, 343] ShowName off GotoTag "OUT0_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 150" SID "7357" Position [1490, 481, 1650, 499] ShowName off GotoTag "Trig3_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 151" SID "7358" Position [1490, 267, 1655, 283] ShowName off GotoTag "OUT3_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 152" SID "7359" Position [1490, 287, 1655, 303] ShowName off GotoTag "OUT3_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 153" SID "7360" Position [1490, 307, 1655, 323] ShowName off GotoTag "OUT3_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 154" SID "7361" Position [1490, 327, 1655, 343] ShowName off GotoTag "OUT3_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 155" SID "7362" Position [1490, 346, 1655, 364] ShowName off GotoTag "OUT3_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 156" SID "7363" Position [1490, 367, 1655, 383] ShowName off GotoTag "OUT3_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 157" SID "7364" Position [1490, 387, 1655, 403] ShowName off GotoTag "OUT3_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 158" SID "7365" Position [1490, 407, 1655, 423] ShowName off GotoTag "OUT3_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 159" SID "7366" Position [1490, 247, 1655, 263] ShowName off GotoTag "OUT3_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 16" SID "5000" Position [955, 346, 1120, 364] ShowName off GotoTag "OUT0_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 160" SID "7367" Position [1490, 87, 1655, 103] ShowName off GotoTag "OUT3_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 161" SID "7368" Position [1490, 107, 1655, 123] ShowName off GotoTag "OUT3_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 162" SID "7369" Position [1490, 127, 1655, 143] ShowName off GotoTag "OUT3_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 163" SID "7370" Position [1490, 147, 1655, 163] ShowName off GotoTag "OUT3_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 164" SID "7371" Position [1490, 167, 1655, 183] ShowName off GotoTag "OUT3_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 165" SID "7372" Position [1490, 187, 1655, 203] ShowName off GotoTag "OUT3_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 166" SID "7439" Position [1490, 751, 1655, 769] ShowName off GotoTag "OUT4_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 167" SID "7440" Position [1490, 972, 1655, 988] ShowName off GotoTag "OUT4_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 168" SID "7441" Position [1490, 772, 1655, 788] ShowName off GotoTag "OUT4_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 169" SID "7442" Position [1490, 1026, 1650, 1044] ShowName off GotoTag "Trig4_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 17" SID "5001" Position [955, 367, 1120, 383] ShowName off GotoTag "OUT0_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 170" SID "7443" Position [1490, 812, 1655, 828] ShowName off GotoTag "OUT4_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 171" SID "7444" Position [1490, 832, 1655, 848] ShowName off GotoTag "OUT4_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 172" SID "7445" Position [1490, 852, 1655, 868] ShowName off GotoTag "OUT4_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 173" SID "7446" Position [1490, 872, 1655, 888] ShowName off GotoTag "OUT4_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 174" SID "7447" Position [1490, 891, 1655, 909] ShowName off GotoTag "OUT4_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 175" SID "7448" Position [1490, 912, 1655, 928] ShowName off GotoTag "OUT4_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 176" SID "7449" Position [1490, 932, 1655, 948] ShowName off GotoTag "OUT4_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 177" SID "7450" Position [1490, 952, 1655, 968] ShowName off GotoTag "OUT4_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 178" SID "7451" Position [1490, 792, 1655, 808] ShowName off GotoTag "OUT4_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 179" SID "7452" Position [1490, 632, 1655, 648] ShowName off GotoTag "OUT4_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 18" SID "5002" Position [955, 387, 1120, 403] ShowName off GotoTag "OUT0_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 180" SID "7453" Position [1490, 652, 1655, 668] ShowName off GotoTag "OUT4_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 181" SID "7454" Position [1490, 672, 1655, 688] ShowName off GotoTag "OUT4_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 182" SID "7455" Position [1490, 692, 1655, 708] ShowName off GotoTag "OUT4_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 183" SID "7456" Position [1490, 712, 1655, 728] ShowName off GotoTag "OUT4_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 184" SID "7457" Position [1490, 732, 1655, 748] ShowName off GotoTag "OUT4_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 185" SID "7524" Position [1490, 1301, 1655, 1319] ShowName off GotoTag "OUT5_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 186" SID "7525" Position [1490, 1522, 1655, 1538] ShowName off GotoTag "OUT5_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 187" SID "7526" Position [1490, 1322, 1655, 1338] ShowName off GotoTag "OUT5_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 188" SID "7527" Position [1490, 1576, 1650, 1594] ShowName off GotoTag "Trig5_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 189" SID "7528" Position [1490, 1362, 1655, 1378] ShowName off GotoTag "OUT5_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 19" SID "5003" Position [955, 407, 1120, 423] ShowName off GotoTag "OUT0_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 190" SID "7529" Position [1490, 1382, 1655, 1398] ShowName off GotoTag "OUT5_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 191" SID "7530" Position [1490, 1402, 1655, 1418] ShowName off GotoTag "OUT5_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 192" SID "7531" Position [1490, 1422, 1655, 1438] ShowName off GotoTag "OUT5_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 193" SID "7532" Position [1490, 1441, 1655, 1459] ShowName off GotoTag "OUT5_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 194" SID "7533" Position [1490, 1462, 1655, 1478] ShowName off GotoTag "OUT5_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 195" SID "7534" Position [1490, 1482, 1655, 1498] ShowName off GotoTag "OUT5_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 196" SID "7535" Position [1490, 1502, 1655, 1518] ShowName off GotoTag "OUT5_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 197" SID "7536" Position [1490, 1342, 1655, 1358] ShowName off GotoTag "OUT5_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 198" SID "7537" Position [1490, 1182, 1655, 1198] ShowName off GotoTag "OUT5_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 199" SID "7538" Position [1490, 1202, 1655, 1218] ShowName off GotoTag "OUT5_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 2" SID "8755" Position [465, 537, 580, 553] ShowName off GotoTag "Debug_0_Debounce" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 20" SID "8756" Position [465, 117, 580, 133] ShowName off GotoTag "Eth_A_SW_Trig" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 200" SID "7539" Position [1490, 1222, 1655, 1238] ShowName off GotoTag "OUT5_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 201" SID "7540" Position [1490, 1242, 1655, 1258] ShowName off GotoTag "OUT5_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 202" SID "7541" Position [1490, 1262, 1655, 1278] ShowName off GotoTag "OUT5_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 203" SID "7542" Position [1490, 1282, 1655, 1298] ShowName off GotoTag "OUT5_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 3" SID "7182" Position [955, 247, 1120, 263] ShowName off GotoTag "OUT0_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 4" SID "4988" Position [955, 87, 1120, 103] ShowName off GotoTag "OUT0_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 5" SID "4989" Position [955, 107, 1120, 123] ShowName off GotoTag "OUT0_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 6" SID "4990" Position [955, 127, 1120, 143] ShowName off GotoTag "OUT0_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 7" SID "4991" Position [955, 147, 1120, 163] ShowName off GotoTag "OUT0_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 8" SID "4992" Position [955, 167, 1120, 183] ShowName off GotoTag "OUT0_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 9" SID "4993" Position [955, 187, 1120, 203] ShowName off GotoTag "OUT0_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Concat" SID "5289" Ports [6, 1] Position [2050, 92, 2090, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at ze" "ro." num_inputs "6" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" sg_icon_stat "40,136,6,1,white,blue,0,c44eeefa,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 136 136 0 ],[0.77 0.82 0." "91 ]);\nplot([0 40 40 0 0 ],[0 0 136 136 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[73.55 73.55 7" "8.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[68.55 68.55 73.55 73.55 68" ".55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[63.55 63.55 68.55 68.55 63.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'hi');\n\n\n\n\ncolor('black');port_label('input',6,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "6732" Ports [3, 1] Position [2050, 412, 2090, 518] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at ze" "ro." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" sg_icon_stat "40,106,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 106 106 0 ],[0.77 0.82 0." "91 ]);\nplot([0 40 40 0 0 ],[0 0 106 106 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[58.55 58.55 6" "3.55 58.55 63.55 63.55 63.55 58.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[53.55 53.55 58.55 58.55 53" ".55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[48.55 48.55 53.55 53.55 48.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[43.55 43.55 48.55 43.55 48.55 48.55 43.55 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "5291" Ports [0, 1] Position [2110, 178, 2140, 202] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "30,24,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp" "ut',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "6733" Ports [0, 1] Position [2110, 483, 2140, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "30,24,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp" "ut',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register1" SID "8760" Ports [0, 1] Position [60, 202, 120, 258] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_1'" init "TRIG_IN_CONF_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register10" SID "4167" Ports [0, 1] Position [160, 1280, 205, 1310] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'RSSI_PKT_DET_THRESHOLDS'" init "RSSI_PKT_DET_THRESHOLDS" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,246" block_type "fromreg" block_version "8.2" sg_icon_stat "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17." "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register11" SID "4168" Ports [0, 1] Position [160, 1330, 205, 1360] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'RSSI_PKT_DET_DURATIONS'" init "RSSI_PKT_DET_DURATIONS" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,246" block_type "fromreg" block_version "8.2" sg_icon_stat "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17." "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register12" SID "7119" Ports [0, 1] Position [710, 482, 770, 538] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_0_CONF_1'" init "TRIG_OUT_0_CONF_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register13" SID "7203" Ports [0, 1] Position [710, 1032, 770, 1088] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_1_CONF_1'" init "TRIG_OUT_1_CONF_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register14" SID "7204" Ports [0, 1] Position [710, 787, 770, 843] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_1_CONF_0'" init "TRIG_OUT_1_CONF_0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register15" SID "7288" Ports [0, 1] Position [710, 1582, 770, 1638] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_2_CONF_1'" init "TRIG_OUT_2_CONF_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register16" SID "7289" Ports [0, 1] Position [710, 1337, 770, 1393] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_2_CONF_0'" init "TRIG_OUT_2_CONF_0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register17" SID "7373" Ports [0, 1] Position [1245, 482, 1305, 538] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_3_CONF_1'" init "TRIG_OUT_3_CONF_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register18" SID "7374" Ports [0, 1] Position [1245, 237, 1305, 293] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_3_CONF_0'" init "TRIG_OUT_3_CONF_0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register19" SID "7458" Ports [0, 1] Position [1245, 1027, 1305, 1083] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_4_CONF_1'" init "TRIG_OUT_4_CONF_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register2" SID "5007" Ports [0, 1] Position [710, 237, 770, 293] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_0_CONF_0'" init "TRIG_OUT_0_CONF_0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register20" SID "7459" Ports [0, 1] Position [1245, 782, 1305, 838] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_4_CONF_0'" init "TRIG_OUT_4_CONF_0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register21" SID "7543" Ports [0, 1] Position [1245, 1577, 1305, 1633] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_5_CONF_1'" init "TRIG_OUT_5_CONF_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register22" SID "7544" Ports [0, 1] Position [1245, 1332, 1305, 1388] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT_5_CONF_0'" init "TRIG_OUT_5_CONF_0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register23" SID "8761" Ports [0, 1] Position [60, 832, 120, 888] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_7'" init "TRIG_IN_CONF_7" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register24" SID "8762" Ports [0, 1] Position [60, 947, 120, 1003] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_8'" init "TRIG_IN_CONF_8" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register3" SID "8763" Ports [0, 1] Position [60, 87, 120, 143] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_0'" init "TRIG_IN_CONF_0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register4" SID "8764" Ports [0, 1] Position [60, 307, 120, 363] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_2'" init "TRIG_IN_CONF_2" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register5" SID "8765" Ports [0, 1] Position [60, 412, 120, 468] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_3'" init "TRIG_IN_CONF_3" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register6" SID "8766" Ports [0, 1] Position [60, 517, 120, 573] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_4'" init "TRIG_IN_CONF_4" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register7" SID "8767" Ports [0, 1] Position [60, 622, 120, 678] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_5'" init "TRIG_IN_CONF_5" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register8" SID "8768" Ports [0, 1] Position [60, 727, 120, 783] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_IN_CONF_6'" init "TRIG_IN_CONF_6" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register9" SID "4169" Ports [0, 1] Position [160, 1230, 205, 1260] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'RSSI_PKT_DET_CONFIG'" init "RSSI_PKT_DET_CONFIG" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,246" block_type "fromreg" block_version "8.2" sg_icon_stat "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17." "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4971" Position [1835, 202, 1960, 218] ShowName off GotoTag "OUT0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "5069" Position [1835, 182, 1960, 198] ShowName off GotoTag "OUT1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "5070" Position [1835, 162, 1960, 178] ShowName off GotoTag "OUT2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "5071" Position [1835, 142, 1960, 158] ShowName off GotoTag "OUT3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "5072" Position [1835, 122, 1960, 138] ShowName off GotoTag "OUT4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "6735" Position [1835, 492, 1960, 508] ShowName off GotoTag "Num_Inputs" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "6745" Position [1835, 457, 1960, 473] ShowName off GotoTag "Num_Outputs" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "6746" Position [1835, 422, 1960, 438] ShowName off GotoTag "Core_ID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "8625" Position [1835, 102, 1960, 118] ShowName off GotoTag "OUT5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto" SID "8769" Position [465, 557, 580, 573] ShowName off GotoTag "Debug_0_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto1" SID "8770" Position [465, 137, 580, 153] ShowName off GotoTag "Eth_A_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto10" SID "8771" Position [470, 852, 585, 868] ShowName off GotoTag "Debug_3_Debounce" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto11" SID "8772" Position [470, 832, 585, 848] ShowName off GotoTag "Debug_3_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto12" SID "7205" Position [955, 1066, 1115, 1084] ShowName off GotoTag "OUT1_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto13" SID "8773" Position [465, 242, 580, 258] ShowName off GotoTag "Energy_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto16" SID "8774" Position [465, 347, 580, 363] ShowName off GotoTag "AGC_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto19" SID "8775" Position [465, 452, 580, 468] ShowName off GotoTag "Software_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto2" SID "8776" Position [465, 432, 580, 448] ShowName off GotoTag "Software_Trig" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto20" SID "4170" Position [275, 1237, 385, 1253] ShowName off GotoTag "reg_pkt_det_config" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto23" SID "4171" Position [275, 1287, 385, 1303] ShowName off GotoTag "reg_pkt_det_thresh" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto24" SID "4172" Position [275, 1337, 390, 1353] ShowName off GotoTag "reg_pkt_det_duration" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto25" SID "7120" Position [955, 516, 1115, 534] ShowName off GotoTag "OUT0_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto26" SID "7290" Position [955, 1616, 1115, 1634] ShowName off GotoTag "OUT2_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto27" SID "7375" Position [1490, 516, 1650, 534] ShowName off GotoTag "OUT3_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto28" SID "7460" Position [1490, 1061, 1650, 1079] ShowName off GotoTag "OUT4_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto29" SID "7545" Position [1490, 1611, 1650, 1629] ShowName off GotoTag "OUT5_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto3" SID "8778" Position [465, 662, 580, 678] ShowName off GotoTag "Debug_1_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto4" SID "8779" Position [465, 642, 580, 658] ShowName off GotoTag "Debug_1_Debounce" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto5" SID "8780" Position [465, 622, 580, 638] ShowName off GotoTag "Debug_1_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto6" SID "8781" Position [465, 767, 580, 783] ShowName off GotoTag "Debug_2_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto7" SID "8782" Position [465, 747, 580, 763] ShowName off GotoTag "Debug_2_Debounce" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto8" SID "8783" Position [465, 727, 580, 743] ShowName off GotoTag "Debug_2_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto9" SID "8784" Position [470, 872, 585, 888] ShowName off GotoTag "Debug_3_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "Input Configuration\nSlice0" SID "8785" Ports [1, 4] Position [205, 71, 285, 159] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice0" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8786" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b29" SID "8787" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "29" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b30" SID "8788" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8789" Ports [1, 1] Position [150, 227, 195, 243] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8790" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8791" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "HW_SW_Sel" SID "8792" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8793" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8794" Position [265, 228, 295, 242] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { Points [0, 50] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } Branch { DstBlock "b29" DstPort 1 } } } Line { SrcBlock "b29" SrcPort 1 DstBlock "HW_SW_Sel" DstPort 1 } } } Block { BlockType SubSystem Name "Input Configuration\nSlice1" SID "8795" Ports [1, 3] Position [205, 197, 285, 263] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice1" Location [132, 109, 2467, 1391] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8796" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b30" SID "8797" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8798" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8799" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8800" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8801" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8802" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } } } } Block { BlockType SubSystem Name "Input Configuration\nSlice2" SID "8803" Ports [1, 3] Position [205, 302, 285, 368] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice2" Location [132, 109, 2467, 1391] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8804" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b30" SID "8805" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8806" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8807" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8808" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8809" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8810" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } } } } Block { BlockType SubSystem Name "Input Configuration\nSlice3" SID "8811" Ports [1, 3] Position [205, 407, 285, 473] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice3" Location [132, 109, 2467, 1391] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8812" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b30" SID "8813" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8814" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8815" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8816" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8817" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8818" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } } } } Block { BlockType SubSystem Name "Input Configuration\nSlice4" SID "8819" Ports [1, 3] Position [205, 512, 285, 578] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice4" Location [132, 109, 2467, 1391] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8820" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b30" SID "8821" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8822" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8823" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8824" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8825" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8826" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } } } } Block { BlockType SubSystem Name "Input Configuration\nSlice5" SID "8827" Ports [1, 3] Position [205, 617, 285, 683] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice5" Location [132, 109, 2467, 1391] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8828" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b30" SID "8829" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8830" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8831" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8832" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8833" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8834" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } } } } Block { BlockType SubSystem Name "Input Configuration\nSlice6" SID "8835" Ports [1, 3] Position [205, 722, 285, 788] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice6" Location [132, 109, 2467, 1391] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8836" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b30" SID "8837" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8838" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8839" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8840" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8841" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8842" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } } } } Block { BlockType SubSystem Name "Input Configuration\nSlice7" SID "8843" Ports [1, 3] Position [205, 827, 285, 893] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice7" Location [132, 109, 2467, 1391] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8844" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b30" SID "8845" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8846" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8847" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8848" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8849" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8850" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } } } } Block { BlockType SubSystem Name "Input Configuration\nSlice8" SID "8851" Ports [1, 4] Position [205, 931, 285, 1019] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Input Configuration\nSlice8" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8852" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b29" SID "8853" Ports [1, 1] Position [150, 127, 195, 143] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "29" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b30" SID "8854" Ports [1, 1] Position [150, 177, 195, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8855" Ports [1, 1] Position [150, 227, 195, 243] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:4]" SID "8856" Ports [1, 1] Position [150, 27, 195, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Delay" SID "8857" Position [265, 28, 295, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "HW_SW_Sel" SID "8858" Position [265, 128, 295, 142] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Debounce" SID "8859" Position [265, 178, 295, 192] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Reset" SID "8860" Position [265, 228, 295, 242] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "b31" SrcPort 1 DstBlock "Reset" DstPort 1 } Line { SrcBlock "b30" SrcPort 1 DstBlock "Debounce" DstPort 1 } Line { SrcBlock "b[0:4]" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [55, 0] Branch { DstBlock "b[0:4]" DstPort 1 } Branch { Points [0, 100] Branch { Points [0, 50] Branch { DstBlock "b30" DstPort 1 } Branch { Points [0, 50] DstBlock "b31" DstPort 1 } } Branch { DstBlock "b29" DstPort 1 } } } Line { SrcBlock "b29" SrcPort 1 DstBlock "HW_SW_Sel" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice" SID "5008" Ports [1, 18] Position [840, 69, 910, 461] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "5009" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b0" SID "5034" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b1" SID "5035" Ports [1, 1] Position [95, 62, 140, 78] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b16" SID "5049" Ports [1, 1] Position [95, 552, 140, 568] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b17" SID "5051" Ports [1, 1] Position [95, 587, 140, 603] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b18" SID "5052" Ports [1, 1] Position [95, 622, 140, 638] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b19" SID "5053" Ports [1, 1] Position [95, 657, 140, 673] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b2" SID "5037" Ports [1, 1] Position [95, 97, 140, 113] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b20" SID "5054" Ports [1, 1] Position [95, 692, 140, 708] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b21" SID "5055" Ports [1, 1] Position [95, 727, 140, 743] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b22" SID "5056" Ports [1, 1] Position [95, 762, 140, 778] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "22" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b23" SID "5067" Ports [1, 1] Position [95, 797, 140, 813] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "23" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b24" SID "7179" Ports [1, 1] Position [95, 832, 140, 848] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b3" SID "5038" Ports [1, 1] Position [95, 132, 140, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b4" SID "5041" Ports [1, 1] Position [95, 167, 140, 183] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b5" SID "5042" Ports [1, 1] Position [95, 202, 140, 218] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b6" SID "5043" Ports [1, 1] Position [95, 237, 140, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b7" SID "5044" Ports [1, 1] Position [95, 272, 140, 288] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b8" SID "7176" Ports [1, 1] Position [95, 307, 140, 323] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool1" SID "5304" Ports [1, 1] Position [160, 61, 200, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool10" SID "5312" Ports [1, 1] Position [160, 586, 200, 604] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool11" SID "5313" Ports [1, 1] Position [160, 621, 200, 639] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool12" SID "5314" Ports [1, 1] Position [160, 656, 200, 674] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool13" SID "5315" Ports [1, 1] Position [160, 691, 200, 709] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool14" SID "5316" Ports [1, 1] Position [160, 726, 200, 744] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool15" SID "5317" Ports [1, 1] Position [160, 761, 200, 779] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool16" SID "5318" Ports [1, 1] Position [160, 796, 200, 814] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7177" Ports [1, 1] Position [160, 306, 200, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool18" SID "7180" Ports [1, 1] Position [160, 831, 200, 849] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool2" SID "5303" Ports [1, 1] Position [160, 26, 200, 44] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool3" SID "5305" Ports [1, 1] Position [160, 96, 200, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool4" SID "5306" Ports [1, 1] Position [160, 131, 200, 149] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool5" SID "5307" Ports [1, 1] Position [160, 166, 200, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool6" SID "5308" Ports [1, 1] Position [160, 201, 200, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool7" SID "5309" Ports [1, 1] Position [160, 236, 200, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool8" SID "5310" Ports [1, 1] Position [160, 271, 200, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool9" SID "5311" Ports [1, 1] Position [160, 551, 200, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AND 0" SID "5022" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 1" SID "5036" Position [230, 63, 260, 77] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 2" SID "5039" Position [230, 98, 260, 112] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 3" SID "5040" Position [230, 133, 260, 147] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 4" SID "5045" Position [230, 168, 260, 182] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 5" SID "5046" Position [230, 203, 260, 217] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 6" SID "5047" Position [230, 238, 260, 252] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 7" SID "5048" Position [230, 273, 260, 287] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 8" SID "7178" Position [230, 308, 260, 322] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 0" SID "5050" Position [230, 553, 260, 567] Port "10" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 1" SID "5059" Position [230, 588, 260, 602] Port "11" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 2" SID "5060" Position [230, 623, 260, 637] Port "12" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 3" SID "5061" Position [230, 658, 260, 672] Port "13" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 4" SID "5062" Position [230, 693, 260, 707] Port "14" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 5" SID "5063" Position [230, 728, 260, 742] Port "15" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 6" SID "5064" Position [230, 763, 260, 777] Port "16" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 7" SID "5068" Position [230, 798, 260, 812] Port "17" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 8" SID "7181" Position [230, 833, 260, 847] Port "18" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { DstBlock "b0" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b1" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b2" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b3" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b4" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b5" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b6" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b7" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 245] Branch { DstBlock "b16" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b17" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b18" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b19" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b20" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b21" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b22" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b23" DstPort 1 } Branch { Points [0, 35] DstBlock "b24" DstPort 1 } } } } } } } } } Branch { DstBlock "b8" DstPort 1 } } } } } } } } } } Line { SrcBlock "b0" SrcPort 1 DstBlock "bool2" DstPort 1 } Line { SrcBlock "b1" SrcPort 1 DstBlock "bool1" DstPort 1 } Line { SrcBlock "b2" SrcPort 1 DstBlock "bool3" DstPort 1 } Line { SrcBlock "b3" SrcPort 1 DstBlock "bool4" DstPort 1 } Line { SrcBlock "b4" SrcPort 1 DstBlock "bool5" DstPort 1 } Line { SrcBlock "b5" SrcPort 1 DstBlock "bool6" DstPort 1 } Line { SrcBlock "b6" SrcPort 1 DstBlock "bool7" DstPort 1 } Line { SrcBlock "b7" SrcPort 1 DstBlock "bool8" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "bool9" DstPort 1 } Line { SrcBlock "b17" SrcPort 1 DstBlock "bool10" DstPort 1 } Line { SrcBlock "b18" SrcPort 1 DstBlock "bool11" DstPort 1 } Line { SrcBlock "b19" SrcPort 1 DstBlock "bool12" DstPort 1 } Line { SrcBlock "b20" SrcPort 1 DstBlock "bool13" DstPort 1 } Line { SrcBlock "b21" SrcPort 1 DstBlock "bool14" DstPort 1 } Line { SrcBlock "b22" SrcPort 1 DstBlock "bool15" DstPort 1 } Line { SrcBlock "b23" SrcPort 1 DstBlock "bool16" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "AND 0" DstPort 1 } Line { SrcBlock "bool1" SrcPort 1 DstBlock "AND 1" DstPort 1 } Line { SrcBlock "bool3" SrcPort 1 DstBlock "AND 2" DstPort 1 } Line { SrcBlock "bool4" SrcPort 1 DstBlock "AND 3" DstPort 1 } Line { SrcBlock "bool5" SrcPort 1 DstBlock "AND 4" DstPort 1 } Line { SrcBlock "bool6" SrcPort 1 DstBlock "AND 5" DstPort 1 } Line { SrcBlock "bool7" SrcPort 1 DstBlock "AND 6" DstPort 1 } Line { SrcBlock "bool8" SrcPort 1 DstBlock "AND 7" DstPort 1 } Line { SrcBlock "bool9" SrcPort 1 DstBlock "OR 0" DstPort 1 } Line { SrcBlock "bool10" SrcPort 1 DstBlock "OR 1" DstPort 1 } Line { SrcBlock "bool11" SrcPort 1 DstBlock "OR 2" DstPort 1 } Line { SrcBlock "bool12" SrcPort 1 DstBlock "OR 3" DstPort 1 } Line { SrcBlock "bool13" SrcPort 1 DstBlock "OR 4" DstPort 1 } Line { SrcBlock "bool14" SrcPort 1 DstBlock "OR 5" DstPort 1 } Line { SrcBlock "bool15" SrcPort 1 DstBlock "OR 6" DstPort 1 } Line { SrcBlock "bool16" SrcPort 1 DstBlock "OR 7" DstPort 1 } Line { SrcBlock "b8" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "AND 8" DstPort 1 } Line { SrcBlock "b24" SrcPort 1 DstBlock "bool18" DstPort 1 } Line { SrcBlock "bool18" SrcPort 1 DstBlock "OR 8" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice1" SID "8536" Ports [1, 2] Position [840, 473, 910, 542] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice1" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "8537" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "(LSB+0):(LSB+4)" SID "8538" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "8539" Ports [1, 1] Position [95, 187, 140, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "8540" Ports [1, 1] Position [160, 186, 200, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "DLY" SID "8541" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "RESET" SID "8542" Position [230, 188, 260, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { Points [0, 160] DstBlock "b31" DstPort 1 } Branch { DstBlock "(LSB+0):(LSB+4)" DstPort 1 } } Line { SrcBlock "b31" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "RESET" DstPort 1 } Line { SrcBlock "(LSB+0):(LSB+4)" SrcPort 1 DstBlock "DLY" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice10" SID "7347" Ports [1, 2] Position [840, 1573, 910, 1642] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice10" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7348" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b16" SID "7349" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "7350" Ports [1, 1] Position [95, 187, 140, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7351" Ports [1, 1] Position [160, 186, 200, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "DLY" SID "7352" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "RESET" SID "7353" Position [230, 188, 260, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { Points [0, 160] DstBlock "b31" DstPort 1 } Branch { DstBlock "b16" DstPort 1 } } Line { SrcBlock "b31" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "RESET" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "DLY" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice11" SID "7376" Ports [1, 2] Position [1375, 473, 1445, 542] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice11" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7377" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b16" SID "7378" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "7379" Ports [1, 1] Position [95, 187, 140, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7380" Ports [1, 1] Position [160, 186, 200, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "DLY" SID "7381" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "RESET" SID "7382" Position [230, 188, 260, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { Points [0, 160] DstBlock "b31" DstPort 1 } Branch { DstBlock "b16" DstPort 1 } } Line { SrcBlock "b31" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "RESET" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "DLY" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice12" SID "7383" Ports [1, 18] Position [1375, 69, 1445, 461] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice12" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7384" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b0" SID "7385" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b1" SID "7386" Ports [1, 1] Position [95, 62, 140, 78] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b16" SID "7387" Ports [1, 1] Position [95, 552, 140, 568] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b17" SID "7388" Ports [1, 1] Position [95, 587, 140, 603] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b18" SID "7389" Ports [1, 1] Position [95, 622, 140, 638] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b19" SID "7390" Ports [1, 1] Position [95, 657, 140, 673] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b2" SID "7391" Ports [1, 1] Position [95, 97, 140, 113] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b20" SID "7392" Ports [1, 1] Position [95, 692, 140, 708] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b21" SID "7393" Ports [1, 1] Position [95, 727, 140, 743] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b22" SID "7394" Ports [1, 1] Position [95, 762, 140, 778] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "22" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b23" SID "7395" Ports [1, 1] Position [95, 797, 140, 813] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "23" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b24" SID "7396" Ports [1, 1] Position [95, 832, 140, 848] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b3" SID "7397" Ports [1, 1] Position [95, 132, 140, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b4" SID "7398" Ports [1, 1] Position [95, 167, 140, 183] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b5" SID "7399" Ports [1, 1] Position [95, 202, 140, 218] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b6" SID "7400" Ports [1, 1] Position [95, 237, 140, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b7" SID "7401" Ports [1, 1] Position [95, 272, 140, 288] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b8" SID "7402" Ports [1, 1] Position [95, 307, 140, 323] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool1" SID "7403" Ports [1, 1] Position [160, 61, 200, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool10" SID "7404" Ports [1, 1] Position [160, 586, 200, 604] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool11" SID "7405" Ports [1, 1] Position [160, 621, 200, 639] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool12" SID "7406" Ports [1, 1] Position [160, 656, 200, 674] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool13" SID "7407" Ports [1, 1] Position [160, 691, 200, 709] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool14" SID "7408" Ports [1, 1] Position [160, 726, 200, 744] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool15" SID "7409" Ports [1, 1] Position [160, 761, 200, 779] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool16" SID "7410" Ports [1, 1] Position [160, 796, 200, 814] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7411" Ports [1, 1] Position [160, 306, 200, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool18" SID "7412" Ports [1, 1] Position [160, 831, 200, 849] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool2" SID "7413" Ports [1, 1] Position [160, 26, 200, 44] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool3" SID "7414" Ports [1, 1] Position [160, 96, 200, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool4" SID "7415" Ports [1, 1] Position [160, 131, 200, 149] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool5" SID "7416" Ports [1, 1] Position [160, 166, 200, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool6" SID "7417" Ports [1, 1] Position [160, 201, 200, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool7" SID "7418" Ports [1, 1] Position [160, 236, 200, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool8" SID "7419" Ports [1, 1] Position [160, 271, 200, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool9" SID "7420" Ports [1, 1] Position [160, 551, 200, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AND 0" SID "7421" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 1" SID "7422" Position [230, 63, 260, 77] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 2" SID "7423" Position [230, 98, 260, 112] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 3" SID "7424" Position [230, 133, 260, 147] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 4" SID "7425" Position [230, 168, 260, 182] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 5" SID "7426" Position [230, 203, 260, 217] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 6" SID "7427" Position [230, 238, 260, 252] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 7" SID "7428" Position [230, 273, 260, 287] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 8" SID "7429" Position [230, 308, 260, 322] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 0" SID "7430" Position [230, 553, 260, 567] Port "10" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 1" SID "7431" Position [230, 588, 260, 602] Port "11" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 2" SID "7432" Position [230, 623, 260, 637] Port "12" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 3" SID "7433" Position [230, 658, 260, 672] Port "13" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 4" SID "7434" Position [230, 693, 260, 707] Port "14" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 5" SID "7435" Position [230, 728, 260, 742] Port "15" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 6" SID "7436" Position [230, 763, 260, 777] Port "16" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 7" SID "7437" Position [230, 798, 260, 812] Port "17" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 8" SID "7438" Position [230, 833, 260, 847] Port "18" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { DstBlock "b0" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b1" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b2" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b3" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b4" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b5" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b6" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b7" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 245] Branch { DstBlock "b16" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b17" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b18" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b19" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b20" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b21" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b22" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b23" DstPort 1 } Branch { Points [0, 35] DstBlock "b24" DstPort 1 } } } } } } } } } Branch { DstBlock "b8" DstPort 1 } } } } } } } } } } Line { SrcBlock "b0" SrcPort 1 DstBlock "bool2" DstPort 1 } Line { SrcBlock "b1" SrcPort 1 DstBlock "bool1" DstPort 1 } Line { SrcBlock "b2" SrcPort 1 DstBlock "bool3" DstPort 1 } Line { SrcBlock "b3" SrcPort 1 DstBlock "bool4" DstPort 1 } Line { SrcBlock "b4" SrcPort 1 DstBlock "bool5" DstPort 1 } Line { SrcBlock "b5" SrcPort 1 DstBlock "bool6" DstPort 1 } Line { SrcBlock "b6" SrcPort 1 DstBlock "bool7" DstPort 1 } Line { SrcBlock "b7" SrcPort 1 DstBlock "bool8" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "bool9" DstPort 1 } Line { SrcBlock "b17" SrcPort 1 DstBlock "bool10" DstPort 1 } Line { SrcBlock "b18" SrcPort 1 DstBlock "bool11" DstPort 1 } Line { SrcBlock "b19" SrcPort 1 DstBlock "bool12" DstPort 1 } Line { SrcBlock "b20" SrcPort 1 DstBlock "bool13" DstPort 1 } Line { SrcBlock "b21" SrcPort 1 DstBlock "bool14" DstPort 1 } Line { SrcBlock "b22" SrcPort 1 DstBlock "bool15" DstPort 1 } Line { SrcBlock "b23" SrcPort 1 DstBlock "bool16" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "AND 0" DstPort 1 } Line { SrcBlock "bool1" SrcPort 1 DstBlock "AND 1" DstPort 1 } Line { SrcBlock "bool3" SrcPort 1 DstBlock "AND 2" DstPort 1 } Line { SrcBlock "bool4" SrcPort 1 DstBlock "AND 3" DstPort 1 } Line { SrcBlock "bool5" SrcPort 1 DstBlock "AND 4" DstPort 1 } Line { SrcBlock "bool6" SrcPort 1 DstBlock "AND 5" DstPort 1 } Line { SrcBlock "bool7" SrcPort 1 DstBlock "AND 6" DstPort 1 } Line { SrcBlock "bool8" SrcPort 1 DstBlock "AND 7" DstPort 1 } Line { SrcBlock "bool9" SrcPort 1 DstBlock "OR 0" DstPort 1 } Line { SrcBlock "bool10" SrcPort 1 DstBlock "OR 1" DstPort 1 } Line { SrcBlock "bool11" SrcPort 1 DstBlock "OR 2" DstPort 1 } Line { SrcBlock "bool12" SrcPort 1 DstBlock "OR 3" DstPort 1 } Line { SrcBlock "bool13" SrcPort 1 DstBlock "OR 4" DstPort 1 } Line { SrcBlock "bool14" SrcPort 1 DstBlock "OR 5" DstPort 1 } Line { SrcBlock "bool15" SrcPort 1 DstBlock "OR 6" DstPort 1 } Line { SrcBlock "bool16" SrcPort 1 DstBlock "OR 7" DstPort 1 } Line { SrcBlock "b8" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "AND 8" DstPort 1 } Line { SrcBlock "b24" SrcPort 1 DstBlock "bool18" DstPort 1 } Line { SrcBlock "bool18" SrcPort 1 DstBlock "OR 8" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice13" SID "7461" Ports [1, 2] Position [1375, 1018, 1445, 1087] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice13" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7462" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b16" SID "7463" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "7464" Ports [1, 1] Position [95, 187, 140, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7465" Ports [1, 1] Position [160, 186, 200, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "DLY" SID "7466" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "RESET" SID "7467" Position [230, 188, 260, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { Points [0, 160] DstBlock "b31" DstPort 1 } Branch { DstBlock "b16" DstPort 1 } } Line { SrcBlock "b31" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "RESET" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "DLY" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice14" SID "7468" Ports [1, 18] Position [1375, 614, 1445, 1006] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice14" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7469" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b0" SID "7470" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b1" SID "7471" Ports [1, 1] Position [95, 62, 140, 78] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b16" SID "7472" Ports [1, 1] Position [95, 552, 140, 568] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b17" SID "7473" Ports [1, 1] Position [95, 587, 140, 603] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b18" SID "7474" Ports [1, 1] Position [95, 622, 140, 638] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b19" SID "7475" Ports [1, 1] Position [95, 657, 140, 673] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b2" SID "7476" Ports [1, 1] Position [95, 97, 140, 113] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b20" SID "7477" Ports [1, 1] Position [95, 692, 140, 708] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b21" SID "7478" Ports [1, 1] Position [95, 727, 140, 743] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b22" SID "7479" Ports [1, 1] Position [95, 762, 140, 778] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "22" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b23" SID "7480" Ports [1, 1] Position [95, 797, 140, 813] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "23" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b24" SID "7481" Ports [1, 1] Position [95, 832, 140, 848] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b3" SID "7482" Ports [1, 1] Position [95, 132, 140, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b4" SID "7483" Ports [1, 1] Position [95, 167, 140, 183] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b5" SID "7484" Ports [1, 1] Position [95, 202, 140, 218] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b6" SID "7485" Ports [1, 1] Position [95, 237, 140, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b7" SID "7486" Ports [1, 1] Position [95, 272, 140, 288] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b8" SID "7487" Ports [1, 1] Position [95, 307, 140, 323] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool1" SID "7488" Ports [1, 1] Position [160, 61, 200, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool10" SID "7489" Ports [1, 1] Position [160, 586, 200, 604] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool11" SID "7490" Ports [1, 1] Position [160, 621, 200, 639] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool12" SID "7491" Ports [1, 1] Position [160, 656, 200, 674] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool13" SID "7492" Ports [1, 1] Position [160, 691, 200, 709] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool14" SID "7493" Ports [1, 1] Position [160, 726, 200, 744] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool15" SID "7494" Ports [1, 1] Position [160, 761, 200, 779] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool16" SID "7495" Ports [1, 1] Position [160, 796, 200, 814] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7496" Ports [1, 1] Position [160, 306, 200, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool18" SID "7497" Ports [1, 1] Position [160, 831, 200, 849] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool2" SID "7498" Ports [1, 1] Position [160, 26, 200, 44] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool3" SID "7499" Ports [1, 1] Position [160, 96, 200, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool4" SID "7500" Ports [1, 1] Position [160, 131, 200, 149] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool5" SID "7501" Ports [1, 1] Position [160, 166, 200, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool6" SID "7502" Ports [1, 1] Position [160, 201, 200, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool7" SID "7503" Ports [1, 1] Position [160, 236, 200, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool8" SID "7504" Ports [1, 1] Position [160, 271, 200, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool9" SID "7505" Ports [1, 1] Position [160, 551, 200, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AND 0" SID "7506" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 1" SID "7507" Position [230, 63, 260, 77] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 2" SID "7508" Position [230, 98, 260, 112] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 3" SID "7509" Position [230, 133, 260, 147] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 4" SID "7510" Position [230, 168, 260, 182] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 5" SID "7511" Position [230, 203, 260, 217] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 6" SID "7512" Position [230, 238, 260, 252] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 7" SID "7513" Position [230, 273, 260, 287] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 8" SID "7514" Position [230, 308, 260, 322] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 0" SID "7515" Position [230, 553, 260, 567] Port "10" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 1" SID "7516" Position [230, 588, 260, 602] Port "11" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 2" SID "7517" Position [230, 623, 260, 637] Port "12" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 3" SID "7518" Position [230, 658, 260, 672] Port "13" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 4" SID "7519" Position [230, 693, 260, 707] Port "14" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 5" SID "7520" Position [230, 728, 260, 742] Port "15" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 6" SID "7521" Position [230, 763, 260, 777] Port "16" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 7" SID "7522" Position [230, 798, 260, 812] Port "17" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 8" SID "7523" Position [230, 833, 260, 847] Port "18" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { DstBlock "b0" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b1" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b2" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b3" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b4" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b5" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b6" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b7" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 245] Branch { DstBlock "b16" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b17" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b18" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b19" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b20" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b21" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b22" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b23" DstPort 1 } Branch { Points [0, 35] DstBlock "b24" DstPort 1 } } } } } } } } } Branch { DstBlock "b8" DstPort 1 } } } } } } } } } } Line { SrcBlock "b0" SrcPort 1 DstBlock "bool2" DstPort 1 } Line { SrcBlock "b1" SrcPort 1 DstBlock "bool1" DstPort 1 } Line { SrcBlock "b2" SrcPort 1 DstBlock "bool3" DstPort 1 } Line { SrcBlock "b3" SrcPort 1 DstBlock "bool4" DstPort 1 } Line { SrcBlock "b4" SrcPort 1 DstBlock "bool5" DstPort 1 } Line { SrcBlock "b5" SrcPort 1 DstBlock "bool6" DstPort 1 } Line { SrcBlock "b6" SrcPort 1 DstBlock "bool7" DstPort 1 } Line { SrcBlock "b7" SrcPort 1 DstBlock "bool8" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "bool9" DstPort 1 } Line { SrcBlock "b17" SrcPort 1 DstBlock "bool10" DstPort 1 } Line { SrcBlock "b18" SrcPort 1 DstBlock "bool11" DstPort 1 } Line { SrcBlock "b19" SrcPort 1 DstBlock "bool12" DstPort 1 } Line { SrcBlock "b20" SrcPort 1 DstBlock "bool13" DstPort 1 } Line { SrcBlock "b21" SrcPort 1 DstBlock "bool14" DstPort 1 } Line { SrcBlock "b22" SrcPort 1 DstBlock "bool15" DstPort 1 } Line { SrcBlock "b23" SrcPort 1 DstBlock "bool16" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "AND 0" DstPort 1 } Line { SrcBlock "bool1" SrcPort 1 DstBlock "AND 1" DstPort 1 } Line { SrcBlock "bool3" SrcPort 1 DstBlock "AND 2" DstPort 1 } Line { SrcBlock "bool4" SrcPort 1 DstBlock "AND 3" DstPort 1 } Line { SrcBlock "bool5" SrcPort 1 DstBlock "AND 4" DstPort 1 } Line { SrcBlock "bool6" SrcPort 1 DstBlock "AND 5" DstPort 1 } Line { SrcBlock "bool7" SrcPort 1 DstBlock "AND 6" DstPort 1 } Line { SrcBlock "bool8" SrcPort 1 DstBlock "AND 7" DstPort 1 } Line { SrcBlock "bool9" SrcPort 1 DstBlock "OR 0" DstPort 1 } Line { SrcBlock "bool10" SrcPort 1 DstBlock "OR 1" DstPort 1 } Line { SrcBlock "bool11" SrcPort 1 DstBlock "OR 2" DstPort 1 } Line { SrcBlock "bool12" SrcPort 1 DstBlock "OR 3" DstPort 1 } Line { SrcBlock "bool13" SrcPort 1 DstBlock "OR 4" DstPort 1 } Line { SrcBlock "bool14" SrcPort 1 DstBlock "OR 5" DstPort 1 } Line { SrcBlock "bool15" SrcPort 1 DstBlock "OR 6" DstPort 1 } Line { SrcBlock "bool16" SrcPort 1 DstBlock "OR 7" DstPort 1 } Line { SrcBlock "b8" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "AND 8" DstPort 1 } Line { SrcBlock "b24" SrcPort 1 DstBlock "bool18" DstPort 1 } Line { SrcBlock "bool18" SrcPort 1 DstBlock "OR 8" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice15" SID "7546" Ports [1, 2] Position [1375, 1568, 1445, 1637] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice15" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7547" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "(LSB+0):(LSB+4)" SID "7548" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "7549" Ports [1, 1] Position [95, 187, 140, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7550" Ports [1, 1] Position [160, 186, 200, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "DLY" SID "7551" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "RESET" SID "7552" Position [230, 188, 260, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { Points [0, 160] DstBlock "b31" DstPort 1 } Branch { DstBlock "(LSB+0):(LSB+4)" DstPort 1 } } Line { SrcBlock "b31" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "RESET" DstPort 1 } Line { SrcBlock "(LSB+0):(LSB+4)" SrcPort 1 DstBlock "DLY" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice16" SID "7553" Ports [1, 18] Position [1375, 1164, 1445, 1556] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice16" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7554" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b0" SID "7555" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b1" SID "7556" Ports [1, 1] Position [95, 62, 140, 78] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b16" SID "7557" Ports [1, 1] Position [95, 552, 140, 568] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b17" SID "7558" Ports [1, 1] Position [95, 587, 140, 603] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b18" SID "7559" Ports [1, 1] Position [95, 622, 140, 638] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b19" SID "7560" Ports [1, 1] Position [95, 657, 140, 673] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b2" SID "7561" Ports [1, 1] Position [95, 97, 140, 113] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b20" SID "7562" Ports [1, 1] Position [95, 692, 140, 708] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b21" SID "7563" Ports [1, 1] Position [95, 727, 140, 743] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b22" SID "7564" Ports [1, 1] Position [95, 762, 140, 778] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "22" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b23" SID "7565" Ports [1, 1] Position [95, 797, 140, 813] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "23" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b24" SID "7566" Ports [1, 1] Position [95, 832, 140, 848] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b3" SID "7567" Ports [1, 1] Position [95, 132, 140, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b4" SID "7568" Ports [1, 1] Position [95, 167, 140, 183] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b5" SID "7569" Ports [1, 1] Position [95, 202, 140, 218] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b6" SID "7570" Ports [1, 1] Position [95, 237, 140, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b7" SID "7571" Ports [1, 1] Position [95, 272, 140, 288] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b8" SID "7572" Ports [1, 1] Position [95, 307, 140, 323] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool1" SID "7573" Ports [1, 1] Position [160, 61, 200, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool10" SID "7574" Ports [1, 1] Position [160, 586, 200, 604] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool11" SID "7575" Ports [1, 1] Position [160, 621, 200, 639] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool12" SID "7576" Ports [1, 1] Position [160, 656, 200, 674] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool13" SID "7577" Ports [1, 1] Position [160, 691, 200, 709] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool14" SID "7578" Ports [1, 1] Position [160, 726, 200, 744] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool15" SID "7579" Ports [1, 1] Position [160, 761, 200, 779] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool16" SID "7580" Ports [1, 1] Position [160, 796, 200, 814] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7581" Ports [1, 1] Position [160, 306, 200, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool18" SID "7582" Ports [1, 1] Position [160, 831, 200, 849] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool2" SID "7583" Ports [1, 1] Position [160, 26, 200, 44] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool3" SID "7584" Ports [1, 1] Position [160, 96, 200, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool4" SID "7585" Ports [1, 1] Position [160, 131, 200, 149] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool5" SID "7586" Ports [1, 1] Position [160, 166, 200, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool6" SID "7587" Ports [1, 1] Position [160, 201, 200, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool7" SID "7588" Ports [1, 1] Position [160, 236, 200, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool8" SID "7589" Ports [1, 1] Position [160, 271, 200, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool9" SID "7590" Ports [1, 1] Position [160, 551, 200, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AND 0" SID "7591" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 1" SID "7592" Position [230, 63, 260, 77] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 2" SID "7593" Position [230, 98, 260, 112] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 3" SID "7594" Position [230, 133, 260, 147] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 4" SID "7595" Position [230, 168, 260, 182] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 5" SID "7596" Position [230, 203, 260, 217] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 6" SID "7597" Position [230, 238, 260, 252] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 7" SID "7598" Position [230, 273, 260, 287] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 8" SID "7599" Position [230, 308, 260, 322] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 0" SID "7600" Position [230, 553, 260, 567] Port "10" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 1" SID "7601" Position [230, 588, 260, 602] Port "11" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 2" SID "7602" Position [230, 623, 260, 637] Port "12" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 3" SID "7603" Position [230, 658, 260, 672] Port "13" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 4" SID "7604" Position [230, 693, 260, 707] Port "14" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 5" SID "7605" Position [230, 728, 260, 742] Port "15" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 6" SID "7606" Position [230, 763, 260, 777] Port "16" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 7" SID "7607" Position [230, 798, 260, 812] Port "17" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 8" SID "7608" Position [230, 833, 260, 847] Port "18" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { DstBlock "b0" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b1" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b2" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b3" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b4" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b5" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b6" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b7" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 245] Branch { DstBlock "b16" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b17" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b18" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b19" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b20" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b21" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b22" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b23" DstPort 1 } Branch { Points [0, 35] DstBlock "b24" DstPort 1 } } } } } } } } } Branch { DstBlock "b8" DstPort 1 } } } } } } } } } } Line { SrcBlock "b0" SrcPort 1 DstBlock "bool2" DstPort 1 } Line { SrcBlock "b1" SrcPort 1 DstBlock "bool1" DstPort 1 } Line { SrcBlock "b2" SrcPort 1 DstBlock "bool3" DstPort 1 } Line { SrcBlock "b3" SrcPort 1 DstBlock "bool4" DstPort 1 } Line { SrcBlock "b4" SrcPort 1 DstBlock "bool5" DstPort 1 } Line { SrcBlock "b5" SrcPort 1 DstBlock "bool6" DstPort 1 } Line { SrcBlock "b6" SrcPort 1 DstBlock "bool7" DstPort 1 } Line { SrcBlock "b7" SrcPort 1 DstBlock "bool8" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "bool9" DstPort 1 } Line { SrcBlock "b17" SrcPort 1 DstBlock "bool10" DstPort 1 } Line { SrcBlock "b18" SrcPort 1 DstBlock "bool11" DstPort 1 } Line { SrcBlock "b19" SrcPort 1 DstBlock "bool12" DstPort 1 } Line { SrcBlock "b20" SrcPort 1 DstBlock "bool13" DstPort 1 } Line { SrcBlock "b21" SrcPort 1 DstBlock "bool14" DstPort 1 } Line { SrcBlock "b22" SrcPort 1 DstBlock "bool15" DstPort 1 } Line { SrcBlock "b23" SrcPort 1 DstBlock "bool16" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "AND 0" DstPort 1 } Line { SrcBlock "bool1" SrcPort 1 DstBlock "AND 1" DstPort 1 } Line { SrcBlock "bool3" SrcPort 1 DstBlock "AND 2" DstPort 1 } Line { SrcBlock "bool4" SrcPort 1 DstBlock "AND 3" DstPort 1 } Line { SrcBlock "bool5" SrcPort 1 DstBlock "AND 4" DstPort 1 } Line { SrcBlock "bool6" SrcPort 1 DstBlock "AND 5" DstPort 1 } Line { SrcBlock "bool7" SrcPort 1 DstBlock "AND 6" DstPort 1 } Line { SrcBlock "bool8" SrcPort 1 DstBlock "AND 7" DstPort 1 } Line { SrcBlock "bool9" SrcPort 1 DstBlock "OR 0" DstPort 1 } Line { SrcBlock "bool10" SrcPort 1 DstBlock "OR 1" DstPort 1 } Line { SrcBlock "bool11" SrcPort 1 DstBlock "OR 2" DstPort 1 } Line { SrcBlock "bool12" SrcPort 1 DstBlock "OR 3" DstPort 1 } Line { SrcBlock "bool13" SrcPort 1 DstBlock "OR 4" DstPort 1 } Line { SrcBlock "bool14" SrcPort 1 DstBlock "OR 5" DstPort 1 } Line { SrcBlock "bool15" SrcPort 1 DstBlock "OR 6" DstPort 1 } Line { SrcBlock "bool16" SrcPort 1 DstBlock "OR 7" DstPort 1 } Line { SrcBlock "b8" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "AND 8" DstPort 1 } Line { SrcBlock "b24" SrcPort 1 DstBlock "bool18" DstPort 1 } Line { SrcBlock "bool18" SrcPort 1 DstBlock "OR 8" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice7" SID "7206" Ports [1, 18] Position [840, 619, 910, 1011] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice7" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7207" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b0" SID "7208" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b1" SID "7209" Ports [1, 1] Position [95, 62, 140, 78] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b16" SID "7210" Ports [1, 1] Position [95, 552, 140, 568] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b17" SID "7211" Ports [1, 1] Position [95, 587, 140, 603] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b18" SID "7212" Ports [1, 1] Position [95, 622, 140, 638] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b19" SID "7213" Ports [1, 1] Position [95, 657, 140, 673] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b2" SID "7214" Ports [1, 1] Position [95, 97, 140, 113] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b20" SID "7215" Ports [1, 1] Position [95, 692, 140, 708] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b21" SID "7216" Ports [1, 1] Position [95, 727, 140, 743] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b22" SID "7217" Ports [1, 1] Position [95, 762, 140, 778] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "22" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b23" SID "7218" Ports [1, 1] Position [95, 797, 140, 813] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "23" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b24" SID "7219" Ports [1, 1] Position [95, 832, 140, 848] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b3" SID "7220" Ports [1, 1] Position [95, 132, 140, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b4" SID "7221" Ports [1, 1] Position [95, 167, 140, 183] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b5" SID "7222" Ports [1, 1] Position [95, 202, 140, 218] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b6" SID "7223" Ports [1, 1] Position [95, 237, 140, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b7" SID "7224" Ports [1, 1] Position [95, 272, 140, 288] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b8" SID "7225" Ports [1, 1] Position [95, 307, 140, 323] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool1" SID "7226" Ports [1, 1] Position [160, 61, 200, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool10" SID "7227" Ports [1, 1] Position [160, 586, 200, 604] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool11" SID "7228" Ports [1, 1] Position [160, 621, 200, 639] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool12" SID "7229" Ports [1, 1] Position [160, 656, 200, 674] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool13" SID "7230" Ports [1, 1] Position [160, 691, 200, 709] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool14" SID "7231" Ports [1, 1] Position [160, 726, 200, 744] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool15" SID "7232" Ports [1, 1] Position [160, 761, 200, 779] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool16" SID "7233" Ports [1, 1] Position [160, 796, 200, 814] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7234" Ports [1, 1] Position [160, 306, 200, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool18" SID "7235" Ports [1, 1] Position [160, 831, 200, 849] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool2" SID "7236" Ports [1, 1] Position [160, 26, 200, 44] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool3" SID "7237" Ports [1, 1] Position [160, 96, 200, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool4" SID "7238" Ports [1, 1] Position [160, 131, 200, 149] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool5" SID "7239" Ports [1, 1] Position [160, 166, 200, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool6" SID "7240" Ports [1, 1] Position [160, 201, 200, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool7" SID "7241" Ports [1, 1] Position [160, 236, 200, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool8" SID "7242" Ports [1, 1] Position [160, 271, 200, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool9" SID "7243" Ports [1, 1] Position [160, 551, 200, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AND 0" SID "7244" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 1" SID "7245" Position [230, 63, 260, 77] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 2" SID "7246" Position [230, 98, 260, 112] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 3" SID "7247" Position [230, 133, 260, 147] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 4" SID "7248" Position [230, 168, 260, 182] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 5" SID "7249" Position [230, 203, 260, 217] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 6" SID "7250" Position [230, 238, 260, 252] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 7" SID "7251" Position [230, 273, 260, 287] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 8" SID "7252" Position [230, 308, 260, 322] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 0" SID "7253" Position [230, 553, 260, 567] Port "10" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 1" SID "7254" Position [230, 588, 260, 602] Port "11" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 2" SID "7255" Position [230, 623, 260, 637] Port "12" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 3" SID "7256" Position [230, 658, 260, 672] Port "13" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 4" SID "7257" Position [230, 693, 260, 707] Port "14" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 5" SID "7258" Position [230, 728, 260, 742] Port "15" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 6" SID "7259" Position [230, 763, 260, 777] Port "16" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 7" SID "7260" Position [230, 798, 260, 812] Port "17" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 8" SID "7261" Position [230, 833, 260, 847] Port "18" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { DstBlock "b0" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b1" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b2" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b3" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b4" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b5" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b6" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b7" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 245] Branch { DstBlock "b16" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b17" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b18" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b19" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b20" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b21" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b22" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b23" DstPort 1 } Branch { Points [0, 35] DstBlock "b24" DstPort 1 } } } } } } } } } Branch { DstBlock "b8" DstPort 1 } } } } } } } } } } Line { SrcBlock "b0" SrcPort 1 DstBlock "bool2" DstPort 1 } Line { SrcBlock "b1" SrcPort 1 DstBlock "bool1" DstPort 1 } Line { SrcBlock "b2" SrcPort 1 DstBlock "bool3" DstPort 1 } Line { SrcBlock "b3" SrcPort 1 DstBlock "bool4" DstPort 1 } Line { SrcBlock "b4" SrcPort 1 DstBlock "bool5" DstPort 1 } Line { SrcBlock "b5" SrcPort 1 DstBlock "bool6" DstPort 1 } Line { SrcBlock "b6" SrcPort 1 DstBlock "bool7" DstPort 1 } Line { SrcBlock "b7" SrcPort 1 DstBlock "bool8" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "bool9" DstPort 1 } Line { SrcBlock "b17" SrcPort 1 DstBlock "bool10" DstPort 1 } Line { SrcBlock "b18" SrcPort 1 DstBlock "bool11" DstPort 1 } Line { SrcBlock "b19" SrcPort 1 DstBlock "bool12" DstPort 1 } Line { SrcBlock "b20" SrcPort 1 DstBlock "bool13" DstPort 1 } Line { SrcBlock "b21" SrcPort 1 DstBlock "bool14" DstPort 1 } Line { SrcBlock "b22" SrcPort 1 DstBlock "bool15" DstPort 1 } Line { SrcBlock "b23" SrcPort 1 DstBlock "bool16" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "AND 0" DstPort 1 } Line { SrcBlock "bool1" SrcPort 1 DstBlock "AND 1" DstPort 1 } Line { SrcBlock "bool3" SrcPort 1 DstBlock "AND 2" DstPort 1 } Line { SrcBlock "bool4" SrcPort 1 DstBlock "AND 3" DstPort 1 } Line { SrcBlock "bool5" SrcPort 1 DstBlock "AND 4" DstPort 1 } Line { SrcBlock "bool6" SrcPort 1 DstBlock "AND 5" DstPort 1 } Line { SrcBlock "bool7" SrcPort 1 DstBlock "AND 6" DstPort 1 } Line { SrcBlock "bool8" SrcPort 1 DstBlock "AND 7" DstPort 1 } Line { SrcBlock "bool9" SrcPort 1 DstBlock "OR 0" DstPort 1 } Line { SrcBlock "bool10" SrcPort 1 DstBlock "OR 1" DstPort 1 } Line { SrcBlock "bool11" SrcPort 1 DstBlock "OR 2" DstPort 1 } Line { SrcBlock "bool12" SrcPort 1 DstBlock "OR 3" DstPort 1 } Line { SrcBlock "bool13" SrcPort 1 DstBlock "OR 4" DstPort 1 } Line { SrcBlock "bool14" SrcPort 1 DstBlock "OR 5" DstPort 1 } Line { SrcBlock "bool15" SrcPort 1 DstBlock "OR 6" DstPort 1 } Line { SrcBlock "bool16" SrcPort 1 DstBlock "OR 7" DstPort 1 } Line { SrcBlock "b8" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "AND 8" DstPort 1 } Line { SrcBlock "b24" SrcPort 1 DstBlock "bool18" DstPort 1 } Line { SrcBlock "bool18" SrcPort 1 DstBlock "OR 8" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice8" SID "7262" Ports [1, 2] Position [840, 1023, 910, 1092] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice8" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7263" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b31" SID "7265" Ports [1, 1] Position [95, 187, 140, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0:15]" SID "7264" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7266" Ports [1, 1] Position [160, 186, 200, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "DLY" SID "7267" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "RESET" SID "7268" Position [230, 188, 260, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { Points [0, 160] DstBlock "b31" DstPort 1 } Branch { DstBlock "b[0:15]" DstPort 1 } } Line { SrcBlock "b31" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "RESET" DstPort 1 } Line { SrcBlock "b[0:15]" SrcPort 1 DstBlock "DLY" DstPort 1 } } } Block { BlockType SubSystem Name "Output Configuration\nSlice9" SID "7291" Ports [1, 18] Position [840, 1169, 910, 1561] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Output Configuration\nSlice9" Location [96, 235, 2013, 1345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "7292" Position [25, 28, 55, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "b0" SID "7293" Ports [1, 1] Position [95, 27, 140, 43] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b1" SID "7294" Ports [1, 1] Position [95, 62, 140, 78] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b16" SID "7295" Ports [1, 1] Position [95, 552, 140, 568] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b17" SID "7296" Ports [1, 1] Position [95, 587, 140, 603] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b18" SID "7297" Ports [1, 1] Position [95, 622, 140, 638] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b19" SID "7298" Ports [1, 1] Position [95, 657, 140, 673] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b2" SID "7299" Ports [1, 1] Position [95, 97, 140, 113] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b20" SID "7300" Ports [1, 1] Position [95, 692, 140, 708] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b21" SID "7301" Ports [1, 1] Position [95, 727, 140, 743] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b22" SID "7302" Ports [1, 1] Position [95, 762, 140, 778] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "22" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b23" SID "7303" Ports [1, 1] Position [95, 797, 140, 813] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "23" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b24" SID "7304" Ports [1, 1] Position [95, 832, 140, 848] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b3" SID "7305" Ports [1, 1] Position [95, 132, 140, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b4" SID "7306" Ports [1, 1] Position [95, 167, 140, 183] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b5" SID "7307" Ports [1, 1] Position [95, 202, 140, 218] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b6" SID "7308" Ports [1, 1] Position [95, 237, 140, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b7" SID "7309" Ports [1, 1] Position [95, 272, 140, 288] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b8" SID "7310" Ports [1, 1] Position [95, 307, 140, 323] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool1" SID "7311" Ports [1, 1] Position [160, 61, 200, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool10" SID "7312" Ports [1, 1] Position [160, 586, 200, 604] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool11" SID "7313" Ports [1, 1] Position [160, 621, 200, 639] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool12" SID "7314" Ports [1, 1] Position [160, 656, 200, 674] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool13" SID "7315" Ports [1, 1] Position [160, 691, 200, 709] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool14" SID "7316" Ports [1, 1] Position [160, 726, 200, 744] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool15" SID "7317" Ports [1, 1] Position [160, 761, 200, 779] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool16" SID "7318" Ports [1, 1] Position [160, 796, 200, 814] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool17" SID "7319" Ports [1, 1] Position [160, 306, 200, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool18" SID "7320" Ports [1, 1] Position [160, 831, 200, 849] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool2" SID "7321" Ports [1, 1] Position [160, 26, 200, 44] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool3" SID "7322" Ports [1, 1] Position [160, 96, 200, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool4" SID "7323" Ports [1, 1] Position [160, 131, 200, 149] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool5" SID "7324" Ports [1, 1] Position [160, 166, 200, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool6" SID "7325" Ports [1, 1] Position [160, 201, 200, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool7" SID "7326" Ports [1, 1] Position [160, 236, 200, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool8" SID "7327" Ports [1, 1] Position [160, 271, 200, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool9" SID "7328" Ports [1, 1] Position [160, 551, 200, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AND 0" SID "7329" Position [230, 28, 260, 42] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 1" SID "7330" Position [230, 63, 260, 77] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 2" SID "7331" Position [230, 98, 260, 112] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 3" SID "7332" Position [230, 133, 260, 147] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 4" SID "7333" Position [230, 168, 260, 182] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 5" SID "7334" Position [230, 203, 260, 217] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 6" SID "7335" Position [230, 238, 260, 252] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 7" SID "7336" Position [230, 273, 260, 287] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "AND 8" SID "7337" Position [230, 308, 260, 322] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 0" SID "7338" Position [230, 553, 260, 567] Port "10" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 1" SID "7339" Position [230, 588, 260, 602] Port "11" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 2" SID "7340" Position [230, 623, 260, 637] Port "12" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 3" SID "7341" Position [230, 658, 260, 672] Port "13" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 4" SID "7342" Position [230, 693, 260, 707] Port "14" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 5" SID "7343" Position [230, 728, 260, 742] Port "15" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 6" SID "7344" Position [230, 763, 260, 777] Port "16" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 7" SID "7345" Position [230, 798, 260, 812] Port "17" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "OR 8" SID "7346" Position [230, 833, 260, 847] Port "18" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { DstBlock "b0" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b1" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b2" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b3" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b4" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b5" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b6" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b7" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 245] Branch { DstBlock "b16" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b17" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b18" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b19" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b20" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b21" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b22" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b23" DstPort 1 } Branch { Points [0, 35] DstBlock "b24" DstPort 1 } } } } } } } } } Branch { DstBlock "b8" DstPort 1 } } } } } } } } } } Line { SrcBlock "b0" SrcPort 1 DstBlock "bool2" DstPort 1 } Line { SrcBlock "b1" SrcPort 1 DstBlock "bool1" DstPort 1 } Line { SrcBlock "b2" SrcPort 1 DstBlock "bool3" DstPort 1 } Line { SrcBlock "b3" SrcPort 1 DstBlock "bool4" DstPort 1 } Line { SrcBlock "b4" SrcPort 1 DstBlock "bool5" DstPort 1 } Line { SrcBlock "b5" SrcPort 1 DstBlock "bool6" DstPort 1 } Line { SrcBlock "b6" SrcPort 1 DstBlock "bool7" DstPort 1 } Line { SrcBlock "b7" SrcPort 1 DstBlock "bool8" DstPort 1 } Line { SrcBlock "b16" SrcPort 1 DstBlock "bool9" DstPort 1 } Line { SrcBlock "b17" SrcPort 1 DstBlock "bool10" DstPort 1 } Line { SrcBlock "b18" SrcPort 1 DstBlock "bool11" DstPort 1 } Line { SrcBlock "b19" SrcPort 1 DstBlock "bool12" DstPort 1 } Line { SrcBlock "b20" SrcPort 1 DstBlock "bool13" DstPort 1 } Line { SrcBlock "b21" SrcPort 1 DstBlock "bool14" DstPort 1 } Line { SrcBlock "b22" SrcPort 1 DstBlock "bool15" DstPort 1 } Line { SrcBlock "b23" SrcPort 1 DstBlock "bool16" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "AND 0" DstPort 1 } Line { SrcBlock "bool1" SrcPort 1 DstBlock "AND 1" DstPort 1 } Line { SrcBlock "bool3" SrcPort 1 DstBlock "AND 2" DstPort 1 } Line { SrcBlock "bool4" SrcPort 1 DstBlock "AND 3" DstPort 1 } Line { SrcBlock "bool5" SrcPort 1 DstBlock "AND 4" DstPort 1 } Line { SrcBlock "bool6" SrcPort 1 DstBlock "AND 5" DstPort 1 } Line { SrcBlock "bool7" SrcPort 1 DstBlock "AND 6" DstPort 1 } Line { SrcBlock "bool8" SrcPort 1 DstBlock "AND 7" DstPort 1 } Line { SrcBlock "bool9" SrcPort 1 DstBlock "OR 0" DstPort 1 } Line { SrcBlock "bool10" SrcPort 1 DstBlock "OR 1" DstPort 1 } Line { SrcBlock "bool11" SrcPort 1 DstBlock "OR 2" DstPort 1 } Line { SrcBlock "bool12" SrcPort 1 DstBlock "OR 3" DstPort 1 } Line { SrcBlock "bool13" SrcPort 1 DstBlock "OR 4" DstPort 1 } Line { SrcBlock "bool14" SrcPort 1 DstBlock "OR 5" DstPort 1 } Line { SrcBlock "bool15" SrcPort 1 DstBlock "OR 6" DstPort 1 } Line { SrcBlock "bool16" SrcPort 1 DstBlock "OR 7" DstPort 1 } Line { SrcBlock "b8" SrcPort 1 DstBlock "bool17" DstPort 1 } Line { SrcBlock "bool17" SrcPort 1 DstBlock "AND 8" DstPort 1 } Line { SrcBlock "b24" SrcPort 1 DstBlock "bool18" DstPort 1 } Line { SrcBlock "bool18" SrcPort 1 DstBlock "OR 8" DstPort 1 } } } Block { BlockType Terminator Name "Terminator1" SID "8861" Position [465, 200, 485, 220] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator15" SID "8623" Position [2260, 165, 2280, 185] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator16" SID "8624" Position [2260, 470, 2280, 490] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator2" SID "8862" Position [465, 220, 485, 240] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator3" SID "8874" Position [465, 95, 485, 115] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator4" SID "8863" Position [465, 325, 485, 345] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator5" SID "8864" Position [465, 410, 485, 430] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator6" SID "8875" Position [470, 935, 490, 955] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator7" SID "8876" Position [470, 955, 490, 975] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator8" SID "8877" Position [470, 975, 490, 995] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator9" SID "8878" Position [470, 995, 490, 1015] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "To Register" SID "5290" Ports [2, 1] Position [2160, 147, 2220, 203] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TRIG_OUT'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register1" SID "6734" Ports [2, 1] Position [2160, 452, 2220, 508] ShowName off AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'CORE_INFO'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "24" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "bool" SID "8865" Ports [1, 1] Position [365, 136, 405, 154] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool1" SID "8866" Ports [1, 1] Position [365, 241, 405, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool2" SID "8867" Ports [1, 1] Position [365, 346, 405, 364] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool3" SID "8868" Ports [1, 1] Position [365, 451, 405, 469] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool4" SID "8869" Ports [1, 1] Position [365, 556, 405, 574] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool5" SID "8870" Ports [1, 1] Position [365, 661, 405, 679] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool6" SID "8871" Ports [1, 1] Position [365, 766, 405, 784] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool7" SID "8872" Ports [1, 1] Position [370, 871, 410, 889] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool8" SID "8873" Ports [1, 1] Position [370, 996, 410, 1014] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "From Register9" SrcPort 1 DstBlock "Goto20" DstPort 1 } Line { SrcBlock "From Register10" SrcPort 1 DstBlock "Goto23" DstPort 1 } Line { SrcBlock "From Register11" SrcPort 1 DstBlock "Goto24" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register2" SrcPort 1 DstBlock "Output Configuration\nSlice" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 1 DstBlock " 4" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 2 DstBlock " 5" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 3 DstBlock " 6" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 4 DstBlock " 7" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 5 DstBlock " 8" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 6 DstBlock " 9" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 7 DstBlock " 10" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 8 DstBlock " 11" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 10 DstBlock " 12" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 11 DstBlock " 13" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 12 DstBlock " 14" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 13 DstBlock " 15" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 14 DstBlock " 16" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 15 DstBlock " 17" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 16 DstBlock " 18" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 17 DstBlock " 19" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Concat" DstPort 4 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Concat" DstPort 5 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Concat" DstPort 6 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "To Register" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "To Register" DstPort 2 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "To Register1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "To Register1" DstPort 2 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Concat1" DstPort 3 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 9 DstBlock " 3" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice" SrcPort 18 DstBlock " 107" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register14" SrcPort 1 DstBlock "Output Configuration\nSlice7" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 1 DstBlock " 122" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 2 DstBlock " 123" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 3 DstBlock " 124" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 4 DstBlock " 125" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 5 DstBlock " 126" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 6 DstBlock " 127" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 7 DstBlock " 108" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 8 DstBlock " 110" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 10 DstBlock " 112" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 11 DstBlock " 113" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 12 DstBlock " 114" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 13 DstBlock " 115" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 14 DstBlock " 116" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 15 DstBlock " 118" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 16 DstBlock " 119" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 17 DstBlock " 120" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register13" SrcPort 1 DstBlock "Output Configuration\nSlice8" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice8" SrcPort 2 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice8" SrcPort 1 DstBlock " 111" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 9 DstBlock " 121" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice7" SrcPort 18 DstBlock " 109" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register16" SrcPort 1 DstBlock "Output Configuration\nSlice9" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 1 DstBlock " 141" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 2 DstBlock " 142" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 3 DstBlock " 143" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 4 DstBlock " 144" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 5 DstBlock " 145" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 6 DstBlock " 146" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 7 DstBlock " 128" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 8 DstBlock " 130" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 10 DstBlock " 132" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 11 DstBlock " 133" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 12 DstBlock " 134" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 13 DstBlock " 135" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 14 DstBlock " 136" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 15 DstBlock " 137" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 16 DstBlock " 138" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 17 DstBlock " 139" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register15" SrcPort 1 DstBlock "Output Configuration\nSlice10" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice10" SrcPort 2 DstBlock "Goto26" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice10" SrcPort 1 DstBlock " 131" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 9 DstBlock " 140" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice9" SrcPort 18 DstBlock " 129" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register18" SrcPort 1 DstBlock "Output Configuration\nSlice12" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 1 DstBlock " 160" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 2 DstBlock " 161" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 3 DstBlock " 162" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 4 DstBlock " 163" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 5 DstBlock " 164" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 6 DstBlock " 165" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 7 DstBlock " 147" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 8 DstBlock " 149" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 10 DstBlock " 151" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 11 DstBlock " 152" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 12 DstBlock " 153" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 13 DstBlock " 154" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 14 DstBlock " 155" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 15 DstBlock " 156" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 16 DstBlock " 157" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 17 DstBlock " 158" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register17" SrcPort 1 DstBlock "Output Configuration\nSlice11" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice11" SrcPort 2 DstBlock "Goto27" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice11" SrcPort 1 DstBlock " 150" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 9 DstBlock " 159" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice12" SrcPort 18 DstBlock " 148" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register20" SrcPort 1 DstBlock "Output Configuration\nSlice14" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 1 DstBlock " 179" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 2 DstBlock " 180" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 3 DstBlock " 181" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 4 DstBlock " 182" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 5 DstBlock " 183" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 6 DstBlock " 184" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 7 DstBlock " 166" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 8 DstBlock " 168" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 10 DstBlock " 170" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 11 DstBlock " 171" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 12 DstBlock " 172" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 13 DstBlock " 173" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 14 DstBlock " 174" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 15 DstBlock " 175" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 16 DstBlock " 176" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 17 DstBlock " 177" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register19" SrcPort 1 DstBlock "Output Configuration\nSlice13" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice13" SrcPort 2 DstBlock "Goto28" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice13" SrcPort 1 DstBlock " 169" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 9 DstBlock " 178" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice14" SrcPort 18 DstBlock " 167" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register22" SrcPort 1 DstBlock "Output Configuration\nSlice16" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 1 DstBlock " 198" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 2 DstBlock " 199" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 3 DstBlock " 200" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 4 DstBlock " 201" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 5 DstBlock " 202" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 6 DstBlock " 203" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 7 DstBlock " 185" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 8 DstBlock " 187" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 10 DstBlock " 189" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 11 DstBlock " 190" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 12 DstBlock " 191" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 13 DstBlock " 192" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 14 DstBlock " 193" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 15 DstBlock " 194" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 16 DstBlock " 195" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 17 DstBlock " 196" DstPort 1 } Line { Labels [0, 0] SrcBlock "From Register21" SrcPort 1 DstBlock "Output Configuration\nSlice15" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice15" SrcPort 2 DstBlock "Goto29" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice15" SrcPort 1 DstBlock " 188" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 9 DstBlock " 197" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice16" SrcPort 18 DstBlock " 186" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice1" SrcPort 1 DstBlock " 117" DstPort 1 } Line { SrcBlock "Output Configuration\nSlice1" SrcPort 2 DstBlock "Goto25" DstPort 1 } Line { SrcBlock "From Register12" SrcPort 1 DstBlock "Output Configuration\nSlice1" DstPort 1 } Line { SrcBlock "To Register" SrcPort 1 DstBlock "Terminator15" DstPort 1 } Line { SrcBlock "To Register1" SrcPort 1 DstBlock "Terminator16" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "bool" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "bool1" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "bool3" SrcPort 1 DstBlock "Goto19" DstPort 1 } Line { SrcBlock "bool4" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "bool5" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "bool6" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "bool7" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "bool8" SrcPort 1 DstBlock "Terminator9" DstPort 1 } Line { SrcBlock "From Register3" SrcPort 1 DstBlock "Input Configuration\nSlice0" DstPort 1 } Line { SrcBlock "From Register1" SrcPort 1 DstBlock "Input Configuration\nSlice1" DstPort 1 } Line { SrcBlock "From Register4" SrcPort 1 DstBlock "Input Configuration\nSlice2" DstPort 1 } Line { SrcBlock "From Register5" SrcPort 1 DstBlock "Input Configuration\nSlice3" DstPort 1 } Line { SrcBlock "From Register6" SrcPort 1 DstBlock "Input Configuration\nSlice4" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice0" SrcPort 1 DstBlock " 1" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice0" SrcPort 3 DstBlock " 20" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice0" SrcPort 4 DstBlock "bool" DstPort 1 } Line { SrcBlock "From Register7" SrcPort 1 DstBlock "Input Configuration\nSlice5" DstPort 1 } Line { SrcBlock "From Register8" SrcPort 1 DstBlock "Input Configuration\nSlice6" DstPort 1 } Line { SrcBlock "From Register23" SrcPort 1 DstBlock "Input Configuration\nSlice7" DstPort 1 } Line { SrcBlock "From Register24" SrcPort 1 DstBlock "Input Configuration\nSlice8" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice1" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice1" SrcPort 2 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice1" SrcPort 3 DstBlock "bool1" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice2" SrcPort 1 DstBlock " 106" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice2" SrcPort 2 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice2" SrcPort 3 DstBlock "bool2" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice3" SrcPort 1 DstBlock "Terminator5" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice3" SrcPort 2 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice3" SrcPort 3 DstBlock "bool3" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice4" SrcPort 1 DstBlock " " DstPort 1 } Line { SrcBlock "Input Configuration\nSlice4" SrcPort 2 DstBlock " 2" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice4" SrcPort 3 DstBlock "bool4" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice5" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice5" SrcPort 2 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice5" SrcPort 3 DstBlock "bool5" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice6" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice6" SrcPort 2 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice6" SrcPort 3 DstBlock "bool6" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice7" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice7" SrcPort 2 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice7" SrcPort 3 DstBlock "bool7" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice0" SrcPort 2 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice8" SrcPort 1 DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice8" SrcPort 2 DstBlock "Terminator7" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice8" SrcPort 3 DstBlock "Terminator8" DstPort 1 } Line { SrcBlock "Input Configuration\nSlice8" SrcPort 4 DstBlock "bool8" DstPort 1 } Annotation { Name "Basic Input Trigger Configuration" Position [228, 33] DropShadow on } Annotation { Name "Advanced Input Trigger Configuration" Position [263, 1198] DropShadow on } Annotation { Name "Output Trigger Configuration" Position [973, 33] DropShadow on } Annotation { Name "Output Trigger Configuration" Position [2013, 33] DropShadow on } Annotation { Position [2254, 481] } Annotation { Position [527, 523] } Annotation { Name "Eth B Not Supported" Position [552, 973] } } } Block { BlockType Reference Name "Relational1" SID "8614" Ports [2, 1] Position [1260, 386, 1310, 444] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 0 0 9 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36" ".77 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.7" "7 36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 2" "2.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15." "77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "8551" Ports [2, 1] Position [1260, 316, 1310, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 0 0 9 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0." "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36" ".77 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.7" "7 36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 2" "2.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15." "77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "RisingEdge" SID "8552" Ports [1, 1] Position [1365, 331, 1425, 359] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "RisingEdge" Location [518, 355, 1098, 758] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "IN" SID "8553" Position [25, 33, 55, 47] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Delay" SID "8554" Ports [1, 1] Position [165, 57, 205, 83] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If re" "gister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 26 26 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1" " 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8555" Ports [1, 1] Position [100, 56, 140, 84] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,28,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 28 28 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8556" Ports [2, 1] Position [235, 25, 290, 85] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91" " ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37.77 37.7" "7 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30.77 37.77 37" ".77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.77 23.77 ],[1 1" " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77 16.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Edge" SID "8557" Position [325, 48, 355, 62] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Logical" SrcPort 1 Points [0, 0] DstBlock "Edge" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "IN" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 30] DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "S-R Latch" SID "8558" Ports [2, 1] Position [1030, 318, 1075, 367] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [13, 209, 2156, 1324] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "8559" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "8560" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "8561" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 13.22 11" ".22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.931 0." "946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44 7.4" "4 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon grap" "hics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Convert1" SID "8562" Ports [1, 1] Position [210, 86, 235, 104] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8563" Ports [1, 1] Position [210, 101, 235, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8564" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 30.66 36." "66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 30.66 24.66" " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1 1 ]);\npatch(" "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p" "ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8565" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch1" SID "8604" Ports [2, 1] Position [1610, 388, 1655, 437] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch1" Location [13, 209, 2156, 1324] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "8605" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "8606" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "8607" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 13.22 11" ".22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.931 0." "946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44 7.4" "4 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon grap" "hics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Convert1" SID "8608" Ports [1, 1] Position [210, 86, 235, 104] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8609" Ports [1, 1] Position [210, 101, 235, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8610" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 30.66 36." "66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 30.66 24.66" " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1 1 ]);\npatch(" "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p" "ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8611" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Scope Name "Scope" SID "7016" Ports [6] Position [2200, 97, 2375, 1303] Floating off Location [6, 54, 376, 1152] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } YMin "-5~-5~-5~-5~-5~-5" YMax "5~5~5~5~5~5" SaveName "ScopeData1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator" SID "8717" Position [2165, 640, 2185, 660] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator2" SID "8719" Position [2165, 840, 2185, 860] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator4" SID "8722" Position [2165, 1040, 2185, 1060] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator6" SID "8724" Position [2165, 1240, 2185, 1260] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "Trigger Output 0" SID "4524" Ports [9, 1] Position [810, 94, 865, 276] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Trigger Output 0" Location [2, 74, 2496, 1419] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" Block { BlockType Inport Name "In0" SID "4526" Position [200, 53, 230, 67] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In1" SID "4528" Position [200, 113, 230, 127] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In2" SID "4530" Position [200, 173, 230, 187] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In3" SID "4532" Position [200, 233, 230, 247] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In4" SID "4534" Position [200, 293, 230, 307] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In5" SID "4536" Position [200, 353, 230, 367] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In6" SID "4538" Position [200, 413, 230, 427] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In7" SID "4540" Position [200, 473, 230, 487] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In8" SID "7852" Position [200, 533, 230, 547] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 1" SID "4572" Position [1625, 768, 1695, 792] ShowName off GotoTag "OUT0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Expression1" SID "4494" Ports [2, 1] Position [530, 80, 615, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression2" SID "3580" Ports [2, 1] Position [530, 20, 615, 75] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression3" SID "4496" Ports [2, 1] Position [530, 140, 615, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression4" SID "4498" Ports [2, 1] Position [530, 200, 615, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression5" SID "4500" Ports [2, 1] Position [530, 320, 615, 375] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression6" SID "4501" Ports [2, 1] Position [530, 260, 615, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression7" SID "4502" Ports [2, 1] Position [530, 380, 615, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression8" SID "4503" Ports [2, 1] Position [530, 440, 615, 495] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression9" SID "7841" Ports [2, 1] Position [530, 500, 615, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4569" Position [1300, 726, 1425, 754] ShowName off GotoTag "OUT0_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "7853" Position [35, 503, 220, 527] ShowName off GotoTag "OUT0_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "7854" Position [35, 738, 220, 762] ShowName off GotoTag "OUT0_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "7855" Position [35, 798, 220, 822] ShowName off GotoTag "OUT0_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "7857" Position [40, 858, 225, 882] ShowName off GotoTag "OUT0_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "7858" Position [40, 918, 225, 942] ShowName off GotoTag "OUT0_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From15" SID "7859" Position [40, 978, 225, 1002] ShowName off GotoTag "OUT0_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "7860" Position [40, 1038, 225, 1062] ShowName off GotoTag "OUT0_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "7861" Position [40, 1098, 225, 1122] ShowName off GotoTag "OUT0_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "7862" Position [40, 1158, 225, 1182] ShowName off GotoTag "OUT0_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "7863" Position [40, 1218, 225, 1242] ShowName off GotoTag "OUT0_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "7843" Position [35, 83, 220, 107] ShowName off GotoTag "OUT0_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "7844" Position [35, 143, 220, 167] ShowName off GotoTag "OUT0_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "7845" Position [35, 203, 220, 227] ShowName off GotoTag "OUT0_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "7846" Position [35, 263, 220, 287] ShowName off GotoTag "OUT0_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "7847" Position [35, 323, 220, 347] ShowName off GotoTag "OUT0_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "7848" Position [35, 383, 220, 407] ShowName off GotoTag "OUT0_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "7849" Position [35, 443, 220, 467] ShowName off GotoTag "OUT0_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "4493" Position [35, 23, 220, 47] ShowName off GotoTag "OUT0_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "4549" Ports [2, 1] Position [530, 735, 615, 790] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4550" Ports [2, 1] Position [530, 795, 615, 850] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "4560" Ports [2, 1] Position [1340, 660, 1425, 715] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "4570" Ports [2, 1] Position [1680, 675, 1765, 730] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "5792" Ports [9, 1] Position [830, 590, 900, 710] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "7842" Ports [2, 1] Position [530, 1215, 615, 1270] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical15" SID "7856" Ports [2, 1] Position [1045, 530, 1130, 585] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4551" Ports [2, 1] Position [530, 855, 615, 910] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4552" Ports [2, 1] Position [530, 915, 615, 970] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4553" Ports [2, 1] Position [530, 975, 615, 1030] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "4554" Ports [2, 1] Position [530, 1035, 615, 1090] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "4555" Ports [2, 1] Position [530, 1095, 615, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "4556" Ports [2, 1] Position [530, 1155, 615, 1210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "4557" Ports [9, 1] Position [830, 410, 900, 530] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,288f8c4d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','" "COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "4559" Ports [9, 1] Position [830, 765, 900, 885] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "4561" Ports [2, 1] Position [1510, 665, 1545, 765] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "4562" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "4563" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "4564" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4565" Ports [1, 1] Position [240, 86, 270, 104] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4566" Ports [1, 1] Position [240, 101, 270, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "4567" Ports [3, 1] Position [305, 71, 350, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4568" Position [375, 88, 405, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "bool2" SID "5301" Ports [1, 1] Position [1605, 706, 1645, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "4571" Position [1810, 698, 1840, 712] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From9" SrcPort 1 Points [270, 0] Branch { DstBlock "Expression2" DstPort 1 } Branch { Points [0, 555] DstBlock "Logical12" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [260, 0] Branch { DstBlock "Expression1" DstPort 1 } Branch { Points [0, 510] DstBlock "Logical12" DstPort 2 } } Line { SrcBlock "From3" SrcPort 1 Points [250, 0] Branch { DstBlock "Expression3" DstPort 1 } Branch { Points [0, 465] DstBlock "Logical12" DstPort 3 } } Line { SrcBlock "From4" SrcPort 1 Points [240, 0] Branch { DstBlock "Expression4" DstPort 1 } Branch { Points [0, 420] DstBlock "Logical12" DstPort 4 } } Line { SrcBlock "From5" SrcPort 1 Points [230, 0] Branch { DstBlock "Expression6" DstPort 1 } Branch { Points [0, 375] DstBlock "Logical12" DstPort 5 } } Line { SrcBlock "From6" SrcPort 1 Points [220, 0] Branch { DstBlock "Expression5" DstPort 1 } Branch { Points [0, 330] DstBlock "Logical12" DstPort 6 } } Line { SrcBlock "From7" SrcPort 1 Points [210, 0] Branch { DstBlock "Expression7" DstPort 1 } Branch { Points [0, 285] DstBlock "Logical12" DstPort 7 } } Line { SrcBlock "From8" SrcPort 1 Points [200, 0] Branch { DstBlock "Expression8" DstPort 1 } Branch { Points [0, 240] DstBlock "Logical12" DstPort 8 } } Line { SrcBlock "In0" SrcPort 1 Points [145, 0] Branch { Points [0, 715] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Expression2" DstPort 2 } } Line { SrcBlock "In1" SrcPort 1 Points [135, 0] Branch { DstBlock "Expression1" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "In2" SrcPort 1 Points [125, 0] Branch { DstBlock "Expression3" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "In3" SrcPort 1 Points [115, 0] Branch { DstBlock "Expression4" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "In4" SrcPort 1 Points [105, 0] Branch { DstBlock "Expression6" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "In5" SrcPort 1 Points [95, 0] Branch { DstBlock "Expression5" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "In6" SrcPort 1 Points [85, 0] Branch { DstBlock "Expression7" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "In7" SrcPort 1 Points [75, 0] Branch { DstBlock "Expression8" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical7" DstPort 2 } } Line { SrcBlock "From11" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Expression2" SrcPort 1 Points [85, 0; 0, 360] DstBlock "Logical8" DstPort 1 } Line { SrcBlock "Expression1" SrcPort 1 Points [75, 0; 0, 315] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Expression3" SrcPort 1 Points [65, 0; 0, 270] DstBlock "Logical8" DstPort 3 } Line { SrcBlock "Expression4" SrcPort 1 Points [55, 0; 0, 225] DstBlock "Logical8" DstPort 4 } Line { SrcBlock "Expression6" SrcPort 1 Points [45, 0; 0, 180] DstBlock "Logical8" DstPort 5 } Line { SrcBlock "Expression5" SrcPort 1 Points [35, 0; 0, 135] DstBlock "Logical8" DstPort 6 } Line { SrcBlock "Expression7" SrcPort 1 Points [25, 0; 0, 90] DstBlock "Logical8" DstPort 7 } Line { Labels [1, 0] SrcBlock "Expression8" SrcPort 1 Points [15, 0; 0, 45] DstBlock "Logical8" DstPort 8 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0; 0, -45] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, -90] DstBlock "Logical9" DstPort 3 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -135] DstBlock "Logical9" DstPort 4 } Line { SrcBlock "Logical4" SrcPort 1 Points [45, 0; 0, -180] DstBlock "Logical9" DstPort 5 } Line { SrcBlock "Logical5" SrcPort 1 Points [55, 0; 0, -225] DstBlock "Logical9" DstPort 6 } Line { SrcBlock "Logical6" SrcPort 1 Points [65, 0; 0, -270] DstBlock "Logical9" DstPort 7 } Line { SrcBlock "Logical7" SrcPort 1 Points [75, 0; 0, -315] DstBlock "Logical9" DstPort 8 } Line { SrcBlock "Logical9" SrcPort 1 Points [300, 0; 0, -125] DstBlock "Logical10" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [60, 0] Branch { DstBlock "S-R Latch" DstPort 1 } Branch { Points [0, -55; 75, 0; 0, 55] DstBlock "Logical11" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [15, 0] Branch { Points [0, 65] DstBlock " 1" DstPort 1 } Branch { DstBlock "bool2" DstPort 1 } } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 Points [60, 0; 0, -80] DstBlock "Logical15" DstPort 2 } Line { SrcBlock "Logical15" SrcPort 1 Points [70, 0; 0, 115] DstBlock "Logical10" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 Points [190, 0] Branch { DstBlock "Expression9" DstPort 1 } Branch { Points [0, 195] DstBlock "Logical12" DstPort 9 } } Line { SrcBlock "In8" SrcPort 1 Points [65, 0] Branch { DstBlock "Expression9" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical14" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 Points [60, 0; 0, 75] DstBlock "Logical15" DstPort 1 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Logical14" DstPort 1 } Line { SrcBlock "Logical14" SrcPort 1 Points [85, 0; 0, -360] DstBlock "Logical9" DstPort 9 } Line { SrcBlock "Expression9" SrcPort 1 DstBlock "Logical8" DstPort 9 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical9" DstPort 1 } } } Block { BlockType SubSystem Name "Trigger Output 1" SID "8184" Ports [9, 1] Position [810, 294, 865, 476] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Trigger Output 1" Location [2, 74, 2496, 1419] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" Block { BlockType Inport Name "In0" SID "8185" Position [200, 53, 230, 67] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In1" SID "8186" Position [200, 113, 230, 127] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In2" SID "8187" Position [200, 173, 230, 187] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In3" SID "8188" Position [200, 233, 230, 247] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In4" SID "8189" Position [200, 293, 230, 307] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In5" SID "8190" Position [200, 353, 230, 367] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In6" SID "8191" Position [200, 413, 230, 427] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In7" SID "8192" Position [200, 473, 230, 487] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In8" SID "8193" Position [200, 533, 230, 547] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 1" SID "8194" Position [1625, 768, 1695, 792] ShowName off GotoTag "OUT1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Expression1" SID "8195" Ports [2, 1] Position [530, 80, 615, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression2" SID "8196" Ports [2, 1] Position [530, 20, 615, 75] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression3" SID "8197" Ports [2, 1] Position [530, 140, 615, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression4" SID "8198" Ports [2, 1] Position [530, 200, 615, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression5" SID "8199" Ports [2, 1] Position [530, 320, 615, 375] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression6" SID "8200" Ports [2, 1] Position [530, 260, 615, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression7" SID "8201" Ports [2, 1] Position [530, 380, 615, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression8" SID "8202" Ports [2, 1] Position [530, 440, 615, 495] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression9" SID "8203" Ports [2, 1] Position [530, 500, 615, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8204" Position [1300, 726, 1425, 754] ShowName off GotoTag "OUT1_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "8205" Position [35, 503, 220, 527] ShowName off GotoTag "OUT1_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "8206" Position [35, 738, 220, 762] ShowName off GotoTag "OUT1_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "8207" Position [35, 798, 220, 822] ShowName off GotoTag "OUT1_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "8208" Position [40, 858, 225, 882] ShowName off GotoTag "OUT1_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "8209" Position [40, 918, 225, 942] ShowName off GotoTag "OUT1_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From15" SID "8210" Position [40, 978, 225, 1002] ShowName off GotoTag "OUT1_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "8211" Position [40, 1038, 225, 1062] ShowName off GotoTag "OUT1_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "8212" Position [40, 1098, 225, 1122] ShowName off GotoTag "OUT1_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "8213" Position [40, 1158, 225, 1182] ShowName off GotoTag "OUT1_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "8214" Position [40, 1218, 225, 1242] ShowName off GotoTag "OUT1_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "8215" Position [35, 83, 220, 107] ShowName off GotoTag "OUT1_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "8216" Position [35, 143, 220, 167] ShowName off GotoTag "OUT1_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "8217" Position [35, 203, 220, 227] ShowName off GotoTag "OUT1_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "8218" Position [35, 263, 220, 287] ShowName off GotoTag "OUT1_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "8219" Position [35, 323, 220, 347] ShowName off GotoTag "OUT1_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "8220" Position [35, 383, 220, 407] ShowName off GotoTag "OUT1_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "8221" Position [35, 443, 220, 467] ShowName off GotoTag "OUT1_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "8222" Position [35, 23, 220, 47] ShowName off GotoTag "OUT1_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "8223" Ports [2, 1] Position [530, 735, 615, 790] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8224" Ports [2, 1] Position [530, 795, 615, 850] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "8225" Ports [2, 1] Position [1340, 660, 1425, 715] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "8226" Ports [2, 1] Position [1680, 675, 1765, 730] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "8227" Ports [9, 1] Position [830, 590, 900, 710] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "8228" Ports [2, 1] Position [530, 1215, 615, 1270] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical15" SID "8229" Ports [2, 1] Position [1045, 545, 1130, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8230" Ports [2, 1] Position [530, 855, 615, 910] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8231" Ports [2, 1] Position [530, 915, 615, 970] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8232" Ports [2, 1] Position [530, 975, 615, 1030] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8233" Ports [2, 1] Position [530, 1035, 615, 1090] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "8234" Ports [2, 1] Position [530, 1095, 615, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "8235" Ports [2, 1] Position [530, 1155, 615, 1210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "8236" Ports [9, 1] Position [830, 410, 900, 530] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,288f8c4d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','" "COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "8237" Ports [9, 1] Position [830, 765, 900, 885] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "8238" Ports [2, 1] Position [1510, 665, 1545, 765] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "8239" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "8240" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "8241" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8242" Ports [1, 1] Position [240, 86, 270, 104] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8243" Ports [1, 1] Position [240, 101, 270, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8244" Ports [3, 1] Position [305, 71, 350, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8245" Position [375, 88, 405, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "bool2" SID "8246" Ports [1, 1] Position [1605, 706, 1645, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "8247" Position [1810, 698, 1840, 712] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From9" SrcPort 1 Points [270, 0] Branch { DstBlock "Expression2" DstPort 1 } Branch { Points [0, 555] DstBlock "Logical12" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [260, 0] Branch { DstBlock "Expression1" DstPort 1 } Branch { Points [0, 510] DstBlock "Logical12" DstPort 2 } } Line { SrcBlock "From3" SrcPort 1 Points [250, 0] Branch { DstBlock "Expression3" DstPort 1 } Branch { Points [0, 465] DstBlock "Logical12" DstPort 3 } } Line { SrcBlock "From4" SrcPort 1 Points [240, 0] Branch { DstBlock "Expression4" DstPort 1 } Branch { Points [0, 420] DstBlock "Logical12" DstPort 4 } } Line { SrcBlock "From5" SrcPort 1 Points [230, 0] Branch { DstBlock "Expression6" DstPort 1 } Branch { Points [0, 375] DstBlock "Logical12" DstPort 5 } } Line { SrcBlock "From6" SrcPort 1 Points [220, 0] Branch { DstBlock "Expression5" DstPort 1 } Branch { Points [0, 330] DstBlock "Logical12" DstPort 6 } } Line { SrcBlock "From7" SrcPort 1 Points [210, 0] Branch { DstBlock "Expression7" DstPort 1 } Branch { Points [0, 285] DstBlock "Logical12" DstPort 7 } } Line { SrcBlock "From8" SrcPort 1 Points [200, 0] Branch { DstBlock "Expression8" DstPort 1 } Branch { Points [0, 240] DstBlock "Logical12" DstPort 8 } } Line { SrcBlock "In0" SrcPort 1 Points [145, 0] Branch { Points [0, 715] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Expression2" DstPort 2 } } Line { SrcBlock "In1" SrcPort 1 Points [135, 0] Branch { DstBlock "Expression1" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "In2" SrcPort 1 Points [125, 0] Branch { DstBlock "Expression3" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "In3" SrcPort 1 Points [115, 0] Branch { DstBlock "Expression4" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "In4" SrcPort 1 Points [105, 0] Branch { DstBlock "Expression6" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "In5" SrcPort 1 Points [95, 0] Branch { DstBlock "Expression5" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "In6" SrcPort 1 Points [85, 0] Branch { DstBlock "Expression7" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "In7" SrcPort 1 Points [75, 0] Branch { DstBlock "Expression8" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical7" DstPort 2 } } Line { SrcBlock "From11" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Expression2" SrcPort 1 Points [85, 0; 0, 360] DstBlock "Logical8" DstPort 1 } Line { SrcBlock "Expression1" SrcPort 1 Points [75, 0; 0, 315] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Expression3" SrcPort 1 Points [65, 0; 0, 270] DstBlock "Logical8" DstPort 3 } Line { SrcBlock "Expression4" SrcPort 1 Points [55, 0; 0, 225] DstBlock "Logical8" DstPort 4 } Line { SrcBlock "Expression6" SrcPort 1 Points [45, 0; 0, 180] DstBlock "Logical8" DstPort 5 } Line { SrcBlock "Expression5" SrcPort 1 Points [35, 0; 0, 135] DstBlock "Logical8" DstPort 6 } Line { SrcBlock "Expression7" SrcPort 1 Points [25, 0; 0, 90] DstBlock "Logical8" DstPort 7 } Line { Labels [1, 0] SrcBlock "Expression8" SrcPort 1 Points [15, 0; 0, 45] DstBlock "Logical8" DstPort 8 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0; 0, -45] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, -90] DstBlock "Logical9" DstPort 3 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -135] DstBlock "Logical9" DstPort 4 } Line { SrcBlock "Logical4" SrcPort 1 Points [45, 0; 0, -180] DstBlock "Logical9" DstPort 5 } Line { SrcBlock "Logical5" SrcPort 1 Points [55, 0; 0, -225] DstBlock "Logical9" DstPort 6 } Line { SrcBlock "Logical6" SrcPort 1 Points [65, 0; 0, -270] DstBlock "Logical9" DstPort 7 } Line { SrcBlock "Logical7" SrcPort 1 Points [75, 0; 0, -315] DstBlock "Logical9" DstPort 8 } Line { SrcBlock "Logical9" SrcPort 1 Points [300, 0; 0, -125] DstBlock "Logical10" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [60, 0] Branch { DstBlock "S-R Latch" DstPort 1 } Branch { Points [0, -55; 75, 0; 0, 55] DstBlock "Logical11" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [15, 0] Branch { Points [0, 65] DstBlock " 1" DstPort 1 } Branch { DstBlock "bool2" DstPort 1 } } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 Points [60, 0; 0, -65] DstBlock "Logical15" DstPort 2 } Line { SrcBlock "Logical15" SrcPort 1 Points [70, 0; 0, 100] DstBlock "Logical10" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 Points [190, 0] Branch { DstBlock "Expression9" DstPort 1 } Branch { Points [0, 195] DstBlock "Logical12" DstPort 9 } } Line { SrcBlock "In8" SrcPort 1 Points [65, 0] Branch { DstBlock "Expression9" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical14" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 Points [60, 0; 0, 90] DstBlock "Logical15" DstPort 1 } Line { SrcBlock "Expression9" SrcPort 1 DstBlock "Logical8" DstPort 9 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Logical14" DstPort 1 } Line { SrcBlock "Logical14" SrcPort 1 Points [85, 0; 0, -360] DstBlock "Logical9" DstPort 9 } } } Block { BlockType SubSystem Name "Trigger Output 2" SID "8248" Ports [9, 1] Position [810, 494, 865, 676] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Trigger Output 2" Location [2, 74, 2496, 1419] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" Block { BlockType Inport Name "In0" SID "8249" Position [200, 53, 230, 67] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In1" SID "8250" Position [200, 113, 230, 127] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In2" SID "8251" Position [200, 173, 230, 187] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In3" SID "8252" Position [200, 233, 230, 247] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In4" SID "8253" Position [200, 293, 230, 307] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In5" SID "8254" Position [200, 353, 230, 367] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In6" SID "8255" Position [200, 413, 230, 427] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In7" SID "8256" Position [200, 473, 230, 487] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In8" SID "8257" Position [200, 533, 230, 547] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 1" SID "8258" Position [1625, 768, 1695, 792] ShowName off GotoTag "OUT2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Expression1" SID "8259" Ports [2, 1] Position [530, 80, 615, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression2" SID "8260" Ports [2, 1] Position [530, 20, 615, 75] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression3" SID "8261" Ports [2, 1] Position [530, 140, 615, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression4" SID "8262" Ports [2, 1] Position [530, 200, 615, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression5" SID "8263" Ports [2, 1] Position [530, 320, 615, 375] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression6" SID "8264" Ports [2, 1] Position [530, 260, 615, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression7" SID "8265" Ports [2, 1] Position [530, 380, 615, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression8" SID "8266" Ports [2, 1] Position [530, 440, 615, 495] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression9" SID "8267" Ports [2, 1] Position [530, 500, 615, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8268" Position [1300, 726, 1425, 754] ShowName off GotoTag "OUT2_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "8269" Position [35, 503, 220, 527] ShowName off GotoTag "OUT2_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "8270" Position [35, 738, 220, 762] ShowName off GotoTag "OUT2_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "8271" Position [35, 798, 220, 822] ShowName off GotoTag "OUT2_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "8272" Position [40, 858, 225, 882] ShowName off GotoTag "OUT2_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "8273" Position [40, 918, 225, 942] ShowName off GotoTag "OUT2_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From15" SID "8274" Position [40, 978, 225, 1002] ShowName off GotoTag "OUT2_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "8275" Position [40, 1038, 225, 1062] ShowName off GotoTag "OUT2_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "8276" Position [40, 1098, 225, 1122] ShowName off GotoTag "OUT2_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "8277" Position [40, 1158, 225, 1182] ShowName off GotoTag "OUT2_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "8278" Position [40, 1218, 225, 1242] ShowName off GotoTag "OUT2_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "8279" Position [35, 83, 220, 107] ShowName off GotoTag "OUT2_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "8280" Position [35, 143, 220, 167] ShowName off GotoTag "OUT2_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "8281" Position [35, 203, 220, 227] ShowName off GotoTag "OUT2_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "8282" Position [35, 263, 220, 287] ShowName off GotoTag "OUT2_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "8283" Position [35, 323, 220, 347] ShowName off GotoTag "OUT2_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "8284" Position [35, 383, 220, 407] ShowName off GotoTag "OUT2_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "8285" Position [35, 443, 220, 467] ShowName off GotoTag "OUT2_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "8286" Position [35, 23, 220, 47] ShowName off GotoTag "OUT2_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "8287" Ports [2, 1] Position [530, 735, 615, 790] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8288" Ports [2, 1] Position [530, 795, 615, 850] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "8289" Ports [2, 1] Position [1340, 660, 1425, 715] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "8290" Ports [2, 1] Position [1680, 675, 1765, 730] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "8291" Ports [9, 1] Position [830, 590, 900, 710] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "8292" Ports [2, 1] Position [530, 1215, 615, 1270] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical15" SID "8293" Ports [2, 1] Position [1045, 545, 1130, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8294" Ports [2, 1] Position [530, 855, 615, 910] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8295" Ports [2, 1] Position [530, 915, 615, 970] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8296" Ports [2, 1] Position [530, 975, 615, 1030] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8297" Ports [2, 1] Position [530, 1035, 615, 1090] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "8298" Ports [2, 1] Position [530, 1095, 615, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "8299" Ports [2, 1] Position [530, 1155, 615, 1210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "8300" Ports [9, 1] Position [830, 410, 900, 530] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,288f8c4d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','" "COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "8301" Ports [9, 1] Position [830, 765, 900, 885] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "8302" Ports [2, 1] Position [1510, 665, 1545, 765] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "8303" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "8304" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "8305" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8306" Ports [1, 1] Position [240, 86, 270, 104] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8307" Ports [1, 1] Position [240, 101, 270, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8308" Ports [3, 1] Position [305, 71, 350, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8309" Position [375, 88, 405, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "bool2" SID "8310" Ports [1, 1] Position [1605, 706, 1645, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "8311" Position [1810, 698, 1840, 712] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From9" SrcPort 1 Points [270, 0] Branch { DstBlock "Expression2" DstPort 1 } Branch { Points [0, 555] DstBlock "Logical12" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [260, 0] Branch { DstBlock "Expression1" DstPort 1 } Branch { Points [0, 510] DstBlock "Logical12" DstPort 2 } } Line { SrcBlock "From3" SrcPort 1 Points [250, 0] Branch { DstBlock "Expression3" DstPort 1 } Branch { Points [0, 465] DstBlock "Logical12" DstPort 3 } } Line { SrcBlock "From4" SrcPort 1 Points [240, 0] Branch { DstBlock "Expression4" DstPort 1 } Branch { Points [0, 420] DstBlock "Logical12" DstPort 4 } } Line { SrcBlock "From5" SrcPort 1 Points [230, 0] Branch { DstBlock "Expression6" DstPort 1 } Branch { Points [0, 375] DstBlock "Logical12" DstPort 5 } } Line { SrcBlock "From6" SrcPort 1 Points [220, 0] Branch { DstBlock "Expression5" DstPort 1 } Branch { Points [0, 330] DstBlock "Logical12" DstPort 6 } } Line { SrcBlock "From7" SrcPort 1 Points [210, 0] Branch { DstBlock "Expression7" DstPort 1 } Branch { Points [0, 285] DstBlock "Logical12" DstPort 7 } } Line { SrcBlock "From8" SrcPort 1 Points [200, 0] Branch { DstBlock "Expression8" DstPort 1 } Branch { Points [0, 240] DstBlock "Logical12" DstPort 8 } } Line { SrcBlock "In0" SrcPort 1 Points [145, 0] Branch { Points [0, 715] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Expression2" DstPort 2 } } Line { SrcBlock "In1" SrcPort 1 Points [135, 0] Branch { DstBlock "Expression1" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "In2" SrcPort 1 Points [125, 0] Branch { DstBlock "Expression3" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "In3" SrcPort 1 Points [115, 0] Branch { DstBlock "Expression4" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "In4" SrcPort 1 Points [105, 0] Branch { DstBlock "Expression6" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "In5" SrcPort 1 Points [95, 0] Branch { DstBlock "Expression5" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "In6" SrcPort 1 Points [85, 0] Branch { DstBlock "Expression7" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "In7" SrcPort 1 Points [75, 0] Branch { DstBlock "Expression8" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical7" DstPort 2 } } Line { SrcBlock "From11" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Expression2" SrcPort 1 Points [85, 0; 0, 360] DstBlock "Logical8" DstPort 1 } Line { SrcBlock "Expression1" SrcPort 1 Points [75, 0; 0, 315] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Expression3" SrcPort 1 Points [65, 0; 0, 270] DstBlock "Logical8" DstPort 3 } Line { SrcBlock "Expression4" SrcPort 1 Points [55, 0; 0, 225] DstBlock "Logical8" DstPort 4 } Line { SrcBlock "Expression6" SrcPort 1 Points [45, 0; 0, 180] DstBlock "Logical8" DstPort 5 } Line { SrcBlock "Expression5" SrcPort 1 Points [35, 0; 0, 135] DstBlock "Logical8" DstPort 6 } Line { SrcBlock "Expression7" SrcPort 1 Points [25, 0; 0, 90] DstBlock "Logical8" DstPort 7 } Line { Labels [1, 0] SrcBlock "Expression8" SrcPort 1 Points [15, 0; 0, 45] DstBlock "Logical8" DstPort 8 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0; 0, -45] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, -90] DstBlock "Logical9" DstPort 3 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -135] DstBlock "Logical9" DstPort 4 } Line { SrcBlock "Logical4" SrcPort 1 Points [45, 0; 0, -180] DstBlock "Logical9" DstPort 5 } Line { SrcBlock "Logical5" SrcPort 1 Points [55, 0; 0, -225] DstBlock "Logical9" DstPort 6 } Line { SrcBlock "Logical6" SrcPort 1 Points [65, 0; 0, -270] DstBlock "Logical9" DstPort 7 } Line { SrcBlock "Logical7" SrcPort 1 Points [75, 0; 0, -315] DstBlock "Logical9" DstPort 8 } Line { SrcBlock "Logical9" SrcPort 1 Points [300, 0; 0, -125] DstBlock "Logical10" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [60, 0] Branch { DstBlock "S-R Latch" DstPort 1 } Branch { Points [0, -55; 75, 0; 0, 55] DstBlock "Logical11" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [15, 0] Branch { Points [0, 65] DstBlock " 1" DstPort 1 } Branch { DstBlock "bool2" DstPort 1 } } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 Points [60, 0; 0, -65] DstBlock "Logical15" DstPort 2 } Line { SrcBlock "Logical15" SrcPort 1 Points [70, 0; 0, 100] DstBlock "Logical10" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 Points [190, 0] Branch { DstBlock "Expression9" DstPort 1 } Branch { Points [0, 195] DstBlock "Logical12" DstPort 9 } } Line { SrcBlock "In8" SrcPort 1 Points [65, 0] Branch { DstBlock "Expression9" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical14" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 Points [60, 0; 0, 90] DstBlock "Logical15" DstPort 1 } Line { SrcBlock "Expression9" SrcPort 1 DstBlock "Logical8" DstPort 9 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Logical14" DstPort 1 } Line { SrcBlock "Logical14" SrcPort 1 Points [85, 0; 0, -360] DstBlock "Logical9" DstPort 9 } } } Block { BlockType SubSystem Name "Trigger Output 3" SID "8312" Ports [9, 1] Position [810, 694, 865, 876] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Trigger Output 3" Location [2, 74, 2496, 1419] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" Block { BlockType Inport Name "In0" SID "8313" Position [200, 53, 230, 67] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In1" SID "8314" Position [200, 113, 230, 127] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In2" SID "8315" Position [200, 173, 230, 187] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In3" SID "8316" Position [200, 233, 230, 247] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In4" SID "8317" Position [200, 293, 230, 307] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In5" SID "8318" Position [200, 353, 230, 367] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In6" SID "8319" Position [200, 413, 230, 427] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In7" SID "8320" Position [200, 473, 230, 487] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In8" SID "8321" Position [200, 533, 230, 547] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 1" SID "8322" Position [1625, 768, 1695, 792] ShowName off GotoTag "OUT3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Expression1" SID "8323" Ports [2, 1] Position [530, 80, 615, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression2" SID "8324" Ports [2, 1] Position [530, 20, 615, 75] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression3" SID "8325" Ports [2, 1] Position [530, 140, 615, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression4" SID "8326" Ports [2, 1] Position [530, 200, 615, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression5" SID "8327" Ports [2, 1] Position [530, 320, 615, 375] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression6" SID "8328" Ports [2, 1] Position [530, 260, 615, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression7" SID "8329" Ports [2, 1] Position [530, 380, 615, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression8" SID "8330" Ports [2, 1] Position [530, 440, 615, 495] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression9" SID "8331" Ports [2, 1] Position [530, 500, 615, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8332" Position [1300, 726, 1425, 754] ShowName off GotoTag "OUT3_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "8333" Position [35, 503, 220, 527] ShowName off GotoTag "OUT3_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "8334" Position [35, 738, 220, 762] ShowName off GotoTag "OUT3_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "8335" Position [35, 798, 220, 822] ShowName off GotoTag "OUT3_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "8336" Position [40, 858, 225, 882] ShowName off GotoTag "OUT3_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "8337" Position [40, 918, 225, 942] ShowName off GotoTag "OUT3_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From15" SID "8338" Position [40, 978, 225, 1002] ShowName off GotoTag "OUT3_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "8339" Position [40, 1038, 225, 1062] ShowName off GotoTag "OUT3_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "8340" Position [40, 1098, 225, 1122] ShowName off GotoTag "OUT3_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "8341" Position [40, 1158, 225, 1182] ShowName off GotoTag "OUT3_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "8342" Position [40, 1218, 225, 1242] ShowName off GotoTag "OUT3_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "8343" Position [35, 83, 220, 107] ShowName off GotoTag "OUT3_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "8344" Position [35, 143, 220, 167] ShowName off GotoTag "OUT3_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "8345" Position [35, 203, 220, 227] ShowName off GotoTag "OUT3_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "8346" Position [35, 263, 220, 287] ShowName off GotoTag "OUT3_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "8347" Position [35, 323, 220, 347] ShowName off GotoTag "OUT3_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "8348" Position [35, 383, 220, 407] ShowName off GotoTag "OUT3_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "8349" Position [35, 443, 220, 467] ShowName off GotoTag "OUT3_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "8350" Position [35, 23, 220, 47] ShowName off GotoTag "OUT3_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "8351" Ports [2, 1] Position [530, 735, 615, 790] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8352" Ports [2, 1] Position [530, 795, 615, 850] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "8353" Ports [2, 1] Position [1340, 660, 1425, 715] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "8354" Ports [2, 1] Position [1680, 675, 1765, 730] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "8355" Ports [9, 1] Position [830, 590, 900, 710] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "8356" Ports [2, 1] Position [530, 1215, 615, 1270] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical15" SID "8357" Ports [2, 1] Position [1045, 545, 1130, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8358" Ports [2, 1] Position [530, 855, 615, 910] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8359" Ports [2, 1] Position [530, 915, 615, 970] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8360" Ports [2, 1] Position [530, 975, 615, 1030] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8361" Ports [2, 1] Position [530, 1035, 615, 1090] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "8362" Ports [2, 1] Position [530, 1095, 615, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "8363" Ports [2, 1] Position [530, 1155, 615, 1210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "8364" Ports [9, 1] Position [830, 410, 900, 530] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,288f8c4d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','" "COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "8365" Ports [9, 1] Position [830, 765, 900, 885] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "8366" Ports [2, 1] Position [1510, 665, 1545, 765] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "8367" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "8368" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "8369" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8370" Ports [1, 1] Position [240, 86, 270, 104] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8371" Ports [1, 1] Position [240, 101, 270, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8372" Ports [3, 1] Position [305, 71, 350, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8373" Position [375, 88, 405, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "bool2" SID "8374" Ports [1, 1] Position [1605, 706, 1645, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "8375" Position [1810, 698, 1840, 712] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From9" SrcPort 1 Points [270, 0] Branch { DstBlock "Expression2" DstPort 1 } Branch { Points [0, 555] DstBlock "Logical12" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [260, 0] Branch { DstBlock "Expression1" DstPort 1 } Branch { Points [0, 510] DstBlock "Logical12" DstPort 2 } } Line { SrcBlock "From3" SrcPort 1 Points [250, 0] Branch { DstBlock "Expression3" DstPort 1 } Branch { Points [0, 465] DstBlock "Logical12" DstPort 3 } } Line { SrcBlock "From4" SrcPort 1 Points [240, 0] Branch { DstBlock "Expression4" DstPort 1 } Branch { Points [0, 420] DstBlock "Logical12" DstPort 4 } } Line { SrcBlock "From5" SrcPort 1 Points [230, 0] Branch { DstBlock "Expression6" DstPort 1 } Branch { Points [0, 375] DstBlock "Logical12" DstPort 5 } } Line { SrcBlock "From6" SrcPort 1 Points [220, 0] Branch { DstBlock "Expression5" DstPort 1 } Branch { Points [0, 330] DstBlock "Logical12" DstPort 6 } } Line { SrcBlock "From7" SrcPort 1 Points [210, 0] Branch { DstBlock "Expression7" DstPort 1 } Branch { Points [0, 285] DstBlock "Logical12" DstPort 7 } } Line { SrcBlock "From8" SrcPort 1 Points [200, 0] Branch { DstBlock "Expression8" DstPort 1 } Branch { Points [0, 240] DstBlock "Logical12" DstPort 8 } } Line { SrcBlock "In0" SrcPort 1 Points [145, 0] Branch { Points [0, 715] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Expression2" DstPort 2 } } Line { SrcBlock "In1" SrcPort 1 Points [135, 0] Branch { DstBlock "Expression1" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "In2" SrcPort 1 Points [125, 0] Branch { DstBlock "Expression3" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "In3" SrcPort 1 Points [115, 0] Branch { DstBlock "Expression4" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "In4" SrcPort 1 Points [105, 0] Branch { DstBlock "Expression6" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "In5" SrcPort 1 Points [95, 0] Branch { DstBlock "Expression5" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "In6" SrcPort 1 Points [85, 0] Branch { DstBlock "Expression7" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "In7" SrcPort 1 Points [75, 0] Branch { DstBlock "Expression8" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical7" DstPort 2 } } Line { SrcBlock "From11" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Expression2" SrcPort 1 Points [85, 0; 0, 360] DstBlock "Logical8" DstPort 1 } Line { SrcBlock "Expression1" SrcPort 1 Points [75, 0; 0, 315] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Expression3" SrcPort 1 Points [65, 0; 0, 270] DstBlock "Logical8" DstPort 3 } Line { SrcBlock "Expression4" SrcPort 1 Points [55, 0; 0, 225] DstBlock "Logical8" DstPort 4 } Line { SrcBlock "Expression6" SrcPort 1 Points [45, 0; 0, 180] DstBlock "Logical8" DstPort 5 } Line { SrcBlock "Expression5" SrcPort 1 Points [35, 0; 0, 135] DstBlock "Logical8" DstPort 6 } Line { SrcBlock "Expression7" SrcPort 1 Points [25, 0; 0, 90] DstBlock "Logical8" DstPort 7 } Line { Labels [1, 0] SrcBlock "Expression8" SrcPort 1 Points [15, 0; 0, 45] DstBlock "Logical8" DstPort 8 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0; 0, -45] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, -90] DstBlock "Logical9" DstPort 3 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -135] DstBlock "Logical9" DstPort 4 } Line { SrcBlock "Logical4" SrcPort 1 Points [45, 0; 0, -180] DstBlock "Logical9" DstPort 5 } Line { SrcBlock "Logical5" SrcPort 1 Points [55, 0; 0, -225] DstBlock "Logical9" DstPort 6 } Line { SrcBlock "Logical6" SrcPort 1 Points [65, 0; 0, -270] DstBlock "Logical9" DstPort 7 } Line { SrcBlock "Logical7" SrcPort 1 Points [75, 0; 0, -315] DstBlock "Logical9" DstPort 8 } Line { SrcBlock "Logical9" SrcPort 1 Points [300, 0; 0, -125] DstBlock "Logical10" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [60, 0] Branch { DstBlock "S-R Latch" DstPort 1 } Branch { Points [0, -55; 75, 0; 0, 55] DstBlock "Logical11" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [15, 0] Branch { Points [0, 65] DstBlock " 1" DstPort 1 } Branch { DstBlock "bool2" DstPort 1 } } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 Points [60, 0; 0, -65] DstBlock "Logical15" DstPort 2 } Line { SrcBlock "Logical15" SrcPort 1 Points [70, 0; 0, 100] DstBlock "Logical10" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 Points [190, 0] Branch { DstBlock "Expression9" DstPort 1 } Branch { Points [0, 195] DstBlock "Logical12" DstPort 9 } } Line { SrcBlock "In8" SrcPort 1 Points [65, 0] Branch { DstBlock "Expression9" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical14" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 Points [60, 0; 0, 90] DstBlock "Logical15" DstPort 1 } Line { SrcBlock "Expression9" SrcPort 1 DstBlock "Logical8" DstPort 9 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Logical14" DstPort 1 } Line { SrcBlock "Logical14" SrcPort 1 Points [85, 0; 0, -360] DstBlock "Logical9" DstPort 9 } } } Block { BlockType SubSystem Name "Trigger Output 4" SID "8376" Ports [9, 1] Position [810, 894, 865, 1076] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Trigger Output 4" Location [2, 74, 2496, 1419] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" Block { BlockType Inport Name "In0" SID "8377" Position [200, 53, 230, 67] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In1" SID "8378" Position [200, 113, 230, 127] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In2" SID "8379" Position [200, 173, 230, 187] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In3" SID "8380" Position [200, 233, 230, 247] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In4" SID "8381" Position [200, 293, 230, 307] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In5" SID "8382" Position [200, 353, 230, 367] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In6" SID "8383" Position [200, 413, 230, 427] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In7" SID "8384" Position [200, 473, 230, 487] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In8" SID "8385" Position [200, 533, 230, 547] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 1" SID "8386" Position [1625, 768, 1695, 792] ShowName off GotoTag "OUT4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Expression1" SID "8387" Ports [2, 1] Position [530, 80, 615, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression2" SID "8388" Ports [2, 1] Position [530, 20, 615, 75] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression3" SID "8389" Ports [2, 1] Position [530, 140, 615, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression4" SID "8390" Ports [2, 1] Position [530, 200, 615, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression5" SID "8391" Ports [2, 1] Position [530, 320, 615, 375] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression6" SID "8392" Ports [2, 1] Position [530, 260, 615, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression7" SID "8393" Ports [2, 1] Position [530, 380, 615, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression8" SID "8394" Ports [2, 1] Position [530, 440, 615, 495] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression9" SID "8395" Ports [2, 1] Position [530, 500, 615, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8396" Position [1300, 726, 1425, 754] ShowName off GotoTag "OUT4_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "8397" Position [35, 503, 220, 527] ShowName off GotoTag "OUT4_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "8398" Position [35, 738, 220, 762] ShowName off GotoTag "OUT4_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "8399" Position [35, 798, 220, 822] ShowName off GotoTag "OUT4_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "8400" Position [40, 858, 225, 882] ShowName off GotoTag "OUT4_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "8401" Position [40, 918, 225, 942] ShowName off GotoTag "OUT4_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From15" SID "8402" Position [40, 978, 225, 1002] ShowName off GotoTag "OUT4_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "8403" Position [40, 1038, 225, 1062] ShowName off GotoTag "OUT4_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "8404" Position [40, 1098, 225, 1122] ShowName off GotoTag "OUT4_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "8405" Position [40, 1158, 225, 1182] ShowName off GotoTag "OUT4_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "8406" Position [40, 1218, 225, 1242] ShowName off GotoTag "OUT4_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "8407" Position [35, 83, 220, 107] ShowName off GotoTag "OUT4_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "8408" Position [35, 143, 220, 167] ShowName off GotoTag "OUT4_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "8409" Position [35, 203, 220, 227] ShowName off GotoTag "OUT4_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "8410" Position [35, 263, 220, 287] ShowName off GotoTag "OUT4_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "8411" Position [35, 323, 220, 347] ShowName off GotoTag "OUT4_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "8412" Position [35, 383, 220, 407] ShowName off GotoTag "OUT4_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "8413" Position [35, 443, 220, 467] ShowName off GotoTag "OUT4_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "8414" Position [35, 23, 220, 47] ShowName off GotoTag "OUT4_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "8415" Ports [2, 1] Position [530, 735, 615, 790] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8416" Ports [2, 1] Position [530, 795, 615, 850] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "8417" Ports [2, 1] Position [1340, 660, 1425, 715] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "8418" Ports [2, 1] Position [1680, 675, 1765, 730] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "8419" Ports [9, 1] Position [830, 590, 900, 710] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "8420" Ports [2, 1] Position [530, 1215, 615, 1270] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical15" SID "8421" Ports [2, 1] Position [1045, 545, 1130, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8422" Ports [2, 1] Position [530, 855, 615, 910] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8423" Ports [2, 1] Position [530, 915, 615, 970] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8424" Ports [2, 1] Position [530, 975, 615, 1030] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8425" Ports [2, 1] Position [530, 1035, 615, 1090] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "8426" Ports [2, 1] Position [530, 1095, 615, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "8427" Ports [2, 1] Position [530, 1155, 615, 1210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "8428" Ports [9, 1] Position [830, 410, 900, 530] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,288f8c4d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','" "COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "8429" Ports [9, 1] Position [830, 765, 900, 885] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "8430" Ports [2, 1] Position [1510, 665, 1545, 765] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "8431" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "8432" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "8433" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8434" Ports [1, 1] Position [240, 86, 270, 104] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8435" Ports [1, 1] Position [240, 101, 270, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8436" Ports [3, 1] Position [305, 71, 350, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8437" Position [375, 88, 405, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "bool2" SID "8438" Ports [1, 1] Position [1605, 706, 1645, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "8439" Position [1810, 698, 1840, 712] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From9" SrcPort 1 Points [270, 0] Branch { DstBlock "Expression2" DstPort 1 } Branch { Points [0, 555] DstBlock "Logical12" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [260, 0] Branch { DstBlock "Expression1" DstPort 1 } Branch { Points [0, 510] DstBlock "Logical12" DstPort 2 } } Line { SrcBlock "From3" SrcPort 1 Points [250, 0] Branch { DstBlock "Expression3" DstPort 1 } Branch { Points [0, 465] DstBlock "Logical12" DstPort 3 } } Line { SrcBlock "From4" SrcPort 1 Points [240, 0] Branch { DstBlock "Expression4" DstPort 1 } Branch { Points [0, 420] DstBlock "Logical12" DstPort 4 } } Line { SrcBlock "From5" SrcPort 1 Points [230, 0] Branch { DstBlock "Expression6" DstPort 1 } Branch { Points [0, 375] DstBlock "Logical12" DstPort 5 } } Line { SrcBlock "From6" SrcPort 1 Points [220, 0] Branch { DstBlock "Expression5" DstPort 1 } Branch { Points [0, 330] DstBlock "Logical12" DstPort 6 } } Line { SrcBlock "From7" SrcPort 1 Points [210, 0] Branch { DstBlock "Expression7" DstPort 1 } Branch { Points [0, 285] DstBlock "Logical12" DstPort 7 } } Line { SrcBlock "From8" SrcPort 1 Points [200, 0] Branch { DstBlock "Expression8" DstPort 1 } Branch { Points [0, 240] DstBlock "Logical12" DstPort 8 } } Line { SrcBlock "In0" SrcPort 1 Points [145, 0] Branch { Points [0, 715] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Expression2" DstPort 2 } } Line { SrcBlock "In1" SrcPort 1 Points [135, 0] Branch { DstBlock "Expression1" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "In2" SrcPort 1 Points [125, 0] Branch { DstBlock "Expression3" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "In3" SrcPort 1 Points [115, 0] Branch { DstBlock "Expression4" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "In4" SrcPort 1 Points [105, 0] Branch { DstBlock "Expression6" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "In5" SrcPort 1 Points [95, 0] Branch { DstBlock "Expression5" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "In6" SrcPort 1 Points [85, 0] Branch { DstBlock "Expression7" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "In7" SrcPort 1 Points [75, 0] Branch { DstBlock "Expression8" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical7" DstPort 2 } } Line { SrcBlock "From11" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Expression2" SrcPort 1 Points [85, 0; 0, 360] DstBlock "Logical8" DstPort 1 } Line { SrcBlock "Expression1" SrcPort 1 Points [75, 0; 0, 315] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Expression3" SrcPort 1 Points [65, 0; 0, 270] DstBlock "Logical8" DstPort 3 } Line { SrcBlock "Expression4" SrcPort 1 Points [55, 0; 0, 225] DstBlock "Logical8" DstPort 4 } Line { SrcBlock "Expression6" SrcPort 1 Points [45, 0; 0, 180] DstBlock "Logical8" DstPort 5 } Line { SrcBlock "Expression5" SrcPort 1 Points [35, 0; 0, 135] DstBlock "Logical8" DstPort 6 } Line { SrcBlock "Expression7" SrcPort 1 Points [25, 0; 0, 90] DstBlock "Logical8" DstPort 7 } Line { Labels [1, 0] SrcBlock "Expression8" SrcPort 1 Points [15, 0; 0, 45] DstBlock "Logical8" DstPort 8 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0; 0, -45] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, -90] DstBlock "Logical9" DstPort 3 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -135] DstBlock "Logical9" DstPort 4 } Line { SrcBlock "Logical4" SrcPort 1 Points [45, 0; 0, -180] DstBlock "Logical9" DstPort 5 } Line { SrcBlock "Logical5" SrcPort 1 Points [55, 0; 0, -225] DstBlock "Logical9" DstPort 6 } Line { SrcBlock "Logical6" SrcPort 1 Points [65, 0; 0, -270] DstBlock "Logical9" DstPort 7 } Line { SrcBlock "Logical7" SrcPort 1 Points [75, 0; 0, -315] DstBlock "Logical9" DstPort 8 } Line { SrcBlock "Logical9" SrcPort 1 Points [300, 0; 0, -125] DstBlock "Logical10" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [60, 0] Branch { DstBlock "S-R Latch" DstPort 1 } Branch { Points [0, -55; 75, 0; 0, 55] DstBlock "Logical11" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [15, 0] Branch { Points [0, 65] DstBlock " 1" DstPort 1 } Branch { DstBlock "bool2" DstPort 1 } } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 Points [60, 0; 0, -65] DstBlock "Logical15" DstPort 2 } Line { SrcBlock "Logical15" SrcPort 1 Points [70, 0; 0, 100] DstBlock "Logical10" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 Points [190, 0] Branch { DstBlock "Expression9" DstPort 1 } Branch { Points [0, 195] DstBlock "Logical12" DstPort 9 } } Line { SrcBlock "In8" SrcPort 1 Points [65, 0] Branch { DstBlock "Expression9" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical14" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 Points [60, 0; 0, 90] DstBlock "Logical15" DstPort 1 } Line { SrcBlock "Expression9" SrcPort 1 DstBlock "Logical8" DstPort 9 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Logical14" DstPort 1 } Line { SrcBlock "Logical14" SrcPort 1 Points [85, 0; 0, -360] DstBlock "Logical9" DstPort 9 } } } Block { BlockType SubSystem Name "Trigger Output 5" SID "8440" Ports [9, 1] Position [810, 1094, 865, 1276] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Trigger Output 5" Location [2, 74, 2496, 1419] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" Block { BlockType Inport Name "In0" SID "8441" Position [200, 53, 230, 67] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In1" SID "8442" Position [200, 113, 230, 127] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In2" SID "8443" Position [200, 173, 230, 187] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In3" SID "8444" Position [200, 233, 230, 247] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In4" SID "8445" Position [200, 293, 230, 307] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In5" SID "8446" Position [200, 353, 230, 367] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In6" SID "8447" Position [200, 413, 230, 427] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In7" SID "8448" Position [200, 473, 230, 487] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "In8" SID "8449" Position [200, 533, 230, 547] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name " 1" SID "8450" Position [1625, 768, 1695, 792] ShowName off GotoTag "OUT5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Expression1" SID "8451" Ports [2, 1] Position [530, 80, 615, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression2" SID "8452" Ports [2, 1] Position [530, 20, 615, 75] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression3" SID "8453" Ports [2, 1] Position [530, 140, 615, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression4" SID "8454" Ports [2, 1] Position [530, 200, 615, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression5" SID "8455" Ports [2, 1] Position [530, 320, 615, 375] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression6" SID "8456" Ports [2, 1] Position [530, 260, 615, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression7" SID "8457" Ports [2, 1] Position [530, 380, 615, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression8" SID "8458" Ports [2, 1] Position [530, 440, 615, 495] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Expression9" SID "8459" Ports [2, 1] Position [530, 500, 615, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Expression" SourceType "Xilinx Bitwise Expression Evaluator Block" expression "~a | (a & b)" align_bp on en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "expr" sg_icon_stat "85,55,2,1,white,blue,0,f493111b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf~a" " | (a & b)','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8460" Position [1300, 726, 1425, 754] ShowName off GotoTag "OUT5_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "8461" Position [35, 503, 220, 527] ShowName off GotoTag "OUT5_AND_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "8462" Position [35, 738, 220, 762] ShowName off GotoTag "OUT5_OR_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "8463" Position [35, 798, 220, 822] ShowName off GotoTag "OUT5_OR_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "8464" Position [40, 858, 225, 882] ShowName off GotoTag "OUT5_OR_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "8465" Position [40, 918, 225, 942] ShowName off GotoTag "OUT5_OR_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From15" SID "8466" Position [40, 978, 225, 1002] ShowName off GotoTag "OUT5_OR_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "8467" Position [40, 1038, 225, 1062] ShowName off GotoTag "OUT5_OR_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "8468" Position [40, 1098, 225, 1122] ShowName off GotoTag "OUT5_OR_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "8469" Position [40, 1158, 225, 1182] ShowName off GotoTag "OUT5_OR_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "8470" Position [40, 1218, 225, 1242] ShowName off GotoTag "OUT5_OR_USE_IN8" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "8471" Position [35, 83, 220, 107] ShowName off GotoTag "OUT5_AND_USE_IN1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "8472" Position [35, 143, 220, 167] ShowName off GotoTag "OUT5_AND_USE_IN2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "8473" Position [35, 203, 220, 227] ShowName off GotoTag "OUT5_AND_USE_IN3" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "8474" Position [35, 263, 220, 287] ShowName off GotoTag "OUT5_AND_USE_IN4" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "8475" Position [35, 323, 220, 347] ShowName off GotoTag "OUT5_AND_USE_IN5" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "8476" Position [35, 383, 220, 407] ShowName off GotoTag "OUT5_AND_USE_IN6" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "8477" Position [35, 443, 220, 467] ShowName off GotoTag "OUT5_AND_USE_IN7" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "8478" Position [35, 23, 220, 47] ShowName off GotoTag "OUT5_AND_USE_IN0" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "8479" Ports [2, 1] Position [530, 735, 615, 790] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8480" Ports [2, 1] Position [530, 795, 615, 850] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "8481" Ports [2, 1] Position [1340, 660, 1425, 715] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "8482" Ports [2, 1] Position [1680, 675, 1765, 730] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "8483" Ports [9, 1] Position [830, 590, 900, 710] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "8484" Ports [2, 1] Position [530, 1215, 615, 1270] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical15" SID "8485" Ports [2, 1] Position [1045, 545, 1130, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8486" Ports [2, 1] Position [530, 855, 615, 910] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8487" Ports [2, 1] Position [530, 915, 615, 970] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8488" Ports [2, 1] Position [530, 975, 615, 1030] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8489" Ports [2, 1] Position [530, 1035, 615, 1090] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "8490" Ports [2, 1] Position [530, 1095, 615, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "8491" Ports [2, 1] Position [530, 1155, 615, 1210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "85,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91" " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7" "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34" ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1" " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "8492" Ports [9, 1] Position [830, 410, 900, 530] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,288f8c4d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','" "COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "8493" Ports [9, 1] Position [830, 765, 900, 885] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "9" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,120,9,1,white,blue,0,1a52a79d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 120 120 0 ],[0.77 0.82 0." "91 ]);\nplot([0 70 70 0 0 ],[0 0 120 120 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[71.1 71.1 81.1" " 71.1 81.1 81.1 81.1 71.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[61.1 61.1 71.1 71.1 61.1 ],[0.931 0.9" "46 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[51.1 51.1 61.1 61.1 51.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[41.1 41.1 51.1 41.1 51.1 51.1 41.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon " "graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "8494" Ports [2, 1] Position [1510, 665, 1545, 765] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "8495" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "8496" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "8497" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8498" Ports [1, 1] Position [240, 86, 270, 104] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8499" Ports [1, 1] Position [240, 101, 270, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8500" Ports [3, 1] Position [305, 71, 350, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8501" Position [375, 88, 405, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "bool2" SID "8502" Ports [1, 1] Position [1605, 706, 1645, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "8503" Position [1810, 698, 1840, 712] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From9" SrcPort 1 Points [270, 0] Branch { DstBlock "Expression2" DstPort 1 } Branch { Points [0, 555] DstBlock "Logical12" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [260, 0] Branch { DstBlock "Expression1" DstPort 1 } Branch { Points [0, 510] DstBlock "Logical12" DstPort 2 } } Line { SrcBlock "From3" SrcPort 1 Points [250, 0] Branch { DstBlock "Expression3" DstPort 1 } Branch { Points [0, 465] DstBlock "Logical12" DstPort 3 } } Line { SrcBlock "From4" SrcPort 1 Points [240, 0] Branch { DstBlock "Expression4" DstPort 1 } Branch { Points [0, 420] DstBlock "Logical12" DstPort 4 } } Line { SrcBlock "From5" SrcPort 1 Points [230, 0] Branch { DstBlock "Expression6" DstPort 1 } Branch { Points [0, 375] DstBlock "Logical12" DstPort 5 } } Line { SrcBlock "From6" SrcPort 1 Points [220, 0] Branch { DstBlock "Expression5" DstPort 1 } Branch { Points [0, 330] DstBlock "Logical12" DstPort 6 } } Line { SrcBlock "From7" SrcPort 1 Points [210, 0] Branch { DstBlock "Expression7" DstPort 1 } Branch { Points [0, 285] DstBlock "Logical12" DstPort 7 } } Line { SrcBlock "From8" SrcPort 1 Points [200, 0] Branch { DstBlock "Expression8" DstPort 1 } Branch { Points [0, 240] DstBlock "Logical12" DstPort 8 } } Line { SrcBlock "In0" SrcPort 1 Points [145, 0] Branch { Points [0, 715] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Expression2" DstPort 2 } } Line { SrcBlock "In1" SrcPort 1 Points [135, 0] Branch { DstBlock "Expression1" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "In2" SrcPort 1 Points [125, 0] Branch { DstBlock "Expression3" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "In3" SrcPort 1 Points [115, 0] Branch { DstBlock "Expression4" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "In4" SrcPort 1 Points [105, 0] Branch { DstBlock "Expression6" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "In5" SrcPort 1 Points [95, 0] Branch { DstBlock "Expression5" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "In6" SrcPort 1 Points [85, 0] Branch { DstBlock "Expression7" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "In7" SrcPort 1 Points [75, 0] Branch { DstBlock "Expression8" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical7" DstPort 2 } } Line { SrcBlock "From11" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Expression2" SrcPort 1 Points [85, 0; 0, 360] DstBlock "Logical8" DstPort 1 } Line { SrcBlock "Expression1" SrcPort 1 Points [75, 0; 0, 315] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Expression3" SrcPort 1 Points [65, 0; 0, 270] DstBlock "Logical8" DstPort 3 } Line { SrcBlock "Expression4" SrcPort 1 Points [55, 0; 0, 225] DstBlock "Logical8" DstPort 4 } Line { SrcBlock "Expression6" SrcPort 1 Points [45, 0; 0, 180] DstBlock "Logical8" DstPort 5 } Line { SrcBlock "Expression5" SrcPort 1 Points [35, 0; 0, 135] DstBlock "Logical8" DstPort 6 } Line { SrcBlock "Expression7" SrcPort 1 Points [25, 0; 0, 90] DstBlock "Logical8" DstPort 7 } Line { Labels [1, 0] SrcBlock "Expression8" SrcPort 1 Points [15, 0; 0, 45] DstBlock "Logical8" DstPort 8 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0; 0, -45] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, -90] DstBlock "Logical9" DstPort 3 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -135] DstBlock "Logical9" DstPort 4 } Line { SrcBlock "Logical4" SrcPort 1 Points [45, 0; 0, -180] DstBlock "Logical9" DstPort 5 } Line { SrcBlock "Logical5" SrcPort 1 Points [55, 0; 0, -225] DstBlock "Logical9" DstPort 6 } Line { SrcBlock "Logical6" SrcPort 1 Points [65, 0; 0, -270] DstBlock "Logical9" DstPort 7 } Line { SrcBlock "Logical7" SrcPort 1 Points [75, 0; 0, -315] DstBlock "Logical9" DstPort 8 } Line { SrcBlock "Logical9" SrcPort 1 Points [300, 0; 0, -125] DstBlock "Logical10" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [60, 0] Branch { DstBlock "S-R Latch" DstPort 1 } Branch { Points [0, -55; 75, 0; 0, 55] DstBlock "Logical11" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [15, 0] Branch { Points [0, 65] DstBlock " 1" DstPort 1 } Branch { DstBlock "bool2" DstPort 1 } } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 Points [60, 0; 0, -65] DstBlock "Logical15" DstPort 2 } Line { SrcBlock "Logical15" SrcPort 1 Points [70, 0; 0, 100] DstBlock "Logical10" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 Points [190, 0] Branch { DstBlock "Expression9" DstPort 1 } Branch { Points [0, 195] DstBlock "Logical12" DstPort 9 } } Line { SrcBlock "In8" SrcPort 1 Points [65, 0] Branch { DstBlock "Expression9" DstPort 2 } Branch { Points [0, 715] DstBlock "Logical14" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 Points [60, 0; 0, 90] DstBlock "Logical15" DstPort 1 } Line { SrcBlock "Expression9" SrcPort 1 DstBlock "Logical8" DstPort 9 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Logical14" DstPort 1 } Line { SrcBlock "Logical14" SrcPort 1 Points [85, 0; 0, -360] DstBlock "Logical9" DstPort 9 } } } Block { BlockType SubSystem Name "Trigger Sources" SID "6719" Ports [0, 9] Position [530, 94, 585, 276] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Trigger Sources" Location [392, 128, 2309, 1238] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType SubSystem Name "AGC" SID "2420" Ports [0, 1] Position [25, 226, 70, 264] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "AGC" Location [539, 107, 2020, 1332] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Constant Name "Constant2" SID "8628" Position [15, 60, 45, 90] ShowName off Value "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "agc_done_in" SID "6747" Ports [1, 1] Position [90, 65, 155, 85] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Trigger" SID "2643" Position [190, 68, 220, 82] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "agc_done_in" SrcPort 1 DstBlock "Trigger" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "agc_done_in" DstPort 1 } } } Block { BlockType Reference Name "Addressable Shift Register" SID "8881" Ports [2, 1] Position [540, 45, 650, 105] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the outp" "ut port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, mu" "ltiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0." "91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38.88 38.88 " "46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38.88 38.88 30.8" "8 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1" ",'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMME" "NT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register2" SID "7609" Ports [2, 1] Position [540, 245, 650, 305] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the outp" "ut port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, mu" "ltiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0." "91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38.88 38.88 " "46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38.88 38.88 30.8" "8 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1" ",'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMME" "NT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register4" SID "3563" Ports [2, 1] Position [545, 455, 655, 515] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the outp" "ut port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, mu" "ltiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0." "91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38.88 38.88 " "46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38.88 38.88 30.8" "8 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1" ",'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMME" "NT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register5" SID "3565" Ports [2, 1] Position [545, 580, 655, 640] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the outp" "ut port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, mu" "ltiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0." "91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38.88 38.88 " "46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38.88 38.88 30.8" "8 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1" ",'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMME" "NT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register6" SID "3567" Ports [2, 1] Position [545, 705, 655, 765] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the outp" "ut port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, mu" "ltiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0." "91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38.88 38.88 " "46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38.88 38.88 30.8" "8 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1" ",'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMME" "NT: end icon text');" } Block { BlockType Reference Name "Addressable Shift Register7" SID "3569" Ports [2, 1] Position [545, 835, 655, 895] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the outp" "ut port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, mu" "ltiple SRLC16s are cascaded together." infer_latency off depth "32" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" sg_icon_stat "110,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0." "91 ]);\nplot([0 110 110 0 0 ],[0 0 60 60 0 ]);\npatch([37.2 48.76 56.76 64.76 72.76 56.76 45.2 37.2 ],[38.88 38.88 " "46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([45.2 56.76 48.76 37.2 45.2 ],[30.88 30.88 38.88 38.88 30.8" "8 ],[0.931 0.946 0.973 ]);\npatch([37.2 48.76 56.76 45.2 37.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[45.2 72.76 64.76 56.76 48.76 37.2 45.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1" ",'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMME" "NT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "8749" Ports [0, 1] Position [600, 977, 655, 1003] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91" " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1" " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Debug 0" SID "3617" Ports [0, 1] Position [25, 436, 70, 474] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Debug 0" Location [539, 107, 2020, 1332] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "156" Block { BlockType From Name "From" SID "3631" Position [380, 83, 510, 107] GotoTag "Debug_0_Debounce" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "3632" Ports [4, 1] Position [435, 191, 505, 564] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,373,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 373 373 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 373 373 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[19" "7.1 197.1 207.1 197.1 207.1 207.1 207.1 197.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[187.1 187.1 1" "97.1 197.1 187.1 ],[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[177.1 177.1 187.1 187.1 177.1 " "],[1 1 1 ]);\npatch([22.75 57.2 47.2 37.2 27.2 12.75 22.75 ],[167.1 167.1 177.1 167.1 177.1 177.1 167.1 ],[0.93" "1 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "3626" Ports [3, 1] Position [550, 78, 595, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32" " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6" "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 " "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6" "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol" "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Register" SID "7050" Ports [1, 1] Position [245, 102, 305, 158] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.8" "8 36.88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.8" "8 36.88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1" " 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3627" Ports [1, 1] Position [322, 160, 378, 220] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3628" Ports [1, 1] Position [322, 255, 378, 315] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "3629" Ports [1, 1] Position [322, 345, 378, 405] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "3630" Ports [1, 1] Position [322, 445, 378, 505] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Step Name "Step" SID "6031" Position [65, 115, 95, 145] Time "50" SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "debug_0_in" SID "3625" Ports [1, 1] Position [155, 120, 220, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Trigger" SID "3618" Position [750, 123, 780, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Trigger" DstPort 1 } Line { SrcBlock "debug_0_in" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [0, 10] Branch { DstBlock "Register2" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [0, 10] Branch { DstBlock "Logical" DstPort 2 } Branch { DstBlock "Register3" DstPort 1 } } Line { SrcBlock "Register3" SrcPort 1 Points [0, 15] Branch { DstBlock "Register4" DstPort 1 } Branch { Labels [1, 0] DstBlock "Logical" DstPort 3 } } Line { SrcBlock "From" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 Points [0, 10] DstBlock "Logical" DstPort 4 } Line { SrcBlock "Logical" SrcPort 1 Points [10, 0; 0, -215] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Step" SrcPort 1 DstBlock "debug_0_in" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [40, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { DstBlock "Register1" DstPort 1 } } } } Block { BlockType SubSystem Name "Debug 1" SID "3633" Ports [0, 1] Position [25, 561, 70, 599] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Debug 1" Location [261, 149, 1966, 1210] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "156" Block { BlockType Constant Name "Constant2" SID "8629" Position [65, 115, 95, 145] ShowName off Value "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From" SID "3634" Position [380, 83, 510, 107] GotoTag "Debug_1_Debounce" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "3635" Ports [4, 1] Position [435, 206, 505, 579] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,373,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 373 373 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 373 373 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[19" "7.1 197.1 207.1 197.1 207.1 207.1 207.1 197.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[187.1 187.1 1" "97.1 197.1 187.1 ],[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[177.1 177.1 187.1 187.1 177.1 " "],[1 1 1 ]);\npatch([22.75 57.2 47.2 37.2 27.2 12.75 22.75 ],[167.1 167.1 177.1 167.1 177.1 177.1 167.1 ],[0.93" "1 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "3636" Ports [3, 1] Position [550, 78, 595, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32" " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6" "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 " "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6" "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol" "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Register" SID "7051" Ports [1, 1] Position [245, 102, 305, 158] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.8" "8 36.88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.8" "8 36.88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1" " 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3637" Ports [1, 1] Position [322, 175, 378, 235] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3638" Ports [1, 1] Position [322, 270, 378, 330] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "3639" Ports [1, 1] Position [322, 365, 378, 425] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "3640" Ports [1, 1] Position [322, 465, 378, 525] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "debug_1_in" SID "3641" Ports [1, 1] Position [155, 120, 220, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Trigger" SID "3642" Position [750, 123, 780, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Logical" SrcPort 1 Points [10, 0; 0, -230] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Register4" SrcPort 1 Points [0, 5] DstBlock "Logical" DstPort 4 } Line { SrcBlock "From" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 Points [0, 10] Branch { DstBlock "Logical" DstPort 3 } Branch { DstBlock "Register4" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [0, 10] Branch { DstBlock "Logical" DstPort 2 } Branch { DstBlock "Register3" DstPort 1 } } Line { SrcBlock "Register1" SrcPort 1 Points [0, 10] Branch { DstBlock "Logical" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "debug_1_in" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Trigger" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [40, 0] Branch { DstBlock "Register1" DstPort 1 } Branch { DstBlock "Mux" DstPort 2 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "debug_1_in" DstPort 1 } } } Block { BlockType SubSystem Name "Debug 2" SID "3643" Ports [0, 1] Position [25, 686, 70, 724] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Debug 2" Location [249, 290, 2094, 1299] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "156" Block { BlockType Constant Name "Constant2" SID "8630" Position [60, 115, 90, 145] ShowName off Value "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From" SID "3644" Position [415, 83, 545, 107] GotoTag "Debug_2_Debounce" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "3645" Ports [4, 1] Position [470, 211, 540, 584] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,373,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 373 373 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 373 373 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[19" "7.1 197.1 207.1 197.1 207.1 207.1 207.1 197.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[187.1 187.1 1" "97.1 197.1 187.1 ],[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[177.1 177.1 187.1 187.1 177.1 " "],[1 1 1 ]);\npatch([22.75 57.2 47.2 37.2 27.2 12.75 22.75 ],[167.1 167.1 177.1 167.1 177.1 177.1 167.1 ],[0.93" "1 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "3646" Ports [3, 1] Position [585, 78, 630, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32" " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6" "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 " "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6" "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol" "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Register" SID "7052" Ports [1, 1] Position [265, 102, 325, 158] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.8" "8 36.88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.8" "8 36.88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1" " 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3647" Ports [1, 1] Position [357, 185, 413, 245] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3648" Ports [1, 1] Position [357, 275, 413, 335] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "3649" Ports [1, 1] Position [357, 365, 413, 425] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "3650" Ports [1, 1] Position [357, 465, 413, 525] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "debug_2_in" SID "3651" Ports [1, 1] Position [155, 120, 220, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Trigger" SID "3652" Position [785, 123, 815, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Trigger" DstPort 1 } Line { SrcBlock "debug_2_in" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [0, 5] Branch { DstBlock "Register2" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [0, 10] Branch { DstBlock "Register3" DstPort 1 } Branch { DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Register3" SrcPort 1 Points [0, 15] Branch { DstBlock "Register4" DstPort 1 } Branch { DstBlock "Logical" DstPort 3 } } Line { SrcBlock "From" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 Points [0, 10] DstBlock "Logical" DstPort 4 } Line { SrcBlock "Logical" SrcPort 1 Points [10, 0; 0, -235] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Register" SrcPort 1 Points [55, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { DstBlock "Register1" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "debug_2_in" DstPort 1 } } } Block { BlockType SubSystem Name "Debug 3" SID "3653" Ports [0, 1] Position [25, 816, 70, 854] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Debug 3" Location [52, 224, 1806, 1248] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "156" Block { BlockType Constant Name "Constant2" SID "8631" Position [60, 115, 90, 145] ShowName off Value "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From" SID "3654" Position [405, 83, 535, 107] GotoTag "Debug_3_Debounce" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "3655" Ports [4, 1] Position [465, 201, 535, 574] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "70,373,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 373 373 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 373 373 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[19" "7.1 197.1 207.1 197.1 207.1 207.1 207.1 197.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[187.1 187.1 1" "97.1 197.1 187.1 ],[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[177.1 177.1 187.1 187.1 177.1 " "],[1 1 1 ]);\npatch([22.75 57.2 47.2 37.2 27.2 12.75 22.75 ],[167.1 167.1 177.1 167.1 177.1 177.1 167.1 ],[0.93" "1 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "3656" Ports [3, 1] Position [575, 78, 620, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32" " 23.32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.6" "5 14.65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 " "46.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.6" "6 46.66 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol" "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Register" SID "7053" Ports [1, 1] Position [260, 102, 320, 158] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.8" "8 36.88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.8" "8 36.88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1" " 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3657" Ports [1, 1] Position [347, 170, 403, 230] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3658" Ports [1, 1] Position [347, 270, 403, 330] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "3659" Ports [1, 1] Position [347, 355, 403, 415] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "3660" Ports [1, 1] Position [347, 460, 403, 520] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "56,60,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 56 56 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 56 56 0 0 ],[0 0 60 60 0 ]);\npatch([10.2 21.76 29.76 37.76 45.76 29.76 18.2 10.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([18.2 29.76 21.76 10.2 18.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([10.2 21.76 29.76 18.2 10.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([18.2 45.76 37.76 29.76 21.76 10.2 18.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "debug_3_in" SID "3661" Ports [1, 1] Position [155, 120, 220, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Trigger" SID "3662" Position [775, 123, 805, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Logical" SrcPort 1 Points [5, 0; 0, -225] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Register4" SrcPort 1 Points [0, 5] DstBlock "Logical" DstPort 4 } Line { SrcBlock "From" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 Points [0, 15] Branch { DstBlock "Logical" DstPort 3 } Branch { DstBlock "Register4" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [0, 5] Branch { DstBlock "Logical" DstPort 2 } Branch { DstBlock "Register3" DstPort 1 } } Line { SrcBlock "Register1" SrcPort 1 Points [0, 10] Branch { DstBlock "Logical" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "debug_3_in" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Trigger" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [50, 0] Branch { DstBlock "Register1" DstPort 1 } Branch { DstBlock "Mux" DstPort 2 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "debug_3_in" DstPort 1 } } } Block { BlockType SubSystem Name "Energy" SID "2194" Ports [0, 1] Position [25, 126, 70, 164] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Energy" Location [539, 107, 2020, 1332] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "16LSB" SID "3794" Ports [1, 1] Position [285, 691, 325, 709] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16MSB" SID "3795" Ports [1, 1] Position [285, 731, 325, 749] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "AntA Detector" SID "3796" Ports [3, 1] Position [530, 88, 605, 122] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "AntA Detector" Location [88, 183, 2073, 1280] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "3797" Position [235, 178, 265, 192] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "3798" Position [235, 203, 265, 217] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "En" SID "4174" Position [235, 253, 265, 267] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "ASR" SID "3799" Ports [3, 1] Position [1105, 318, 1145, 392] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the out" "put port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, " "multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en on dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,74,3,1,white,blue,0,f8ea6153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 74 74 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 74 74 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[42.55 42.55 47." "55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[37.55 37.55 42.55 42.55 37." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Busy Detection" SID "3800" Ports [3, 1] Position [780, 438, 890, 482] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Busy Detection" Location [88, 183, 2073, 1280] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "3801" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "3802" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "5545" Position [440, 313, 470, 327] NamePlacement "alternate" Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "3803" Ports [1, 1] Position [995, 216, 1025, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "3804" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Display Name "Display" SID "7032" Ports [1] Position [750, 515, 840, 545] Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display1" SID "7034" Ports [1] Position [750, 565, 840, 595] Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "3805" Position [220, 241, 375, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_energyThresh_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "3806" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out1" SID "7035" Ports [1, 1] Position [645, 570, 705, 590] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type" " Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top l" "evel output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964 0.964 " "0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out6" SID "7033" Ports [1, 1] Position [645, 520, 705, 540] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type" " Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top l" "evel output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964 0.964 " "0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "3807" Ports [1, 1] Position [565, 208, 590, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "5546" Ports [2, 1] Position [510, 231, 540, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3808" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "3809" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "3810" Ports [2, 1] Position [795, 213, 840, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "3811" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "3812" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "3813" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "3814" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3815" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3816" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Busy" SID "3817" Position [1100, 218, 1130, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From3" SrcPort 1 Points [20, 0] Branch { DstBlock "Relational2" DstPort 2 } Branch { Points [0, 280] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [10, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -40; 190, 0; 0, 40] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [35, 0] Branch { Points [330, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Branch { Points [0, 300] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Busy" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 Points [0, -10] DstBlock "Counter1" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 Points [20, 0] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Display1" DstPort 1 } Annotation { Position [1012, 232] } } } Block { BlockType Reference Name "Delay" SID "3818" Ports [1, 1] Position [1020, 318, 1050, 342] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "30,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Display Name "Display" SID "7026" Ports [1] Position [640, 575, 730, 605] Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From1" SID "3819" Position [330, 226, 485, 244] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_RSSIavgLength" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "3820" Position [925, 346, 1080, 364] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out" SID "3821" Ports [1, 1] Position [1165, 139, 1195, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "RAWRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out1" SID "3822" Ports [1, 1] Position [1165, 164, 1195, 176] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "AVGRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "3823" Ports [1, 1] Position [1165, 189, 1195, 201] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "IDLE" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out3" SID "3824" Ports [1, 1] Position [1165, 239, 1195, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "BUSY" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" SID "3825" Ports [1, 1] Position [1165, 264, 1195, 276] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "DET" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out5" SID "3826" Ports [1, 1] Position [1165, 214, 1195, 226] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "IDLE DLY" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out6" SID "7027" Ports [1, 1] Position [535, 580, 595, 600] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Sim" "ulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level o" "utput ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964 0.964 0.964 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType SubSystem Name "Idle Detection" SID "3827" Ports [3, 1] Position [780, 318, 890, 362] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Idle Detection" Location [88, 183, 2073, 1280] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "3828" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "3829" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "5543" Position [445, 313, 475, 327] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "3830" Ports [1, 1] Position [965, 216, 995, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "3831" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Display Name "Display" SID "7028" Ports [1] Position [825, 500, 915, 530] Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display1" SID "7030" Ports [1] Position [830, 550, 920, 580] Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From1" SID "3832" Position [215, 241, 370, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_energyThresh_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "3833" Position [215, 271, 370, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out1" SID "7031" Ports [1, 1] Position [725, 555, 785, 575] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type" " Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top l" "evel output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964 0.964 " "0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out6" SID "7029" Ports [1, 1] Position [720, 505, 780, 525] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type" " Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top l" "evel output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964 0.964 " "0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "3834" Ports [1, 1] Position [570, 208, 595, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "5544" Ports [2, 1] Position [515, 231, 545, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3835" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "3836" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "ab" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "3838" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "3839" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "3840" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "3841" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3842" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3843" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "Idle" SID "3844" Position [1050, 218, 1080, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Idle" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 Points [15, 0] Branch { Points [355, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Branch { Points [0, 285] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -30; 190, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 Points [25, 0] Branch { DstBlock "Relational2" DstPort 2 } Branch { Points [0, 265] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 Points [20, 0] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [130, 0] DstBlock "Counter1" DstPort 2 } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Display1" DstPort 1 } Annotation { Position [982, 232] } } } Block { BlockType Reference Name "Logical" SID "3845" Ports [2, 1] Position [1185, 397, 1205, 468] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "20,71,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 71 71 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 71 71 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[37.22 37.22 39." "22 37.22 39.22 39.22 39.22 37.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[35.22 35.22 37.22 37.22 35.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[33.22 33.22 35.22 35.22 33.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[31.22 31.22 33.22 31.22 33.22 33.22 31.22 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Pkt Det Decision" SID "3846" Ports [6] Position [1340, 133, 1380, 282] Floating off Location [35, 88, 1008, 793] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } TimeRange "1000" YMin "0~0~0~0~0~0" YMax "1000~15000~1~1~1~1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "Running Sum" SID "3847" Ports [4, 1] Position [540, 168, 615, 277] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Running Sum" Location [88, 183, 2073, 1280] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "3848" Position [500, 143, 530, 157] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "reset" SID "3849" Position [240, 269, 270, 281] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "avglen" SID "3850" Position [240, 218, 270, 232] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "4175" Position [655, 189, 685, 201] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "ASR" SID "3851" Ports [3, 1] Position [720, 167, 760, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the" " output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is " "used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en on dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,3,1,white,blue,0,f8ea6153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator" SID "3852" Ports [3, 1] Position [880, 174, 915, 216] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst on infoeditControl "reset for floating point data type must be asserted for a minimum of 2 cycles" hasbypass off en on latency "0" dbl_ovrd off msb_inp "100" msb "100" lsb "-100" use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "3853" Ports [2, 1] Position [805, 151, 840, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "283,438,356,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,53,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "3854" Ports [1, 1] Position [980, 182, 1005, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "17" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3855" Ports [2, 1] Position [505, 255, 530, 315] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 60 60 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[33.33 " "33.33 36.33 33.33 36.33 36.33 36.33 33.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[30.33 30.33 33.33" " 33.33 30.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[27.33 27.33 30.33 30.33 27.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33 24.33 27.33 27.33 24.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Long Reset Gen" SID "3856" Ports [2, 1] Position [375, 250, 470, 285] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Long Reset Gen" Location [88, 183, 2073, 1280] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "duration" SID "3857" Position [60, 258, 90, 272] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "reset_in" SID "3858" Position [60, 188, 90, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Counter" SID "3859" Ports [2, 1] Position [405, 172, 455, 223] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "0" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "8" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "3860" Ports [2, 1] Position [530, 188, 575, 232] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "3861" Ports [2, 1] Position [225, 182, 255, 233] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3862" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "3863" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "3864" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3865" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3866" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "reset_out" SID "3867" Position [465, 93, 495, 107] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Relational" SrcPort 1 Points [0, -50; -210, 0] Branch { Points [0, 25] DstBlock "Counter" DstPort 1 } Branch { Points [-175, 0; 0, 60] DstBlock "S-R Latch" DstPort 2 } } Line { SrcBlock "Counter" SrcPort 1 Points [0, 0] DstBlock "Relational" DstPort 1 } Line { SrcBlock "reset_in" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "duration" SrcPort 1 Points [420, 0] DstBlock "Relational" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [55, 0] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, -110] DstBlock "reset_out" DstPort 1 } } } } Block { BlockType Reference Name "Register" SID "3868" Ports [2, 1] Position [615, 141, 655, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,38,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');" "\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "avg" SID "3869" Position [1060, 183, 1090, 197] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "ASR" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [35, 0] Branch { Points [0, 15] DstBlock "ASR" DstPort 1 } Branch { Points [95, 0] DstBlock "AddSub" DstPort 1 } } Line { SrcBlock "avglen" SrcPort 1 Points [60, 0] Branch { Points [370, 0] DstBlock "ASR" DstPort 2 } Branch { Points [0, 35] DstBlock "Long Reset Gen" DstPort 1 } } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Accumulator" SrcPort 1 Points [0, -5] DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 Points [45, 0] Branch { Points [0, -115] DstBlock "Register" DstPort 2 } Branch { Points [265, 0; 0, -90] DstBlock "Accumulator" DstPort 2 } } Line { SrcBlock "reset" SrcPort 1 Points [60, 0] Branch { DstBlock "Long Reset Gen" DstPort 2 } Branch { Points [0, 25] DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Long Reset Gen" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "avg" DstPort 1 } Line { SrcBlock "en" SrcPort 1 Points [5, 0] Branch { DstBlock "ASR" DstPort 3 } Branch { Points [0, 15] DstBlock "Accumulator" DstPort 3 } } Annotation { Name "This block impelemnts a variable-length running sum.\nFor a sum y(n) of the previous N samples of seq" "uence x(n), it implements\ny(n) = y(n-1) + x(n) - x(n-N)\nThis requires a careful reset procedure, where the ful" "l shift register\nis zerored out. Otherwise the feedback-based sum stops working." Position [289, 149] } } } Block { BlockType Outport Name "pktdet" SID "3870" Position [1320, 353, 1350, 367] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Reset" SrcPort 1 Points [240, 0] Branch { DstBlock "Running Sum" DstPort 2 } Branch { Points [0, 130; 160, 0] Branch { DstBlock "Idle Detection" DstPort 2 } Branch { Points [0, 120] DstBlock "Busy Detection" DstPort 2 } } } Line { SrcBlock "From1" SrcPort 1 Points [5, 0] Branch { DstBlock "Running Sum" DstPort 3 } Branch { Points [0, 355] DstBlock "Gateway Out6" DstPort 1 } } Line { Name "RAWRSSI" Labels [0, 0] SrcBlock "Gateway Out" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 1 } Line { Name "AVGRSSI" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 2 } Line { Name "IDLE" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 3 } Line { SrcBlock "RSSI" SrcPort 1 Points [145, 0] Branch { DstBlock "Running Sum" DstPort 1 } Branch { Points [0, -40] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "Running Sum" SrcPort 1 Points [0, -15; 85, 0] Branch { Points [0, 115] Branch { DstBlock "Idle Detection" DstPort 1 } Branch { Points [0, 120] DstBlock "Busy Detection" DstPort 1 } } Branch { Points [0, -40] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Idle Detection" SrcPort 1 Points [0, -10; 20, 0] Branch { Points [0, -135] DstBlock "Gateway Out2" DstPort 1 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "ASR" DstPort 2 } Line { SrcBlock "ASR" SrcPort 1 Points [0, -10; 10, 0] Branch { Points [10, 0] DstBlock "Logical" DstPort 1 } Branch { Points [0, -35; -50, 0; 0, -90] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "Busy Detection" SrcPort 1 Points [25, 0] Branch { Points [250, 0] DstBlock "Logical" DstPort 2 } Branch { Points [0, -215] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [0, -75; 20, 0] Branch { DstBlock "pktdet" DstPort 1 } Branch { Points [0, -65; -100, 0; 0, -25] DstBlock "Gateway Out4" DstPort 1 } } Line { Name "BUSY" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 5 } Line { Name "DET" Labels [0, 0] SrcBlock "Gateway Out4" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 6 } Line { Name "IDLE DLY" Labels [0, 0] SrcBlock "Gateway Out5" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 4 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "ASR" DstPort 1 } Line { SrcBlock "En" SrcPort 1 Points [140, 0] Branch { DstBlock "Running Sum" DstPort 4 } Branch { Points [0, 120; 345, 0] Branch { DstBlock "ASR" DstPort 3 } Branch { Points [0, 0; 0, -25] DstBlock "Idle Detection" DstPort 3 } Branch { Points [0, 0; 0, 95] DstBlock "Busy Detection" DstPort 3 } } } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Display" DstPort 1 } Annotation { Position [679, 724] } } } Block { BlockType SubSystem Name "AntB Detector" SID "5547" Ports [3, 1] Position [530, 138, 605, 172] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "AntB Detector" Location [-1918, 70, -2, 1180] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "5548" Position [235, 178, 265, 192] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "5549" Position [235, 203, 265, 217] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "En" SID "5550" Position [235, 253, 265, 267] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "ASR" SID "5551" Ports [3, 1] Position [1105, 318, 1145, 392] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the out" "put port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, " "multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en on dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,74,3,1,white,blue,0,f8ea6153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 74 74 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 74 74 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[42.55 42.55 47." "55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[37.55 37.55 42.55 42.55 37." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Busy Detection" SID "6891" Ports [3, 1] Position [780, 443, 890, 487] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Busy Detection" Location [330, 165, 2246, 1275] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "6892" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "6893" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "6894" Position [440, 313, 470, 327] NamePlacement "alternate" Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "6895" Ports [1, 1] Position [995, 216, 1025, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "6896" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "6897" Position [220, 241, 375, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_energyThresh_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "6898" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "6899" Ports [1, 1] Position [565, 208, 590, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "6900" Ports [2, 1] Position [510, 231, 540, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "6901" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "6902" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "6903" Ports [2, 1] Position [795, 213, 840, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "6904" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "6905" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "6906" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "6907" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6908" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "6909" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Busy" SID "6910" Position [1100, 218, 1130, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From3" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [10, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -40; 190, 0; 0, 40] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [365, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Busy" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 Points [0, -10] DstBlock "Counter1" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 Points [20, 0] DstBlock "Logical" DstPort 2 } Annotation { Position [1012, 232] } } } Block { BlockType Reference Name "Delay" SID "5572" Ports [1, 1] Position [1020, 318, 1050, 342] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "30,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "5573" Position [330, 226, 485, 244] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_RSSIavgLength" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "5574" Position [925, 346, 1080, 364] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out" SID "5575" Ports [1, 1] Position [1165, 139, 1195, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "RAWRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out1" SID "5576" Ports [1, 1] Position [1165, 164, 1195, 176] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "AVGRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "5577" Ports [1, 1] Position [1165, 189, 1195, 201] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "IDLE" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out3" SID "5578" Ports [1, 1] Position [1165, 239, 1195, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "BUSY" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" SID "5579" Ports [1, 1] Position [1165, 264, 1195, 276] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "DET" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out5" SID "5580" Ports [1, 1] Position [1165, 214, 1195, 226] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "IDLE DLY" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType SubSystem Name "Idle Detection" SID "6911" Ports [3, 1] Position [780, 323, 890, 367] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Idle Detection" Location [330, 165, 2246, 1275] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "6912" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "6913" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "6914" Position [445, 313, 475, 327] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "6915" Ports [1, 1] Position [965, 216, 995, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "6916" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "6917" Position [215, 241, 370, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_energyThresh_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "6918" Position [215, 271, 370, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "6919" Ports [1, 1] Position [570, 208, 595, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "6920" Ports [2, 1] Position [515, 231, 545, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "6921" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "6922" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "ab" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "6924" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "6925" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "6926" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "6927" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6928" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "6929" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "Idle" SID "6930" Position [1050, 218, 1080, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Idle" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 Points [370, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -30; 190, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "en" SrcPort 1 Points [20, 0] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [130, 0] DstBlock "Counter1" DstPort 2 } Annotation { Position [982, 232] } } } Block { BlockType Reference Name "Logical" SID "5601" Ports [2, 1] Position [1185, 397, 1205, 468] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "20,71,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 71 71 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 71 71 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[37.22 37.22 39." "22 37.22 39.22 39.22 39.22 37.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[35.22 35.22 37.22 37.22 35.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[33.22 33.22 35.22 35.22 33.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[31.22 31.22 33.22 31.22 33.22 33.22 31.22 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Pkt Det Decision" SID "5602" Ports [6] Position [1340, 133, 1380, 282] Floating off Location [1385, 111, 2358, 816] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } TimeRange "1000" YMin "0~0~0~0~0~0" YMax "1000~15000~1~1~1~1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "Running Sum" SID "5603" Ports [4, 1] Position [540, 168, 615, 277] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Running Sum" Location [-1918, 70, -2, 1180] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "5604" Position [500, 143, 530, 157] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "reset" SID "5605" Position [240, 269, 270, 281] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "avglen" SID "5606" Position [240, 218, 270, 232] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "5607" Position [655, 189, 685, 201] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "ASR" SID "5608" Ports [3, 1] Position [720, 167, 760, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the" " output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is " "used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en on dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,3,1,white,blue,0,f8ea6153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator" SID "5609" Ports [3, 1] Position [880, 174, 915, 216] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst on infoeditControl "reset for floating point data type must be asserted for a minimum of 2 cycles" hasbypass off en on latency "0" dbl_ovrd off msb_inp "100" msb "100" lsb "-100" use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "5610" Ports [2, 1] Position [805, 151, 840, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "283,438,356,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,53,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "5611" Ports [1, 1] Position [980, 182, 1005, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "17" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "5612" Ports [2, 1] Position [505, 255, 530, 315] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 60 60 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[33.33 " "33.33 36.33 33.33 36.33 36.33 36.33 33.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[30.33 30.33 33.33" " 33.33 30.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[27.33 27.33 30.33 30.33 27.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33 24.33 27.33 27.33 24.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Long Reset Gen" SID "5613" Ports [2, 1] Position [375, 250, 470, 285] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Long Reset Gen" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "duration" SID "5614" Position [60, 258, 90, 272] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "reset_in" SID "5615" Position [60, 188, 90, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Counter" SID "5616" Ports [2, 1] Position [405, 172, 455, 223] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "0" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "8" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "5617" Ports [2, 1] Position [530, 188, 575, 232] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "5618" Ports [2, 1] Position [225, 182, 255, 233] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "5619" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "5620" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "5621" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5622" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "5623" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "reset_out" SID "5624" Position [465, 93, 495, 107] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S-R Latch" SrcPort 1 Points [55, 0] Branch { Points [0, -110] DstBlock "reset_out" DstPort 1 } Branch { DstBlock "Counter" DstPort 2 } } Line { SrcBlock "duration" SrcPort 1 Points [420, 0] DstBlock "Relational" DstPort 2 } Line { SrcBlock "reset_in" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 Points [0, 0] DstBlock "Relational" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [0, -50; -210, 0] Branch { Points [-175, 0; 0, 60] DstBlock "S-R Latch" DstPort 2 } Branch { Points [0, 25] DstBlock "Counter" DstPort 1 } } } } Block { BlockType Reference Name "Register" SID "5625" Ports [2, 1] Position [615, 141, 655, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,38,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');" "\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "avg" SID "5626" Position [1060, 183, 1090, 197] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "en" SrcPort 1 Points [5, 0] Branch { Points [0, 15] DstBlock "Accumulator" DstPort 3 } Branch { DstBlock "ASR" DstPort 3 } } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "avg" DstPort 1 } Line { SrcBlock "Long Reset Gen" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "reset" SrcPort 1 Points [60, 0] Branch { Points [0, 25] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Long Reset Gen" DstPort 2 } } Line { SrcBlock "Logical" SrcPort 1 Points [45, 0] Branch { Points [265, 0; 0, -90] DstBlock "Accumulator" DstPort 2 } Branch { Points [0, -115] DstBlock "Register" DstPort 2 } } Line { SrcBlock "Accumulator" SrcPort 1 Points [0, -5] DstBlock "Convert7" DstPort 1 } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "avglen" SrcPort 1 Points [60, 0] Branch { Points [0, 35] DstBlock "Long Reset Gen" DstPort 1 } Branch { Points [370, 0] DstBlock "ASR" DstPort 2 } } Line { SrcBlock "Register" SrcPort 1 Points [35, 0] Branch { Points [95, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 15] DstBlock "ASR" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "ASR" SrcPort 1 Points [0, 5] DstBlock "AddSub" DstPort 2 } Annotation { Name "This block impelemnts a variable-length running sum.\nFor a sum y(n) of the previous N samples of seq" "uence x(n), it implements\ny(n) = y(n-1) + x(n) - x(n-N)\nThis requires a careful reset procedure, where the ful" "l shift register\nis zerored out. Otherwise the feedback-based sum stops working." Position [289, 149] } } } Block { BlockType Outport Name "pktdet" SID "5627" Position [1320, 353, 1350, 367] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "En" SrcPort 1 Points [140, 0] Branch { Points [0, 120; 345, 0] Branch { DstBlock "ASR" DstPort 3 } Branch { Points [0, -20] DstBlock "Idle Detection" DstPort 3 } Branch { Points [0, 100] DstBlock "Busy Detection" DstPort 3 } } Branch { DstBlock "Running Sum" DstPort 4 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "ASR" DstPort 1 } Line { Name "IDLE DLY" Labels [0, 0] SrcBlock "Gateway Out5" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 4 } Line { Name "DET" Labels [0, 0] SrcBlock "Gateway Out4" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 6 } Line { Name "BUSY" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 5 } Line { SrcBlock "Logical" SrcPort 1 Points [0, -75; 20, 0] Branch { Points [0, -65; -100, 0; 0, -25] DstBlock "Gateway Out4" DstPort 1 } Branch { DstBlock "pktdet" DstPort 1 } } Line { SrcBlock "Busy Detection" SrcPort 1 Points [25, 0; 0, -85] Branch { Points [0, -215] DstBlock "Gateway Out3" DstPort 1 } Branch { Points [250, 0] DstBlock "Logical" DstPort 2 } } Line { SrcBlock "ASR" SrcPort 1 Points [0, -10; 10, 0] Branch { Points [0, -35; -50, 0; 0, -90] DstBlock "Gateway Out5" DstPort 1 } Branch { Points [10, 0] DstBlock "Logical" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "ASR" DstPort 2 } Line { SrcBlock "Idle Detection" SrcPort 1 Points [0, -15; 20, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { Points [0, -135] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Running Sum" SrcPort 1 Points [0, -15; 85, 0] Branch { Points [0, -40] DstBlock "Gateway Out1" DstPort 1 } Branch { Points [0, 115] Branch { Points [60, 0] DstBlock "Idle Detection" DstPort 1 } Branch { Points [0, 125] DstBlock "Busy Detection" DstPort 1 } } } Line { SrcBlock "RSSI" SrcPort 1 Points [145, 0] Branch { Points [0, -40] DstBlock "Gateway Out" DstPort 1 } Branch { DstBlock "Running Sum" DstPort 1 } } Line { Name "IDLE" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 3 } Line { Name "AVGRSSI" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 2 } Line { Name "RAWRSSI" Labels [0, 0] SrcBlock "Gateway Out" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Running Sum" DstPort 3 } Line { SrcBlock "Reset" SrcPort 1 Points [240, 0] Branch { Points [0, 130; 160, 0] Branch { Points [95, 0] DstBlock "Idle Detection" DstPort 2 } Branch { Points [0, 125] DstBlock "Busy Detection" DstPort 2 } } Branch { DstBlock "Running Sum" DstPort 2 } } } } Block { BlockType SubSystem Name "AntC Detector" SID "5628" Ports [3, 1] Position [530, 188, 605, 222] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "AntC Detector" Location [-1918, 70, -2, 1180] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "5629" Position [235, 178, 265, 192] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "5630" Position [235, 203, 265, 217] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "En" SID "5631" Position [235, 253, 265, 267] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "ASR" SID "5632" Ports [3, 1] Position [1105, 318, 1145, 392] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the out" "put port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, " "multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en on dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,74,3,1,white,blue,0,f8ea6153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 74 74 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 74 74 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[42.55 42.55 47." "55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[37.55 37.55 42.55 42.55 37." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Busy Detection" SID "6931" Ports [3, 1] Position [780, 443, 890, 487] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Busy Detection" Location [330, 165, 2246, 1275] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "6932" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "6933" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "6934" Position [440, 313, 470, 327] NamePlacement "alternate" Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "6935" Ports [1, 1] Position [995, 216, 1025, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "6936" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "6937" Position [220, 241, 375, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_energyThresh_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "6938" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "6939" Ports [1, 1] Position [565, 208, 590, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "6940" Ports [2, 1] Position [510, 231, 540, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "6941" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "6942" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "6943" Ports [2, 1] Position [795, 213, 840, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "6944" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "6945" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "6946" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "6947" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6948" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "6949" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Busy" SID "6950" Position [1100, 218, 1130, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From3" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [10, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -40; 190, 0; 0, 40] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [365, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Busy" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 Points [0, -10] DstBlock "Counter1" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 Points [20, 0] DstBlock "Logical" DstPort 2 } Annotation { Position [1012, 232] } } } Block { BlockType Reference Name "Delay" SID "5653" Ports [1, 1] Position [1020, 318, 1050, 342] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "30,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "5654" Position [330, 226, 485, 244] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_RSSIavgLength" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "5655" Position [925, 346, 1080, 364] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out" SID "5656" Ports [1, 1] Position [1165, 139, 1195, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "RAWRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out1" SID "5657" Ports [1, 1] Position [1165, 164, 1195, 176] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "AVGRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "5658" Ports [1, 1] Position [1165, 189, 1195, 201] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "IDLE" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out3" SID "5659" Ports [1, 1] Position [1165, 239, 1195, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "BUSY" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" SID "5660" Ports [1, 1] Position [1165, 264, 1195, 276] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "DET" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out5" SID "5661" Ports [1, 1] Position [1165, 214, 1195, 226] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "IDLE DLY" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType SubSystem Name "Idle Detection" SID "6951" Ports [3, 1] Position [780, 323, 890, 367] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Idle Detection" Location [330, 165, 2246, 1275] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "6952" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "6953" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "6954" Position [445, 313, 475, 327] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "6955" Ports [1, 1] Position [965, 216, 995, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "6956" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "6957" Position [215, 241, 370, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_energyThresh_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "6958" Position [215, 271, 370, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "6959" Ports [1, 1] Position [570, 208, 595, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "6960" Ports [2, 1] Position [515, 231, 545, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "6961" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "6962" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "ab" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "6964" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "6965" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "6966" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "6967" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6968" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "6969" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "Idle" SID "6970" Position [1050, 218, 1080, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Idle" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 Points [370, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -30; 190, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "en" SrcPort 1 Points [20, 0] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [130, 0] DstBlock "Counter1" DstPort 2 } Annotation { Position [982, 232] } } } Block { BlockType Reference Name "Logical" SID "5682" Ports [2, 1] Position [1185, 397, 1205, 468] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "20,71,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 71 71 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 71 71 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[37.22 37.22 39." "22 37.22 39.22 39.22 39.22 37.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[35.22 35.22 37.22 37.22 35.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[33.22 33.22 35.22 35.22 33.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[31.22 31.22 33.22 31.22 33.22 33.22 31.22 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Pkt Det Decision" SID "5683" Ports [6] Position [1340, 133, 1380, 282] Floating off Location [1385, 111, 2358, 816] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } TimeRange "1000" YMin "0~0~0~0~0~0" YMax "1000~15000~1~1~1~1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "Running Sum" SID "5684" Ports [4, 1] Position [540, 168, 615, 277] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Running Sum" Location [-1918, 70, -2, 1180] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "5685" Position [500, 143, 530, 157] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "reset" SID "5686" Position [240, 269, 270, 281] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "avglen" SID "5687" Position [240, 218, 270, 232] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "5688" Position [655, 189, 685, 201] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "ASR" SID "5689" Ports [3, 1] Position [720, 167, 760, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the" " output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is " "used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en on dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,3,1,white,blue,0,f8ea6153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator" SID "5690" Ports [3, 1] Position [880, 174, 915, 216] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst on infoeditControl "reset for floating point data type must be asserted for a minimum of 2 cycles" hasbypass off en on latency "0" dbl_ovrd off msb_inp "100" msb "100" lsb "-100" use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "5691" Ports [2, 1] Position [805, 151, 840, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "283,438,356,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,53,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "5692" Ports [1, 1] Position [980, 182, 1005, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "17" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "5693" Ports [2, 1] Position [505, 255, 530, 315] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 60 60 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[33.33 " "33.33 36.33 33.33 36.33 36.33 36.33 33.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[30.33 30.33 33.33" " 33.33 30.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[27.33 27.33 30.33 30.33 27.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33 24.33 27.33 27.33 24.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Long Reset Gen" SID "5694" Ports [2, 1] Position [375, 250, 470, 285] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Long Reset Gen" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "duration" SID "5695" Position [60, 258, 90, 272] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "reset_in" SID "5696" Position [60, 188, 90, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Counter" SID "5697" Ports [2, 1] Position [405, 172, 455, 223] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "0" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "8" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "5698" Ports [2, 1] Position [530, 188, 575, 232] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "5699" Ports [2, 1] Position [225, 182, 255, 233] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "5700" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "5701" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "5702" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5703" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "5704" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "reset_out" SID "5705" Position [465, 93, 495, 107] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Relational" SrcPort 1 Points [0, -50; -210, 0] Branch { Points [0, 25] DstBlock "Counter" DstPort 1 } Branch { Points [-175, 0; 0, 60] DstBlock "S-R Latch" DstPort 2 } } Line { SrcBlock "Counter" SrcPort 1 Points [0, 0] DstBlock "Relational" DstPort 1 } Line { SrcBlock "reset_in" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "duration" SrcPort 1 Points [420, 0] DstBlock "Relational" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [55, 0] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, -110] DstBlock "reset_out" DstPort 1 } } } } Block { BlockType Reference Name "Register" SID "5706" Ports [2, 1] Position [615, 141, 655, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,38,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');" "\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "avg" SID "5707" Position [1060, 183, 1090, 197] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "ASR" SrcPort 1 Points [0, 5] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [35, 0] Branch { Points [0, 15] DstBlock "ASR" DstPort 1 } Branch { Points [95, 0] DstBlock "AddSub" DstPort 1 } } Line { SrcBlock "avglen" SrcPort 1 Points [60, 0] Branch { Points [370, 0] DstBlock "ASR" DstPort 2 } Branch { Points [0, 35] DstBlock "Long Reset Gen" DstPort 1 } } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Accumulator" SrcPort 1 Points [0, -5] DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 Points [45, 0] Branch { Points [0, -115] DstBlock "Register" DstPort 2 } Branch { Points [265, 0; 0, -90] DstBlock "Accumulator" DstPort 2 } } Line { SrcBlock "reset" SrcPort 1 Points [60, 0] Branch { DstBlock "Long Reset Gen" DstPort 2 } Branch { Points [0, 25] DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Long Reset Gen" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "avg" DstPort 1 } Line { SrcBlock "en" SrcPort 1 Points [5, 0] Branch { DstBlock "ASR" DstPort 3 } Branch { Points [0, 15] DstBlock "Accumulator" DstPort 3 } } Annotation { Name "This block impelemnts a variable-length running sum.\nFor a sum y(n) of the previous N samples of seq" "uence x(n), it implements\ny(n) = y(n-1) + x(n) - x(n-N)\nThis requires a careful reset procedure, where the ful" "l shift register\nis zerored out. Otherwise the feedback-based sum stops working." Position [289, 149] } } } Block { BlockType Outport Name "pktdet" SID "5708" Position [1320, 353, 1350, 367] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Reset" SrcPort 1 Points [240, 0] Branch { DstBlock "Running Sum" DstPort 2 } Branch { Points [0, 130; 160, 0] Branch { Points [0, 125] DstBlock "Busy Detection" DstPort 2 } Branch { Points [95, 0] DstBlock "Idle Detection" DstPort 2 } } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Running Sum" DstPort 3 } Line { Name "RAWRSSI" Labels [0, 0] SrcBlock "Gateway Out" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 1 } Line { Name "AVGRSSI" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 2 } Line { Name "IDLE" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 3 } Line { SrcBlock "RSSI" SrcPort 1 Points [145, 0] Branch { DstBlock "Running Sum" DstPort 1 } Branch { Points [0, -40] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "Running Sum" SrcPort 1 Points [0, -15; 85, 0] Branch { Points [0, 115] Branch { Points [0, 125] DstBlock "Busy Detection" DstPort 1 } Branch { Points [60, 0] DstBlock "Idle Detection" DstPort 1 } } Branch { Points [0, -40] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Idle Detection" SrcPort 1 Points [0, -15; 20, 0] Branch { Points [0, -135] DstBlock "Gateway Out2" DstPort 1 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "ASR" DstPort 2 } Line { SrcBlock "ASR" SrcPort 1 Points [0, -10; 10, 0] Branch { Points [10, 0] DstBlock "Logical" DstPort 1 } Branch { Points [0, -35; -50, 0; 0, -90] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "Busy Detection" SrcPort 1 Points [25, 0; 0, -85] Branch { Points [250, 0] DstBlock "Logical" DstPort 2 } Branch { Points [0, -215] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [0, -75; 20, 0] Branch { DstBlock "pktdet" DstPort 1 } Branch { Points [0, -65; -100, 0; 0, -25] DstBlock "Gateway Out4" DstPort 1 } } Line { Name "BUSY" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 5 } Line { Name "DET" Labels [0, 0] SrcBlock "Gateway Out4" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 6 } Line { Name "IDLE DLY" Labels [0, 0] SrcBlock "Gateway Out5" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 4 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "ASR" DstPort 1 } Line { SrcBlock "En" SrcPort 1 Points [140, 0] Branch { DstBlock "Running Sum" DstPort 4 } Branch { Points [0, 120; 345, 0] Branch { DstBlock "ASR" DstPort 3 } Branch { Points [0, 100] DstBlock "Busy Detection" DstPort 3 } Branch { Points [0, -20] DstBlock "Idle Detection" DstPort 3 } } } } } Block { BlockType SubSystem Name "AntD Detector" SID "5709" Ports [3, 1] Position [530, 238, 605, 272] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "AntD Detector" Location [-1918, 70, -2, 1180] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "5710" Position [235, 178, 265, 192] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "5711" Position [235, 203, 265, 217] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "En" SID "5712" Position [235, 253, 265, 267] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "ASR" SID "5713" Ports [3, 1] Position [1105, 318, 1145, 392] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the out" "put port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is used, " "multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en on dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,74,3,1,white,blue,0,f8ea6153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 74 74 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 74 74 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[42.55 42.55 47." "55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[37.55 37.55 42.55 42.55 37." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Busy Detection" SID "6971" Ports [3, 1] Position [780, 443, 890, 487] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Busy Detection" Location [330, 165, 2246, 1275] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "6972" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "6973" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "6974" Position [440, 313, 470, 327] NamePlacement "alternate" Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "6975" Ports [1, 1] Position [995, 216, 1025, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "6976" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "6977" Position [220, 241, 375, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_energyThresh_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "6978" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "6979" Ports [1, 1] Position [565, 208, 590, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "6980" Ports [2, 1] Position [510, 231, 540, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "6981" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "6982" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "6983" Ports [2, 1] Position [795, 213, 840, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "6984" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "6985" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "6986" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "6987" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6988" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "6989" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Busy" SID "6990" Position [1100, 218, 1130, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From3" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [10, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -40; 190, 0; 0, 40] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [365, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Busy" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 Points [0, -10] DstBlock "Counter1" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 Points [20, 0] DstBlock "Logical" DstPort 2 } Annotation { Position [1012, 232] } } } Block { BlockType Reference Name "Delay" SID "5734" Ports [1, 1] Position [1020, 318, 1050, 342] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "30,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "5735" Position [330, 226, 485, 244] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_RSSIavgLength" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "5736" Position [925, 346, 1080, 364] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out" SID "5737" Ports [1, 1] Position [1165, 139, 1195, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "RAWRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out1" SID "5738" Ports [1, 1] Position [1165, 164, 1195, 176] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "AVGRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "5739" Ports [1, 1] Position [1165, 189, 1195, 201] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "IDLE" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out3" SID "5740" Ports [1, 1] Position [1165, 239, 1195, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "BUSY" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" SID "5741" Ports [1, 1] Position [1165, 264, 1195, 276] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "DET" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out5" SID "5742" Ports [1, 1] Position [1165, 214, 1195, 226] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "IDLE DLY" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType SubSystem Name "Idle Detection" SID "6991" Ports [3, 1] Position [780, 323, 890, 367] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Idle Detection" Location [330, 165, 2246, 1275] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "6992" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "6993" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "6994" Position [445, 313, 475, 327] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "6995" Ports [1, 1] Position [965, 216, 995, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "6996" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "6997" Position [215, 241, 370, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_energyThresh_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "6998" Position [215, 271, 370, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_duration_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "6999" Ports [1, 1] Position [570, 208, 595, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7000" Ports [2, 1] Position [515, 231, 545, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7001" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "7002" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "ab" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "7004" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "7005" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "7006" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "7007" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7008" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7009" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "Idle" SID "7010" Position [1050, 218, 1080, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Idle" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 Points [370, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -30; 190, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "en" SrcPort 1 Points [20, 0] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [130, 0] DstBlock "Counter1" DstPort 2 } Annotation { Position [982, 232] } } } Block { BlockType Reference Name "Logical" SID "5763" Ports [2, 1] Position [1185, 397, 1205, 468] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "20,71,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 71 71 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 71 71 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[37.22 37.22 39." "22 37.22 39.22 39.22 39.22 37.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[35.22 35.22 37.22 37.22 35.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[33.22 33.22 35.22 35.22 33.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[31.22 31.22 33.22 31.22 33.22 33.22 31.22 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Pkt Det Decision" SID "5764" Ports [6] Position [1340, 133, 1380, 282] Floating off Location [1385, 111, 2358, 816] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } TimeRange "1000" YMin "0~0~0~0~0~0" YMax "1000~15000~1~1~1~1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "Running Sum" SID "5765" Ports [4, 1] Position [540, 168, 615, 277] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Running Sum" Location [-1918, 70, -2, 1180] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "5766" Position [500, 143, 530, 157] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "reset" SID "5767" Position [240, 269, 270, 281] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "avglen" SID "5768" Position [240, 218, 270, 232] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "en" SID "5769" Position [655, 189, 685, 201] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "ASR" SID "5770" Ports [3, 1] Position [720, 167, 760, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and driven onto the" " output port.

Hardware notes: This block is implemented using SRL16s. If Virtex-4 or Spartan-3 device is " "used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en on dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,3,1,white,blue,0,f8ea6153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator" SID "5771" Ports [3, 1] Position [880, 174, 915, 216] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst on infoeditControl "reset for floating point data type must be asserted for a minimum of 2 cycles" hasbypass off en on latency "0" dbl_ovrd off msb_inp "100" msb "100" lsb "-100" use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "5772" Ports [2, 1] Position [805, 151, 840, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "283,438,356,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,53,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "5773" Ports [1, 1] Position [980, 182, 1005, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "17" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "5774" Ports [2, 1] Position [505, 255, 530, 315] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 60 60 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[33.33 " "33.33 36.33 33.33 36.33 36.33 36.33 33.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[30.33 30.33 33.33" " 33.33 30.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[27.33 27.33 30.33 30.33 27.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33 24.33 27.33 27.33 24.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Long Reset Gen" SID "5775" Ports [2, 1] Position [375, 250, 470, 285] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Long Reset Gen" Location [2, 70, 2558, 1376] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "duration" SID "5776" Position [60, 258, 90, 272] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "reset_in" SID "5777" Position [60, 188, 90, 202] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Counter" SID "5778" Ports [2, 1] Position [405, 172, 455, 223] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "0" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "8" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "5779" Ports [2, 1] Position [530, 188, 575, 232] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "5780" Ports [2, 1] Position [225, 182, 255, 233] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "5781" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "5782" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "5783" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5784" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "5785" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "reset_out" SID "5786" Position [465, 93, 495, 107] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S-R Latch" SrcPort 1 Points [55, 0] Branch { Points [0, -110] DstBlock "reset_out" DstPort 1 } Branch { DstBlock "Counter" DstPort 2 } } Line { SrcBlock "duration" SrcPort 1 Points [420, 0] DstBlock "Relational" DstPort 2 } Line { SrcBlock "reset_in" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 Points [0, 0] DstBlock "Relational" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [0, -50; -210, 0] Branch { Points [-175, 0; 0, 60] DstBlock "S-R Latch" DstPort 2 } Branch { Points [0, 25] DstBlock "Counter" DstPort 1 } } } } Block { BlockType Reference Name "Register" SID "5787" Ports [2, 1] Position [615, 141, 655, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,38,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');" "\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "avg" SID "5788" Position [1060, 183, 1090, 197] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "en" SrcPort 1 Points [5, 0] Branch { Points [0, 15] DstBlock "Accumulator" DstPort 3 } Branch { DstBlock "ASR" DstPort 3 } } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "avg" DstPort 1 } Line { SrcBlock "Long Reset Gen" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "reset" SrcPort 1 Points [60, 0] Branch { Points [0, 25] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Long Reset Gen" DstPort 2 } } Line { SrcBlock "Logical" SrcPort 1 Points [45, 0] Branch { Points [265, 0; 0, -90] DstBlock "Accumulator" DstPort 2 } Branch { Points [0, -115] DstBlock "Register" DstPort 2 } } Line { SrcBlock "Accumulator" SrcPort 1 Points [0, -5] DstBlock "Convert7" DstPort 1 } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "avglen" SrcPort 1 Points [60, 0] Branch { Points [0, 35] DstBlock "Long Reset Gen" DstPort 1 } Branch { Points [370, 0] DstBlock "ASR" DstPort 2 } } Line { SrcBlock "Register" SrcPort 1 Points [35, 0] Branch { Points [95, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 15] DstBlock "ASR" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "ASR" SrcPort 1 Points [0, 5] DstBlock "AddSub" DstPort 2 } Annotation { Name "This block impelemnts a variable-length running sum.\nFor a sum y(n) of the previous N samples of seq" "uence x(n), it implements\ny(n) = y(n-1) + x(n) - x(n-N)\nThis requires a careful reset procedure, where the ful" "l shift register\nis zerored out. Otherwise the feedback-based sum stops working." Position [289, 149] } } } Block { BlockType Outport Name "pktdet" SID "5789" Position [1320, 353, 1350, 367] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "En" SrcPort 1 Points [140, 0] Branch { Points [0, 120; 345, 0] Branch { DstBlock "ASR" DstPort 3 } Branch { Points [0, -20] DstBlock "Idle Detection" DstPort 3 } Branch { Points [0, 100] DstBlock "Busy Detection" DstPort 3 } } Branch { DstBlock "Running Sum" DstPort 4 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "ASR" DstPort 1 } Line { Name "IDLE DLY" Labels [0, 0] SrcBlock "Gateway Out5" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 4 } Line { Name "DET" Labels [0, 0] SrcBlock "Gateway Out4" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 6 } Line { Name "BUSY" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 5 } Line { SrcBlock "Logical" SrcPort 1 Points [0, -75; 20, 0] Branch { Points [0, -65; -100, 0; 0, -25] DstBlock "Gateway Out4" DstPort 1 } Branch { DstBlock "pktdet" DstPort 1 } } Line { SrcBlock "Busy Detection" SrcPort 1 Points [25, 0; 0, -85] Branch { Points [0, -215] DstBlock "Gateway Out3" DstPort 1 } Branch { Points [250, 0] DstBlock "Logical" DstPort 2 } } Line { SrcBlock "ASR" SrcPort 1 Points [0, -10; 10, 0] Branch { Points [0, -35; -50, 0; 0, -90] DstBlock "Gateway Out5" DstPort 1 } Branch { Points [10, 0] DstBlock "Logical" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "ASR" DstPort 2 } Line { SrcBlock "Idle Detection" SrcPort 1 Points [0, -15; 20, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { Points [0, -135] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Running Sum" SrcPort 1 Points [0, -15; 85, 0] Branch { Points [0, -40] DstBlock "Gateway Out1" DstPort 1 } Branch { Points [0, 115] Branch { Points [60, 0] DstBlock "Idle Detection" DstPort 1 } Branch { Points [0, 125] DstBlock "Busy Detection" DstPort 1 } } } Line { SrcBlock "RSSI" SrcPort 1 Points [145, 0] Branch { Points [0, -40] DstBlock "Gateway Out" DstPort 1 } Branch { DstBlock "Running Sum" DstPort 1 } } Line { Name "IDLE" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 3 } Line { Name "AVGRSSI" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 2 } Line { Name "RAWRSSI" Labels [0, 0] SrcBlock "Gateway Out" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Running Sum" DstPort 3 } Line { SrcBlock "Reset" SrcPort 1 Points [240, 0] Branch { Points [0, 130; 160, 0] Branch { Points [95, 0] DstBlock "Idle Detection" DstPort 2 } Branch { Points [0, 125] DstBlock "Busy Detection" DstPort 2 } } Branch { DstBlock "Running Sum" DstPort 2 } } } } Block { BlockType Reference Name "Convert" SID "4096" Ports [1, 1] Position [335, 266, 365, 284] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Display Name "Display" SID "7036" Ports [1] Position [710, 583, 900, 607] Format "hex (Stored Integer)" Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display1" SID "7038" Ports [1] Position [710, 758, 900, 782] Format "hex (Stored Integer)" Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display2" SID "7040" Ports [1] Position [710, 928, 900, 952] Format "hex (Stored Integer)" Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "4098" Position [105, 356, 240, 374] ShowName off CloseFcn "tagdialog Close" GotoTag "reg_pkt_det_config" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "4099" Position [95, 691, 230, 709] ShowName off CloseFcn "tagdialog Close" GotoTag "reg_pkt_det_thresh" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "4100" Position [145, 266, 300, 284] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetReset" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "4101" Position [95, 806, 230, 824] ShowName off CloseFcn "tagdialog Close" GotoTag "reg_pkt_det_duration" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out1" SID "7039" Ports [1, 1] Position [605, 760, 665, 780] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964" " 0.964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "7041" Ports [1, 1] Position [605, 930, 665, 950] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964" " 0.964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out6" SID "7037" Ports [1, 1] Position [605, 585, 665, 605] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964" " 0.964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto1" SID "4102" Position [405, 430, 520, 450] ShowName off GotoTag "pktDetMask_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto10" SID "4103" Position [405, 846, 565, 864] ShowName off GotoTag "pktDet_duration_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto13" SID "4106" Position [405, 465, 520, 485] ShowName off GotoTag "pktDetMask_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto2" SID "4107" Position [405, 355, 520, 375] ShowName off GotoTag "pktDetMask_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto4" SID "4108" Position [405, 390, 520, 410] ShowName off GotoTag "pktDetMask_B" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto5" SID "4109" Position [405, 535, 520, 555] ShowName off GotoTag "pktDetReset" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto6" SID "4110" Position [405, 691, 565, 709] ShowName off GotoTag "pktDet_energyThresh_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto7" SID "4111" Position [405, 731, 565, 749] ShowName off GotoTag "pktDet_energyThresh_busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto8" SID "4112" Position [405, 891, 565, 909] ShowName off GotoTag "regPktDet_RSSIavgLength" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto9" SID "4113" Position [405, 806, 565, 824] ShowName off GotoTag "pktDet_duration_idle" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "MIMO Logic" SID "4117" Ports [4, 1] Position [690, 80, 745, 280] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "MIMO Logic" Location [39, 158, 2383, 1364] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Det A" SID "4118" Position [480, 198, 510, 212] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Det B" SID "4119" Position [480, 283, 510, 297] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Det C" SID "4120" Position [480, 368, 510, 382] NamePlacement "alternate" Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Det D" SID "4121" Position [480, 453, 510, 467] NamePlacement "alternate" Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "4122" Ports [1, 1] Position [560, 282, 585, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4123" Ports [1, 1] Position [560, 222, 585, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "4124" Ports [1, 1] Position [560, 307, 585, 323] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "4125" Ports [1, 1] Position [560, 367, 585, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "4126" Ports [1, 1] Position [560, 392, 585, 408] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "4127" Ports [1, 1] Position [560, 452, 585, 468] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "4128" Ports [1, 1] Position [560, 197, 585, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "4129" Ports [1, 1] Position [560, 477, 585, 493] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4130" Position [330, 306, 485, 324] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetMask_B" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "4131" Position [330, 221, 485, 239] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetMask_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "4132" Position [330, 391, 485, 409] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetMask_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "4133" Position [330, 476, 485, 494] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetMask_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "4134" Ports [2, 1] Position [650, 190, 675, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1.3" sg_icon_stat "25,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 30.33 2" "7.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4135" Ports [2, 1] Position [650, 275, 675, 330] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1.3" sg_icon_stat "25,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 30.33 2" "7.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4136" Ports [4, 1] Position [780, 181, 805, 514] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,333,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 333 333 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 25 25 0 0 ],[0 0 333 333 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[169.33 1" "69.33 172.33 169.33 172.33 172.33 172.33 169.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[166.33 166.33" " 169.33 169.33 166.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[163.33 163.33 166.33 166.33" " 163.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[160.33 160.33 163.33 160.33 163.33 163.33" " 160.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text'" ");\n\n\n\n\n\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4137" Ports [2, 1] Position [650, 360, 675, 415] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1.3" sg_icon_stat "25,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 30.33 2" "7.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4138" Ports [2, 1] Position [650, 445, 675, 500] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1.3" sg_icon_stat "25,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 30.33 2" "7.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "PktDet" SID "4139" Position [900, 343, 930, 357] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From2" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Det A" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Det B" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "PktDet" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Det C" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical2" DstPort 3 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Det D" SrcPort 1 DstBlock "Convert6" DstPort 1 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Convert8" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical2" DstPort 4 } } } Block { BlockType SubSystem Name "Posedge" SID "4176" Ports [1, 1] Position [270, 43, 315, 67] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Posedge" Location [132, 719, 452, 817] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4177" Position [25, 33, 55, 47] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Delay" SID "4178" Ports [1, 1] Position [145, 45, 175, 75] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "30,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "4179" Ports [1, 1] Position [90, 47, 120, 73] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "30,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 " "1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4180" Ports [2, 1] Position [205, 29, 240, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4181" Position [265, 43, 295, 57] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [0, 0] DstBlock "Q" DstPort 1 } } } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator" SID "7015" Ports [0, 1] Position [75, 14, 105, 46] PulseType "Time based" Period "16" PulseWidth "50" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "RFA_RSSI" SID "3786" Ports [1, 1] Position [180, 89, 235, 101] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Truncate" overflow "Wrap" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "RFB_RSSI" SID "3787" Ports [1, 1] Position [180, 139, 235, 151] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Truncate" overflow "Wrap" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "RFC_RSSI" SID "3788" Ports [1, 1] Position [180, 189, 235, 201] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Truncate" overflow "Wrap" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "RFD_RSSI" SID "3789" Ports [1, 1] Position [180, 239, 235, 251] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Truncate" overflow "Wrap" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "RSSI_CLK" SID "4173" Ports [1, 1] Position [180, 49, 235, 61] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Truncate" overflow "Wrap" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Repeating\nSequence" SID "7024" Ports [0, 1] Position [75, 80, 105, 110] LibraryVersion "1.236" SourceBlock "simulink/Sources/Repeating\nSequence" SourceType "Repeating table" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off rep_seq_t "[0 200 600]" rep_seq_y "[0 1023 0]" } Block { BlockType Reference Name "b0" SID "4148" Ports [1, 1] Position [285, 356, 325, 374] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b1" SID "4149" Ports [1, 1] Position [285, 391, 325, 409] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b2" SID "4150" Ports [1, 1] Position [285, 431, 325, 449] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b3" SID "4151" Ports [1, 1] Position [285, 466, 325, 484] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b31" SID "4154" Ports [1, 1] Position [285, 536, 325, 554] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[15:8]" SID "4155" Ports [1, 1] Position [285, 846, 325, 864] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[20:16]" SID "4156" Ports [1, 1] Position [285, 891, 325, 909] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[7:0]" SID "4157" Ports [1, 1] Position [285, 806, 325, 824] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Trigger" SID "2417" Position [800, 173, 830, 187] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "AntA Detector" SrcPort 1 DstBlock "MIMO Logic" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "RFA_RSSI" SrcPort 1 DstBlock "AntA Detector" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [15, 0] Branch { DstBlock "b0" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b1" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "b2" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "b3" DstPort 1 } Branch { Points [0, 70] Branch { Points [0, 50] DstBlock "Gateway Out6" DstPort 1 } Branch { DstBlock "b31" DstPort 1 } } } } } } Line { SrcBlock "From3" SrcPort 1 Points [25, 0] Branch { DstBlock "16LSB" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "16MSB" DstPort 1 } Branch { Points [0, 30] DstBlock "Gateway Out1" DstPort 1 } } } Line { SrcBlock "From9" SrcPort 1 Points [20, 0] Branch { DstBlock "b[7:0]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "b[15:8]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "b[20:16]" DstPort 1 } Branch { Points [0, 40] DstBlock "Gateway Out2" DstPort 1 } } } } Line { SrcBlock "16LSB" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "16MSB" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "b[7:0]" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "b[15:8]" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "b[20:16]" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "AntB Detector" SrcPort 1 DstBlock "MIMO Logic" DstPort 2 } Line { SrcBlock "AntC Detector" SrcPort 1 DstBlock "MIMO Logic" DstPort 3 } Line { SrcBlock "AntD Detector" SrcPort 1 DstBlock "MIMO Logic" DstPort 4 } Line { SrcBlock "RFB_RSSI" SrcPort 1 DstBlock "AntB Detector" DstPort 1 } Line { SrcBlock "RFC_RSSI" SrcPort 1 DstBlock "AntC Detector" DstPort 1 } Line { SrcBlock "RFD_RSSI" SrcPort 1 DstBlock "AntD Detector" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 Points [125, 0; 0, -20] Branch { Points [0, -50] Branch { Points [0, -50] Branch { Points [0, -50] DstBlock "AntA Detector" DstPort 2 } Branch { DstBlock "AntB Detector" DstPort 2 } } Branch { DstBlock "AntC Detector" DstPort 2 } } Branch { DstBlock "AntD Detector" DstPort 2 } } Line { SrcBlock "MIMO Logic" SrcPort 1 DstBlock "Trigger" DstPort 1 } Line { SrcBlock "RSSI_CLK" SrcPort 1 DstBlock "Posedge" DstPort 1 } Line { SrcBlock "Posedge" SrcPort 1 Points [160, 0; 0, 60] Branch { Points [0, 50] Branch { Points [0, 50] Branch { DstBlock "AntC Detector" DstPort 3 } Branch { Points [0, 50] DstBlock "AntD Detector" DstPort 3 } } Branch { DstBlock "AntB Detector" DstPort 3 } } Branch { DstBlock "AntA Detector" DstPort 3 } } Line { SrcBlock "Repeating\nSequence" SrcPort 1 Points [35, 0] Branch { DstBlock "RFA_RSSI" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "RFB_RSSI" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "RFC_RSSI" DstPort 1 } Branch { Points [0, 50] DstBlock "RFD_RSSI" DstPort 1 } } } } Line { SrcBlock "Pulse\nGenerator" SrcPort 1 Points [25, 0; 0, 25] DstBlock "RSSI_CLK" DstPort 1 } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Display1" DstPort 1 } Line { SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Display2" DstPort 1 } Line { SrcBlock "b0" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "b1" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "b2" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "b3" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "b31" SrcPort 1 DstBlock "Goto5" DstPort 1 } } } Block { BlockType SubSystem Name "Eth A" SID "8886" Ports [0, 1] Position [25, 26, 70, 64] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Eth A" Location [539, 107, 2020, 1332] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType From Name "From9" SID "8887" Position [25, 32, 110, 58] ShowName off GotoTag "Eth_A_SW_Trig" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Trigger" SID "8888" Position [195, 38, 225, 52] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From9" SrcPort 1 DstBlock "Trigger" DstPort 1 } } } Block { BlockType From Name "From" SID "8882" Position [165, 62, 250, 88] ShowName off GotoTag "Eth_A_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From1" SID "2418" Position [165, 162, 250, 188] ShowName off GotoTag "Energy_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "3564" Position [410, 486, 485, 514] ShowName off GotoTag "Debug_0_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "3566" Position [410, 611, 485, 639] ShowName off GotoTag "Debug_1_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "3568" Position [410, 736, 485, 764] ShowName off GotoTag "Debug_2_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "3570" Position [410, 866, 485, 894] ShowName off GotoTag "Debug_3_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "2644" Position [170, 262, 255, 288] ShowName off GotoTag "AGC_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "2870" Position [165, 472, 250, 498] ShowName off GotoTag "Debug_0_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "3096" Position [165, 597, 250, 623] ShowName off GotoTag "Debug_1_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "3322" Position [165, 722, 250, 748] ShowName off GotoTag "Debug_2_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "3548" Position [165, 852, 250, 878] ShowName off GotoTag "Debug_3_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "8883" Position [405, 76, 480, 104] ShowName off GotoTag "Eth_A_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "3675" Position [170, 362, 255, 388] ShowName off GotoTag "Software_Rst" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "7610" Position [405, 276, 480, 304] ShowName off GotoTag "AGC_Dly" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Register" SID "8884" Ports [2, 1] Position [325, 32, 385, 88] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d'" ");\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z" "^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3611" Ports [2, 1] Position [325, 132, 385, 188] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d'" ");\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z" "^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3612" Ports [2, 1] Position [325, 232, 385, 288] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d'" ");\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z" "^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "3676" Ports [2, 1] Position [325, 332, 385, 388] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d'" ");\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z" "^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "3613" Ports [2, 1] Position [325, 442, 385, 498] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d'" ");\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z" "^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "3614" Ports [2, 1] Position [325, 567, 385, 623] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d'" ");\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z" "^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "3615" Ports [2, 1] Position [325, 692, 385, 748] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d'" ");\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z" "^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register7" SID "3616" Ports [2, 1] Position [325, 822, 385, 878] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d'" ");\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z" "^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Software" SID "3673" Ports [0, 1] Position [25, 326, 70, 364] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Software" Location [539, 107, 2020, 1332] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType From Name "From9" SID "4492" Position [25, 32, 110, 58] ShowName off GotoTag "Software_Trig" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Trigger" SID "3674" Position [140, 38, 170, 52] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From9" SrcPort 1 DstBlock "Trigger" DstPort 1 } } } Block { BlockType Reference Name "bool1" SID "5533" Ports [1, 1] Position [765, 151, 805, 169] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool10" SID "5532" Ports [1, 1] Position [765, 66, 805, 84] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool2" SID "5534" Ports [1, 1] Position [765, 266, 805, 284] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool3" SID "5535" Ports [1, 1] Position [765, 351, 805, 369] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool4" SID "5536" Ports [1, 1] Position [765, 476, 805, 494] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool5" SID "5537" Ports [1, 1] Position [765, 601, 805, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool6" SID "5538" Ports [1, 1] Position [765, 726, 805, 744] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool7" SID "5539" Ports [1, 1] Position [765, 856, 805, 874] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bool8" SID "7839" Ports [1, 1] Position [765, 981, 805, 999] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17" ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out0" SID "6720" Position [875, 68, 905, 82] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Out1" SID "6721" Position [875, 153, 905, 167] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Out2" SID "6722" Position [875, 268, 905, 282] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Out3" SID "6723" Position [875, 353, 905, 367] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Out4" SID "6724" Position [875, 478, 905, 492] Port "5" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Out5" SID "6725" Position [875, 603, 905, 617] Port "6" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Out6" SID "6726" Position [875, 728, 905, 742] Port "7" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Out7" SID "6727" Position [875, 858, 905, 872] Port "8" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Out8" SID "7840" Position [875, 983, 905, 997] Port "9" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Energy" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "AGC" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Register4" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Register5" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Register6" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Register7" DstPort 2 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Addressable Shift Register4" DstPort 2 } Line { SrcBlock "Register4" SrcPort 1 DstBlock "Addressable Shift Register4" DstPort 1 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Addressable Shift Register5" DstPort 2 } Line { SrcBlock "Register5" SrcPort 1 DstBlock "Addressable Shift Register5" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Addressable Shift Register6" DstPort 2 } Line { SrcBlock "Register6" SrcPort 1 DstBlock "Addressable Shift Register6" DstPort 1 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Addressable Shift Register7" DstPort 2 } Line { SrcBlock "Register7" SrcPort 1 DstBlock "Addressable Shift Register7" DstPort 1 } Line { SrcBlock "Software" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Register3" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "bool1" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "bool3" DstPort 1 } Line { SrcBlock "Addressable Shift Register4" SrcPort 1 DstBlock "bool4" DstPort 1 } Line { SrcBlock "Addressable Shift Register5" SrcPort 1 DstBlock "bool5" DstPort 1 } Line { SrcBlock "Addressable Shift Register6" SrcPort 1 DstBlock "bool6" DstPort 1 } Line { SrcBlock "Addressable Shift Register7" SrcPort 1 DstBlock "bool7" DstPort 1 } Line { SrcBlock "bool10" SrcPort 1 DstBlock "Out0" DstPort 1 } Line { SrcBlock "bool1" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "bool2" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "bool3" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "bool4" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "bool5" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "bool6" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "bool7" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Addressable Shift Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Addressable Shift Register2" DstPort 1 } Line { SrcBlock "Addressable Shift Register2" SrcPort 1 DstBlock "bool2" DstPort 1 } Line { SrcBlock "bool8" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "Debug 0" SrcPort 1 DstBlock "Register4" DstPort 1 } Line { SrcBlock "Debug 1" SrcPort 1 DstBlock "Register5" DstPort 1 } Line { SrcBlock "Debug 2" SrcPort 1 DstBlock "Register6" DstPort 1 } Line { SrcBlock "Debug 3" SrcPort 1 DstBlock "Register7" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "bool8" DstPort 1 } Line { SrcBlock "Eth A" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Addressable Shift Register" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Addressable Shift Register" DstPort 2 } Line { SrcBlock "Addressable Shift Register" SrcPort 1 DstBlock "bool10" DstPort 1 } } } Block { BlockType Reference Name "timeout_count" SID "8566" Ports [2, 1] Position [1130, 300, 1190, 360] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited cou" "nter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "16" bin_pt "0" load_pin off rst on en on explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[10 18 0 18 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0." "82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 " "38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 3" "8.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1" " ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\" "bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "trig_0_out" SID "4573" Ports [1, 1] Position [2075, 190, 2135, 210] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Out 0" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "trig_1_out" SID "4630" Ports [1, 1] Position [2075, 390, 2135, 410] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Out 1" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "trig_2_0_out" SID "4687" Ports [1, 1] Position [2075, 590, 2135, 610] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Out 2" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "trig_2_1_out" SID "8709" Ports [1, 1] Position [2075, 640, 2135, 660] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "trig_3_0_out" SID "4744" Ports [1, 1] Position [2075, 790, 2135, 810] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Out 3" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "trig_3_1_out" SID "8711" Ports [1, 1] Position [2075, 840, 2135, 860] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "trig_4_0_out" SID "4801" Ports [1, 1] Position [2075, 990, 2135, 1010] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Out 4" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "trig_4_1_out" SID "8713" Ports [1, 1] Position [2075, 1040, 2135, 1060] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "trig_5_0_out" SID "6810" Ports [1, 1] Position [2075, 1190, 2135, 1210] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Out 5" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "trig_5_1_out" SID "8715" Ports [1, 1] Position [2080, 1240, 2140, 1260] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty" "pe Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top" " level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0." "93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12." "22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1" "2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Line { SrcBlock "Trigger Sources" SrcPort 1 Points [195, 0] Branch { DstBlock "Trigger Output 0" DstPort 1 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 1 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 1 } } Branch { DstBlock "Trigger Output 3" DstPort 1 } } Branch { DstBlock "Trigger Output 2" DstPort 1 } } Branch { DstBlock "Trigger Output 1" DstPort 1 } } } Line { SrcBlock "Trigger Sources" SrcPort 2 Points [190, 0] Branch { DstBlock "Trigger Output 0" DstPort 2 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 2 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 2 } } Branch { DstBlock "Trigger Output 3" DstPort 2 } } Branch { DstBlock "Trigger Output 2" DstPort 2 } } Branch { DstBlock "Trigger Output 1" DstPort 2 } } } Line { SrcBlock "Trigger Sources" SrcPort 3 Points [185, 0] Branch { DstBlock "Trigger Output 0" DstPort 3 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 3 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 3 } } Branch { DstBlock "Trigger Output 3" DstPort 3 } } Branch { DstBlock "Trigger Output 2" DstPort 3 } } Branch { DstBlock "Trigger Output 1" DstPort 3 } } } Line { SrcBlock "Trigger Sources" SrcPort 4 Points [180, 0] Branch { DstBlock "Trigger Output 0" DstPort 4 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 4 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 4 } } Branch { DstBlock "Trigger Output 3" DstPort 4 } } Branch { DstBlock "Trigger Output 2" DstPort 4 } } Branch { DstBlock "Trigger Output 1" DstPort 4 } } } Line { SrcBlock "Trigger Sources" SrcPort 5 Points [175, 0] Branch { DstBlock "Trigger Output 0" DstPort 5 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 5 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 5 } } Branch { DstBlock "Trigger Output 3" DstPort 5 } } Branch { DstBlock "Trigger Output 2" DstPort 5 } } Branch { DstBlock "Trigger Output 1" DstPort 5 } } } Line { SrcBlock "Trigger Sources" SrcPort 6 Points [170, 0] Branch { DstBlock "Trigger Output 0" DstPort 6 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 6 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 6 } } Branch { DstBlock "Trigger Output 3" DstPort 6 } } Branch { DstBlock "Trigger Output 2" DstPort 6 } } Branch { DstBlock "Trigger Output 1" DstPort 6 } } } Line { SrcBlock "Trigger Sources" SrcPort 7 Points [165, 0] Branch { DstBlock "Trigger Output 0" DstPort 7 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 7 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 7 } } Branch { DstBlock "Trigger Output 3" DstPort 7 } } Branch { DstBlock "Trigger Output 2" DstPort 7 } } Branch { DstBlock "Trigger Output 1" DstPort 7 } } } Line { SrcBlock "Trigger Sources" SrcPort 8 Points [160, 0] Branch { DstBlock "Trigger Output 0" DstPort 8 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 8 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 8 } } Branch { DstBlock "Trigger Output 3" DstPort 8 } } Branch { DstBlock "Trigger Output 2" DstPort 8 } } Branch { DstBlock "Trigger Output 1" DstPort 8 } } } Line { SrcBlock "Trigger Output 2" SrcPort 1 DstBlock "Addressable Shift Register 3" DstPort 1 } Line { SrcBlock "Addressable Shift Register 3" SrcPort 1 Points [605, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, 50] DstBlock "Register3" DstPort 1 } } Line { SrcBlock "Trigger Output 3" SrcPort 1 DstBlock "Addressable Shift Register 4" DstPort 1 } Line { SrcBlock "Addressable Shift Register 4" SrcPort 1 Points [605, 0] Branch { DstBlock "Register5" DstPort 1 } Branch { Points [0, 50] DstBlock "Register6" DstPort 1 } } Line { SrcBlock "Trigger Output 4" SrcPort 1 DstBlock "Addressable Shift Register 5" DstPort 1 } Line { SrcBlock "Addressable Shift Register 5" SrcPort 1 Points [605, 0] Branch { DstBlock "Register8" DstPort 1 } Branch { Points [0, 50] DstBlock "Register9" DstPort 1 } } Line { SrcBlock "Number of Input Triggers" SrcPort 1 DstBlock " 1" DstPort 1 } Line { SrcBlock "Number of Output Triggers" SrcPort 1 DstBlock " 2" DstPort 1 } Line { SrcBlock "CoreID" SrcPort 1 DstBlock " 3" DstPort 1 } Line { SrcBlock "Trigger Output 5" SrcPort 1 DstBlock "Addressable Shift Register 6" DstPort 1 } Line { SrcBlock "Addressable Shift Register 6" SrcPort 1 Points [605, 0] Branch { DstBlock "Register11" DstPort 1 } Branch { Points [0, 50] DstBlock "Register12" DstPort 1 } } Line { Name "Out 0" Labels [0, 0] SrcBlock "trig_0_out" SrcPort 1 DstBlock "Scope" DstPort 1 } Line { Name "Out 1" Labels [0, 0] SrcBlock "trig_1_out" SrcPort 1 DstBlock "Scope" DstPort 2 } Line { Name "Out 2" Labels [0, 0] SrcBlock "trig_2_0_out" SrcPort 1 DstBlock "Scope" DstPort 3 } Line { Name "Out 3" Labels [0, 0] SrcBlock "trig_3_0_out" SrcPort 1 DstBlock "Scope" DstPort 4 } Line { Name "Out 4" Labels [0, 0] SrcBlock "trig_4_0_out" SrcPort 1 DstBlock "Scope" DstPort 5 } Line { Name "Out 5" Labels [0, 0] SrcBlock "trig_5_0_out" SrcPort 1 DstBlock "Scope" DstPort 6 } Line { SrcBlock "Trigger Sources" SrcPort 9 Points [155, 0] Branch { DstBlock "Trigger Output 0" DstPort 9 } Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { Points [0, 200] Branch { DstBlock "Trigger Output 4" DstPort 9 } Branch { Points [0, 200] DstBlock "Trigger Output 5" DstPort 9 } } Branch { DstBlock "Trigger Output 3" DstPort 9 } } Branch { DstBlock "Trigger Output 2" DstPort 9 } } Branch { DstBlock "Trigger Output 1" DstPort 9 } } } Line { SrcBlock "From6" SrcPort 1 DstBlock "Addressable Shift Register1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Addressable Shift Register 3" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Addressable Shift Register 4" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Addressable Shift Register 5" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Addressable Shift Register 6" DstPort 2 } Line { SrcBlock "Trigger Output 0" SrcPort 1 DstBlock "Addressable Shift Register1" DstPort 1 } Line { SrcBlock "Addressable Shift Register1" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "timeout_count" DstPort 2 } Line { SrcBlock "timeout_count" SrcPort 1 DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Relational4" SrcPort 1 Points [25, 0] Branch { Points [0, -55; -245, 0] Branch { Points [0, 25] DstBlock "timeout_count" DstPort 1 } Branch { Points [-90, 0; 0, 65] DstBlock "S-R Latch" DstPort 2 } } Branch { DstBlock "RisingEdge" DstPort 1 } } Line { SrcBlock "From5" SrcPort 1 Points [165, 0] Branch { Points [0, -40] DstBlock "Relational4" DstPort 2 } Branch { DstBlock "Relational1" DstPort 1 } } Line { SrcBlock "Posedge" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "S-R Latch1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Pulse Extender (4 cycles)" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, -35] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "RisingEdge" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 Points [10, 0] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [10, 0] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0] Branch { DstBlock "S-R Latch1" DstPort 1 } Branch { Points [0, -30; 80, 0; 0, 10] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Trigger Output 1" SrcPort 1 Points [25, 0] Branch { Points [0, -55] DstBlock "Posedge" DstPort 1 } Branch { Points [0, 65] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "From8" SrcPort 1 Points [545, 0; 0, -55] DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "trig_0_out" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "trig_1_out" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "trig_2_0_out" DstPort 1 } Line { SrcBlock "Register5" SrcPort 1 DstBlock "trig_3_0_out" DstPort 1 } Line { SrcBlock "Register8" SrcPort 1 DstBlock "trig_4_0_out" DstPort 1 } Line { SrcBlock "Register11" SrcPort 1 DstBlock "trig_5_0_out" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "trig_2_1_out" DstPort 1 } Line { SrcBlock "Register6" SrcPort 1 DstBlock "trig_3_1_out" DstPort 1 } Line { SrcBlock "Register9" SrcPort 1 DstBlock "trig_4_1_out" DstPort 1 } Line { SrcBlock "Register12" SrcPort 1 DstBlock "trig_5_1_out" DstPort 1 } Line { SrcBlock "trig_2_1_out" SrcPort 1 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "trig_3_1_out" SrcPort 1 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "trig_4_1_out" SrcPort 1 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "trig_5_1_out" SrcPort 1 DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "Pulse Extender (4 cycles)" SrcPort 1 DstBlock "Register1" DstPort 1 } Annotation { Name "These values should be changed if modifications are made to this core" Position [185, 222] DropShadow on } Annotation { Name "Copyright 2014 Mango Communications, Inc. All rights reserved.\n\nDistributed under the WARP Licens" "e:\nhttp://warpproject.org/license" Position [177, 166] DropShadow on } Annotation { Name "NOTE: This counter for the AGC output allows for delay values up to 65535 steps (ie up to 409593.7" "5 ns). \nThis is to replace the input delay of the previous AGC pcore as well as compensate for any differences" " \nbetween WARP v3 and WARP v2 hardware. " Position [1095, 509] HorizontalAlignment "left" } Annotation { Name "NOTE: Unlike the ASRs for other trigger outputs, regardless of the length of the input trigger pul" "se, this \ncircuit will only generate an output pulse that is 1 clock cycle wide. This can cause issues if the p" "eripherals\nthat accept this trigger are clocked at different frequencies from the trigger manager.\n\nThis is a" "n issue in WARP v2 because the AGC is clocked at 80 MHz due to timing constraints. Therefore, \nwe are adding a" " pulse extender to make sure that all AGC triggers will be detected." Position [1638, 297] HorizontalAlignment "left" } } } MatData { NumRecords 1 DataRecord { Tag DataTag0 Data " %)30 . 6(( 8 ( @ % \" $ ! 0 % 0 !@ $ , 0 . . 8 ( ! " "% \" $ ' 0 0 !P '1A7, !V86QU97, . P 8 ( 0 % \" $ \" 0 " ". 0 8 ( ! % \" $ + 0 0 \"P $A$3\"!.971L:7-T . 2 8 " " ( ! % \" $ 8 0 0 & $5X<&]R=\"!A7-T96T #@ $@ & \" 0 !0 @ ! & $ $ !@ !!8V-O 0 \"@% !I;F9O961I= !X:6QI;GAF86UI;'D !P87)T " " !S<&5E9 !P86-K86=E !" "S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5S:7-?=&]O; !C;&]C:U]W6YT:%]F:6QE7W-G861V86YC960 !3>6YT:%]F:6QE " " !);7!L7V9I;&5?7-C;&M?<&5R:6]D !D8VU?:6YP=" "71?8VQO8VM?<&5R:6]D !I;F-R7VYE=&QI7-T96T@1V5N97)A=&]R X X !@ @ $ 4 ( " " 0 < ! ! ' =FER=&5X-@ . 0 8 ( ! % \" $ * 0 0 " "\"@ 'AC-G9L>#(T,'0 . , 8 ( ! % \" $ \" 0 0 ( +3( X X " " !@ @ $ 4 ( 0 8 ! ! & 9F8Q,34V . , 8 ( ! % \"" " 0 0 X P !@ @ $ 4 ( 0 , ! ! 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7-G96X X " " P !@ @ $ 4 ( ! ! #@ & & \" 0 !0 @ " " ! +@ $ $ \"X U,\"PU,\"PM,2PM,2QT;VME;BQW:&ET92PP+# W-S,T+')I9VAT+\"Q;(%TL6R!= . \" , 8" " ( ! % \" $ #7 @ 0 0 UP( &9P'0G*3L #@ # & \" 0 !0 @ $ $ . , " "8 ( ! % \" 0 0 X P !@ @ $ 4 ( " " ! ! #@ # & \" 0 !0 @ ! P $ $ # &]F9@ . , 8 " " ( ! % \" $ $ 0 0 0 5DA$3 X ! !@ @ $ 4 ( 0 T " " ! ! - 6%-4($1E9F%U;'1S*@ X ! !@ @ $ 4 ( 0 T ! ! " "- 25-%($1E9F%U;'1S*@ X X !@ @ & 4 ( 0 $ ! D ( . " " . 8 ( !@ % \" $ ! 0 ) \" #@ #@ & \" 0 " " !0 @ ! !@ $ $ 8 Y+C(N,#$ X ! !@ @ $ 4 ( 0 T ! " " ! - >&QE9&MS971T:6YG

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