Model {
  Name			  "w3_warplab_trigger_proc"
  Version		  7.7
  MdlSubVersion		  0
  GraphicalInterface {
    NumRootInports	    0
    NumRootOutports	    0
    ParameterArgumentNames  ""
    ComputedModelVersion    "1.461"
    NumModelReferences	    0
    NumTestPointedSignals   0
  }
  SavedCharacterEncoding  "windows-1252"
  SaveDefaultBlockParams  on
  ScopeRefreshTime	  0.035000
  OverrideScopeRefreshTime on
  DisableAllScopes	  off
  DataTypeOverride	  "UseLocalSettings"
  DataTypeOverrideAppliesTo "AllNumericTypes"
  MinMaxOverflowLogging	  "UseLocalSettings"
  MinMaxOverflowArchiveMode "Overwrite"
  MaxMDLFileLineLength	  120
  InitFcn		  "w3_warplab_trigger_proc_init"
  StartFcn		  "w3_warplab_trigger_proc_init"
  Created		  "Wed Feb 27 22:39:03 2013"
  Creator		  "murphpo"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "mango"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Wed Dec 02 17:25:52 2015"
  RTWModifiedTimeStamp	  370977813
  ModelVersionFormat	  "1.%<AutoIncrement:461>"
  ConfigurationManager	  "None"
  SampleTimeColors	  off
  SampleTimeAnnotations	  off
  LibraryLinkDisplay	  "none"
  WideLines		  off
  ShowLineDimensions	  off
  ShowPortDataTypes	  on
  ShowLoopsOnError	  on
  IgnoreBidirectionalLines off
  ShowStorageClass	  off
  ShowTestPointIcons	  on
  ShowSignalResolutionIcons on
  ShowViewerIcons	  on
  SortedOrder		  off
  ExecutionContextIcon	  off
  ShowLinearizationAnnotations on
  BlockNameDataTip	  off
  BlockParametersDataTip  off
  BlockDescriptionStringDataTip	off
  ToolBar		  on
  StatusBar		  on
  BrowserShowLibraryLinks off
  BrowserLookUnderMasks	  off
  SimulationMode	  "normal"
  LinearizationMsg	  "none"
  Profile		  off
  ParamWorkspaceSource	  "MATLABWorkspace"
  AccelSystemTargetFile	  "accel.tlc"
  AccelTemplateMakefile	  "accel_default_tmf"
  AccelMakeCommand	  "make_rtw"
  TryForcingSFcnDF	  off
  Object {
    $PropName		    "DataLoggingOverride"
    $ObjectID		    1
    $ClassName		    "Simulink.SimulationData.ModelLoggingInfo"
    model_		    "eth_pkt_sniff"
    overrideMode_	    [0.0]
    Array {
      Type		      "Cell"
      Dimension		      1
      Cell		      "eth_pkt_sniff"
      PropName		      "logAsSpecifiedByModels_"
    }
    Array {
      Type		      "Cell"
      Dimension		      1
      Cell		      []
      PropName		      "logAsSpecifiedByModelsSSIDs_"
    }
  }
  RecordCoverage	  off
  CovPath		  "/"
  CovSaveName		  "covdata"
  CovMetricSettings	  "dw"
  CovNameIncrementing	  off
  CovHtmlReporting	  on
  CovForceBlockReductionOff on
  covSaveCumulativeToWorkspaceVar on
  CovSaveSingleToWorkspaceVar on
  CovCumulativeVarName	  "covCumulativeData"
  CovCumulativeReport	  off
  CovReportOnPause	  on
  CovModelRefEnable	  "Off"
  CovExternalEMLEnable	  off
  ExtModeBatchMode	  off
  ExtModeEnableFloating	  on
  ExtModeTrigType	  "manual"
  ExtModeTrigMode	  "normal"
  ExtModeTrigPort	  "1"
  ExtModeTrigElement	  "any"
  ExtModeTrigDuration	  1000
  ExtModeTrigDurationFloating "auto"
  ExtModeTrigHoldOff	  0
  ExtModeTrigDelay	  0
  ExtModeTrigDirection	  "rising"
  ExtModeTrigLevel	  0
  ExtModeArchiveMode	  "off"
  ExtModeAutoIncOneShot	  off
  ExtModeIncDirWhenArm	  off
  ExtModeAddSuffixToVar	  off
  ExtModeWriteAllDataToWs off
  ExtModeArmWhenConnect	  on
  ExtModeSkipDownloadWhenConnect off
  ExtModeLogAll		  on
  ExtModeAutoUpdateStatusClock on
  BufferReuse		  on
  ShowModelReferenceBlockVersion off
  ShowModelReferenceBlockIO off
  Array {
    Type		    "Handle"
    Dimension		    1
    Simulink.ConfigSet {
      $ObjectID		      2
      Version		      "1.11.0"
      Array {
	Type			"Handle"
	Dimension		8
	Simulink.SolverCC {
	  $ObjectID		  3
	  Version		  "1.11.0"
	  StartTime		  "0.0"
	  StopTime		  "60"
	  AbsTol		  "auto"
	  FixedStep		  "auto"
	  InitialStep		  "auto"
	  MaxNumMinSteps	  "-1"
	  MaxOrder		  5
	  ZcThreshold		  "auto"
	  ConsecutiveZCsStepRelTol "10*128*eps"
	  MaxConsecutiveZCs	  "1000"
	  ExtrapolationOrder	  4
	  NumberNewtonIterations  1
	  MaxStep		  "auto"
	  MinStep		  "auto"
	  MaxConsecutiveMinStep	  "1"
	  RelTol		  "1e-3"
	  SolverMode		  "Auto"
	  ConcurrentTasks	  off
	  Solver		  "ode45"
	  SolverName		  "ode45"
	  SolverJacobianMethodControl "auto"
	  ShapePreserveControl	  "DisableAll"
	  ZeroCrossControl	  "UseLocalSettings"
	  ZeroCrossAlgorithm	  "Nonadaptive"
	  AlgebraicLoopSolver	  "TrustRegion"
	  SolverResetMethod	  "Fast"
	  PositivePriorityOrder	  off
	  AutoInsertRateTranBlk	  off
	  SampleTimeConstraint	  "Unconstrained"
	  InsertRTBMode		  "Whenever possible"
	}
	Simulink.DataIOCC {
	  $ObjectID		  4
	  Version		  "1.11.0"
	  Decimation		  "1"
	  ExternalInput		  "[t, u]"
	  FinalStateName	  "xFinal"
	  InitialState		  "xInitial"
	  LimitDataPoints	  on
	  MaxDataPoints		  "1000"
	  LoadExternalInput	  off
	  LoadInitialState	  off
	  SaveFinalState	  off
	  SaveCompleteFinalSimState off
	  SaveFormat		  "Array"
	  SignalLoggingSaveFormat "ModelDataLogs"
	  SaveOutput		  on
	  SaveState		  off
	  SignalLogging		  on
	  DSMLogging		  on
	  InspectSignalLogs	  off
	  SaveTime		  on
	  ReturnWorkspaceOutputs  off
	  StateSaveName		  "xout"
	  TimeSaveName		  "tout"
	  OutputSaveName	  "yout"
	  SignalLoggingName	  "logsout"
	  DSMLoggingName	  "dsmout"
	  OutputOption		  "RefineOutputTimes"
	  OutputTimes		  "[]"
	  ReturnWorkspaceOutputsName "out"
	  Refine		  "1"
	}
	Simulink.OptimizationCC {
	  $ObjectID		  5
	  Version		  "1.11.0"
	  Array {
	    Type		    "Cell"
	    Dimension		    8
	    Cell		    "BooleansAsBitfields"
	    Cell		    "PassReuseOutputArgsAs"
	    Cell		    "PassReuseOutputArgsThreshold"
	    Cell		    "ZeroExternalMemoryAtStartup"
	    Cell		    "ZeroInternalMemoryAtStartup"
	    Cell		    "OptimizeModelRefInitCode"
	    Cell		    "NoFixptDivByZeroProtection"
	    Cell		    "UseSpecifiedMinMax"
	    PropName		    "DisabledProps"
	  }
	  BlockReduction	  on
	  BooleanDataType	  on
	  ConditionallyExecuteInputs on
	  InlineParams		  off
	  UseIntDivNetSlope	  off
	  UseSpecifiedMinMax	  off
	  InlineInvariantSignals  off
	  OptimizeBlockIOStorage  on
	  BufferReuse		  on
	  EnhancedBackFolding	  off
	  StrengthReduction	  off
	  ExpressionFolding	  on
	  BooleansAsBitfields	  off
	  BitfieldContainerType	  "uint_T"
	  EnableMemcpy		  on
	  MemcpyThreshold	  64
	  PassReuseOutputArgsAs	  "Structure reference"
	  ExpressionDepthLimit	  2147483647
	  FoldNonRolledExpr	  on
	  LocalBlockOutputs	  on
	  RollThreshold		  5
	  SystemCodeInlineAuto	  off
	  StateBitsets		  off
	  DataBitsets		  off
	  UseTempVars		  off
	  ZeroExternalMemoryAtStartup on
	  ZeroInternalMemoryAtStartup on
	  InitFltsAndDblsToZero	  off
	  NoFixptDivByZeroProtection off
	  EfficientFloat2IntCast  off
	  EfficientMapNaN2IntZero on
	  OptimizeModelRefInitCode off
	  LifeSpan		  "inf"
	  MaxStackSize		  "Inherit from target"
	  BufferReusableBoundary  on
	  SimCompilerOptimization "Off"
	  AccelVerboseBuild	  off
	  AccelParallelForEachSubsystem	on
	}
	Simulink.DebuggingCC {
	  $ObjectID		  6
	  Version		  "1.11.0"
	  RTPrefix		  "error"
	  ConsistencyChecking	  "none"
	  ArrayBoundsChecking	  "none"
	  SignalInfNanChecking	  "none"
	  SignalRangeChecking	  "none"
	  ReadBeforeWriteMsg	  "UseLocalSettings"
	  WriteAfterWriteMsg	  "UseLocalSettings"
	  WriteAfterReadMsg	  "UseLocalSettings"
	  AlgebraicLoopMsg	  "warning"
	  ArtificialAlgebraicLoopMsg "warning"
	  SaveWithDisabledLinksMsg "warning"
	  SaveWithParameterizedLinksMsg	"warning"
	  CheckSSInitialOutputMsg on
	  UnderspecifiedInitializationDetection	"Classic"
	  MergeDetectMultiDrivingBlocksExec "none"
	  CheckExecutionContextPreStartOutputMsg off
	  CheckExecutionContextRuntimeOutputMsg	off
	  SignalResolutionControl "UseLocalSettings"
	  BlockPriorityViolationMsg "warning"
	  MinStepSizeMsg	  "warning"
	  TimeAdjustmentMsg	  "none"
	  MaxConsecutiveZCsMsg	  "error"
	  MaskedZcDiagnostic	  "warning"
	  IgnoredZcDiagnostic	  "warning"
	  SolverPrmCheckMsg	  "warning"
	  InheritedTsInSrcMsg	  "warning"
	  DiscreteInheritContinuousMsg "warning"
	  MultiTaskDSMMsg	  "error"
	  MultiTaskCondExecSysMsg "error"
	  MultiTaskRateTransMsg	  "error"
	  SingleTaskRateTransMsg  "none"
	  TasksWithSamePriorityMsg "warning"
	  SigSpecEnsureSampleTimeMsg "warning"
	  CheckMatrixSingularityMsg "none"
	  IntegerOverflowMsg	  "warning"
	  Int32ToFloatConvMsg	  "warning"
	  ParameterDowncastMsg	  "error"
	  ParameterOverflowMsg	  "error"
	  ParameterUnderflowMsg	  "none"
	  ParameterPrecisionLossMsg "warning"
	  ParameterTunabilityLossMsg "warning"
	  FixptConstUnderflowMsg  "none"
	  FixptConstOverflowMsg	  "none"
	  FixptConstPrecisionLossMsg "none"
	  UnderSpecifiedDataTypeMsg "none"
	  UnnecessaryDatatypeConvMsg "none"
	  VectorMatrixConversionMsg "none"
	  InvalidFcnCallConnMsg	  "error"
	  FcnCallInpInsideContextMsg "Enable All"
	  SignalLabelMismatchMsg  "none"
	  UnconnectedInputMsg	  "warning"
	  UnconnectedOutputMsg	  "warning"
	  UnconnectedLineMsg	  "warning"
	  SFcnCompatibilityMsg	  "none"
	  UniqueDataStoreMsg	  "none"
	  BusObjectLabelMismatch  "warning"
	  RootOutportRequireBusObject "warning"
	  AssertControl		  "UseLocalSettings"
	  EnableOverflowDetection off
	  ModelReferenceIOMsg	  "none"
	  ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"
	  ModelReferenceVersionMismatchMessage "none"
	  ModelReferenceIOMismatchMessage "none"
	  ModelReferenceCSMismatchMessage "none"
	  UnknownTsInhSupMsg	  "warning"
	  ModelReferenceDataLoggingMessage "warning"
	  ModelReferenceSymbolNameMessage "warning"
	  ModelReferenceExtraNoncontSigs "error"
	  StateNameClashWarn	  "warning"
	  SimStateInterfaceChecksumMismatchMsg "warning"
	  SimStateOlderReleaseMsg "error"
	  InitInArrayFormatMsg	  "warning"
	  StrictBusMsg		  "ErrorLevel1"
	  BusNameAdapt		  "WarnAndRepair"
	  NonBusSignalsTreatedAsBus "none"
	  LoggingUnavailableSignals "error"
	  BlockIODiagnostic	  "none"
	  SFUnusedDataAndEventsDiag "warning"
	  SFUnexpectedBacktrackingDiag "warning"
	  SFInvalidInputDataAccessInChartInitDiag "warning"
	  SFNoUnconditionalDefaultTransitionDiag "warning"
	  SFTransitionOutsideNaturalParentDiag "warning"
	}
	Simulink.HardwareCC {
	  $ObjectID		  7
	  Version		  "1.11.0"
	  ProdBitPerChar	  8
	  ProdBitPerShort	  16
	  ProdBitPerInt		  32
	  ProdBitPerLong	  32
	  ProdBitPerFloat	  32
	  ProdBitPerDouble	  64
	  ProdBitPerPointer	  32
	  ProdLargestAtomicInteger "Char"
	  ProdLargestAtomicFloat  "None"
	  ProdIntDivRoundTo	  "Undefined"
	  ProdEndianess		  "Unspecified"
	  ProdWordSize		  32
	  ProdShiftRightIntArith  on
	  ProdHWDeviceType	  "32-bit Generic"
	  TargetBitPerChar	  8
	  TargetBitPerShort	  16
	  TargetBitPerInt	  32
	  TargetBitPerLong	  32
	  TargetBitPerFloat	  32
	  TargetBitPerDouble	  64
	  TargetBitPerPointer	  32
	  TargetLargestAtomicInteger "Char"
	  TargetLargestAtomicFloat "None"
	  TargetShiftRightIntArith on
	  TargetIntDivRoundTo	  "Undefined"
	  TargetEndianess	  "Unspecified"
	  TargetWordSize	  32
	  TargetTypeEmulationWarnSuppressLevel 0
	  TargetPreprocMaxBitsSint 32
	  TargetPreprocMaxBitsUint 32
	  TargetHWDeviceType	  "Specified"
	  TargetUnknown		  off
	  ProdEqTarget		  on
	}
	Simulink.ModelReferenceCC {
	  $ObjectID		  8
	  Version		  "1.11.0"
	  UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
	  CheckModelReferenceTargetMessage "error"
	  EnableParallelModelReferenceBuilds off
	  ParallelModelReferenceErrorOnInvalidPool on
	  ParallelModelReferenceMATLABWorkerInit "None"
	  ModelReferenceNumInstancesAllowed "Multi"
	  PropagateVarSize	  "Infer from blocks in model"
	  ModelReferencePassRootInputsByReference on
	  ModelReferenceMinAlgLoopOccurrences off
	  PropagateSignalLabelsOutOfModel off
	  SupportModelReferenceSimTargetCustomCode off
	}
	Simulink.SFSimCC {
	  $ObjectID		  9
	  Version		  "1.11.0"
	  SFSimEnableDebug	  on
	  SFSimOverflowDetection  on
	  SFSimEcho		  on
	  SimBlas		  on
	  SimCtrlC		  on
	  SimExtrinsic		  on
	  SimIntegrity		  on
	  SimUseLocalCustomCode	  off
	  SimParseCustomCode	  on
	  SimBuildMode		  "sf_incremental_build"
	}
	Simulink.RTWCC {
	  $BackupClass		  "Simulink.RTWCC"
	  $ObjectID		  10
	  Version		  "1.11.0"
	  Array {
	    Type		    "Cell"
	    Dimension		    8
	    Cell		    "IncludeHyperlinkInReport"
	    Cell		    "GenerateTraceInfo"
	    Cell		    "GenerateTraceReport"
	    Cell		    "GenerateTraceReportSl"
	    Cell		    "GenerateTraceReportSf"
	    Cell		    "GenerateTraceReportEml"
	    Cell		    "GenerateSLWebview"
	    Cell		    "GenerateCodeMetricsReport"
	    PropName		    "DisabledProps"
	  }
	  SystemTargetFile	  "grt.tlc"
	  GenCodeOnly		  off
	  MakeCommand		  "make_rtw"
	  GenerateMakefile	  on
	  TemplateMakefile	  "grt_default_tmf"
	  GenerateReport	  off
	  SaveLog		  off
	  RTWVerbose		  on
	  RetainRTWFile		  off
	  ProfileTLC		  off
	  TLCDebug		  off
	  TLCCoverage		  off
	  TLCAssert		  off
	  ProcessScriptMode	  "Default"
	  ConfigurationMode	  "Optimized"
	  ConfigAtBuild		  off
	  RTWUseLocalCustomCode	  off
	  RTWUseSimCustomCode	  off
	  IncludeHyperlinkInReport off
	  LaunchReport		  off
	  TargetLang		  "C"
	  IncludeBusHierarchyInRTWFileBlockHierarchyMap	off
	  IncludeERTFirstTime	  off
	  GenerateTraceInfo	  off
	  GenerateTraceReport	  off
	  GenerateTraceReportSl	  off
	  GenerateTraceReportSf	  off
	  GenerateTraceReportEml  off
	  GenerateCodeInfo	  off
	  GenerateSLWebview	  off
	  GenerateCodeMetricsReport off
	  RTWCompilerOptimization "Off"
	  CheckMdlBeforeBuild	  "Off"
	  CustomRebuildMode	  "OnUpdate"
	  Array {
	    Type		    "Handle"
	    Dimension		    2
	    Simulink.CodeAppCC {
	      $ObjectID		      11
	      Version		      "1.11.0"
	      Array {
		Type			"Cell"
		Dimension		21
		Cell			"IgnoreCustomStorageClasses"
		Cell			"IgnoreTestpoints"
		Cell			"InsertBlockDesc"
		Cell			"InsertPolySpaceComments"
		Cell			"SFDataObjDesc"
		Cell			"MATLABFcnDesc"
		Cell			"SimulinkDataObjDesc"
		Cell			"DefineNamingRule"
		Cell			"SignalNamingRule"
		Cell			"ParamNamingRule"
		Cell			"InlinedPrmAccess"
		Cell			"CustomSymbolStr"
		Cell			"CustomSymbolStrGlobalVar"
		Cell			"CustomSymbolStrType"
		Cell			"CustomSymbolStrField"
		Cell			"CustomSymbolStrFcn"
		Cell			"CustomSymbolStrFcnArg"
		Cell			"CustomSymbolStrBlkIO"
		Cell			"CustomSymbolStrTmpVar"
		Cell			"CustomSymbolStrMacro"
		Cell			"ReqsInCode"
		PropName		"DisabledProps"
	      }
	      ForceParamTrailComments off
	      GenerateComments	      on
	      IgnoreCustomStorageClasses on
	      IgnoreTestpoints	      off
	      IncHierarchyInIds	      off
	      MaxIdLength	      31
	      PreserveName	      off
	      PreserveNameWithParent  off
	      ShowEliminatedStatement off
	      IncAutoGenComments      off
	      SimulinkDataObjDesc     off
	      SFDataObjDesc	      off
	      MATLABFcnDesc	      off
	      IncDataTypeInIds	      off
	      MangleLength	      1
	      CustomSymbolStrGlobalVar "$R$N$M"
	      CustomSymbolStrType     "$N$R$M"
	      CustomSymbolStrField    "$N$M"
	      CustomSymbolStrFcn      "$R$N$M$F"
	      CustomSymbolStrFcnArg   "rt$I$N$M"
	      CustomSymbolStrBlkIO    "rtb_$N$M"
	      CustomSymbolStrTmpVar   "$N$M"
	      CustomSymbolStrMacro    "$R$N$M"
	      DefineNamingRule	      "None"
	      ParamNamingRule	      "None"
	      SignalNamingRule	      "None"
	      InsertBlockDesc	      off
	      InsertPolySpaceComments off
	      SimulinkBlockComments   on
	      MATLABSourceComments    off
	      EnableCustomComments    off
	      InlinedPrmAccess	      "Literals"
	      ReqsInCode	      off
	      UseSimReservedNames     off
	    }
	    Simulink.GRTTargetCC {
	      $BackupClass	      "Simulink.TargetCC"
	      $ObjectID		      12
	      Version		      "1.11.0"
	      Array {
		Type			"Cell"
		Dimension		16
		Cell			"GeneratePreprocessorConditionals"
		Cell			"IncludeMdlTerminateFcn"
		Cell			"CombineOutputUpdateFcns"
		Cell			"SuppressErrorStatus"
		Cell			"ERTCustomFileBanners"
		Cell			"GenerateSampleERTMain"
		Cell			"GenerateTestInterfaces"
		Cell			"ModelStepFunctionPrototypeControlCompliant"
		Cell			"CPPClassGenCompliant"
		Cell			"MultiInstanceERTCode"
		Cell			"PurelyIntegerCode"
		Cell			"SupportComplex"
		Cell			"SupportAbsoluteTime"
		Cell			"SupportContinuousTime"
		Cell			"SupportNonInlinedSFcns"
		Cell			"PortableWordSizes"
		PropName		"DisabledProps"
	      }
	      TargetFcnLib	      "ansi_tfl_table_tmw.mat"
	      TargetLibSuffix	      ""
	      TargetPreCompLibLocation ""
	      TargetFunctionLibrary   "ANSI_C"
	      UtilityFuncGeneration   "Auto"
	      ERTMultiwordTypeDef     "System defined"
	      FunctionExecutionProfile off
	      CodeExecutionProfiling  off
	      ERTCodeCoverageTool     "None"
	      ERTMultiwordLength      256
	      MultiwordLength	      2048
	      GenerateFullHeader      on
	      GenerateSampleERTMain   off
	      GenerateTestInterfaces  off
	      IsPILTarget	      off
	      ModelReferenceCompliant on
	      ParMdlRefBuildCompliant on
	      CompOptLevelCompliant   on
	      IncludeMdlTerminateFcn  on
	      GeneratePreprocessorConditionals "Disable all"
	      CombineOutputUpdateFcns off
	      CombineSignalStateStructs	off
	      SuppressErrorStatus     off
	      ERTFirstTimeCompliant   off
	      IncludeFileDelimiter    "Auto"
	      ERTCustomFileBanners    off
	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
	      MatFileLogging	      on
	      MultiInstanceERTCode    off
	      SupportNonFinite	      on
	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      SupportVariableSizeSignals off
	      EnableShiftOperators    on
	      ParenthesesLevel	      "Nominal"
	      PortableWordSizes	      off
	      ModelStepFunctionPrototypeControlCompliant off
	      CPPClassGenCompliant    off
	      AutosarCompliant	      off
	      UseMalloc		      off
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      ExtModeIntrfLevel	      "Level1"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      RTWCAPIRootIO	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      CurrentDlgPage	      "Hardware Implementation"
      ConfigPrmDlgPosition     [ 840, 485, 1720, 1115 ] 
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    2
  }
  BlockDefaults {
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
    BlockRotation	    0
    BlockMirror		    off
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    UseDisplayTextAsClickCallback off
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  BlockParameterDefaults {
    Block {
      BlockType		      Constant
      Value		      "1"
      VectorParams1D	      on
      SamplingMode	      "Sample based"
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeStr	      "Inherit: Inherit from 'Constant value'"
      LockScale		      off
      SampleTime	      "inf"
      FramePeriod	      "inf"
      PreserveConstantTs      off
    }
    Block {
      BlockType		      DiscretePulseGenerator
      PulseType		      "Sample based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Period		      "2"
      PulseWidth	      "1"
      PhaseDelay	      "0"
      SampleTime	      "1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      Display
      Format		      "short"
      Decimation	      "10"
      Floating		      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      From
      IconDisplay	      "Tag"
      TagVisibility	      "local"
    }
    Block {
      BlockType		      Goto
      IconDisplay	      "Tag"
    }
    Block {
      BlockType		      Inport
      Port		      "1"
      OutputFunctionCall      off
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeStr	      "Inherit: auto"
      LockScale		      off
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      VarSizeSig	      "Inherit"
      SampleTime	      "-1"
      SignalType	      "auto"
      SamplingMode	      "auto"
      LatchByDelayingOutsideSignal off
      LatchInputForFeedbackSignals off
      Interpolate	      on
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeStr	      "Inherit: auto"
      LockScale		      off
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      VarSizeSig	      "Inherit"
      SampleTime	      "-1"
      SignalType	      "auto"
      SamplingMode	      "auto"
      SourceOfInitialOutputValue "Dialog"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      Scope
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Step
      Time		      "1"
      Before		      "0"
      After		      "1"
      SampleTime	      "-1"
      VectorParams1D	      on
      ZeroCross		      on
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      "FromPortIcon"
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      TreatAsAtomicUnit	      off
      CheckFcnCallInpInsideContextMsg off
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      DataTypeOverrideAppliesTo	"AllNumericTypes"
      MinMaxOverflowLogging   "UseLocalSettings"
      Variant		      off
      GeneratePreprocessorConditionals off
    }
    Block {
      BlockType		      Terminator
    }
  }
  System {
    Name		    "w3_warplab_trigger_proc"
    Location		    [43, 93, 2350, 1345]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    SIDHighWatermark	    "11126"
    Block {
      BlockType		      Goto
      Name		      " 1"
      SID		      "6739"
      Position		      [205, 257, 320, 273]
      ShowName		      off
      GotoTag		      "Num_Inputs"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      " 2"
      SID		      "6740"
      Position		      [205, 302, 320, 318]
      ShowName		      off
      GotoTag		      "Num_Outputs"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      " 3"
      SID		      "6741"
      Position		      [205, 347, 320, 363]
      ShowName		      off
      GotoTag		      "Core_ID"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      " 4"
      SID		      "10106"
      Position		      [1595, 271, 1685, 289]
      ShowName		      off
      GotoTag		      "OUT0"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      " 5"
      SID		      "10675"
      Position		      [1595, 471, 1685, 489]
      ShowName		      off
      GotoTag		      "OUT1"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      " 6"
      SID		      "10676"
      Position		      [1595, 671, 1685, 689]
      ShowName		      off
      GotoTag		      "OUT2"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      " 7"
      SID		      "10677"
      Position		      [1595, 871, 1685, 889]
      ShowName		      off
      GotoTag		      "OUT3"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      " 8"
      SID		      "10678"
      Position		      [1595, 1071, 1685, 1089]
      ShowName		      off
      GotoTag		      "OUT4"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Goto
      Name		      " 9"
      SID		      "10679"
      Position		      [1595, 1271, 1685, 1289]
      ShowName		      off
      GotoTag		      "OUT5"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      Reference
      Name		      " System Generator"
      SID		      "1760"
      Tag		      "genX"
      Ports		      []
      Position		      [27, 22, 94, 87]
      ShowName		      off
      AttributesFormatString  "System\\nGenerator"
      LibraryVersion	      "1.2"
      UserDataPersistent      on
      UserData		      "DataTag0"
      SourceBlock	      "xbsIndex_r4/ System Generator"
      SourceType	      "Xilinx System Generator Block"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      GeneratePreprocessorConditionals off
      infoedit		      " System Generator"
      xilinxfamily	      "virtex6"
      part		      "xc6vlx240t"
      speed		      "-2"
      package		      "ff1156"
      synthesis_tool	      "XST"
      clock_wrapper	      "Clock Enables"
      directory		      "./trigger_proc"
      proj_type		      "Project Navigator"
      Synth_file	      "XST Defaults"
      Impl_file		      "ISE Defaults"
      testbench		      off
      simulink_period	      "1"
      sysclk_period	      "10"
      dcm_input_clock_period  "10"
      incr_netlist	      off
      trim_vbits	      "Everywhere in SubSystem"
      dbl_ovrd		      "According to Block Masks"
      core_generation	      "According to Block Masks"
      run_coregen	      off
      deprecated_control      off
      eval_field	      "0"
      has_advanced_control    "0"
      sggui_pos		      "33,915,464,470"
      block_type	      "sysgen"
      sg_icon_stat	      "67,65,0,0,token,white,0,58c5b5770fe5f7c311f53dbc6e73f0f6,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 67 67 0 0 ],[0 0 65 65 0 ],[1 1 1 ]"
      ");\npatch([2.9625 22.47 35.97 49.47 62.97 35.97 16.4625 2.9625 ],[46.985 46.985 60.485 46.985 60.485 60.485 60.4"
      "85 46.985 ],[0.933333 0.203922 0.141176 ]);\npatch([16.4625 35.97 22.47 2.9625 16.4625 ],[33.485 33.485 46.985 4"
      "6.985 33.485 ],[0.698039 0.0313725 0.219608 ]);\npatch([2.9625 22.47 35.97 16.4625 2.9625 ],[19.985 19.985 33.48"
      "5 33.485 19.985 ],[0.933333 0.203922 0.141176 ]);\npatch([16.4625 62.97 49.47 35.97 22.47 2.9625 16.4625 ],[6.48"
      "5 6.485 19.985 6.485 19.985 19.985 6.485 ],[0.698039 0.0313725 0.219608 ]);\nfprintf('','COMMENT: end icon graph"
      "ics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "16-bit Output Delay Counter 0"
      SID		      "10704"
      Ports		      [2, 1]
      Position		      [935, 168, 1095, 237]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      Port {
	PortNumber		1
	Name			"trig_out_0_dlyd"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      System {
	Name			"16-bit Output Delay Counter 0"
	Location		[499, 186, 2341, 1031]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10705"
	  Position		  [20, 93, 50, 107]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "delay"
	  SID			  "10706"
	  Position		  [20, 163, 50, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "10707"
	  Ports			  [0, 1]
	  Position		  [350, 187, 405, 213]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
	  "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
	  ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
	  " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
	  " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
	  "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "10708"
	  Ports			  [1, 1]
	  Position		  [595, 140, 635, 160]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "40,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpri"
	  "ntf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  SID			  "10709"
	  Ports			  [2, 1]
	  Position		  [775, 134, 810, 201]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  SID			  "10710"
	  Ports			  [2, 1]
	  Position		  [680, 99, 715, 166]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  SID			  "10711"
	  Ports			  [2, 1]
	  Position		  [680, 169, 715, 236]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 0"
	  SID			  "10712"
	  Ports			  [1, 1]
	  Position		  [105, 88, 160, 112]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 0"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "10713"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "10714"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "10715"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "10716"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10717"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 1"
	  SID			  "10718"
	  Ports			  [1, 1]
	  Position		  [590, 103, 645, 127]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 1"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "10719"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "10720"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "10721"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "10722"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10723"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 0"
	  SID			  "10724"
	  Ports			  [1, 1]
	  Position		  [250, 205, 295, 235]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  SID			  "10725"
	  Ports			  [2, 1]
	  Position		  [480, 156, 530, 214]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational4"
	  SID			  "10726"
	  Ports			  [2, 1]
	  Position		  [480, 86, 530, 144]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10727"
	  Ports			  [2, 1]
	  Position		  [250, 88, 295, 137]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [13, 209, 2156, 1324]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10728"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10729"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10730"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10731"
	      Ports		      [1, 1]
	      Position		      [210, 86, 235, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10732"
	      Ports		      [1, 1]
	      Position		      [210, 101, 235, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10733"
	      Ports		      [3, 1]
	      Position		      [255, 71, 300, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10734"
	      Position		      [325, 88, 355, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "timeout_counter"
	  SID			  "10735"
	  Ports			  [2, 1]
	  Position		  [350, 70, 410, 130]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[10 18 0 18 0 0 0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,524"
	  block_type		  "counter"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs"
	  "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10736"
	  Position		  [875, 163, 905, 177]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "timeout_counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "timeout_counter"
	  SrcPort		  1
	  DstBlock		  "Relational4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational4"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, -55; -245, 0]
	    Branch {
	      Points		      [0, 25]
	      DstBlock		      "timeout_counter"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [-90, 0; 0, 65]
	      DstBlock		      "S-R Latch"
	      DstPort		      2
	    }
	  }
	  Branch {
	    DstBlock		    "Posedge 1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "delay"
	  SrcPort		  1
	  Points		  [370, 0]
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Relational4"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 0"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 120]
	    DstBlock		    "Register 0"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    DstBlock		    "Logical4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  Points		  [25, 0; 0, 15]
	  DstBlock		  "Logical2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  DstBlock		  "Posedge 0"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  Points		  [25, 0; 0, -20]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 0"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Annotation {
	  Name			  "16-bit Delay Counter:\n\nNOTE:  The total delay through this counter is 1 clock cycle greater than \"dela"
	  "y\"\n\nNOTE:  This delay counter can only accept triggers greater than 'delay' clock cycles apart. \n    Because th"
	  "e timeout_counter counter uses an S-R latch for its enable that is triggered by \n    the rising edge of the input,"
	  " unless the latch is reset (ie the timeout_counter == delay), \n    then another rising edge on the input will not "
	  "change the behavior of the output.\n\nLogic:\n\nif (delay == 0)\n    output = rising_edge(input)\nelse\n    output "
	  "= rising_edge(timeout_counter == delay)"
	  Position		  [83, 364]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "16-bit Output Delay Counter 1"
      SID		      "10902"
      Ports		      [2, 1]
      Position		      [935, 368, 1095, 437]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      Port {
	PortNumber		1
	Name			"trig_out_1_dlyd"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      System {
	Name			"16-bit Output Delay Counter 1"
	Location		[10, 82, 2334, 1351]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10903"
	  Position		  [20, 93, 50, 107]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "delay"
	  SID			  "10904"
	  Position		  [20, 163, 50, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "10905"
	  Ports			  [0, 1]
	  Position		  [350, 187, 405, 213]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
	  "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
	  ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
	  " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
	  " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
	  "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "10906"
	  Ports			  [1, 1]
	  Position		  [595, 140, 635, 160]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "40,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpri"
	  "ntf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  SID			  "10907"
	  Ports			  [2, 1]
	  Position		  [775, 134, 810, 201]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  SID			  "10908"
	  Ports			  [2, 1]
	  Position		  [680, 99, 715, 166]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  SID			  "10909"
	  Ports			  [2, 1]
	  Position		  [680, 169, 715, 236]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 0"
	  SID			  "10910"
	  Ports			  [1, 1]
	  Position		  [105, 88, 160, 112]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 0"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "10911"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "10912"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "10913"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "10914"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10915"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 1"
	  SID			  "10916"
	  Ports			  [1, 1]
	  Position		  [590, 103, 645, 127]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 1"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "10917"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "10918"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "10919"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "10920"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10921"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 0"
	  SID			  "10922"
	  Ports			  [1, 1]
	  Position		  [250, 205, 295, 235]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  SID			  "10923"
	  Ports			  [2, 1]
	  Position		  [480, 156, 530, 214]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational4"
	  SID			  "10924"
	  Ports			  [2, 1]
	  Position		  [480, 86, 530, 144]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10925"
	  Ports			  [2, 1]
	  Position		  [250, 88, 295, 137]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [13, 209, 2156, 1324]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10926"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10927"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10928"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10929"
	      Ports		      [1, 1]
	      Position		      [210, 86, 235, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10930"
	      Ports		      [1, 1]
	      Position		      [210, 101, 235, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10931"
	      Ports		      [3, 1]
	      Position		      [255, 71, 300, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10932"
	      Position		      [325, 88, 355, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "timeout_counter"
	  SID			  "10933"
	  Ports			  [2, 1]
	  Position		  [350, 70, 410, 130]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[10 18 0 18 0 0 0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,524"
	  block_type		  "counter"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs"
	  "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10934"
	  Position		  [875, 163, 905, 177]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "timeout_counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "timeout_counter"
	  SrcPort		  1
	  DstBlock		  "Relational4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational4"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, -55; -245, 0]
	    Branch {
	      Points		      [0, 25]
	      DstBlock		      "timeout_counter"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [-90, 0; 0, 65]
	      DstBlock		      "S-R Latch"
	      DstPort		      2
	    }
	  }
	  Branch {
	    DstBlock		    "Posedge 1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "delay"
	  SrcPort		  1
	  Points		  [370, 0]
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Relational4"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 0"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 120]
	    DstBlock		    "Register 0"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    DstBlock		    "Logical4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  Points		  [25, 0; 0, 15]
	  DstBlock		  "Logical2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  DstBlock		  "Posedge 0"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  Points		  [25, 0; 0, -20]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 0"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Annotation {
	  Name			  "16-bit Delay Counter:\n\nNOTE:  The total delay through this counter is 1 clock cycle greater than \"dela"
	  "y\"\n\nNOTE:  This delay counter can only accept triggers greater than 'delay' clock cycles apart. \n    Because th"
	  "e timeout_counter counter uses an S-R latch for its enable that is triggered by \n    the rising edge of the input,"
	  " unless the latch is reset (ie the timeout_counter == delay), \n    then another rising edge on the input will not "
	  "change the behavior of the output.\n\nLogic:\n\nif (delay == 0)\n    output = rising_edge(input)\nelse\n    output "
	  "= rising_edge(timeout_counter == delay)"
	  Position		  [83, 364]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "16-bit Output Delay Counter 2"
      SID		      "10935"
      Ports		      [2, 1]
      Position		      [935, 568, 1095, 637]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      Port {
	PortNumber		1
	Name			"trig_out_2_dlyd"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      System {
	Name			"16-bit Output Delay Counter 2"
	Location		[10, 82, 2334, 1351]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10936"
	  Position		  [20, 93, 50, 107]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "delay"
	  SID			  "10937"
	  Position		  [20, 163, 50, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "10938"
	  Ports			  [0, 1]
	  Position		  [350, 187, 405, 213]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
	  "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
	  ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
	  " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
	  " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
	  "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "10939"
	  Ports			  [1, 1]
	  Position		  [595, 140, 635, 160]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "40,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpri"
	  "ntf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  SID			  "10940"
	  Ports			  [2, 1]
	  Position		  [775, 134, 810, 201]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  SID			  "10941"
	  Ports			  [2, 1]
	  Position		  [680, 99, 715, 166]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  SID			  "10942"
	  Ports			  [2, 1]
	  Position		  [680, 169, 715, 236]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 0"
	  SID			  "10943"
	  Ports			  [1, 1]
	  Position		  [105, 88, 160, 112]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 0"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "10944"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "10945"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "10946"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "10947"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10948"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 1"
	  SID			  "10949"
	  Ports			  [1, 1]
	  Position		  [590, 103, 645, 127]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 1"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "10950"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "10951"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "10952"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "10953"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10954"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 0"
	  SID			  "10955"
	  Ports			  [1, 1]
	  Position		  [250, 205, 295, 235]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  SID			  "10956"
	  Ports			  [2, 1]
	  Position		  [480, 156, 530, 214]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational4"
	  SID			  "10957"
	  Ports			  [2, 1]
	  Position		  [480, 86, 530, 144]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10958"
	  Ports			  [2, 1]
	  Position		  [250, 88, 295, 137]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [13, 209, 2156, 1324]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10959"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10960"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10961"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10962"
	      Ports		      [1, 1]
	      Position		      [210, 86, 235, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10963"
	      Ports		      [1, 1]
	      Position		      [210, 101, 235, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10964"
	      Ports		      [3, 1]
	      Position		      [255, 71, 300, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10965"
	      Position		      [325, 88, 355, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "timeout_counter"
	  SID			  "10966"
	  Ports			  [2, 1]
	  Position		  [350, 70, 410, 130]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[10 18 0 18 0 0 0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,524"
	  block_type		  "counter"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs"
	  "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10967"
	  Position		  [875, 163, 905, 177]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "timeout_counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "timeout_counter"
	  SrcPort		  1
	  DstBlock		  "Relational4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational4"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, -55; -245, 0]
	    Branch {
	      Points		      [0, 25]
	      DstBlock		      "timeout_counter"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [-90, 0; 0, 65]
	      DstBlock		      "S-R Latch"
	      DstPort		      2
	    }
	  }
	  Branch {
	    DstBlock		    "Posedge 1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "delay"
	  SrcPort		  1
	  Points		  [370, 0]
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Relational4"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 0"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 120]
	    DstBlock		    "Register 0"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    DstBlock		    "Logical4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  Points		  [25, 0; 0, 15]
	  DstBlock		  "Logical2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  DstBlock		  "Posedge 0"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  Points		  [25, 0; 0, -20]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 0"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Annotation {
	  Name			  "16-bit Delay Counter:\n\nNOTE:  The total delay through this counter is 1 clock cycle greater than \"dela"
	  "y\"\n\nNOTE:  This delay counter can only accept triggers greater than 'delay' clock cycles apart. \n    Because th"
	  "e timeout_counter counter uses an S-R latch for its enable that is triggered by \n    the rising edge of the input,"
	  " unless the latch is reset (ie the timeout_counter == delay), \n    then another rising edge on the input will not "
	  "change the behavior of the output.\n\nLogic:\n\nif (delay == 0)\n    output = rising_edge(input)\nelse\n    output "
	  "= rising_edge(timeout_counter == delay)"
	  Position		  [83, 364]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "16-bit Output Delay Counter 3"
      SID		      "10968"
      Ports		      [2, 1]
      Position		      [935, 768, 1095, 837]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      Port {
	PortNumber		1
	Name			"trig_out_3_dlyd"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      System {
	Name			"16-bit Output Delay Counter 3"
	Location		[10, 82, 2334, 1351]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10969"
	  Position		  [20, 93, 50, 107]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "delay"
	  SID			  "10970"
	  Position		  [20, 163, 50, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "10971"
	  Ports			  [0, 1]
	  Position		  [350, 187, 405, 213]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
	  "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
	  ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
	  " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
	  " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
	  "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "10972"
	  Ports			  [1, 1]
	  Position		  [595, 140, 635, 160]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "40,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpri"
	  "ntf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  SID			  "10973"
	  Ports			  [2, 1]
	  Position		  [775, 134, 810, 201]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  SID			  "10974"
	  Ports			  [2, 1]
	  Position		  [680, 99, 715, 166]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  SID			  "10975"
	  Ports			  [2, 1]
	  Position		  [680, 169, 715, 236]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 0"
	  SID			  "10976"
	  Ports			  [1, 1]
	  Position		  [105, 88, 160, 112]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 0"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "10977"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "10978"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "10979"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "10980"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10981"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 1"
	  SID			  "10982"
	  Ports			  [1, 1]
	  Position		  [590, 103, 645, 127]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 1"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "10983"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "10984"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "10985"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "10986"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10987"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 0"
	  SID			  "10988"
	  Ports			  [1, 1]
	  Position		  [250, 205, 295, 235]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  SID			  "10989"
	  Ports			  [2, 1]
	  Position		  [480, 156, 530, 214]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational4"
	  SID			  "10990"
	  Ports			  [2, 1]
	  Position		  [480, 86, 530, 144]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10991"
	  Ports			  [2, 1]
	  Position		  [250, 88, 295, 137]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [13, 209, 2156, 1324]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10992"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10993"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10994"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10995"
	      Ports		      [1, 1]
	      Position		      [210, 86, 235, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10996"
	      Ports		      [1, 1]
	      Position		      [210, 101, 235, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10997"
	      Ports		      [3, 1]
	      Position		      [255, 71, 300, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10998"
	      Position		      [325, 88, 355, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "timeout_counter"
	  SID			  "10999"
	  Ports			  [2, 1]
	  Position		  [350, 70, 410, 130]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[10 18 0 18 0 0 0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,524"
	  block_type		  "counter"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs"
	  "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "11000"
	  Position		  [875, 163, 905, 177]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "timeout_counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "timeout_counter"
	  SrcPort		  1
	  DstBlock		  "Relational4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational4"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, -55; -245, 0]
	    Branch {
	      Points		      [0, 25]
	      DstBlock		      "timeout_counter"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [-90, 0; 0, 65]
	      DstBlock		      "S-R Latch"
	      DstPort		      2
	    }
	  }
	  Branch {
	    DstBlock		    "Posedge 1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "delay"
	  SrcPort		  1
	  Points		  [370, 0]
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Relational4"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 0"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 120]
	    DstBlock		    "Register 0"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    DstBlock		    "Logical4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  Points		  [25, 0; 0, 15]
	  DstBlock		  "Logical2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  DstBlock		  "Posedge 0"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  Points		  [25, 0; 0, -20]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 0"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Annotation {
	  Name			  "16-bit Delay Counter:\n\nNOTE:  The total delay through this counter is 1 clock cycle greater than \"dela"
	  "y\"\n\nNOTE:  This delay counter can only accept triggers greater than 'delay' clock cycles apart. \n    Because th"
	  "e timeout_counter counter uses an S-R latch for its enable that is triggered by \n    the rising edge of the input,"
	  " unless the latch is reset (ie the timeout_counter == delay), \n    then another rising edge on the input will not "
	  "change the behavior of the output.\n\nLogic:\n\nif (delay == 0)\n    output = rising_edge(input)\nelse\n    output "
	  "= rising_edge(timeout_counter == delay)"
	  Position		  [83, 364]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "16-bit Output Delay Counter 4"
      SID		      "11001"
      Ports		      [2, 1]
      Position		      [935, 968, 1095, 1037]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      Port {
	PortNumber		1
	Name			"trig_out_4_dlyd"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      System {
	Name			"16-bit Output Delay Counter 4"
	Location		[10, 82, 2334, 1351]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "11002"
	  Position		  [20, 93, 50, 107]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "delay"
	  SID			  "11003"
	  Position		  [20, 163, 50, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "11004"
	  Ports			  [0, 1]
	  Position		  [350, 187, 405, 213]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
	  "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
	  ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
	  " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
	  " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
	  "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "11005"
	  Ports			  [1, 1]
	  Position		  [595, 140, 635, 160]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "40,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpri"
	  "ntf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  SID			  "11006"
	  Ports			  [2, 1]
	  Position		  [775, 134, 810, 201]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  SID			  "11007"
	  Ports			  [2, 1]
	  Position		  [680, 99, 715, 166]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  SID			  "11008"
	  Ports			  [2, 1]
	  Position		  [680, 169, 715, 236]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 0"
	  SID			  "11009"
	  Ports			  [1, 1]
	  Position		  [105, 88, 160, 112]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 0"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "11010"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "11011"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "11012"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "11013"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "11014"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 1"
	  SID			  "11015"
	  Ports			  [1, 1]
	  Position		  [590, 103, 645, 127]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 1"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "11016"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "11017"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "11018"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "11019"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "11020"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 0"
	  SID			  "11021"
	  Ports			  [1, 1]
	  Position		  [250, 205, 295, 235]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  SID			  "11022"
	  Ports			  [2, 1]
	  Position		  [480, 156, 530, 214]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational4"
	  SID			  "11023"
	  Ports			  [2, 1]
	  Position		  [480, 86, 530, 144]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "11024"
	  Ports			  [2, 1]
	  Position		  [250, 88, 295, 137]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [13, 209, 2156, 1324]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "11025"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "11026"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "11027"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "11028"
	      Ports		      [1, 1]
	      Position		      [210, 86, 235, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "11029"
	      Ports		      [1, 1]
	      Position		      [210, 101, 235, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "11030"
	      Ports		      [3, 1]
	      Position		      [255, 71, 300, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "11031"
	      Position		      [325, 88, 355, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "timeout_counter"
	  SID			  "11032"
	  Ports			  [2, 1]
	  Position		  [350, 70, 410, 130]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[10 18 0 18 0 0 0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,524"
	  block_type		  "counter"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs"
	  "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "11033"
	  Position		  [875, 163, 905, 177]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "timeout_counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "timeout_counter"
	  SrcPort		  1
	  DstBlock		  "Relational4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational4"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, -55; -245, 0]
	    Branch {
	      Points		      [0, 25]
	      DstBlock		      "timeout_counter"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [-90, 0; 0, 65]
	      DstBlock		      "S-R Latch"
	      DstPort		      2
	    }
	  }
	  Branch {
	    DstBlock		    "Posedge 1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "delay"
	  SrcPort		  1
	  Points		  [370, 0]
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Relational4"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 0"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 120]
	    DstBlock		    "Register 0"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    DstBlock		    "Logical4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  Points		  [25, 0; 0, 15]
	  DstBlock		  "Logical2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  DstBlock		  "Posedge 0"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  Points		  [25, 0; 0, -20]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 0"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Annotation {
	  Name			  "16-bit Delay Counter:\n\nNOTE:  The total delay through this counter is 1 clock cycle greater than \"dela"
	  "y\"\n\nNOTE:  This delay counter can only accept triggers greater than 'delay' clock cycles apart. \n    Because th"
	  "e timeout_counter counter uses an S-R latch for its enable that is triggered by \n    the rising edge of the input,"
	  " unless the latch is reset (ie the timeout_counter == delay), \n    then another rising edge on the input will not "
	  "change the behavior of the output.\n\nLogic:\n\nif (delay == 0)\n    output = rising_edge(input)\nelse\n    output "
	  "= rising_edge(timeout_counter == delay)"
	  Position		  [83, 364]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "16-bit Output Delay Counter 5"
      SID		      "11034"
      Ports		      [2, 1]
      Position		      [935, 1168, 1095, 1237]
      NamePlacement	      "alternate"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      Port {
	PortNumber		1
	Name			"trig_out_5_dlyd"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      System {
	Name			"16-bit Output Delay Counter 5"
	Location		[10, 82, 2334, 1351]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "11035"
	  Position		  [20, 93, 50, 107]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "delay"
	  SID			  "11036"
	  Position		  [20, 163, 50, 177]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "11037"
	  Ports			  [0, 1]
	  Position		  [350, 187, 405, 213]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
	  "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
	  ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
	  " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
	  " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
	  "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  SID			  "11038"
	  Ports			  [1, 1]
	  Position		  [595, 140, 635, 160]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement) operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  sg_icon_stat		  "40,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpri"
	  "ntf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  SID			  "11039"
	  Ports			  [2, 1]
	  Position		  [775, 134, 810, 201]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  SID			  "11040"
	  Ports			  [2, 1]
	  Position		  [680, 99, 715, 166]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  SID			  "11041"
	  Ports			  [2, 1]
	  Position		  [680, 169, 715, 236]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "35,67,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43.55"
	  " 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33.55 "
	  "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch("
	  "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);\nfpr"
	  "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 0"
	  SID			  "11042"
	  Ports			  [1, 1]
	  Position		  [105, 88, 160, 112]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 0"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "11043"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "11044"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "11045"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "11046"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "11047"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Posedge 1"
	  SID			  "11048"
	  Ports			  [1, 1]
	  Position		  [590, 103, 645, 127]
	  NamePlacement		  "alternate"
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Posedge 1"
	    Location		    [88, 301, 2330, 1301]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "D"
	      SID		      "11049"
	      Position		      [200, 253, 230, 267]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      SID		      "11050"
	      Ports		      [1, 1]
	      Position		      [425, 153, 460, 177]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo"
	      "p. If register retiming is enabled, the delay line is a chain of flip-flops."
	      rst		      off
	      infoeditControl	      "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
	      en		      off
	      latency		      "1"
	      dbl_ovrd		      off
	      reg_retiming	      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]"
	      ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3"
	      "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 "
	      "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6"
	      ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
	      ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      SID		      "11051"
	      Ports		      [1, 1]
	      Position		      [490, 156, 515, 174]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complement) operator."
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no"
	      "t');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical1"
	      SID		      "11052"
	      Ports		      [2, 1]
	      Position		      [540, 151, 585, 204]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      off
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "8"
	      bin_pt		      "2"
	      align_bp		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32."
	      "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3"
	      "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n"
	      "color('black');disp('and');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "11053"
	      Position		      [610, 173, 640, 187]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "D"
	      SrcPort		      1
	      Points		      [150, 0; 0, -70]
	      Branch {
		DstBlock		"Logical1"
		DstPort			2
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical1"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Annotation {
	      Name		      "Rising Edge Detection"
	      Position		      [500, 112]
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 0"
	  SID			  "11054"
	  Ports			  [1, 1]
	  Position		  [250, 205, 295, 235]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  SID			  "11055"
	  Ports			  [2, 1]
	  Position		  [480, 156, 530, 214]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational4"
	  SID			  "11056"
	  Ports			  [2, 1]
	  Position		  [480, 86, 530, 144]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[5 0 0 9 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "50,58,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.77 36.77 "
	  "43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 36.77"
	  " 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22.77 ],[1 1 1 ])"
	  ";\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77 ],[0.931 0.946 0"
	  ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
	  "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','"
	  "texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "11057"
	  Ports			  [2, 1]
	  Position		  [250, 88, 295, 137]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [13, 209, 2156, 1324]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "11058"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "11059"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "11060"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "11061"
	      Ports		      [1, 1]
	      Position		      [210, 86, 235, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "11062"
	      Ports		      [1, 1]
	      Position		      [210, 101, 235, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "1"
	      bin_pt		      "0"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2"
	      "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 "
	      "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);"
	      "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n"
	      "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label"
	      "('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "11063"
	      Ports		      [3, 1]
	      Position		      [255, 71, 300, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "11064"
	      Position		      [325, 88, 355, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "timeout_counter"
	  SID			  "11065"
	  Ports			  [2, 1]
	  Position		  [350, 70, 410, 130]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are the least expensive in hardware.  A count limited counter is"
	  " implemented by combining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  implementation	  "Fabric"
	  xl_use_area		  off
	  xl_area		  "[10 18 0 18 0 0 0]"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,524"
	  block_type		  "counter"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
	  "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs"
	  "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n"
	  "fprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "11066"
	  Position		  [875, 163, 905, 177]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "timeout_counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "timeout_counter"
	  SrcPort		  1
	  DstBlock		  "Relational4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Relational4"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, -55; -245, 0]
	    Branch {
	      Points		      [0, 25]
	      DstBlock		      "timeout_counter"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [-90, 0; 0, 65]
	      DstBlock		      "S-R Latch"
	      DstPort		      2
	    }
	  }
	  Branch {
	    DstBlock		    "Posedge 1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "delay"
	  SrcPort		  1
	  Points		  [370, 0]
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Relational4"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 0"
	  SrcPort		  1
	  Points		  [30, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 120]
	    DstBlock		    "Register 0"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    DstBlock		    "Logical4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -35]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Posedge 1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  Points		  [25, 0; 0, 15]
	  DstBlock		  "Logical2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  DstBlock		  "Posedge 0"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  Points		  [25, 0; 0, -20]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 0"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Annotation {
	  Name			  "16-bit Delay Counter:\n\nNOTE:  The total delay through this counter is 1 clock cycle greater than \"dela"
	  "y\"\n\nNOTE:  This delay counter can only accept triggers greater than 'delay' clock cycles apart. \n    Because th"
	  "e timeout_counter counter uses an S-R latch for its enable that is triggered by \n    the rising edge of the input,"
	  " unless the latch is reset (ie the timeout_counter == delay), \n    then another rising edge on the input will not "
	  "change the behavior of the output.\n\nLogic:\n\nif (delay == 0)\n    output = rising_edge(input)\nelse\n    output "
	  "= rising_edge(timeout_counter == delay)"
	  Position		  [83, 364]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "4 Cycle Pulse Extende 0"
      SID		      "9594"
      Ports		      [2, 1]
      Position		      [1205, 195, 1285, 235]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"4 Cycle Pulse Extende 0"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "9604"
	  Position		  [140, 168, 170, 182]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "bypass"
	  SID			  "9606"
	  Position		  [140, 88, 170, 102]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  SID			  "10349"
	  Ports			  [4, 1]
	  Position		  [600, 102, 655, 188]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[1 0 0 1 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "55,86,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 86 86 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 86 86 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[50.77 50.7"
	  "7 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[43.77 43.77 50.77 50"
	  ".77 43.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[36.77 36.77 43.77 43.77 36.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[29.77 29.77 36.77 29.77 36.77 36.77 29.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor"
	  "('black');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "9602"
	  Ports			  [3, 1]
	  Position		  [725, 71, 765, 219]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "40,148,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8."
	  "875 ],[79.55 79.55 84.55 79.55 84.55 84.55 84.55 79.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[74.55 "
	  "74.55 79.55 79.55 74.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[69.55 69.55 74.55 74.55 69"
	  ".55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[64.55 64.55 69.55 64.55 69.55 69.55 64.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 1"
	  SID			  "10352"
	  Ports			  [1, 1]
	  Position		  [300, 160, 350, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 2"
	  SID			  "10353"
	  Ports			  [1, 1]
	  Position		  [395, 160, 445, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 3"
	  SID			  "10354"
	  Ports			  [1, 1]
	  Position		  [495, 160, 545, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "9603"
	  Position		  [865, 138, 895, 152]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    Points		    [20, 0]
	    Branch {
	      DstBlock		      "Register 1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, -60]
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, 20]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "bypass"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register 1"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Register 2"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -20]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 3"
	  SrcPort		  1
	  DstBlock		  "Logical1"
	  DstPort		  4
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "4 Cycle Pulse Extende 1"
      SID		      "10393"
      Ports		      [2, 1]
      Position		      [1205, 395, 1285, 435]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"4 Cycle Pulse Extende 1"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10394"
	  Position		  [140, 168, 170, 182]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "bypass"
	  SID			  "10395"
	  Position		  [140, 88, 170, 102]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  SID			  "10396"
	  Ports			  [4, 1]
	  Position		  [600, 102, 655, 188]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[1 0 0 1 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "55,86,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 86 86 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 86 86 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[50.77 50.7"
	  "7 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[43.77 43.77 50.77 50"
	  ".77 43.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[36.77 36.77 43.77 43.77 36.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[29.77 29.77 36.77 29.77 36.77 36.77 29.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor"
	  "('black');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "10397"
	  Ports			  [3, 1]
	  Position		  [725, 71, 765, 219]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "40,148,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8."
	  "875 ],[79.55 79.55 84.55 79.55 84.55 84.55 84.55 79.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[74.55 "
	  "74.55 79.55 79.55 74.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[69.55 69.55 74.55 74.55 69"
	  ".55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[64.55 64.55 69.55 64.55 69.55 69.55 64.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 1"
	  SID			  "10398"
	  Ports			  [1, 1]
	  Position		  [300, 160, 350, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 2"
	  SID			  "10399"
	  Ports			  [1, 1]
	  Position		  [395, 160, 445, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 3"
	  SID			  "10400"
	  Ports			  [1, 1]
	  Position		  [495, 160, 545, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10401"
	  Position		  [865, 138, 895, 152]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    Points		    [20, 0]
	    Branch {
	      DstBlock		      "Register 1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, -60]
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, 20]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "bypass"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register 1"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Register 2"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -20]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 3"
	  SrcPort		  1
	  DstBlock		  "Logical1"
	  DstPort		  4
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "4 Cycle Pulse Extende 2"
      SID		      "10457"
      Ports		      [2, 1]
      Position		      [1205, 595, 1285, 635]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"4 Cycle Pulse Extende 2"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10458"
	  Position		  [140, 168, 170, 182]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "bypass"
	  SID			  "10459"
	  Position		  [140, 88, 170, 102]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  SID			  "10460"
	  Ports			  [4, 1]
	  Position		  [600, 102, 655, 188]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[1 0 0 1 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "55,86,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 86 86 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 86 86 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[50.77 50.7"
	  "7 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[43.77 43.77 50.77 50"
	  ".77 43.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[36.77 36.77 43.77 43.77 36.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[29.77 29.77 36.77 29.77 36.77 36.77 29.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor"
	  "('black');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "10461"
	  Ports			  [3, 1]
	  Position		  [725, 71, 765, 219]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "40,148,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8."
	  "875 ],[79.55 79.55 84.55 79.55 84.55 84.55 84.55 79.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[74.55 "
	  "74.55 79.55 79.55 74.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[69.55 69.55 74.55 74.55 69"
	  ".55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[64.55 64.55 69.55 64.55 69.55 69.55 64.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 1"
	  SID			  "10462"
	  Ports			  [1, 1]
	  Position		  [300, 160, 350, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 2"
	  SID			  "10463"
	  Ports			  [1, 1]
	  Position		  [395, 160, 445, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 3"
	  SID			  "10464"
	  Ports			  [1, 1]
	  Position		  [495, 160, 545, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10465"
	  Position		  [865, 138, 895, 152]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    Points		    [20, 0]
	    Branch {
	      DstBlock		      "Register 1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, -60]
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, 20]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "bypass"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register 1"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Register 2"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -20]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 3"
	  SrcPort		  1
	  DstBlock		  "Logical1"
	  DstPort		  4
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "4 Cycle Pulse Extende 3"
      SID		      "10521"
      Ports		      [2, 1]
      Position		      [1205, 795, 1285, 835]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"4 Cycle Pulse Extende 3"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10522"
	  Position		  [140, 168, 170, 182]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "bypass"
	  SID			  "10523"
	  Position		  [140, 88, 170, 102]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  SID			  "10524"
	  Ports			  [4, 1]
	  Position		  [600, 102, 655, 188]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[1 0 0 1 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "55,86,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 86 86 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 86 86 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[50.77 50.7"
	  "7 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[43.77 43.77 50.77 50"
	  ".77 43.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[36.77 36.77 43.77 43.77 36.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[29.77 29.77 36.77 29.77 36.77 36.77 29.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor"
	  "('black');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "10525"
	  Ports			  [3, 1]
	  Position		  [725, 71, 765, 219]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "40,148,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8."
	  "875 ],[79.55 79.55 84.55 79.55 84.55 84.55 84.55 79.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[74.55 "
	  "74.55 79.55 79.55 74.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[69.55 69.55 74.55 74.55 69"
	  ".55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[64.55 64.55 69.55 64.55 69.55 69.55 64.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 1"
	  SID			  "10526"
	  Ports			  [1, 1]
	  Position		  [300, 160, 350, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 2"
	  SID			  "10527"
	  Ports			  [1, 1]
	  Position		  [395, 160, 445, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 3"
	  SID			  "10528"
	  Ports			  [1, 1]
	  Position		  [495, 160, 545, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10529"
	  Position		  [865, 138, 895, 152]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    Points		    [20, 0]
	    Branch {
	      DstBlock		      "Register 1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, -60]
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, 20]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "bypass"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register 1"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Register 2"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -20]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 3"
	  SrcPort		  1
	  DstBlock		  "Logical1"
	  DstPort		  4
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "4 Cycle Pulse Extende 4"
      SID		      "10585"
      Ports		      [2, 1]
      Position		      [1205, 995, 1285, 1035]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"4 Cycle Pulse Extende 4"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10586"
	  Position		  [140, 168, 170, 182]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "bypass"
	  SID			  "10587"
	  Position		  [140, 88, 170, 102]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  SID			  "10588"
	  Ports			  [4, 1]
	  Position		  [600, 102, 655, 188]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[1 0 0 1 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "55,86,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 86 86 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 86 86 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[50.77 50.7"
	  "7 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[43.77 43.77 50.77 50"
	  ".77 43.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[36.77 36.77 43.77 43.77 36.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[29.77 29.77 36.77 29.77 36.77 36.77 29.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor"
	  "('black');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "10589"
	  Ports			  [3, 1]
	  Position		  [725, 71, 765, 219]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "40,148,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8."
	  "875 ],[79.55 79.55 84.55 79.55 84.55 84.55 84.55 79.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[74.55 "
	  "74.55 79.55 79.55 74.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[69.55 69.55 74.55 74.55 69"
	  ".55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[64.55 64.55 69.55 64.55 69.55 69.55 64.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 1"
	  SID			  "10590"
	  Ports			  [1, 1]
	  Position		  [300, 160, 350, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 2"
	  SID			  "10591"
	  Ports			  [1, 1]
	  Position		  [395, 160, 445, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 3"
	  SID			  "10592"
	  Ports			  [1, 1]
	  Position		  [495, 160, 545, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10593"
	  Position		  [865, 138, 895, 152]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    Points		    [20, 0]
	    Branch {
	      DstBlock		      "Register 1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, -60]
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, 20]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "bypass"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register 1"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Register 2"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -20]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 3"
	  SrcPort		  1
	  DstBlock		  "Logical1"
	  DstPort		  4
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "4 Cycle Pulse Extende 5"
      SID		      "10649"
      Ports		      [2, 1]
      Position		      [1205, 1195, 1285, 1235]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"4 Cycle Pulse Extende 5"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10650"
	  Position		  [140, 168, 170, 182]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "bypass"
	  SID			  "10651"
	  Position		  [140, 88, 170, 102]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  SID			  "10652"
	  Ports			  [4, 1]
	  Position		  [600, 102, 655, 188]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "4"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[1 0 0 1 0 0 0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "VER_STRING_GOES_HERE"
	  sg_icon_stat		  "55,86,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 86 86 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 55 55 0 0 ],[0 0 86 86 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[50.77 50.7"
	  "7 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[43.77 43.77 50.77 50"
	  ".77 43.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[36.77 36.77 43.77 43.77 36.77 ],[1 1"
	  " 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[29.77 29.77 36.77 29.77 36.77 36.77 29.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor"
	  "('black');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  SID			  "10653"
	  Ports			  [3, 1]
	  Position		  [725, 71, 765, 219]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  sg_icon_stat		  "40,148,3,1,white,blue,3,eb98d690,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ],[0."
	  "77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 21.1429 126.857 148 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8."
	  "875 ],[79.55 79.55 84.55 79.55 84.55 84.55 84.55 79.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[74.55 "
	  "74.55 79.55 79.55 74.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[69.55 69.55 74.55 74.55 69"
	  ".55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[64.55 64.55 69.55 64.55 69.55 69.55 64.55 ],[0."
	  "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla"
	  "ck');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,"
	  "'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 1"
	  SID			  "10654"
	  Ports			  [1, 1]
	  Position		  [300, 160, 350, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 2"
	  SID			  "10655"
	  Ports			  [1, 1]
	  Position		  [395, 160, 445, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register 3"
	  SID			  "10656"
	  Ports			  [1, 1]
	  Position		  [495, 160, 545, 190]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  off
	  en			  off
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "register"
	  sg_icon_stat		  "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([20."
	  "1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n"
	  "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end"
	  " icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10657"
	  Position		  [865, 138, 895, 152]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    Points		    [20, 0]
	    Branch {
	      DstBlock		      "Register 1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, -60]
	      DstBlock		      "Logical1"
	      DstPort		      1
	    }
	  }
	  Branch {
	    Points		    [0, 20]
	    DstBlock		    "Mux"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "bypass"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Register 1"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -40]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Register 2"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Register 3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -20]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Register 3"
	  SrcPort		  1
	  DstBlock		  "Logical1"
	  DstPort		  4
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "CM-PLL Outputs"
      SID		      "9159"
      Ports		      [4]
      Position		      [1855, 874, 2025, 971]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"CM-PLL Outputs"
	Location		[66, 99, 2451, 1550]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "trig_2 "
	  SID			  "9160"
	  Position		  [85, 193, 115, 207]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_3 "
	  SID			  "9161"
	  Position		  [85, 153, 115, 167]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_4 "
	  SID			  "9162"
	  Position		  [85, 113, 115, 127]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_5 "
	  SID			  "9163"
	  Position		  [85, 73, 115, 87]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Black Box"
	  SID			  "9164"
	  Ports			  [7, 1]
	  Position		  [465, 221, 660, 369]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Black Box"
	  SourceType		  "Xilinx Black Box Block"
	  infoedit		  " Incorporates black box HDL and simulation model into a System Generator design.<br><br>You must suppl"
	  "y a Black Box with certain information about the HDL component you would like to bring into System Generator. This "
	  "information is provided through a Matlab function.<br><br>When \"Simulation mode\" is set to \"Inactive\", you will"
	  " typically want to provide a separate simulation model by using a Simulation Multiplexer.<br>When \"Simulation mode"
	  "\" is set to \"External co-simulator\", you must include a ModelSim block in the design."
	  init_code		  "trig_odelays_config"
	  sim_method		  "ISE Simulator"
	  verbose		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "blackbox2"
	  sg_icon_stat		  "195,148,7,1,white,blue,0,0aefaa97,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 195 195 0 0 ],[0 0 148 148 0 ],[0.77 0.82 "
	  "0.91 ]);\nplot([0 195 195 0 0 ],[0 0 148 148 0 ]);\npatch([50.275 80.62 101.62 122.62 143.62 101.62 71.275 50.275 ]"
	  ",[97.31 97.31 118.31 97.31 118.31 118.31 118.31 97.31 ],[1 1 1 ]);\npatch([71.275 101.62 80.62 50.275 71.275 ],[76."
	  "31 76.31 97.31 97.31 76.31 ],[0.931 0.946 0.973 ]);\npatch([50.275 80.62 101.62 71.275 50.275 ],[55.31 55.31 76.31 "
	  "76.31 55.31 ],[1 1 1 ]);\npatch([71.275 143.62 122.62 101.62 80.62 50.275 71.275 ],[34.31 34.31 55.31 34.31 55.31 5"
	  "5.31 34.31 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon tex"
	  "t');\ncolor('black');port_label('input',1,'trigs_disable');\ncolor('black');port_label('input',2,'trigs_in');\ncolo"
	  "r('black');port_label('input',3,'trig0_dly');\ncolor('black');port_label('input',4,'trig1_dly');\ncolor('black');po"
	  "rt_label('input',5,'trig2_dly');\ncolor('black');port_label('input',6,'trig3_dly');\ncolor('black');port_label('inp"
	  "ut',7,'update_delays');\ncolor('black');port_label('output',1,'trigs_out_pins');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat"
	  SID			  "9165"
	  Ports			  [4, 1]
	  Position		  [285, 59, 325, 221]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "40,162,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 162 162 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 40 40 0 0 ],[0 0 162 162 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[86.55 86.55 9"
	  "1.55 86.55 91.55 91.55 91.55 86.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[81.55 81.55 86.55 86.55 81"
	  ".55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[76.55 76.55 81.55 81.55 76.55 ],[1 1 1 ]);\npa"
	  "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[71.55 71.55 76.55 71.55 76.55 76.55 71.55 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','o"
	  "n');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "11094"
	  Ports			  [0, 1]
	  Position		  [385, 223, 415, 247]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "30,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.33 "
	  "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15.33"
	  " 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n"
	  "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp"
	  "ut',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From1"
	  SID			  "9166"
	  Position		  [85, 286, 270, 304]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_CMPLL1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From2"
	  SID			  "9167"
	  Position		  [85, 306, 270, 324]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_CMPLL2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From20"
	  SID			  "9168"
	  Position		  [85, 266, 270, 284]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_CMPLL0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From3"
	  SID			  "9169"
	  Position		  [85, 326, 270, 344]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_CMPLL3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From7"
	  SID			  "9170"
	  Position		  [85, 346, 270, 364]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAYS_UPDATE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "9193"
	  Position		  [985, 325, 1005, 345]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator16"
	  SID			  "9192"
	  Position		  [985, 285, 1005, 305]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "9194"
	  Position		  [985, 365, 1005, 385]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator3"
	  SID			  "9195"
	  Position		  [985, 405, 1005, 425]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[0]"
	  SID			  "9171"
	  Ports			  [1, 1]
	  Position		  [745, 287, 785, 303]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[1]"
	  SID			  "9172"
	  Ports			  [1, 1]
	  Position		  [745, 327, 785, 343]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "1"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[2]"
	  SID			  "9173"
	  Ports			  [1, 1]
	  Position		  [745, 367, 785, 383]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[3]"
	  SID			  "9174"
	  Ports			  [1, 1]
	  Position		  [745, 407, 785, 423]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "3"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "cm_pll_0_out"
	  SID			  "8710"
	  Ports			  [1, 1]
	  Position		  [845, 285, 905, 305]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "cm_pll_1_out"
	  SID			  "8712"
	  Ports			  [1, 1]
	  Position		  [845, 325, 905, 345]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "cm_pll_2_out"
	  SID			  "8714"
	  Ports			  [1, 1]
	  Position		  [845, 365, 905, 385]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "cm_pll_3_out"
	  SID			  "8716"
	  Ports			  [1, 1]
	  Position		  [845, 405, 905, 425]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Line {
	  SrcBlock		  "b[0]"
	  SrcPort		  1
	  DstBlock		  "cm_pll_0_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[1]"
	  SrcPort		  1
	  DstBlock		  "cm_pll_1_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[2]"
	  SrcPort		  1
	  DstBlock		  "cm_pll_2_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[3]"
	  SrcPort		  1
	  DstBlock		  "cm_pll_3_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Black Box"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    DstBlock		    "b[0]"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 40]
	    Branch {
	      DstBlock		      "b[1]"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 40]
	      Branch {
		DstBlock		"b[2]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 40]
		DstBlock		"b[3]"
		DstPort			1
	      }
	    }
	  }
	}
	Line {
	  SrcBlock		  "cm_pll_0_out"
	  SrcPort		  1
	  DstBlock		  "Terminator16"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "cm_pll_1_out"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "cm_pll_2_out"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "cm_pll_3_out"
	  SrcPort		  1
	  DstBlock		  "Terminator3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "trig_2 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "trig_3 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "trig_4 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "trig_5 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat"
	  SrcPort		  1
	  Points		  [50, 0; 0, 115]
	  DstBlock		  "Black Box"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From20"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From1"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From2"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From3"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "From7"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  7
	}
	Annotation {
	  Name			  "NOTE:  EXT_OUT_P0 (ie trig_2) should be at bit \n        position 0 on the trigs_in bus for the Black Box"
	  "."
	  Position		  [589, 194]
	}
	Annotation {
	  Name			  "NOTE:  Black Box contains a register packed into the IOB for  \n    trigger input.  No need for additiona"
	  "l register on this path. "
	  Position		  [408, 405]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "CoreID"
      SID		      "6731"
      Ports		      [0, 1]
      Position		      [90, 342, 145, 368]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      const		      "0"
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "8"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      explicit_period	      on
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "constant"
      sg_icon_stat	      "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 1"
      "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13"
      ".33 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 "
      "7.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
      ";\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Debug Header\nOutputs 1"
      SID		      "9103"
      Ports		      [4, 4]
      Position		      [1855, 614, 2025, 711]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      Port {
	PortNumber		1
	Name			"Out 2"
	PropagatedSignals	"Out 2"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      Port {
	PortNumber		2
	Name			"Out 3"
	PropagatedSignals	"Out 3"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      Port {
	PortNumber		3
	Name			"Out 4"
	PropagatedSignals	"Out 4"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      Port {
	PortNumber		4
	Name			"Out 5"
	PropagatedSignals	"Out 5"
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
      System {
	Name			"Debug Header\nOutputs 1"
	Location		[58, 577, 731, 1179]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "trig_2 "
	  SID			  "9124"
	  Position		  [100, 198, 130, 212]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_3 "
	  SID			  "9125"
	  Position		  [100, 158, 130, 172]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_4 "
	  SID			  "9126"
	  Position		  [100, 118, 130, 132]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_5 "
	  SID			  "9127"
	  Position		  [100, 78, 130, 92]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Black Box"
	  SID			  "9100"
	  Ports			  [7, 1]
	  Position		  [495, 226, 690, 374]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Black Box"
	  SourceType		  "Xilinx Black Box Block"
	  infoedit		  " Incorporates black box HDL and simulation model into a System Generator design.<br><br>You must suppl"
	  "y a Black Box with certain information about the HDL component you would like to bring into System Generator. This "
	  "information is provided through a Matlab function.<br><br>When \"Simulation mode\" is set to \"Inactive\", you will"
	  " typically want to provide a separate simulation model by using a Simulation Multiplexer.<br>When \"Simulation mode"
	  "\" is set to \"External co-simulator\", you must include a ModelSim block in the design."
	  init_code		  "trig_odelays_config"
	  sim_method		  "ISE Simulator"
	  verbose		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "blackbox2"
	  sg_icon_stat		  "195,148,7,1,white,blue,0,0aefaa97,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 195 195 0 0 ],[0 0 148 148 0 ],[0.77 0.82 "
	  "0.91 ]);\nplot([0 195 195 0 0 ],[0 0 148 148 0 ]);\npatch([50.275 80.62 101.62 122.62 143.62 101.62 71.275 50.275 ]"
	  ",[97.31 97.31 118.31 97.31 118.31 118.31 118.31 97.31 ],[1 1 1 ]);\npatch([71.275 101.62 80.62 50.275 71.275 ],[76."
	  "31 76.31 97.31 97.31 76.31 ],[0.931 0.946 0.973 ]);\npatch([50.275 80.62 101.62 71.275 50.275 ],[55.31 55.31 76.31 "
	  "76.31 55.31 ],[1 1 1 ]);\npatch([71.275 143.62 122.62 101.62 80.62 50.275 71.275 ],[34.31 34.31 55.31 34.31 55.31 5"
	  "5.31 34.31 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon tex"
	  "t');\ncolor('black');port_label('input',1,'trigs_disable');\ncolor('black');port_label('input',2,'trigs_in');\ncolo"
	  "r('black');port_label('input',3,'trig0_dly');\ncolor('black');port_label('input',4,'trig1_dly');\ncolor('black');po"
	  "rt_label('input',5,'trig2_dly');\ncolor('black');port_label('input',6,'trig3_dly');\ncolor('black');port_label('inp"
	  "ut',7,'update_delays');\ncolor('black');port_label('output',1,'trigs_out_pins');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat"
	  SID			  "9073"
	  Ports			  [4, 1]
	  Position		  [315, 64, 355, 226]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "40,162,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 162 162 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 40 40 0 0 ],[0 0 162 162 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[86.55 86.55 9"
	  "1.55 86.55 91.55 91.55 91.55 86.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[81.55 81.55 86.55 86.55 81"
	  ".55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[76.55 76.55 81.55 81.55 76.55 ],[1 1 1 ]);\npa"
	  "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[71.55 71.55 76.55 71.55 76.55 76.55 71.55 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','o"
	  "n');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "11092"
	  Ports			  [0, 1]
	  Position		  [420, 228, 450, 252]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "30,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.33 "
	  "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15.33"
	  " 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n"
	  "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp"
	  "ut',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From1"
	  SID			  "9121"
	  Position		  [100, 291, 285, 309]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_DBG1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From2"
	  SID			  "9122"
	  Position		  [100, 311, 285, 329]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_DBG2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From20"
	  SID			  "9102"
	  Position		  [100, 271, 285, 289]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_DBG0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From3"
	  SID			  "9123"
	  Position		  [100, 331, 285, 349]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_DBG3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From7"
	  SID			  "9101"
	  Position		  [100, 351, 285, 369]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAYS_UPDATE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[0]"
	  SID			  "9096"
	  Ports			  [1, 1]
	  Position		  [775, 292, 815, 308]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[1]"
	  SID			  "9097"
	  Ports			  [1, 1]
	  Position		  [775, 332, 815, 348]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "1"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[2]"
	  SID			  "9098"
	  Ports			  [1, 1]
	  Position		  [775, 372, 815, 388]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[3]"
	  SID			  "9099"
	  Ports			  [1, 1]
	  Position		  [775, 412, 815, 428]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "3"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "trig_2_0_out"
	  SID			  "4687"
	  Ports			  [1, 1]
	  Position		  [880, 290, 940, 310]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	  Port {
	    PortNumber		    1
	    Name		    "Out 2"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "trig_3_0_out"
	  SID			  "4744"
	  Ports			  [1, 1]
	  Position		  [880, 330, 940, 350]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	  Port {
	    PortNumber		    1
	    Name		    "Out 3"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "trig_4_0_out"
	  SID			  "4801"
	  Ports			  [1, 1]
	  Position		  [880, 370, 940, 390]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	  Port {
	    PortNumber		    1
	    Name		    "Out 4"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "trig_5_0_out"
	  SID			  "6810"
	  Ports			  [1, 1]
	  Position		  [880, 410, 940, 430]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	  Port {
	    PortNumber		    1
	    Name		    "Out 5"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Outport
	  Name			  "trig_2"
	  SID			  "9108"
	  Position		  [1020, 293, 1050, 307]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "trig_3"
	  SID			  "9111"
	  Position		  [1020, 333, 1050, 347]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "trig_4"
	  SID			  "9113"
	  Position		  [1020, 373, 1050, 387]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "trig_5"
	  SID			  "9114"
	  Position		  [1020, 413, 1050, 427]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "b[0]"
	  SrcPort		  1
	  DstBlock		  "trig_2_0_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[1]"
	  SrcPort		  1
	  DstBlock		  "trig_3_0_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[2]"
	  SrcPort		  1
	  DstBlock		  "trig_4_0_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[3]"
	  SrcPort		  1
	  DstBlock		  "trig_5_0_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Black Box"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    DstBlock		    "b[0]"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 40]
	    Branch {
	      DstBlock		      "b[1]"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 40]
	      Branch {
		DstBlock		"b[2]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 40]
		DstBlock		"b[3]"
		DstPort			1
	      }
	    }
	  }
	}
	Line {
	  Name			  "Out 2"
	  Labels		  [0, 0]
	  SrcBlock		  "trig_2_0_out"
	  SrcPort		  1
	  DstBlock		  "trig_2"
	  DstPort		  1
	}
	Line {
	  Name			  "Out 3"
	  Labels		  [0, 0]
	  SrcBlock		  "trig_3_0_out"
	  SrcPort		  1
	  DstBlock		  "trig_3"
	  DstPort		  1
	}
	Line {
	  Name			  "Out 4"
	  Labels		  [0, 0]
	  SrcBlock		  "trig_4_0_out"
	  SrcPort		  1
	  DstBlock		  "trig_4"
	  DstPort		  1
	}
	Line {
	  Name			  "Out 5"
	  Labels		  [0, 0]
	  SrcBlock		  "trig_5_0_out"
	  SrcPort		  1
	  DstBlock		  "trig_5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "trig_2 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "trig_3 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "trig_4 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "trig_5 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat"
	  SrcPort		  1
	  Points		  [45, 0; 0, 115]
	  DstBlock		  "Black Box"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From20"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From1"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From2"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From3"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "From7"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  7
	}
	Annotation {
	  Name			  "NOTE:  EXT_OUT_P0 (ie trig_2) should be at bit \n        position 0 on the trigs_in bus for the Black Box"
	  "."
	  Position		  [619, 204]
	}
	Annotation {
	  Name			  "NOTE:  Black Box contains a register packed into the IOB for  \n    trigger input.  No need for additiona"
	  "l register on this path. "
	  Position		  [433, 440]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Debug Header\nOutputs 2"
      SID		      "9131"
      Ports		      [4]
      Position		      [1855, 744, 2025, 841]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Debug Header\nOutputs 2"
	Location		[66, 99, 2451, 1550]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"127"
	Block {
	  BlockType		  Inport
	  Name			  "trig_2 "
	  SID			  "9132"
	  Position		  [95, 193, 125, 207]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_3 "
	  SID			  "9133"
	  Position		  [95, 153, 125, 167]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_4 "
	  SID			  "9134"
	  Position		  [95, 113, 125, 127]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "trig_5 "
	  SID			  "9135"
	  Position		  [95, 73, 125, 87]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Black Box"
	  SID			  "9136"
	  Ports			  [7, 1]
	  Position		  [475, 221, 670, 369]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Black Box"
	  SourceType		  "Xilinx Black Box Block"
	  infoedit		  " Incorporates black box HDL and simulation model into a System Generator design.<br><br>You must suppl"
	  "y a Black Box with certain information about the HDL component you would like to bring into System Generator. This "
	  "information is provided through a Matlab function.<br><br>When \"Simulation mode\" is set to \"Inactive\", you will"
	  " typically want to provide a separate simulation model by using a Simulation Multiplexer.<br>When \"Simulation mode"
	  "\" is set to \"External co-simulator\", you must include a ModelSim block in the design."
	  init_code		  "trig_odelays_config"
	  sim_method		  "ISE Simulator"
	  verbose		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "blackbox2"
	  sg_icon_stat		  "195,148,7,1,white,blue,0,0aefaa97,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 195 195 0 0 ],[0 0 148 148 0 ],[0.77 0.82 "
	  "0.91 ]);\nplot([0 195 195 0 0 ],[0 0 148 148 0 ]);\npatch([50.275 80.62 101.62 122.62 143.62 101.62 71.275 50.275 ]"
	  ",[97.31 97.31 118.31 97.31 118.31 118.31 118.31 97.31 ],[1 1 1 ]);\npatch([71.275 101.62 80.62 50.275 71.275 ],[76."
	  "31 76.31 97.31 97.31 76.31 ],[0.931 0.946 0.973 ]);\npatch([50.275 80.62 101.62 71.275 50.275 ],[55.31 55.31 76.31 "
	  "76.31 55.31 ],[1 1 1 ]);\npatch([71.275 143.62 122.62 101.62 80.62 50.275 71.275 ],[34.31 34.31 55.31 34.31 55.31 5"
	  "5.31 34.31 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon tex"
	  "t');\ncolor('black');port_label('input',1,'trigs_disable');\ncolor('black');port_label('input',2,'trigs_in');\ncolo"
	  "r('black');port_label('input',3,'trig0_dly');\ncolor('black');port_label('input',4,'trig1_dly');\ncolor('black');po"
	  "rt_label('input',5,'trig2_dly');\ncolor('black');port_label('input',6,'trig3_dly');\ncolor('black');port_label('inp"
	  "ut',7,'update_delays');\ncolor('black');port_label('output',1,'trigs_out_pins');\nfprintf('','COMMENT: end icon tex"
	  "t');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat"
	  SID			  "9137"
	  Ports			  [4, 1]
	  Position		  [295, 59, 335, 221]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "4"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "40,162,4,1,white,blue,0,47d3d416,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 162 162 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 40 40 0 0 ],[0 0 162 162 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[86.55 86.55 9"
	  "1.55 86.55 91.55 91.55 91.55 86.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[81.55 81.55 86.55 86.55 81"
	  ".55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[76.55 76.55 81.55 81.55 76.55 ],[1 1 1 ]);\npa"
	  "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[71.55 71.55 76.55 71.55 76.55 76.55 71.55 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','o"
	  "n');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "11093"
	  Ports			  [0, 1]
	  Position		  [400, 223, 430, 247]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "0"
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "30,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.33 "
	  "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15.33"
	  " 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n"
	  "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp"
	  "ut',1,'0');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From1"
	  SID			  "9138"
	  Position		  [95, 286, 280, 304]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_DBG1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From2"
	  SID			  "9139"
	  Position		  [95, 306, 280, 324]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_DBG2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From20"
	  SID			  "9140"
	  Position		  [95, 266, 280, 284]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_DBG0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From3"
	  SID			  "9141"
	  Position		  [95, 326, 280, 344]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAY_DBG3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From7"
	  SID			  "9142"
	  Position		  [95, 346, 280, 364]
	  ShowName		  off
	  GotoTag		  "TRIG_OUT_ODELAYS_UPDATE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "9189"
	  Position		  [995, 325, 1015, 345]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator16"
	  SID			  "9188"
	  Position		  [995, 285, 1015, 305]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "9190"
	  Position		  [995, 365, 1015, 385]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator3"
	  SID			  "9191"
	  Position		  [995, 405, 1015, 425]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[0]"
	  SID			  "9143"
	  Ports			  [1, 1]
	  Position		  [755, 287, 795, 303]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[1]"
	  SID			  "9144"
	  Ports			  [1, 1]
	  Position		  [755, 327, 795, 343]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "1"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[2]"
	  SID			  "9145"
	  Ports			  [1, 1]
	  Position		  [755, 367, 795, 383]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "2"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "b[3]"
	  SID			  "9146"
	  Ports			  [1, 1]
	  Position		  [755, 407, 795, 423]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each input sample and presents it at the output.  The output type "
	  "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
	  "e notes: In hardware this block costs nothing."
	  nbits			  "1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "3"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "slice"
	  sg_icon_stat		  "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22 1"
	  "2.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a"
	  ":b]');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "trig_2_1_out"
	  SID			  "8709"
	  Ports			  [1, 1]
	  Position		  [860, 285, 920, 305]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "trig_3_1_out"
	  SID			  "8711"
	  Ports			  [1, 1]
	  Position		  [860, 325, 920, 345]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "trig_4_1_out"
	  SID			  "8713"
	  Ports			  [1, 1]
	  Position		  [860, 365, 920, 385]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "trig_5_1_out"
	  SID			  "8715"
	  Ports			  [1, 1]
	  Position		  [860, 405, 920, 425]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Line {
	  SrcBlock		  "Black Box"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    Points		    [0, 40]
	    Branch {
	      Points		      [0, 40]
	      Branch {
		Points			[0, 40]
		DstBlock		"b[3]"
		DstPort			1
	      }
	      Branch {
		DstBlock		"b[2]"
		DstPort			1
	      }
	    }
	    Branch {
	      DstBlock		      "b[1]"
	      DstPort		      1
	    }
	  }
	  Branch {
	    DstBlock		    "b[0]"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "b[3]"
	  SrcPort		  1
	  DstBlock		  "trig_5_1_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[2]"
	  SrcPort		  1
	  DstBlock		  "trig_4_1_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[1]"
	  SrcPort		  1
	  DstBlock		  "trig_3_1_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "b[0]"
	  SrcPort		  1
	  DstBlock		  "trig_2_1_out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "trig_2_1_out"
	  SrcPort		  1
	  DstBlock		  "Terminator16"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "trig_3_1_out"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "trig_4_1_out"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "trig_5_1_out"
	  SrcPort		  1
	  DstBlock		  "Terminator3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "trig_2 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "trig_3 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "trig_4 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "trig_5 "
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Concat"
	  SrcPort		  1
	  Points		  [50, 0; 0, 115]
	  DstBlock		  "Black Box"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "From20"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "From1"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "From2"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "From3"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "From7"
	  SrcPort		  1
	  DstBlock		  "Black Box"
	  DstPort		  7
	}
	Annotation {
	  Name			  "NOTE:  EXT_OUT_P0 (ie trig_2) should be at bit \n        position 0 on the trigs_in bus for the Black Box"
	  "."
	  Position		  [599, 199]
	}
	Annotation {
	  Name			  "NOTE:  Black Box contains a register packed into the IOB for  \n    trigger input.  No need for additiona"
	  "l register on this path. "
	  Position		  [413, 405]
	  HorizontalAlignment	  "left"
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "EDK Processor"
      SID		      "10703"
      Ports		      []
      Position		      [108, 23, 170, 87]
      CopyFcn		      "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallback(gcbh);"
      DeleteFcn		      "xlDestroyGui(gcbh);"
      LoadFcn		      "xlBlockLoadCallback(gcbh);"
      ModelCloseFcn	      "xlDestroyGui(gcbh);"
      PreSaveFcn	      "xlBlockPreSaveCallback(gcbh);"
      PostSaveFcn	      "xlBlockPostSaveCallback(gcbh);"
      DestroyFcn	      "xlDestroyGui(gcbh);"
      OpenFcn		      "bh=gcbh;xlProcBlockCallbacks('populatesharedmemorylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.x"
      "ml', @xlProcBlockEnablement, @xlProcBlockAction);"
      CloseFcn		      "xlDestroyGui(gcbh);"
      MoveFcn		      "xlBlockMoveCallback(gcbh);"
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      MaskType		      "Xilinx EDK Processor Block"
      MaskDescription	      "Xilinx EDK Processor"
      MaskHelp		      "eval('');xlDoc('-book','sysgen','-topic','EDK_Processor');"
      MaskPromptString	      "Configure Processor for|XPS Project| |Available Memories| | |Bus Type|Base Address| |Loc"
      "k| |Dual Clocks| |Register Read-Back|Constraint File| |Inherit Device Type|Initial Program| |Enable Co-Debug wit"
      "h Xilinx SDK (Beta)| | | | | | | | | | | | | | | | "
      MaskStyleString	      "popup(EDK pcore generation|HDL netlisting),edit,edit,edit,edit,edit,popup(AXI|PLB),edit,e"
      "dit,checkbox,edit,checkbox,edit,checkbox,edit,edit,checkbox,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edi"
      "t,edit,edit,edit,edit,edit,edit,edit,edit,edit"
      MaskVariables	      "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemories=&4;portInterfaceTable=&5;bus_type_sgadvanc"
      "ed=&6;bus_type=&7;baseaddr=&8;baseaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clock"
      "=@12;reg_readback_sgadvanced=&13;reg_readback=@14;ucf_file=&15;inheritDeviceType_sgadvanced=&16;inheritDeviceTyp"
      "e=@17;elf_file=&18;codebug_sgadvanced=&19;codebug=@20;clock_name=&21;internalPortList=&22;resetPolarity=&23;memx"
      "table=&24;procinfo=&25;memmapdirty=&26;blockname=&27;xpsintstyle=&28;has_advanced_control=@29;sggui_pos=&30;bloc"
      "k_type=&31;block_version=&32;sg_icon_stat=&33;sg_mask_display=&34;sg_list_contents=&35;sg_blockgui_xml=&36;"
      MaskTunableValueString  "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,"
      "on,on,on,on,on,on,on"
      MaskCallbackString      "|||||||||||||||||||||||||||||||||||"
      MaskEnableString	      "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,o"
      "n,on,on,on,on,on,on"
      MaskVisibilityString    "on,on,off,on,on,off,on,on,off,on,off,on,off,on,on,off,on,on,off,on,off,off,off,off,off,"
      "off,off,off,off,off,off,off,off,off,off,off"
      MaskToolTipString	      "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,"
      "on,on,on,on,on,on,on"
      MaskInitialization      "try\n  tmp_gcb = gcb;\n  tmp_gcbh = gcbh;\n  if (strcmp('SysGenIndex',get_param(bdroot("
      "tmp_gcbh),'tag')) && ~isempty(regexp(bdroot(tmp_gcb), '^xbs', 'once')))\n    return;\n  end;\n  xlMungeMaskParam"
      "s;\n\n  block_type='edkprocessor';\n\n  serialized_declarations = '{''block_type''=>''String''}';\n  xledkproces"
      "sor_init();\n  ptable_ = xlblockprep(get_param(tmp_gcb, 'MaskWSVariables'));\n  try\n    xlBlockMoveCallback(tmp"
      "_gcbh);\n  catch \n     clear global xl_updateicon_recursion_guard;\n  end;\ncatch\n  global dbgsysgen;\n  if(~i"
      "sempty(dbgsysgen) && dbgsysgen)\n    e = regexprep(lasterr, '\\n', '\\nError: ');\n    disp(['Error: While runni"
      "ng MaskInit code on block ' tmp_gcb ': ' e]);\n    error(e);\n  end\nend\n"
      MaskSelfModifiable      on
      MaskDisplay	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 62 62 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0"
      ".91 ]);\nplot([0 62 62 0 0 ],[0 0 64 64 0 ]);\npatch([13.2 24.76 32.76 40.76 48.76 32.76 21.2 13.2 ],[40.88 40.8"
      "8 48.88 40.88 48.88 48.88 48.88 40.88 ],[1 1 1 ]);\npatch([21.2 32.76 24.76 13.2 21.2 ],[32.88 32.88 40.88 40.88"
      " 32.88 ],[0.931 0.946 0.973 ]);\npatch([13.2 24.76 32.76 21.2 13.2 ],[24.88 24.88 32.88 32.88 24.88 ],[1 1 1 ]);"
      "\npatch([21.2 48.76 40.76 32.76 24.76 13.2 21.2 ],[16.88 16.88 24.88 16.88 24.88 24.88 16.88 ],[0.931 0.946 0.97"
      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ndisp('');\n\nfprintf("
      "'','COMMENT: end icon text');"
      MaskIconFrame	      off
      MaskIconOpaque	      on
      MaskIconRotate	      "none"
      MaskPortRotate	      "default"
      MaskIconUnits	      "autoscale"
      MaskValueString	      "EDK pcore generation||<qt bgcolor=\"#FFFFFF\"><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/s"
      "ysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_ODELAY_CFG_CMPLL&gt;&gt;<br></div><div><img src=\"C:/Xilinx/1"
      "4.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IDELAY_CFG_CMPLL&gt;&gt;<br></div><div><img s"
      "rc=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_ODELAY_CFG_DEBUG_HDR&gt;&gt;<"
      "br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IDELAY_CF"
      "G_DEBUG_HDR&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &l"
      "t;&lt;TRIG_IODELAYS_CONTROL&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/regist"
      "erplus.gif\"> &lt;&lt;RSSI_PKT_DET_CONFIG&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data"
      "/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_6&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sy"
      "sgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_5&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_"
      "DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_4&gt;&gt;<br></div><div><img src=\"C:/Xilinx/"
      "14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_3&gt;&gt;<br></div><div><img src=\"C"
      ":/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_2&gt;&gt;<br></div><div><im"
      "g src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_0&gt;&gt;<br></div"
      "><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_8&gt;&gt;"
      "<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_"
      "7&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG"
      "_OUT_5_CONF_0&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> "
      "&lt;&lt;TRIG_OUT_5_CONF_1&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/register"
      "plus.gif\"> &lt;&lt;TRIG_OUT_4_CONF_0&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/ima"
      "ges/registerplus.gif\"> &lt;&lt;TRIG_OUT_0_CONF_0&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sys"
      "gen/data/images/registerplus.gif\"> &lt;&lt;TRIG_OUT_4_CONF_1&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/IS"
      "E_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_OUT_3_CONF_0&gt;&gt;<br></div><div><img src=\"C:/Xi"
      "linx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_OUT_3_CONF_1&gt;&gt;<br></div><div><img"
      " src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_OUT_2_CONF_0&gt;&gt;<br></d"
      "iv><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_OUT_2_CONF_1&gt"
      ";&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_OUT"
      "_1_CONF_0&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;"
      "&lt;TRIG_OUT_1_CONF_1&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus"
      ".gif\"> &lt;&lt;TRIG_OUT_0_CONF_1&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/"
      "registerplus.gif\"> &lt;&lt;RSSI_PKT_DET_DURATIONS&gt;&gt;<br></div><div><img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sy"
      "sgen/data/images/registerplus.gif\"> &lt;&lt;RSSI_PKT_DET_THRESHOLDS&gt;&gt;<br></div><div><img src=\"C:/Xilinx/"
      "14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_IN_CONF_1&gt;&gt;<br></div><div><img src=\"C"
      ":/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;CORE_INFO&gt;&gt;<br></div><div><img src"
      "=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/registerplus.gif\"> &lt;&lt;TRIG_OUT&gt;&gt;<br></div><div><img "
      "src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;PktOps1&gt;&gt;<br></div><div><img "
      "src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;PktTemplate1&gt;&gt;<br></div><div>"
      "<img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;PktOps0&gt;&gt;<br></div><div>"
      "<img src=\"C:/Xilinx/14.4/ISE_DS/ISE/sysgen/data/images/memoryplus.gif\"> &lt;&lt;PktTemplate0&gt;&gt;<br></div>"
      "</qt>|<empty>|{'exposed'=>[],'portdir'=>[],'portname'=>[],'shortname'=>[]}||AXI|0x80000000||off||on||on|||off|||"
      "on|plb|{}|0|{'mladdr'=>[0.00000000000000000,1.00000000000000000,2.00000000000000000,3.00000000000000000,4.000000"
      "00000000000,5.00000000000000000,6.00000000000000000,7.00000000000000000,8.00000000000000000,9.00000000000000000,"
      "10.00000000000000000,11.00000000000000000,12.00000000000000000,13.00000000000000000,14.00000000000000000,15.0000"
      "0000000000000,16.00000000000000000,17.00000000000000000,18.00000000000000000,19.00000000000000000,20.00000000000"
      "000000,21.00000000000000000,22.00000000000000000,23.00000000000000000,24.00000000000000000,25.00000000000000000,"
      "26.00000000000000000,27.00000000000000000,28.00000000000000000,0.00000000000000000,1.00000000000000000,-1.000000"
      "00000000000,-1.00000000000000000,-1.00000000000000000,-1.00000000000000000],'mlist'=>['w3_warplab_trigger_proc/R"
      "egisters/Trig IODELAY Config/From Register28','w3_warplab_trigger_proc/Registers/Trig IODELAY Config/From Regist"
      "er27','w3_warplab_trigger_proc/Registers/Trig IODELAY Config/From Register26','w3_warplab_trigger_proc/Registers"
      "/Trig IODELAY Config/From Register25','w3_warplab_trigger_proc/Registers/Trig IODELAY Config/From Register1','w3"
      "_warplab_trigger_proc/Registers/From Register9','w3_warplab_trigger_proc/Registers/From Register8','w3_warplab_t"
      "rigger_proc/Registers/From Register7','w3_warplab_trigger_proc/Registers/From Register6','w3_warplab_trigger_pro"
      "c/Registers/From Register5','w3_warplab_trigger_proc/Registers/From Register4','w3_warplab_trigger_proc/Register"
      "s/From Register3','w3_warplab_trigger_proc/Registers/From Register24','w3_warplab_trigger_proc/Registers/From Re"
      "gister23','w3_warplab_trigger_proc/Registers/From Register22','w3_warplab_trigger_proc/Registers/From Register21"
      "','w3_warplab_trigger_proc/Registers/From Register20','w3_warplab_trigger_proc/Registers/From Register2','w3_war"
      "plab_trigger_proc/Registers/From Register19','w3_warplab_trigger_proc/Registers/From Register18','w3_warplab_tri"
      "gger_proc/Registers/From Register17','w3_warplab_trigger_proc/Registers/From Register16','w3_warplab_trigger_pro"
      "c/Registers/From Register15','w3_warplab_trigger_proc/Registers/From Register14','w3_warplab_trigger_proc/Regist"
      "ers/From Register13','w3_warplab_trigger_proc/Registers/From Register12','w3_warplab_trigger_proc/Registers/From"
      " Register11','w3_warplab_trigger_proc/Registers/From Register10','w3_warplab_trigger_proc/Registers/From Registe"
      "r1','w3_warplab_trigger_proc/Registers/To Register1','w3_warplab_trigger_proc/Registers/To Register','w3_warplab"
      "_trigger_proc/Trigger Sources/Ethernet B/Pkt Comp/Word Comp 1/Shared Memory2','w3_warplab_trigger_proc/Trigger S"
      "ources/Ethernet B/Pkt Comp/Word Comp 1/Shared Memory1','w3_warplab_trigger_proc/Trigger Sources/Ethernet A/Pkt C"
      "omp/Word Comp 0/Shared Memory2','w3_warplab_trigger_proc/Trigger Sources/Ethernet A/Pkt Comp/Word Comp 0/Shared "
      "Memory1'],'mlname'=>['\\\\'TRIG_ODELAY_CFG_CMPLL\\\\'','\\\\'TRIG_IDELAY_CFG_CMPLL\\\\'','\\\\'TRIG_ODELAY_CFG_D"
      "EBUG_HDR\\\\'','\\\\'TRIG_IDELAY_CFG_DEBUG_HDR\\\\'','\\\\'TRIG_IODELAYS_CONTROL\\\\'','\\\\'RSSI_PKT_DET_CONFIG"
      "\\\\'','\\\\'TRIG_IN_CONF_6\\\\'','\\\\'TRIG_IN_CONF_5\\\\'','\\\\'TRIG_IN_CONF_4\\\\'','\\\\'TRIG_IN_CONF_3\\\\"
      "'','\\\\'TRIG_IN_CONF_2\\\\'','\\\\'TRIG_IN_CONF_0\\\\'','\\\\'TRIG_IN_CONF_8\\\\'','\\\\'TRIG_IN_CONF_7\\\\'','"
      "\\\\'TRIG_OUT_5_CONF_0\\\\'','\\\\'TRIG_OUT_5_CONF_1\\\\'','\\\\'TRIG_OUT_4_CONF_0\\\\'','\\\\'TRIG_OUT_0_CONF_0"
      "\\\\'','\\\\'TRIG_OUT_4_CONF_1\\\\'','\\\\'TRIG_OUT_3_CONF_0\\\\'','\\\\'TRIG_OUT_3_CONF_1\\\\'','\\\\'TRIG_OUT_"
      "2_CONF_0\\\\'','\\\\'TRIG_OUT_2_CONF_1\\\\'','\\\\'TRIG_OUT_1_CONF_0\\\\'','\\\\'TRIG_OUT_1_CONF_1\\\\'','\\\\'T"
      "RIG_OUT_0_CONF_1\\\\'','\\\\'RSSI_PKT_DET_DURATIONS\\\\'','\\\\'RSSI_PKT_DET_THRESHOLDS\\\\'','\\\\'TRIG_IN_CONF"
      "_1\\\\'','\\\\'CORE_INFO\\\\'','\\\\'TRIG_OUT\\\\'','\\\\'PktOps1\\\\'','\\\\'PktTemplate1\\\\'','\\\\'PktOps0\\"
      "\\'','\\\\'PktTemplate0\\\\''],'mlstate'=>[0.00000000000000000,0.00000000000000000,0.00000000000000000,0.0000000"
      "0000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0"
      ".00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000"
      "000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.000"
      "00000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.000000000000000"
      "00,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.0000000"
      "0000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000]}|{}|off||default|0|-1,-1,-1,-1|edkproces"
      "sor|2.7|62,64,-1,-1,white,blue,0,07734,right,,[ ],[ ]|fprintf('','COMMENT: begin icon graphics');\npatch([0 62 6"
      "2 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0.91 ]);\nplot([0 62 62 0 0 ],[0 0 64 64 0 ]);\npatch([13.2 24.76 32.76 40.76 "
      "48.76 32.76 21.2 13.2 ],[40.88 40.88 48.88 40.88 48.88 48.88 48.88 40.88 ],[1 1 1 ]);\npatch([21.2 32.76 24.76 1"
      "3.2 21.2 ],[32.88 32.88 40.88 40.88 32.88 ],[0.931 0.946 0.973 ]);\npatch([13.2 24.76 32.76 21.2 13.2 ],[24.88 2"
      "4.88 32.88 32.88 24.88 ],[1 1 1 ]);\npatch([21.2 48.76 40.76 32.76 24.76 13.2 21.2 ],[16.88 16.88 24.88 16.88 24"
      ".88 24.88 16.88 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
      "icon text');\nfprintf('','COMMENT: end icon text');|{'table'=>{'AvailableMemories'=>'popup(<empty>)'}}|"
      System {
	Name			"EDK Processor"
	Location		[514, 91, 900, 269]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	SIDHighWatermark	"337"
	Block {
	  BlockType		  Reference
	  Name			  "AXI_ARESETN"
	  SID			  "10703:267"
	  Ports			  [1, 1]
	  Position		  [145, 665, 210, 685]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant"
	  SID			  "10703:266"
	  Position		  [20, 665, 40, 685]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant1"
	  SID			  "10703:268"
	  Position		  [20, 730, 40, 750]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant10"
	  SID			  "10703:286"
	  Position		  [20, 1345, 40, 1365]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant11"
	  SID			  "10703:288"
	  Position		  [20, 1410, 40, 1430]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant12"
	  SID			  "10703:290"
	  Position		  [20, 1480, 40, 1500]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant13"
	  SID			  "10703:292"
	  Position		  [20, 1545, 40, 1565]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant14"
	  SID			  "10703:294"
	  Position		  [20, 1615, 40, 1635]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant15"
	  SID			  "10703:296"
	  Position		  [20, 1685, 40, 1705]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant16"
	  SID			  "10703:298"
	  Position		  [20, 1750, 40, 1770]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant17"
	  SID			  "10703:300"
	  Position		  [20, 1820, 40, 1840]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant18"
	  SID			  "10703:302"
	  Position		  [20, 1885, 40, 1905]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant19"
	  SID			  "10703:304"
	  Position		  [20, 1955, 40, 1975]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant2"
	  SID			  "10703:270"
	  Position		  [20, 800, 40, 820]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant20"
	  SID			  "10703:306"
	  Position		  [20, 2025, 40, 2045]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant21"
	  SID			  "10703:308"
	  Position		  [20, 2090, 40, 2110]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant22"
	  SID			  "10703:310"
	  Position		  [20, 2160, 40, 2180]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant23"
	  SID			  "10703:312"
	  Position		  [20, 2225, 40, 2245]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant24"
	  SID			  "10703:314"
	  Position		  [20, 2295, 40, 2315]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant3"
	  SID			  "10703:272"
	  Position		  [20, 865, 40, 885]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant4"
	  SID			  "10703:274"
	  Position		  [20, 935, 40, 955]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant5"
	  SID			  "10703:276"
	  Position		  [20, 1005, 40, 1025]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant6"
	  SID			  "10703:278"
	  Position		  [20, 1070, 40, 1090]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant7"
	  SID			  "10703:280"
	  Position		  [20, 1140, 40, 1160]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant8"
	  SID			  "10703:282"
	  Position		  [20, 1205, 40, 1225]
	  ShowName		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant9"
	  SID			  "10703:284"
	  Position		  [20, 1275, 40, 1295]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register"
	  SID			  "10703:231"
	  Ports			  [0, 1]
	  Position		  [145, 2362, 205, 2418]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'CORE_INFO'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "24"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register1"
	  SID			  "10703:232"
	  Ports			  [0, 1]
	  Position		  [145, 2467, 205, 2523]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT'"
	  init			  "0"
	  period		  "xlGetNormalizedPeriod()"
	  ownership		  "Owned and initialized elsewhere"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "6"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARADDR"
	  SID			  "10703:269"
	  Ports			  [1, 1]
	  Position		  [145, 730, 210, 750]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARBURST"
	  SID			  "10703:271"
	  Ports			  [1, 1]
	  Position		  [145, 800, 210, 820]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "2"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARCACHE"
	  SID			  "10703:273"
	  Ports			  [1, 1]
	  Position		  [145, 865, 210, 885]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "4"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARID"
	  SID			  "10703:275"
	  Ports			  [1, 1]
	  Position		  [145, 935, 210, 955]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "8"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARLEN"
	  SID			  "10703:277"
	  Ports			  [1, 1]
	  Position		  [145, 1005, 210, 1025]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "8"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARLOCK"
	  SID			  "10703:279"
	  Ports			  [1, 1]
	  Position		  [145, 1070, 210, 1090]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "2"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARPROT"
	  SID			  "10703:281"
	  Ports			  [1, 1]
	  Position		  [145, 1140, 210, 1160]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "3"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARREADY"
	  SID			  "10703:317"
	  Ports			  [1, 1]
	  Position		  [670, 50, 730, 70]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARSIZE"
	  SID			  "10703:283"
	  Ports			  [1, 1]
	  Position		  [145, 1205, 210, 1225]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "3"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_ARVALID"
	  SID			  "10703:285"
	  Ports			  [1, 1]
	  Position		  [145, 1275, 210, 1295]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWADDR"
	  SID			  "10703:287"
	  Ports			  [1, 1]
	  Position		  [145, 1345, 210, 1365]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWBURST"
	  SID			  "10703:289"
	  Ports			  [1, 1]
	  Position		  [145, 1410, 210, 1430]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "2"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWCACHE"
	  SID			  "10703:291"
	  Ports			  [1, 1]
	  Position		  [145, 1480, 210, 1500]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "4"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWID"
	  SID			  "10703:293"
	  Ports			  [1, 1]
	  Position		  [145, 1545, 210, 1565]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "8"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWLEN"
	  SID			  "10703:295"
	  Ports			  [1, 1]
	  Position		  [145, 1615, 210, 1635]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "8"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWLOCK"
	  SID			  "10703:297"
	  Ports			  [1, 1]
	  Position		  [145, 1685, 210, 1705]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "2"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWPROT"
	  SID			  "10703:299"
	  Ports			  [1, 1]
	  Position		  [145, 1750, 210, 1770]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "3"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWREADY"
	  SID			  "10703:319"
	  Ports			  [1, 1]
	  Position		  [670, 120, 730, 140]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWSIZE"
	  SID			  "10703:301"
	  Ports			  [1, 1]
	  Position		  [145, 1820, 210, 1840]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "3"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_AWVALID"
	  SID			  "10703:303"
	  Ports			  [1, 1]
	  Position		  [145, 1885, 210, 1905]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_BID"
	  SID			  "10703:321"
	  Ports			  [1, 1]
	  Position		  [670, 185, 730, 205]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_BREADY"
	  SID			  "10703:305"
	  Ports			  [1, 1]
	  Position		  [145, 1955, 210, 1975]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_BRESP"
	  SID			  "10703:323"
	  Ports			  [1, 1]
	  Position		  [670, 255, 730, 275]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_BVALID"
	  SID			  "10703:325"
	  Ports			  [1, 1]
	  Position		  [670, 320, 730, 340]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_RDATA"
	  SID			  "10703:327"
	  Ports			  [1, 1]
	  Position		  [670, 390, 730, 410]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_RID"
	  SID			  "10703:329"
	  Ports			  [1, 1]
	  Position		  [670, 460, 730, 480]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_RLAST"
	  SID			  "10703:331"
	  Ports			  [1, 1]
	  Position		  [670, 525, 730, 545]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_RREADY"
	  SID			  "10703:307"
	  Ports			  [1, 1]
	  Position		  [145, 2025, 210, 2045]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_RRESP"
	  SID			  "10703:333"
	  Ports			  [1, 1]
	  Position		  [670, 595, 730, 615]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_RVALID"
	  SID			  "10703:335"
	  Ports			  [1, 1]
	  Position		  [670, 660, 730, 680]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_WDATA"
	  SID			  "10703:309"
	  Ports			  [1, 1]
	  Position		  [145, 2090, 210, 2110]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_WLAST"
	  SID			  "10703:311"
	  Ports			  [1, 1]
	  Position		  [145, 2160, 210, 2180]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_WREADY"
	  SID			  "10703:337"
	  Ports			  [1, 1]
	  Position		  [670, 730, 730, 750]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
	  "link integer, single, double, or fixed-point.<br><br>Hardware notes:  In hardware these blocks become top level out"
	  "put ports or are discarded, depending on how they are configured."
	  inherit_from_input	  off
	  hdl_port		  on
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsDAC		  off
	  DACChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  sg_icon_stat		  "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
	  "con text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_WSTRB"
	  SID			  "10703:313"
	  Ports			  [1, 1]
	  Position		  [145, 2225, 210, 2245]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "4"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "S_AXI_WVALID"
	  SID			  "10703:315"
	  Ports			  [1, 1]
	  Position		  [145, 2295, 210, 2315]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type Simulink integer, single, double and fixed-point to  Xilinx"
	  " fixed-point or floating-point data type.<br><br>Hardware notes:  In hardware these blocks become top level input p"
	  "orts."
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetNormalizedPeriod()"
	  dbl_ovrd		  off
	  timing_constraint	  "None"
	  locs_specified	  off
	  LOCs			  "{}"
	  UseAsADC		  off
	  ADCChannel		  "'1'"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  inherit_from_input	  off
	  hdl_port		  "on"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  sg_icon_stat		  "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
	  " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
	  "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
	  ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
	  "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
	  "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
	  "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
	  "on text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory"
	  SID			  "10703:262"
	  Ports			  [4, 1]
	  Position		  [660, 3856, 740, 3949]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'PktOps1'"
	  depth			  "64"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  on
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,93,4,1,white,blue,0,981dae1c,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 93 93 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 93 93 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('input',4,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT"
	  ": end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory1"
	  SID			  "10703:263"
	  Ports			  [4, 1]
	  Position		  [660, 3996, 740, 4089]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'PktTemplate1'"
	  depth			  "64"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  on
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,93,4,1,white,blue,0,981dae1c,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 93 93 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 93 93 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('input',4,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT"
	  ": end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory2"
	  SID			  "10703:264"
	  Ports			  [4, 1]
	  Position		  [660, 4136, 740, 4229]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'PktOps0'"
	  depth			  "64"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  on
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,93,4,1,white,blue,0,981dae1c,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 93 93 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 93 93 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('input',4,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT"
	  ": end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Shared Memory3"
	  SID			  "10703:265"
	  Ports			  [4, 1]
	  Position		  [660, 4276, 740, 4369]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Shared Memory"
	  SourceType		  "Xilinx Shared Memory Random Access Memory Block"
	  shared_memory_name	  "'PktTemplate0'"
	  depth			  "64"
	  ownership		  "Owned and Initialized Elsewhere"
	  initVector		  "sin(pi*(0:15)/16)"
	  en			  on
	  mutex			  "Unprotected"
	  mode			  "Read and Write"
	  write_mode		  "Read Before Write"
	  time_out		  "0"
	  latency		  "1"
	  explicit_data_type	  off
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  implementation	  "Block RAM"
	  use_rpm		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "shmem"
	  sg_icon_stat		  "80,93,4,1,white,blue,0,981dae1c,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 93 93 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 80 80 0 0 ],[0 0 93 93 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2"
	  "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58"
	  ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1"
	  " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
	  "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we"
	  "');\ncolor('black');port_label('input',4,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT"
	  ": end icon text');"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator"
	  SID			  "10703:316"
	  Position		  [840, 50, 860, 70]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  SID			  "10703:318"
	  Position		  [840, 120, 860, 140]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator10"
	  SID			  "10703:336"
	  Position		  [840, 730, 860, 750]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  SID			  "10703:320"
	  Position		  [840, 185, 860, 205]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator3"
	  SID			  "10703:322"
	  Position		  [840, 255, 860, 275]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator4"
	  SID			  "10703:324"
	  Position		  [840, 320, 860, 340]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator5"
	  SID			  "10703:326"
	  Position		  [840, 390, 860, 410]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator6"
	  SID			  "10703:328"
	  Position		  [840, 460, 860, 480]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator7"
	  SID			  "10703:330"
	  Position		  [840, 525, 860, 545]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator8"
	  SID			  "10703:332"
	  Position		  [840, 595, 860, 615]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator9"
	  SID			  "10703:334"
	  Position		  [840, 660, 860, 680]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register"
	  SID			  "10703:233"
	  Ports			  [2, 1]
	  Position		  [670, 797, 730, 853]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_ODELAY_CFG_CMPLL'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register1"
	  SID			  "10703:234"
	  Ports			  [2, 1]
	  Position		  [670, 902, 730, 958]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IDELAY_CFG_CMPLL'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register10"
	  SID			  "10703:243"
	  Ports			  [2, 1]
	  Position		  [670, 1852, 730, 1908]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_2'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register11"
	  SID			  "10703:244"
	  Ports			  [2, 1]
	  Position		  [670, 1957, 730, 2013]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_0'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register12"
	  SID			  "10703:245"
	  Ports			  [2, 1]
	  Position		  [670, 2062, 730, 2118]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_8'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register13"
	  SID			  "10703:246"
	  Ports			  [2, 1]
	  Position		  [670, 2167, 730, 2223]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_7'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register14"
	  SID			  "10703:247"
	  Ports			  [2, 1]
	  Position		  [670, 2272, 730, 2328]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_5_CONF_0'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register15"
	  SID			  "10703:248"
	  Ports			  [2, 1]
	  Position		  [670, 2377, 730, 2433]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_5_CONF_1'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register16"
	  SID			  "10703:249"
	  Ports			  [2, 1]
	  Position		  [670, 2482, 730, 2538]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_4_CONF_0'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register17"
	  SID			  "10703:250"
	  Ports			  [2, 1]
	  Position		  [670, 2587, 730, 2643]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_0_CONF_0'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register18"
	  SID			  "10703:251"
	  Ports			  [2, 1]
	  Position		  [670, 2697, 730, 2753]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_4_CONF_1'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register19"
	  SID			  "10703:252"
	  Ports			  [2, 1]
	  Position		  [670, 2802, 730, 2858]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_3_CONF_0'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register2"
	  SID			  "10703:235"
	  Ports			  [2, 1]
	  Position		  [670, 1007, 730, 1063]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_ODELAY_CFG_DEBUG_HDR'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register20"
	  SID			  "10703:253"
	  Ports			  [2, 1]
	  Position		  [670, 2907, 730, 2963]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_3_CONF_1'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register21"
	  SID			  "10703:254"
	  Ports			  [2, 1]
	  Position		  [670, 3012, 730, 3068]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_2_CONF_0'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register22"
	  SID			  "10703:255"
	  Ports			  [2, 1]
	  Position		  [670, 3117, 730, 3173]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_2_CONF_1'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register23"
	  SID			  "10703:256"
	  Ports			  [2, 1]
	  Position		  [670, 3222, 730, 3278]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_1_CONF_0'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register24"
	  SID			  "10703:257"
	  Ports			  [2, 1]
	  Position		  [670, 3327, 730, 3383]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_1_CONF_1'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register25"
	  SID			  "10703:258"
	  Ports			  [2, 1]
	  Position		  [670, 3432, 730, 3488]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_0_CONF_1'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register26"
	  SID			  "10703:259"
	  Ports			  [2, 1]
	  Position		  [670, 3537, 730, 3593]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RSSI_PKT_DET_DURATIONS'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register27"
	  SID			  "10703:260"
	  Ports			  [2, 1]
	  Position		  [670, 3642, 730, 3698]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RSSI_PKT_DET_THRESHOLDS'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register28"
	  SID			  "10703:261"
	  Ports			  [2, 1]
	  Position		  [670, 3747, 730, 3803]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_1'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register3"
	  SID			  "10703:236"
	  Ports			  [2, 1]
	  Position		  [670, 1117, 730, 1173]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IDELAY_CFG_DEBUG_HDR'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register4"
	  SID			  "10703:237"
	  Ports			  [2, 1]
	  Position		  [670, 1222, 730, 1278]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IODELAYS_CONTROL'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register5"
	  SID			  "10703:238"
	  Ports			  [2, 1]
	  Position		  [670, 1327, 730, 1383]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RSSI_PKT_DET_CONFIG'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register6"
	  SID			  "10703:239"
	  Ports			  [2, 1]
	  Position		  [670, 1432, 730, 1488]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_6'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register7"
	  SID			  "10703:240"
	  Ports			  [2, 1]
	  Position		  [670, 1537, 730, 1593]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_5'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register8"
	  SID			  "10703:241"
	  Ports			  [2, 1]
	  Position		  [670, 1642, 730, 1698]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_4'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register9"
	  SID			  "10703:242"
	  Ports			  [2, 1]
	  Position		  [670, 1747, 730, 1803]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Block"
	  infoedit		  "Register block that writes data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_3'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  on
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  sg_icon_stat		  "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
	  "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
	  "T: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "memmap"
	  SID			  "10703:230"
	  Ports			  [60, 82]
	  Position		  [310, 976, 560, 3564]
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsEDKLib_r4/EDK Core"
	  SourceType		  "Xilinx EDK Core Block"
	  infoedit		  "For use with EDK Processor block."
	  sim_method		  "Inactive"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  xmp			  "xmp"
	  blockname		  "blockname"
	  dual_clock		  "dual_clock"
	  procinfo		  "procinfo"
	  bus_type		  "bus_type"
	  memxtable		  "memxtable"
	  memmap_hdlcontent	  "library IEEE;\nuse IEEE.std_logic_1164.all;\nuse IEEE.numeric_std.all;\n\nentity axi_sgiface i"
	  "s\n    generic (\n        -- AXI specific.\n        -- TODO: need to figure out a way to pass these generics from o"
	  "utside\n        C_S_AXI_SUPPORT_BURST   : integer := 0;\n        -- TODO: fix the internal ID width to 8\n        C"
	  "_S_AXI_ID_WIDTH        : integer := 8;\n        C_S_AXI_DATA_WIDTH      : integer := 32;\n        C_S_AXI_ADDR_WIDT"
	  "H      : integer := 32;\n        C_S_AXI_TOTAL_ADDR_LEN  : integer := 12;\n        C_S_AXI_LINEAR_ADDR_LEN : intege"
	  "r := 8;\n        C_S_AXI_BANK_ADDR_LEN   : integer := 2;\n        C_S_AXI_AWLEN_WIDTH     : integer := 8;\n        "
	  "C_S_AXI_ARLEN_WIDTH     : integer := 8\n    );\n    port (\n        -- General.\n        AXI_AClk      : in  std_lo"
	  "gic;\n        AXI_AResetN    : in  std_logic;\n        -- not used\n        AXI_Ce        : in  std_logic;\n  \n   "
	  "     -- AXI Port.\n        S_AXI_AWADDR  : in  std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);\n        S_AXI_AWID"
	  "    : in  std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n        S_AXI_AWLEN   : in  std_logic_vector(C_S_AXI_AWLE"
	  "N_WIDTH-1 downto 0);\n        S_AXI_AWSIZE  : in  std_logic_vector(2 downto 0);\n        S_AXI_AWBURST : in  std_lo"
	  "gic_vector(1 downto 0);\n        S_AXI_AWLOCK  : in  std_logic_vector(1 downto 0);\n        S_AXI_AWCACHE : in  std"
	  "_logic_vector(3 downto 0);\n        S_AXI_AWPROT  : in  std_logic_vector(2 downto 0);\n        S_AXI_AWVALID : in  "
	  "std_logic;\n        S_AXI_AWREADY : out std_logic;\n        \n        S_AXI_WLAST   : in  std_logic;\n        S_AXI"
	  "_WDATA   : in  std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n        S_AXI_WSTRB   : in  std_logic_vector((C_S_"
	  "AXI_DATA_WIDTH/8)-1 downto 0);\n        S_AXI_WVALID  : in  std_logic;\n        S_AXI_WREADY  : out std_logic;\n   "
	  "     \n        S_AXI_BRESP   : out std_logic_vector(1 downto 0);\n        S_AXI_BID     : out std_logic_vector(C_S_"
	  "AXI_ID_WIDTH-1 downto 0);\n        S_AXI_BVALID  : out std_logic;\n        S_AXI_BREADY  : in  std_logic;\n        "
	  "\n        S_AXI_ARADDR  : in  std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);\n        S_AXI_ARID    : in  std_log"
	  "ic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n        S_AXI_ARLEN   : in  std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto "
	  "0);\n        S_AXI_ARSIZE  : in  std_logic_vector(2 downto 0);\n        S_AXI_ARBURST : in  std_logic_vector(1 down"
	  "to 0);\n        S_AXI_ARLOCK  : in  std_logic_vector(1 downto 0);\n        S_AXI_ARCACHE : in  std_logic_vector(3 d"
	  "ownto 0);\n        S_AXI_ARPROT  : in  std_logic_vector(2 downto 0);\n        S_AXI_ARVALID : in  std_logic;\n     "
	  "   S_AXI_ARREADY : out std_logic;\n        \n        -- 'From Register'\n        -- 'CORE_INFO'\n        sm_CORE_IN"
	  "FO_dout : in std_logic_vector(24-1 downto 0);\n        -- 'TRIG_OUT'\n        sm_TRIG_OUT_dout : in std_logic_vecto"
	  "r(6-1 downto 0);\n        -- 'To Register'\n        -- 'TRIG_ODELAY_CFG_CMPLL'\n        sm_TRIG_ODELAY_CFG_CMPLL_do"
	  "ut : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_ODELAY_CFG_CMPLL_din  : out std_logic_vector(32-1 downto "
	  "0);\n        sm_TRIG_ODELAY_CFG_CMPLL_en   : out std_logic;\n        -- 'TRIG_IDELAY_CFG_CMPLL'\n        sm_TRIG_ID"
	  "ELAY_CFG_CMPLL_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_IDELAY_CFG_CMPLL_din  : out std_logic_ve"
	  "ctor(32-1 downto 0);\n        sm_TRIG_IDELAY_CFG_CMPLL_en   : out std_logic;\n        -- 'TRIG_ODELAY_CFG_DEBUG_HDR"
	  "'\n        sm_TRIG_ODELAY_CFG_DEBUG_HDR_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_ODELAY_CFG_DEBU"
	  "G_HDR_din  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_ODELAY_CFG_DEBUG_HDR_en   : out std_logic;\n    "
	  "    -- 'TRIG_IDELAY_CFG_DEBUG_HDR'\n        sm_TRIG_IDELAY_CFG_DEBUG_HDR_dout : in std_logic_vector(32-1 downto 0);"
	  "\n        sm_TRIG_IDELAY_CFG_DEBUG_HDR_din  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_IDELAY_CFG_DEBU"
	  "G_HDR_en   : out std_logic;\n        -- 'TRIG_IODELAYS_CONTROL'\n        sm_TRIG_IODELAYS_CONTROL_dout : in std_log"
	  "ic_vector(32-1 downto 0);\n        sm_TRIG_IODELAYS_CONTROL_din  : out std_logic_vector(32-1 downto 0);\n        sm"
	  "_TRIG_IODELAYS_CONTROL_en   : out std_logic;\n        -- 'RSSI_PKT_DET_CONFIG'\n        sm_RSSI_PKT_DET_CONFIG_dout"
	  " : in std_logic_vector(32-1 downto 0);\n        sm_RSSI_PKT_DET_CONFIG_din  : out std_logic_vector(32-1 downto 0);\n"
	  "        sm_RSSI_PKT_DET_CONFIG_en   : out std_logic;\n        -- 'TRIG_IN_CONF_6'\n        sm_TRIG_IN_CONF_6_dout :"
	  " in std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_6_din  : out std_logic_vector(32-1 downto 0);\n      "
	  "  sm_TRIG_IN_CONF_6_en   : out std_logic;\n        -- 'TRIG_IN_CONF_5'\n        sm_TRIG_IN_CONF_5_dout : in std_log"
	  "ic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_5_din  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_I"
	  "N_CONF_5_en   : out std_logic;\n        -- 'TRIG_IN_CONF_4'\n        sm_TRIG_IN_CONF_4_dout : in std_logic_vector(3"
	  "2-1 downto 0);\n        sm_TRIG_IN_CONF_4_din  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_4_en"
	  "   : out std_logic;\n        -- 'TRIG_IN_CONF_3'\n        sm_TRIG_IN_CONF_3_dout : in std_logic_vector(32-1 downto "
	  "0);\n        sm_TRIG_IN_CONF_3_din  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_3_en   : out st"
	  "d_logic;\n        -- 'TRIG_IN_CONF_2'\n        sm_TRIG_IN_CONF_2_dout : in std_logic_vector(32-1 downto 0);\n      "
	  "  sm_TRIG_IN_CONF_2_din  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_2_en   : out std_logic;\n "
	  "       -- 'TRIG_IN_CONF_0'\n        sm_TRIG_IN_CONF_0_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_I"
	  "N_CONF_0_din  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_0_en   : out std_logic;\n        -- '"
	  "TRIG_IN_CONF_8'\n        sm_TRIG_IN_CONF_8_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_8_di"
	  "n  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_8_en   : out std_logic;\n        -- 'TRIG_IN_CON"
	  "F_7'\n        sm_TRIG_IN_CONF_7_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_7_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_7_en   : out std_logic;\n        -- 'TRIG_OUT_5_CONF_0'\n  "
	  "      sm_TRIG_OUT_5_CONF_0_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_5_CONF_0_din  : out std_"
	  "logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_5_CONF_0_en   : out std_logic;\n        -- 'TRIG_OUT_5_CONF_1'\n "
	  "       sm_TRIG_OUT_5_CONF_1_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_5_CONF_1_din  : out std"
	  "_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_5_CONF_1_en   : out std_logic;\n        -- 'TRIG_OUT_4_CONF_0'\n"
	  "        sm_TRIG_OUT_4_CONF_0_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_4_CONF_0_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_4_CONF_0_en   : out std_logic;\n        -- 'TRIG_OUT_0_CONF_0'\n"
	  "        sm_TRIG_OUT_0_CONF_0_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_0_CONF_0_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_0_CONF_0_en   : out std_logic;\n        -- 'TRIG_OUT_4_CONF_1'\n"
	  "        sm_TRIG_OUT_4_CONF_1_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_4_CONF_1_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_4_CONF_1_en   : out std_logic;\n        -- 'TRIG_OUT_3_CONF_0'\n"
	  "        sm_TRIG_OUT_3_CONF_0_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_3_CONF_0_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_3_CONF_0_en   : out std_logic;\n        -- 'TRIG_OUT_3_CONF_1'\n"
	  "        sm_TRIG_OUT_3_CONF_1_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_3_CONF_1_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_3_CONF_1_en   : out std_logic;\n        -- 'TRIG_OUT_2_CONF_0'\n"
	  "        sm_TRIG_OUT_2_CONF_0_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_2_CONF_0_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_2_CONF_0_en   : out std_logic;\n        -- 'TRIG_OUT_2_CONF_1'\n"
	  "        sm_TRIG_OUT_2_CONF_1_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_2_CONF_1_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_2_CONF_1_en   : out std_logic;\n        -- 'TRIG_OUT_1_CONF_0'\n"
	  "        sm_TRIG_OUT_1_CONF_0_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_1_CONF_0_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_1_CONF_0_en   : out std_logic;\n        -- 'TRIG_OUT_1_CONF_1'\n"
	  "        sm_TRIG_OUT_1_CONF_1_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_1_CONF_1_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_1_CONF_1_en   : out std_logic;\n        -- 'TRIG_OUT_0_CONF_1'\n"
	  "        sm_TRIG_OUT_0_CONF_1_dout : in std_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_0_CONF_1_din  : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_TRIG_OUT_0_CONF_1_en   : out std_logic;\n        -- 'RSSI_PKT_DET_DURATI"
	  "ONS'\n        sm_RSSI_PKT_DET_DURATIONS_dout : in std_logic_vector(32-1 downto 0);\n        sm_RSSI_PKT_DET_DURATIO"
	  "NS_din  : out std_logic_vector(32-1 downto 0);\n        sm_RSSI_PKT_DET_DURATIONS_en   : out std_logic;\n        --"
	  " 'RSSI_PKT_DET_THRESHOLDS'\n        sm_RSSI_PKT_DET_THRESHOLDS_dout : in std_logic_vector(32-1 downto 0);\n        "
	  "sm_RSSI_PKT_DET_THRESHOLDS_din  : out std_logic_vector(32-1 downto 0);\n        sm_RSSI_PKT_DET_THRESHOLDS_en   : o"
	  "ut std_logic;\n        -- 'TRIG_IN_CONF_1'\n        sm_TRIG_IN_CONF_1_dout : in std_logic_vector(32-1 downto 0);\n "
	  "       sm_TRIG_IN_CONF_1_din  : out std_logic_vector(32-1 downto 0);\n        sm_TRIG_IN_CONF_1_en   : out std_logi"
	  "c;\n        -- 'From FIFO'\n        -- 'To FIFO'\n        -- 'Shared Memory'\n        -- 'PktOps1'\n        sm_PktO"
	  "ps1_dout  : in  std_logic_vector(32-1 downto 0);\n        sm_PktOps1_addr  : out std_logic_vector(6-1 downto 0);\n "
	  "       sm_PktOps1_din   : out std_logic_vector(32-1 downto 0);\n        sm_PktOps1_we    : out std_logic;\n        "
	  "-- 'PktTemplate1'\n        sm_PktTemplate1_dout  : in  std_logic_vector(32-1 downto 0);\n        sm_PktTemplate1_ad"
	  "dr  : out std_logic_vector(6-1 downto 0);\n        sm_PktTemplate1_din   : out std_logic_vector(32-1 downto 0);\n  "
	  "      sm_PktTemplate1_we    : out std_logic;\n        -- 'PktOps0'\n        sm_PktOps0_dout  : in  std_logic_vector"
	  "(32-1 downto 0);\n        sm_PktOps0_addr  : out std_logic_vector(6-1 downto 0);\n        sm_PktOps0_din   : out st"
	  "d_logic_vector(32-1 downto 0);\n        sm_PktOps0_we    : out std_logic;\n        -- 'PktTemplate0'\n        sm_Pk"
	  "tTemplate0_dout  : in  std_logic_vector(32-1 downto 0);\n        sm_PktTemplate0_addr  : out std_logic_vector(6-1 d"
	  "ownto 0);\n        sm_PktTemplate0_din   : out std_logic_vector(32-1 downto 0);\n        sm_PktTemplate0_we    : ou"
	  "t std_logic;\n        shram_en : out std_logic;\n\n        S_AXI_RLAST   : out std_logic;\n        S_AXI_RID     : "
	  "out std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n        S_AXI_RDATA   : out std_logic_vector(C_S_AXI_DATA_WIDTH"
	  "-1 downto 0);\n        S_AXI_RRESP   : out std_logic_vector(1 downto 0);\n        S_AXI_RVALID  : out std_logic;\n "
	  "       S_AXI_RREADY  : in  std_logic\n    );\nend entity axi_sgiface;\n\narchitecture IMP of axi_sgiface is\n\n-- I"
	  "nternal signals for write channel.\nsignal S_AXI_BVALID_i       : std_logic;\nsignal S_AXI_BID_i          : std_log"
	  "ic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\nsignal S_AXI_WREADY_i       : std_logic;\n  \n-- Internal signals for read"
	  " channels.\nsignal S_AXI_ARLEN_i        : std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto 0);\nsignal S_AXI_RLAST_i  "
	  "      : std_logic;\nsignal S_AXI_RREADY_i       : std_logic;\nsignal S_AXI_RVALID_i       : std_logic;\nsignal S_AX"
	  "I_RDATA_i        : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal S_AXI_RID_i          : std_logic_vector"
	  "(C_S_AXI_ID_WIDTH-1 downto 0);\n\n-- for read channel\nsignal read_bank_addr_i     : std_logic_vector(C_S_AXI_BANK_"
	  "ADDR_LEN-1 downto 0);\nsignal read_linear_addr_i   : std_logic_vector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0);\n-- for "
	  "write channel\nsignal write_bank_addr_i    : std_logic_vector(C_S_AXI_BANK_ADDR_LEN-1 downto 0);\nsignal write_line"
	  "ar_addr_i  : std_logic_vector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0);\n\nsignal reg_bank_out_i       : std_logic_vecto"
	  "r(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal fifo_bank_out_i      : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n"
	  "signal shmem_bank_out_i     : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n    \n-- 'From Register'\n-- 'CORE_"
	  "INFO'\nsignal sm_CORE_INFO_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT'\nsignal sm_TRI"
	  "G_OUT_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'To Register'\n-- 'TRIG_ODELAY_CFG_CMPLL'\nsig"
	  "nal sm_TRIG_ODELAY_CFG_CMPLL_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_ODELAY_CFG_"
	  "CMPLL_en_i    : std_logic;\nsignal sm_TRIG_ODELAY_CFG_CMPLL_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto "
	  "0);\n-- 'TRIG_IDELAY_CFG_CMPLL'\nsignal sm_TRIG_IDELAY_CFG_CMPLL_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 do"
	  "wnto 0);\nsignal sm_TRIG_IDELAY_CFG_CMPLL_en_i    : std_logic;\nsignal sm_TRIG_IDELAY_CFG_CMPLL_dout_i  : std_logic"
	  "_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_ODELAY_CFG_DEBUG_HDR'\nsignal sm_TRIG_ODELAY_CFG_DEBUG_HDR_din_i "
	  "  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_ODELAY_CFG_DEBUG_HDR_en_i    : std_logic;\nsig"
	  "nal sm_TRIG_ODELAY_CFG_DEBUG_HDR_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_IDELAY_CFG_DE"
	  "BUG_HDR'\nsignal sm_TRIG_IDELAY_CFG_DEBUG_HDR_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm"
	  "_TRIG_IDELAY_CFG_DEBUG_HDR_en_i    : std_logic;\nsignal sm_TRIG_IDELAY_CFG_DEBUG_HDR_dout_i  : std_logic_vector(C_S"
	  "_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_IODELAYS_CONTROL'\nsignal sm_TRIG_IODELAYS_CONTROL_din_i   : std_logic_vecto"
	  "r(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_IODELAYS_CONTROL_en_i    : std_logic;\nsignal sm_TRIG_IODELAYS_CO"
	  "NTROL_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'RSSI_PKT_DET_CONFIG'\nsignal sm_RSSI_PKT_DET_"
	  "CONFIG_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_RSSI_PKT_DET_CONFIG_en_i    : std_logi"
	  "c;\nsignal sm_RSSI_PKT_DET_CONFIG_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_IN_CONF_6'\n"
	  "signal sm_TRIG_IN_CONF_6_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_IN_CONF_6_en_i "
	  "   : std_logic;\nsignal sm_TRIG_IN_CONF_6_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_IN_C"
	  "ONF_5'\nsignal sm_TRIG_IN_CONF_5_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_IN_CONF"
	  "_5_en_i    : std_logic;\nsignal sm_TRIG_IN_CONF_5_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'T"
	  "RIG_IN_CONF_4'\nsignal sm_TRIG_IN_CONF_4_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG"
	  "_IN_CONF_4_en_i    : std_logic;\nsignal sm_TRIG_IN_CONF_4_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0)"
	  ";\n-- 'TRIG_IN_CONF_3'\nsignal sm_TRIG_IN_CONF_3_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal"
	  " sm_TRIG_IN_CONF_3_en_i    : std_logic;\nsignal sm_TRIG_IN_CONF_3_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 d"
	  "ownto 0);\n-- 'TRIG_IN_CONF_2'\nsignal sm_TRIG_IN_CONF_2_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);"
	  "\nsignal sm_TRIG_IN_CONF_2_en_i    : std_logic;\nsignal sm_TRIG_IN_CONF_2_dout_i  : std_logic_vector(C_S_AXI_DATA_W"
	  "IDTH-1 downto 0);\n-- 'TRIG_IN_CONF_0'\nsignal sm_TRIG_IN_CONF_0_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 do"
	  "wnto 0);\nsignal sm_TRIG_IN_CONF_0_en_i    : std_logic;\nsignal sm_TRIG_IN_CONF_0_dout_i  : std_logic_vector(C_S_AX"
	  "I_DATA_WIDTH-1 downto 0);\n-- 'TRIG_IN_CONF_8'\nsignal sm_TRIG_IN_CONF_8_din_i   : std_logic_vector(C_S_AXI_DATA_WI"
	  "DTH-1 downto 0);\nsignal sm_TRIG_IN_CONF_8_en_i    : std_logic;\nsignal sm_TRIG_IN_CONF_8_dout_i  : std_logic_vecto"
	  "r(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_IN_CONF_7'\nsignal sm_TRIG_IN_CONF_7_din_i   : std_logic_vector(C_S_AXI"
	  "_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_IN_CONF_7_en_i    : std_logic;\nsignal sm_TRIG_IN_CONF_7_dout_i  : std_log"
	  "ic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT_5_CONF_0'\nsignal sm_TRIG_OUT_5_CONF_0_din_i   : std_logic_"
	  "vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_OUT_5_CONF_0_en_i    : std_logic;\nsignal sm_TRIG_OUT_5_CONF"
	  "_0_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT_5_CONF_1'\nsignal sm_TRIG_OUT_5_CONF_1_"
	  "din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_OUT_5_CONF_1_en_i    : std_logic;\nsigna"
	  "l sm_TRIG_OUT_5_CONF_1_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT_4_CONF_0'\nsignal s"
	  "m_TRIG_OUT_4_CONF_0_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_OUT_4_CONF_0_en_i   "
	  " : std_logic;\nsignal sm_TRIG_OUT_4_CONF_0_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT"
	  "_0_CONF_0'\nsignal sm_TRIG_OUT_0_CONF_0_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_"
	  "OUT_0_CONF_0_en_i    : std_logic;\nsignal sm_TRIG_OUT_0_CONF_0_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 down"
	  "to 0);\n-- 'TRIG_OUT_4_CONF_1'\nsignal sm_TRIG_OUT_4_CONF_1_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto "
	  "0);\nsignal sm_TRIG_OUT_4_CONF_1_en_i    : std_logic;\nsignal sm_TRIG_OUT_4_CONF_1_dout_i  : std_logic_vector(C_S_A"
	  "XI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT_3_CONF_0'\nsignal sm_TRIG_OUT_3_CONF_0_din_i   : std_logic_vector(C_S_AXI_"
	  "DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_OUT_3_CONF_0_en_i    : std_logic;\nsignal sm_TRIG_OUT_3_CONF_0_dout_i  : st"
	  "d_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT_3_CONF_1'\nsignal sm_TRIG_OUT_3_CONF_1_din_i   : std_l"
	  "ogic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_OUT_3_CONF_1_en_i    : std_logic;\nsignal sm_TRIG_OUT_3"
	  "_CONF_1_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT_2_CONF_0'\nsignal sm_TRIG_OUT_2_CO"
	  "NF_0_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_OUT_2_CONF_0_en_i    : std_logic;\n"
	  "signal sm_TRIG_OUT_2_CONF_0_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT_2_CONF_1'\nsig"
	  "nal sm_TRIG_OUT_2_CONF_1_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_OUT_2_CONF_1_en"
	  "_i    : std_logic;\nsignal sm_TRIG_OUT_2_CONF_1_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRI"
	  "G_OUT_1_CONF_0'\nsignal sm_TRIG_OUT_1_CONF_0_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_"
	  "TRIG_OUT_1_CONF_0_en_i    : std_logic;\nsignal sm_TRIG_OUT_1_CONF_0_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1"
	  " downto 0);\n-- 'TRIG_OUT_1_CONF_1'\nsignal sm_TRIG_OUT_1_CONF_1_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 do"
	  "wnto 0);\nsignal sm_TRIG_OUT_1_CONF_1_en_i    : std_logic;\nsignal sm_TRIG_OUT_1_CONF_1_dout_i  : std_logic_vector("
	  "C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TRIG_OUT_0_CONF_1'\nsignal sm_TRIG_OUT_0_CONF_1_din_i   : std_logic_vector(C_S"
	  "_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TRIG_OUT_0_CONF_1_en_i    : std_logic;\nsignal sm_TRIG_OUT_0_CONF_1_dout_i "
	  " : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'RSSI_PKT_DET_DURATIONS'\nsignal sm_RSSI_PKT_DET_DURATIONS_"
	  "din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_RSSI_PKT_DET_DURATIONS_en_i    : std_logic;\n"
	  "signal sm_RSSI_PKT_DET_DURATIONS_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'RSSI_PKT_DET_THRES"
	  "HOLDS'\nsignal sm_RSSI_PKT_DET_THRESHOLDS_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_RSS"
	  "I_PKT_DET_THRESHOLDS_en_i    : std_logic;\nsignal sm_RSSI_PKT_DET_THRESHOLDS_dout_i  : std_logic_vector(C_S_AXI_DAT"
	  "A_WIDTH-1 downto 0);\n-- 'TRIG_IN_CONF_1'\nsignal sm_TRIG_IN_CONF_1_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1"
	  " downto 0);\nsignal sm_TRIG_IN_CONF_1_en_i    : std_logic;\nsignal sm_TRIG_IN_CONF_1_dout_i  : std_logic_vector(C_S"
	  "_AXI_DATA_WIDTH-1 downto 0);\n-- 'From FIFO'\n-- 'To FIFO'\n-- 'Shared Memory'\n-- 'PktOps1'\nsignal sm_PktOps1_add"
	  "r_i  : std_logic_vector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0);\nsignal sm_PktOps1_din_i   : std_logic_vector(C_S_AXI_"
	  "DATA_WIDTH-1 downto 0);\nsignal sm_PktOps1_we_i    : std_logic;\nsignal sm_PktOps1_dout_i  : std_logic_vector(C_S_A"
	  "XI_DATA_WIDTH-1 downto 0);\n-- 'PktTemplate1'\nsignal sm_PktTemplate1_addr_i  : std_logic_vector(C_S_AXI_LINEAR_ADD"
	  "R_LEN-1 downto 0);\nsignal sm_PktTemplate1_din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_Pk"
	  "tTemplate1_we_i    : std_logic;\nsignal sm_PktTemplate1_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n"
	  "-- 'PktOps0'\nsignal sm_PktOps0_addr_i  : std_logic_vector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0);\nsignal sm_PktOps0_"
	  "din_i   : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_PktOps0_we_i    : std_logic;\nsignal sm_PktOp"
	  "s0_dout_i  : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'PktTemplate0'\nsignal sm_PktTemplate0_addr_i  : "
	  "std_logic_vector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0);\nsignal sm_PktTemplate0_din_i   : std_logic_vector(C_S_AXI_DA"
	  "TA_WIDTH-1 downto 0);\nsignal sm_PktTemplate0_we_i    : std_logic;\nsignal sm_PktTemplate0_dout_i  : std_logic_vect"
	  "or(C_S_AXI_DATA_WIDTH-1 downto 0);\n\ntype t_read_state is (IDLE, READ_PREP, READ_DATA);\nsignal read_state : t_rea"
	  "d_state;\n\ntype t_write_state is (IDLE, WRITE_DATA, WRITE_RESPONSE);\nsignal write_state : t_write_state;\n\ntype "
	  "t_memmap_state is (READ, WRITE);\nsignal memmap_state : t_memmap_state;\n\nconstant C_READ_PREP_DELAY : std_logic_v"
	  "ector(1 downto 0) := \"11\";\n\nsignal read_prep_counter : std_logic_vector(1 downto 0);\nsignal read_addr_counter "
	  ": std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto 0);\nsignal read_data_counter : std_logic_vector(C_S_AXI_ARLEN_WIDT"
	  "H-1 downto 0);\n\n-- enable of shared BRAMs\nsignal s_shram_en : std_logic;\n\nsignal write_addr_valid : std_logic;"
	  "\nsignal write_ready : std_logic;\n\n-- 're' of From/To FIFOs\nsignal s_fifo_re : std_logic;\n-- 'we' of To FIFOs\n"
	  "signal s_fifo_we : std_logic;\n\nbegin\n\n-- enable for 'Shared Memory' blocks\nshram_en <= s_shram_en;\n-- PktOps1"
	  " din\nsm_PktOps1_din_i <= S_AXI_WDATA;\n-- PktTemplate1 din\nsm_PktTemplate1_din_i <= S_AXI_WDATA;\n-- PktOps0 din\n"
	  "sm_PktOps0_din_i <= S_AXI_WDATA;\n-- PktTemplate0 din\nsm_PktTemplate0_din_i <= S_AXI_WDATA;\n\n-- conversion to ma"
	  "tch with the data bus width\n-- 'From Register'\n-- 'CORE_INFO'\ngen_sm_CORE_INFO_dout_i: if (24 < C_S_AXI_DATA_WID"
	  "TH) generate\n    sm_CORE_INFO_dout_i(C_S_AXI_DATA_WIDTH-1 downto 24) <= (others => '0');\nend generate gen_sm_CORE"
	  "_INFO_dout_i;\nsm_CORE_INFO_dout_i(24-1 downto 0) <= sm_CORE_INFO_dout;\n-- 'TRIG_OUT'\ngen_sm_TRIG_OUT_dout_i: if "
	  "(6 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_dout_i(C_S_AXI_DATA_WIDTH-1 downto 6) <= (others => '0');\nend g"
	  "enerate gen_sm_TRIG_OUT_dout_i;\nsm_TRIG_OUT_dout_i(6-1 downto 0) <= sm_TRIG_OUT_dout;\n-- 'To Register'\n-- 'TRIG_"
	  "ODELAY_CFG_CMPLL'\nsm_TRIG_ODELAY_CFG_CMPLL_din     <= sm_TRIG_ODELAY_CFG_CMPLL_din_i(32-1 downto 0);\nsm_TRIG_ODEL"
	  "AY_CFG_CMPLL_en      <= sm_TRIG_ODELAY_CFG_CMPLL_en_i;\ngen_sm_TRIG_ODELAY_CFG_CMPLL_dout_i: if (32 < C_S_AXI_DATA_"
	  "WIDTH) generate\n    sm_TRIG_ODELAY_CFG_CMPLL_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend gener"
	  "ate gen_sm_TRIG_ODELAY_CFG_CMPLL_dout_i;\nsm_TRIG_ODELAY_CFG_CMPLL_dout_i(32-1 downto 0) <= sm_TRIG_ODELAY_CFG_CMPL"
	  "L_dout;\n-- 'TRIG_IDELAY_CFG_CMPLL'\nsm_TRIG_IDELAY_CFG_CMPLL_din     <= sm_TRIG_IDELAY_CFG_CMPLL_din_i(32-1 downto"
	  " 0);\nsm_TRIG_IDELAY_CFG_CMPLL_en      <= sm_TRIG_IDELAY_CFG_CMPLL_en_i;\ngen_sm_TRIG_IDELAY_CFG_CMPLL_dout_i: if ("
	  "32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_IDELAY_CFG_CMPLL_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others ="
	  "> '0');\nend generate gen_sm_TRIG_IDELAY_CFG_CMPLL_dout_i;\nsm_TRIG_IDELAY_CFG_CMPLL_dout_i(32-1 downto 0) <= sm_TR"
	  "IG_IDELAY_CFG_CMPLL_dout;\n-- 'TRIG_ODELAY_CFG_DEBUG_HDR'\nsm_TRIG_ODELAY_CFG_DEBUG_HDR_din     <= sm_TRIG_ODELAY_C"
	  "FG_DEBUG_HDR_din_i(32-1 downto 0);\nsm_TRIG_ODELAY_CFG_DEBUG_HDR_en      <= sm_TRIG_ODELAY_CFG_DEBUG_HDR_en_i;\ngen"
	  "_sm_TRIG_ODELAY_CFG_DEBUG_HDR_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_ODELAY_CFG_DEBUG_HDR_dout_"
	  "i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_ODELAY_CFG_DEBUG_HDR_dout_i;\nsm_TR"
	  "IG_ODELAY_CFG_DEBUG_HDR_dout_i(32-1 downto 0) <= sm_TRIG_ODELAY_CFG_DEBUG_HDR_dout;\n-- 'TRIG_IDELAY_CFG_DEBUG_HDR'"
	  "\nsm_TRIG_IDELAY_CFG_DEBUG_HDR_din     <= sm_TRIG_IDELAY_CFG_DEBUG_HDR_din_i(32-1 downto 0);\nsm_TRIG_IDELAY_CFG_DE"
	  "BUG_HDR_en      <= sm_TRIG_IDELAY_CFG_DEBUG_HDR_en_i;\ngen_sm_TRIG_IDELAY_CFG_DEBUG_HDR_dout_i: if (32 < C_S_AXI_DA"
	  "TA_WIDTH) generate\n    sm_TRIG_IDELAY_CFG_DEBUG_HDR_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nen"
	  "d generate gen_sm_TRIG_IDELAY_CFG_DEBUG_HDR_dout_i;\nsm_TRIG_IDELAY_CFG_DEBUG_HDR_dout_i(32-1 downto 0) <= sm_TRIG_"
	  "IDELAY_CFG_DEBUG_HDR_dout;\n-- 'TRIG_IODELAYS_CONTROL'\nsm_TRIG_IODELAYS_CONTROL_din     <= sm_TRIG_IODELAYS_CONTRO"
	  "L_din_i(32-1 downto 0);\nsm_TRIG_IODELAYS_CONTROL_en      <= sm_TRIG_IODELAYS_CONTROL_en_i;\ngen_sm_TRIG_IODELAYS_C"
	  "ONTROL_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_IODELAYS_CONTROL_dout_i(C_S_AXI_DATA_WIDTH-1 down"
	  "to 32) <= (others => '0');\nend generate gen_sm_TRIG_IODELAYS_CONTROL_dout_i;\nsm_TRIG_IODELAYS_CONTROL_dout_i(32-1"
	  " downto 0) <= sm_TRIG_IODELAYS_CONTROL_dout;\n-- 'RSSI_PKT_DET_CONFIG'\nsm_RSSI_PKT_DET_CONFIG_din     <= sm_RSSI_P"
	  "KT_DET_CONFIG_din_i(32-1 downto 0);\nsm_RSSI_PKT_DET_CONFIG_en      <= sm_RSSI_PKT_DET_CONFIG_en_i;\ngen_sm_RSSI_PK"
	  "T_DET_CONFIG_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_RSSI_PKT_DET_CONFIG_dout_i(C_S_AXI_DATA_WIDTH-1 "
	  "downto 32) <= (others => '0');\nend generate gen_sm_RSSI_PKT_DET_CONFIG_dout_i;\nsm_RSSI_PKT_DET_CONFIG_dout_i(32-1"
	  " downto 0) <= sm_RSSI_PKT_DET_CONFIG_dout;\n-- 'TRIG_IN_CONF_6'\nsm_TRIG_IN_CONF_6_din     <= sm_TRIG_IN_CONF_6_din"
	  "_i(32-1 downto 0);\nsm_TRIG_IN_CONF_6_en      <= sm_TRIG_IN_CONF_6_en_i;\ngen_sm_TRIG_IN_CONF_6_dout_i: if (32 < C_"
	  "S_AXI_DATA_WIDTH) generate\n    sm_TRIG_IN_CONF_6_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend g"
	  "enerate gen_sm_TRIG_IN_CONF_6_dout_i;\nsm_TRIG_IN_CONF_6_dout_i(32-1 downto 0) <= sm_TRIG_IN_CONF_6_dout;\n-- 'TRIG"
	  "_IN_CONF_5'\nsm_TRIG_IN_CONF_5_din     <= sm_TRIG_IN_CONF_5_din_i(32-1 downto 0);\nsm_TRIG_IN_CONF_5_en      <= sm_"
	  "TRIG_IN_CONF_5_en_i;\ngen_sm_TRIG_IN_CONF_5_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_IN_CONF_5_do"
	  "ut_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_IN_CONF_5_dout_i;\nsm_TRIG_IN_CO"
	  "NF_5_dout_i(32-1 downto 0) <= sm_TRIG_IN_CONF_5_dout;\n-- 'TRIG_IN_CONF_4'\nsm_TRIG_IN_CONF_4_din     <= sm_TRIG_IN"
	  "_CONF_4_din_i(32-1 downto 0);\nsm_TRIG_IN_CONF_4_en      <= sm_TRIG_IN_CONF_4_en_i;\ngen_sm_TRIG_IN_CONF_4_dout_i: "
	  "if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_IN_CONF_4_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '"
	  "0');\nend generate gen_sm_TRIG_IN_CONF_4_dout_i;\nsm_TRIG_IN_CONF_4_dout_i(32-1 downto 0) <= sm_TRIG_IN_CONF_4_dout"
	  ";\n-- 'TRIG_IN_CONF_3'\nsm_TRIG_IN_CONF_3_din     <= sm_TRIG_IN_CONF_3_din_i(32-1 downto 0);\nsm_TRIG_IN_CONF_3_en "
	  "     <= sm_TRIG_IN_CONF_3_en_i;\ngen_sm_TRIG_IN_CONF_3_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_I"
	  "N_CONF_3_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_IN_CONF_3_dout_i;\nsm"
	  "_TRIG_IN_CONF_3_dout_i(32-1 downto 0) <= sm_TRIG_IN_CONF_3_dout;\n-- 'TRIG_IN_CONF_2'\nsm_TRIG_IN_CONF_2_din     <="
	  " sm_TRIG_IN_CONF_2_din_i(32-1 downto 0);\nsm_TRIG_IN_CONF_2_en      <= sm_TRIG_IN_CONF_2_en_i;\ngen_sm_TRIG_IN_CONF"
	  "_2_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_IN_CONF_2_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= ("
	  "others => '0');\nend generate gen_sm_TRIG_IN_CONF_2_dout_i;\nsm_TRIG_IN_CONF_2_dout_i(32-1 downto 0) <= sm_TRIG_IN_"
	  "CONF_2_dout;\n-- 'TRIG_IN_CONF_0'\nsm_TRIG_IN_CONF_0_din     <= sm_TRIG_IN_CONF_0_din_i(32-1 downto 0);\nsm_TRIG_IN"
	  "_CONF_0_en      <= sm_TRIG_IN_CONF_0_en_i;\ngen_sm_TRIG_IN_CONF_0_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n  "
	  "  sm_TRIG_IN_CONF_0_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_IN_CONF_0_"
	  "dout_i;\nsm_TRIG_IN_CONF_0_dout_i(32-1 downto 0) <= sm_TRIG_IN_CONF_0_dout;\n-- 'TRIG_IN_CONF_8'\nsm_TRIG_IN_CONF_8"
	  "_din     <= sm_TRIG_IN_CONF_8_din_i(32-1 downto 0);\nsm_TRIG_IN_CONF_8_en      <= sm_TRIG_IN_CONF_8_en_i;\ngen_sm_T"
	  "RIG_IN_CONF_8_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_IN_CONF_8_dout_i(C_S_AXI_DATA_WIDTH-1 down"
	  "to 32) <= (others => '0');\nend generate gen_sm_TRIG_IN_CONF_8_dout_i;\nsm_TRIG_IN_CONF_8_dout_i(32-1 downto 0) <= "
	  "sm_TRIG_IN_CONF_8_dout;\n-- 'TRIG_IN_CONF_7'\nsm_TRIG_IN_CONF_7_din     <= sm_TRIG_IN_CONF_7_din_i(32-1 downto 0);\n"
	  "sm_TRIG_IN_CONF_7_en      <= sm_TRIG_IN_CONF_7_en_i;\ngen_sm_TRIG_IN_CONF_7_dout_i: if (32 < C_S_AXI_DATA_WIDTH) ge"
	  "nerate\n    sm_TRIG_IN_CONF_7_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_"
	  "IN_CONF_7_dout_i;\nsm_TRIG_IN_CONF_7_dout_i(32-1 downto 0) <= sm_TRIG_IN_CONF_7_dout;\n-- 'TRIG_OUT_5_CONF_0'\nsm_T"
	  "RIG_OUT_5_CONF_0_din     <= sm_TRIG_OUT_5_CONF_0_din_i(32-1 downto 0);\nsm_TRIG_OUT_5_CONF_0_en      <= sm_TRIG_OUT"
	  "_5_CONF_0_en_i;\ngen_sm_TRIG_OUT_5_CONF_0_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_5_CONF_0_d"
	  "out_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_OUT_5_CONF_0_dout_i;\nsm_TRIG_O"
	  "UT_5_CONF_0_dout_i(32-1 downto 0) <= sm_TRIG_OUT_5_CONF_0_dout;\n-- 'TRIG_OUT_5_CONF_1'\nsm_TRIG_OUT_5_CONF_1_din  "
	  "   <= sm_TRIG_OUT_5_CONF_1_din_i(32-1 downto 0);\nsm_TRIG_OUT_5_CONF_1_en      <= sm_TRIG_OUT_5_CONF_1_en_i;\ngen_s"
	  "m_TRIG_OUT_5_CONF_1_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_5_CONF_1_dout_i(C_S_AXI_DATA_WID"
	  "TH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_OUT_5_CONF_1_dout_i;\nsm_TRIG_OUT_5_CONF_1_dout_i(32-"
	  "1 downto 0) <= sm_TRIG_OUT_5_CONF_1_dout;\n-- 'TRIG_OUT_4_CONF_0'\nsm_TRIG_OUT_4_CONF_0_din     <= sm_TRIG_OUT_4_CO"
	  "NF_0_din_i(32-1 downto 0);\nsm_TRIG_OUT_4_CONF_0_en      <= sm_TRIG_OUT_4_CONF_0_en_i;\ngen_sm_TRIG_OUT_4_CONF_0_do"
	  "ut_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_4_CONF_0_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (ot"
	  "hers => '0');\nend generate gen_sm_TRIG_OUT_4_CONF_0_dout_i;\nsm_TRIG_OUT_4_CONF_0_dout_i(32-1 downto 0) <= sm_TRIG"
	  "_OUT_4_CONF_0_dout;\n-- 'TRIG_OUT_0_CONF_0'\nsm_TRIG_OUT_0_CONF_0_din     <= sm_TRIG_OUT_0_CONF_0_din_i(32-1 downto"
	  " 0);\nsm_TRIG_OUT_0_CONF_0_en      <= sm_TRIG_OUT_0_CONF_0_en_i;\ngen_sm_TRIG_OUT_0_CONF_0_dout_i: if (32 < C_S_AXI"
	  "_DATA_WIDTH) generate\n    sm_TRIG_OUT_0_CONF_0_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend gen"
	  "erate gen_sm_TRIG_OUT_0_CONF_0_dout_i;\nsm_TRIG_OUT_0_CONF_0_dout_i(32-1 downto 0) <= sm_TRIG_OUT_0_CONF_0_dout;\n-"
	  "- 'TRIG_OUT_4_CONF_1'\nsm_TRIG_OUT_4_CONF_1_din     <= sm_TRIG_OUT_4_CONF_1_din_i(32-1 downto 0);\nsm_TRIG_OUT_4_CO"
	  "NF_1_en      <= sm_TRIG_OUT_4_CONF_1_en_i;\ngen_sm_TRIG_OUT_4_CONF_1_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n"
	  "    sm_TRIG_OUT_4_CONF_1_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_OUT_4"
	  "_CONF_1_dout_i;\nsm_TRIG_OUT_4_CONF_1_dout_i(32-1 downto 0) <= sm_TRIG_OUT_4_CONF_1_dout;\n-- 'TRIG_OUT_3_CONF_0'\n"
	  "sm_TRIG_OUT_3_CONF_0_din     <= sm_TRIG_OUT_3_CONF_0_din_i(32-1 downto 0);\nsm_TRIG_OUT_3_CONF_0_en      <= sm_TRIG"
	  "_OUT_3_CONF_0_en_i;\ngen_sm_TRIG_OUT_3_CONF_0_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_3_CONF"
	  "_0_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_OUT_3_CONF_0_dout_i;\nsm_TR"
	  "IG_OUT_3_CONF_0_dout_i(32-1 downto 0) <= sm_TRIG_OUT_3_CONF_0_dout;\n-- 'TRIG_OUT_3_CONF_1'\nsm_TRIG_OUT_3_CONF_1_d"
	  "in     <= sm_TRIG_OUT_3_CONF_1_din_i(32-1 downto 0);\nsm_TRIG_OUT_3_CONF_1_en      <= sm_TRIG_OUT_3_CONF_1_en_i;\ng"
	  "en_sm_TRIG_OUT_3_CONF_1_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_3_CONF_1_dout_i(C_S_AXI_DATA"
	  "_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_OUT_3_CONF_1_dout_i;\nsm_TRIG_OUT_3_CONF_1_dout_i"
	  "(32-1 downto 0) <= sm_TRIG_OUT_3_CONF_1_dout;\n-- 'TRIG_OUT_2_CONF_0'\nsm_TRIG_OUT_2_CONF_0_din     <= sm_TRIG_OUT_"
	  "2_CONF_0_din_i(32-1 downto 0);\nsm_TRIG_OUT_2_CONF_0_en      <= sm_TRIG_OUT_2_CONF_0_en_i;\ngen_sm_TRIG_OUT_2_CONF_"
	  "0_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_2_CONF_0_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <="
	  " (others => '0');\nend generate gen_sm_TRIG_OUT_2_CONF_0_dout_i;\nsm_TRIG_OUT_2_CONF_0_dout_i(32-1 downto 0) <= sm_"
	  "TRIG_OUT_2_CONF_0_dout;\n-- 'TRIG_OUT_2_CONF_1'\nsm_TRIG_OUT_2_CONF_1_din     <= sm_TRIG_OUT_2_CONF_1_din_i(32-1 do"
	  "wnto 0);\nsm_TRIG_OUT_2_CONF_1_en      <= sm_TRIG_OUT_2_CONF_1_en_i;\ngen_sm_TRIG_OUT_2_CONF_1_dout_i: if (32 < C_S"
	  "_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_2_CONF_1_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend"
	  " generate gen_sm_TRIG_OUT_2_CONF_1_dout_i;\nsm_TRIG_OUT_2_CONF_1_dout_i(32-1 downto 0) <= sm_TRIG_OUT_2_CONF_1_dout"
	  ";\n-- 'TRIG_OUT_1_CONF_0'\nsm_TRIG_OUT_1_CONF_0_din     <= sm_TRIG_OUT_1_CONF_0_din_i(32-1 downto 0);\nsm_TRIG_OUT_"
	  "1_CONF_0_en      <= sm_TRIG_OUT_1_CONF_0_en_i;\ngen_sm_TRIG_OUT_1_CONF_0_dout_i: if (32 < C_S_AXI_DATA_WIDTH) gener"
	  "ate\n    sm_TRIG_OUT_1_CONF_0_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_"
	  "OUT_1_CONF_0_dout_i;\nsm_TRIG_OUT_1_CONF_0_dout_i(32-1 downto 0) <= sm_TRIG_OUT_1_CONF_0_dout;\n-- 'TRIG_OUT_1_CONF"
	  "_1'\nsm_TRIG_OUT_1_CONF_1_din     <= sm_TRIG_OUT_1_CONF_1_din_i(32-1 downto 0);\nsm_TRIG_OUT_1_CONF_1_en      <= sm"
	  "_TRIG_OUT_1_CONF_1_en_i;\ngen_sm_TRIG_OUT_1_CONF_1_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_1"
	  "_CONF_1_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_OUT_1_CONF_1_dout_i;\n"
	  "sm_TRIG_OUT_1_CONF_1_dout_i(32-1 downto 0) <= sm_TRIG_OUT_1_CONF_1_dout;\n-- 'TRIG_OUT_0_CONF_1'\nsm_TRIG_OUT_0_CON"
	  "F_1_din     <= sm_TRIG_OUT_0_CONF_1_din_i(32-1 downto 0);\nsm_TRIG_OUT_0_CONF_1_en      <= sm_TRIG_OUT_0_CONF_1_en_"
	  "i;\ngen_sm_TRIG_OUT_0_CONF_1_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_OUT_0_CONF_1_dout_i(C_S_AXI"
	  "_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_OUT_0_CONF_1_dout_i;\nsm_TRIG_OUT_0_CONF_1_d"
	  "out_i(32-1 downto 0) <= sm_TRIG_OUT_0_CONF_1_dout;\n-- 'RSSI_PKT_DET_DURATIONS'\nsm_RSSI_PKT_DET_DURATIONS_din     "
	  "<= sm_RSSI_PKT_DET_DURATIONS_din_i(32-1 downto 0);\nsm_RSSI_PKT_DET_DURATIONS_en      <= sm_RSSI_PKT_DET_DURATIONS_"
	  "en_i;\ngen_sm_RSSI_PKT_DET_DURATIONS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_RSSI_PKT_DET_DURATIONS_d"
	  "out_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_RSSI_PKT_DET_DURATIONS_dout_i;\nsm_R"
	  "SSI_PKT_DET_DURATIONS_dout_i(32-1 downto 0) <= sm_RSSI_PKT_DET_DURATIONS_dout;\n-- 'RSSI_PKT_DET_THRESHOLDS'\nsm_RS"
	  "SI_PKT_DET_THRESHOLDS_din     <= sm_RSSI_PKT_DET_THRESHOLDS_din_i(32-1 downto 0);\nsm_RSSI_PKT_DET_THRESHOLDS_en   "
	  "   <= sm_RSSI_PKT_DET_THRESHOLDS_en_i;\ngen_sm_RSSI_PKT_DET_THRESHOLDS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generat"
	  "e\n    sm_RSSI_PKT_DET_THRESHOLDS_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_R"
	  "SSI_PKT_DET_THRESHOLDS_dout_i;\nsm_RSSI_PKT_DET_THRESHOLDS_dout_i(32-1 downto 0) <= sm_RSSI_PKT_DET_THRESHOLDS_dout"
	  ";\n-- 'TRIG_IN_CONF_1'\nsm_TRIG_IN_CONF_1_din     <= sm_TRIG_IN_CONF_1_din_i(32-1 downto 0);\nsm_TRIG_IN_CONF_1_en "
	  "     <= sm_TRIG_IN_CONF_1_en_i;\ngen_sm_TRIG_IN_CONF_1_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_TRIG_I"
	  "N_CONF_1_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TRIG_IN_CONF_1_dout_i;\nsm"
	  "_TRIG_IN_CONF_1_dout_i(32-1 downto 0) <= sm_TRIG_IN_CONF_1_dout;\n-- 'From FIFO'\n-- 'To FIFO'\n-- 'Shared Memory'\n"
	  "-- 'PktOps1'\nsm_PktOps1_addr <= sm_PktOps1_addr_i(6-1 downto 0);\nsm_PktOps1_din  <= sm_PktOps1_din_i(32-1 downto "
	  "0);\ngen_sm_PktOps1_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_PktOps1_dout_i(C_S_AXI_DATA_WIDTH-1 downt"
	  "o 32) <= (others => '0');\nend generate gen_sm_PktOps1_dout_i;\nsm_PktOps1_dout_i(32-1 downto 0) <= sm_PktOps1_dout"
	  ";\nsm_PktOps1_we <= sm_PktOps1_we_i;\n-- 'PktTemplate1'\nsm_PktTemplate1_addr <= sm_PktTemplate1_addr_i(6-1 downto "
	  "0);\nsm_PktTemplate1_din  <= sm_PktTemplate1_din_i(32-1 downto 0);\ngen_sm_PktTemplate1_dout_i: if (32 < C_S_AXI_DA"
	  "TA_WIDTH) generate\n    sm_PktTemplate1_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate ge"
	  "n_sm_PktTemplate1_dout_i;\nsm_PktTemplate1_dout_i(32-1 downto 0) <= sm_PktTemplate1_dout;\nsm_PktTemplate1_we <= sm"
	  "_PktTemplate1_we_i;\n-- 'PktOps0'\nsm_PktOps0_addr <= sm_PktOps0_addr_i(6-1 downto 0);\nsm_PktOps0_din  <= sm_PktOp"
	  "s0_din_i(32-1 downto 0);\ngen_sm_PktOps0_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_PktOps0_dout_i(C_S_A"
	  "XI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_PktOps0_dout_i;\nsm_PktOps0_dout_i(32-1 downto "
	  "0) <= sm_PktOps0_dout;\nsm_PktOps0_we <= sm_PktOps0_we_i;\n-- 'PktTemplate0'\nsm_PktTemplate0_addr <= sm_PktTemplat"
	  "e0_addr_i(6-1 downto 0);\nsm_PktTemplate0_din  <= sm_PktTemplate0_din_i(32-1 downto 0);\ngen_sm_PktTemplate0_dout_i"
	  ": if (32 < C_S_AXI_DATA_WIDTH) generate\n    sm_PktTemplate0_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '"
	  "0');\nend generate gen_sm_PktTemplate0_dout_i;\nsm_PktTemplate0_dout_i(32-1 downto 0) <= sm_PktTemplate0_dout;\nsm_"
	  "PktTemplate0_we <= sm_PktTemplate0_we_i;\n\nReadWriteSelect: process(memmap_state) is begin\n    if (memmap_state ="
	  " READ) then\n        -- 'PktOps1'\n        sm_PktOps1_addr_i <= read_linear_addr_i;-- 'PktTemplate1'\n        sm_Pk"
	  "tTemplate1_addr_i <= read_linear_addr_i;-- 'PktOps0'\n        sm_PktOps0_addr_i <= read_linear_addr_i;-- 'PktTempla"
	  "te0'\n        sm_PktTemplate0_addr_i <= read_linear_addr_i;\n    else\n        -- 'PktOps1'\n        sm_PktOps1_add"
	  "r_i <= write_linear_addr_i;-- 'PktTemplate1'\n        sm_PktTemplate1_addr_i <= write_linear_addr_i;-- 'PktOps0'\n "
	  "       sm_PktOps0_addr_i <= write_linear_addr_i;-- 'PktTemplate0'\n        sm_PktTemplate0_addr_i <= write_linear_a"
	  "ddr_i;\n    end if;\nend process ReadWriteSelect;\n\n--------------------------------------------------------------"
	  "---------------\n-- address for 'Shared Memory'\n------------------------------------------------------------------"
	  "-----------\nSharedMemory_Addr_ResetN : process(AXI_AClk) is begin\n    if (AXI_AClk'event and AXI_AClk = '1') then"
	  "\n        if (AXI_AResetN = '0') then\n            memmap_state <= READ;\n        else\n            if (S_AXI_AWVAL"
	  "ID = '1') then\n                -- write operation\n                memmap_state <= WRITE;\n            elsif (S_AX"
	  "I_ARVALID = '1') then\n                -- read operation\n                memmap_state <= READ;\n            end if"
	  ";\n        end if;\n    end if;\nend process SharedMemory_Addr_ResetN;\n\n-----------------------------------------"
	  "------------------------------------\n-- WRITE Command Control\n---------------------------------------------------"
	  "--------------------------\nS_AXI_BID     <= S_AXI_BID_i;\nS_AXI_BVALID  <= S_AXI_BVALID_i;\nS_AXI_WREADY  <= S_AXI"
	  "_WREADY_i;\n-- No error checking\nS_AXI_BRESP  <= (others=>'0');\n\nPROC_AWREADY_ACK: process(read_state, write_sta"
	  "te, S_AXI_ARVALID, S_AXI_AWVALID) is begin\n    if (write_state = IDLE and S_AXI_AWVALID = '1' and read_state = IDL"
	  "E) then\n        S_AXI_AWREADY <= S_AXI_AWVALID;\n    else\n        S_AXI_AWREADY <= '0';\n    end if;\nend process"
	  " PROC_AWREADY_ACK;\n\nCmd_Decode_Write: process(AXI_AClk) is begin\n    if (AXI_AClk'event and AXI_AClk = '1') then"
	  "\n        if (AXI_AResetN = '0') then\n            write_addr_valid    <= '0';\n            write_ready         <= "
	  "'0';\n            s_fifo_we           <= '0';\n            S_AXI_BVALID_i      <= '0';\n            S_AXI_BID_i    "
	  "     <= (others => '0');\n            write_bank_addr_i   <= (others => '0');\n            write_linear_addr_i <= ("
	  "others => '0');\n        else\n            if (write_state = IDLE) then\n                if (S_AXI_AWVALID = '1' an"
	  "d read_state = IDLE) then\n                    -- reflect awid\n                    S_AXI_BID_i <= S_AXI_AWID;\n\n "
	  "                   -- latch bank and linear addresses\n                    write_bank_addr_i   <= S_AXI_AWADDR(C_S_"
	  "AXI_TOTAL_ADDR_LEN-1 downto C_S_AXI_LINEAR_ADDR_LEN+2);\n                    write_linear_addr_i <= S_AXI_AWADDR(C_"
	  "S_AXI_LINEAR_ADDR_LEN+1 downto 2);\n                    write_addr_valid <= '1';\n                    s_fifo_we <= "
	  "'1';\n\n                    -- write state transition\n                    write_state <= WRITE_DATA;\n            "
	  "    end if;\n            elsif (write_state = WRITE_DATA) then\n                write_ready <= '1';\n              "
	  "  s_fifo_we <= '0';\n                write_addr_valid <= S_AXI_WVALID;\n                \n                if (S_AXI"
	  "_WVALID = '1' and write_ready = '1') then\n                    write_linear_addr_i <= Std_Logic_Vector(unsigned(wri"
	  "te_linear_addr_i) + 1);\n                end if;\n\n                if (S_AXI_WLAST = '1' and write_ready = '1') th"
	  "en\n                    -- start responding through B channel upon the last write data sample\n                    "
	  "S_AXI_BVALID_i <= '1';\n                    -- write data is over\n                    write_addr_valid <= '0';\n  "
	  "                  write_ready <= '0';\n                    -- write state transition\n                    write_sta"
	  "te <= WRITE_RESPONSE;\n                end if;\n            elsif (write_state = WRITE_RESPONSE) then\n\n          "
	  "      if (S_AXI_BREADY = '1') then\n                    -- write respond is over\n                    S_AXI_BVALID_"
	  "i <= '0';\n                    S_AXI_BID_i <= (others => '0');\n\n                    -- write state transition\n  "
	  "                  write_state <= IDLE;\n                end if;\n            end if;\n        end if;\n    end if;\n"
	  "end process Cmd_Decode_Write;\n\nWrite_Linear_Addr_Decode : process(AXI_AClk) is \n\nbegin\n    if (AXI_AClk'event "
	  "and AXI_AClk = '1') then\n        if (AXI_AResetN = '0') then\n            -- 'To Register'\n            -- TRIG_OD"
	  "ELAY_CFG_CMPLL din/en\n            sm_TRIG_ODELAY_CFG_CMPLL_din_i <= (others => '0');\n            sm_TRIG_ODELAY_C"
	  "FG_CMPLL_en_i <= '0';\n            -- TRIG_IDELAY_CFG_CMPLL din/en\n            sm_TRIG_IDELAY_CFG_CMPLL_din_i <= ("
	  "others => '0');\n            sm_TRIG_IDELAY_CFG_CMPLL_en_i <= '0';\n            -- TRIG_ODELAY_CFG_DEBUG_HDR din/en"
	  "\n            sm_TRIG_ODELAY_CFG_DEBUG_HDR_din_i <= (others => '0');\n            sm_TRIG_ODELAY_CFG_DEBUG_HDR_en_i"
	  " <= '0';\n            -- TRIG_IDELAY_CFG_DEBUG_HDR din/en\n            sm_TRIG_IDELAY_CFG_DEBUG_HDR_din_i <= (other"
	  "s => '0');\n            sm_TRIG_IDELAY_CFG_DEBUG_HDR_en_i <= '0';\n            -- TRIG_IODELAYS_CONTROL din/en\n   "
	  "         sm_TRIG_IODELAYS_CONTROL_din_i <= (others => '0');\n            sm_TRIG_IODELAYS_CONTROL_en_i <= '0';\n   "
	  "         -- RSSI_PKT_DET_CONFIG din/en\n            sm_RSSI_PKT_DET_CONFIG_din_i <= (others => '0');\n            s"
	  "m_RSSI_PKT_DET_CONFIG_en_i <= '0';\n            -- TRIG_IN_CONF_6 din/en\n            sm_TRIG_IN_CONF_6_din_i <= (o"
	  "thers => '0');\n            sm_TRIG_IN_CONF_6_en_i <= '0';\n            -- TRIG_IN_CONF_5 din/en\n            sm_TR"
	  "IG_IN_CONF_5_din_i <= (others => '0');\n            sm_TRIG_IN_CONF_5_en_i <= '0';\n            -- TRIG_IN_CONF_4 d"
	  "in/en\n            sm_TRIG_IN_CONF_4_din_i <= (others => '0');\n            sm_TRIG_IN_CONF_4_en_i <= '0';\n       "
	  "     -- TRIG_IN_CONF_3 din/en\n            sm_TRIG_IN_CONF_3_din_i <= (others => '0');\n            sm_TRIG_IN_CONF"
	  "_3_en_i <= '0';\n            -- TRIG_IN_CONF_2 din/en\n            sm_TRIG_IN_CONF_2_din_i <= (others => '0');\n   "
	  "         sm_TRIG_IN_CONF_2_en_i <= '0';\n            -- TRIG_IN_CONF_0 din/en\n            sm_TRIG_IN_CONF_0_din_i "
	  "<= (others => '0');\n            sm_TRIG_IN_CONF_0_en_i <= '0';\n            -- TRIG_IN_CONF_8 din/en\n            "
	  "sm_TRIG_IN_CONF_8_din_i <= (others => '0');\n            sm_TRIG_IN_CONF_8_en_i <= '0';\n            -- TRIG_IN_CON"
	  "F_7 din/en\n            sm_TRIG_IN_CONF_7_din_i <= (others => '0');\n            sm_TRIG_IN_CONF_7_en_i <= '0';\n  "
	  "          -- TRIG_OUT_5_CONF_0 din/en\n            sm_TRIG_OUT_5_CONF_0_din_i <= (others => '0');\n            sm_T"
	  "RIG_OUT_5_CONF_0_en_i <= '0';\n            -- TRIG_OUT_5_CONF_1 din/en\n            sm_TRIG_OUT_5_CONF_1_din_i <= ("
	  "others => '0');\n            sm_TRIG_OUT_5_CONF_1_en_i <= '0';\n            -- TRIG_OUT_4_CONF_0 din/en\n          "
	  "  sm_TRIG_OUT_4_CONF_0_din_i <= (others => '0');\n            sm_TRIG_OUT_4_CONF_0_en_i <= '0';\n            -- TRI"
	  "G_OUT_0_CONF_0 din/en\n            sm_TRIG_OUT_0_CONF_0_din_i <= (others => '0');\n            sm_TRIG_OUT_0_CONF_0"
	  "_en_i <= '0';\n            -- TRIG_OUT_4_CONF_1 din/en\n            sm_TRIG_OUT_4_CONF_1_din_i <= (others => '0');\n"
	  "            sm_TRIG_OUT_4_CONF_1_en_i <= '0';\n            -- TRIG_OUT_3_CONF_0 din/en\n            sm_TRIG_OUT_3_C"
	  "ONF_0_din_i <= (others => '0');\n            sm_TRIG_OUT_3_CONF_0_en_i <= '0';\n            -- TRIG_OUT_3_CONF_1 di"
	  "n/en\n            sm_TRIG_OUT_3_CONF_1_din_i <= (others => '0');\n            sm_TRIG_OUT_3_CONF_1_en_i <= '0';\n  "
	  "          -- TRIG_OUT_2_CONF_0 din/en\n            sm_TRIG_OUT_2_CONF_0_din_i <= (others => '0');\n            sm_T"
	  "RIG_OUT_2_CONF_0_en_i <= '0';\n            -- TRIG_OUT_2_CONF_1 din/en\n            sm_TRIG_OUT_2_CONF_1_din_i <= ("
	  "others => '0');\n            sm_TRIG_OUT_2_CONF_1_en_i <= '0';\n            -- TRIG_OUT_1_CONF_0 din/en\n          "
	  "  sm_TRIG_OUT_1_CONF_0_din_i <= (others => '0');\n            sm_TRIG_OUT_1_CONF_0_en_i <= '0';\n            -- TRI"
	  "G_OUT_1_CONF_1 din/en\n            sm_TRIG_OUT_1_CONF_1_din_i <= (others => '0');\n            sm_TRIG_OUT_1_CONF_1"
	  "_en_i <= '0';\n            -- TRIG_OUT_0_CONF_1 din/en\n            sm_TRIG_OUT_0_CONF_1_din_i <= (others => '0');\n"
	  "            sm_TRIG_OUT_0_CONF_1_en_i <= '0';\n            -- RSSI_PKT_DET_DURATIONS din/en\n            sm_RSSI_PK"
	  "T_DET_DURATIONS_din_i <= (others => '0');\n            sm_RSSI_PKT_DET_DURATIONS_en_i <= '0';\n            -- RSSI_"
	  "PKT_DET_THRESHOLDS din/en\n            sm_RSSI_PKT_DET_THRESHOLDS_din_i <= (others => '0');\n            sm_RSSI_PK"
	  "T_DET_THRESHOLDS_en_i <= '0';\n            -- TRIG_IN_CONF_1 din/en\n            sm_TRIG_IN_CONF_1_din_i <= (others"
	  " => '0');\n            sm_TRIG_IN_CONF_1_en_i <= '0';\n            -- 'To FIFO'\n            -- 'Shared Memory'\n  "
	  "          -- PktOps1 we\n            sm_PktOps1_we_i <= '0';\n            -- PktTemplate1 we\n            sm_PktTem"
	  "plate1_we_i <= '0';\n            -- PktOps0 we\n            sm_PktOps0_we_i <= '0';\n            -- PktTemplate0 we"
	  "\n            sm_PktTemplate0_we_i <= '0';\n        else\n            -- default assignments\n            -- PktOps"
	  "1 we\n            sm_PktOps1_we_i <= '0';\n            -- PktTemplate1 we\n            sm_PktTemplate1_we_i <= '0';"
	  "\n            -- PktOps0 we\n            sm_PktOps0_we_i <= '0';\n            -- PktTemplate0 we\n            sm_Pk"
	  "tTemplate0_we_i <= '0';\n\n            -- 'To Register'\n            if (unsigned(write_bank_addr_i) = 2) then\n   "
	  "             if (unsigned(write_linear_addr_i) = 0) then\n                    -- TRIG_ODELAY_CFG_CMPLL din/en\n    "
	  "                sm_TRIG_ODELAY_CFG_CMPLL_din_i <= S_AXI_WDATA;\n                    sm_TRIG_ODELAY_CFG_CMPLL_en_i  "
	  "<= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 1) then\n                    -- TRIG_I"
	  "DELAY_CFG_CMPLL din/en\n                    sm_TRIG_IDELAY_CFG_CMPLL_din_i <= S_AXI_WDATA;\n                    sm_"
	  "TRIG_IDELAY_CFG_CMPLL_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 2) then\n "
	  "                   -- TRIG_ODELAY_CFG_DEBUG_HDR din/en\n                    sm_TRIG_ODELAY_CFG_DEBUG_HDR_din_i <= S"
	  "_AXI_WDATA;\n                    sm_TRIG_ODELAY_CFG_DEBUG_HDR_en_i  <= write_addr_valid;\n                elsif (un"
	  "signed(write_linear_addr_i) = 3) then\n                    -- TRIG_IDELAY_CFG_DEBUG_HDR din/en\n                   "
	  " sm_TRIG_IDELAY_CFG_DEBUG_HDR_din_i <= S_AXI_WDATA;\n                    sm_TRIG_IDELAY_CFG_DEBUG_HDR_en_i  <= writ"
	  "e_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 4) then\n                    -- TRIG_IODELAYS"
	  "_CONTROL din/en\n                    sm_TRIG_IODELAYS_CONTROL_din_i <= S_AXI_WDATA;\n                    sm_TRIG_IO"
	  "DELAYS_CONTROL_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 5) then\n        "
	  "            -- RSSI_PKT_DET_CONFIG din/en\n                    sm_RSSI_PKT_DET_CONFIG_din_i <= S_AXI_WDATA;\n      "
	  "              sm_RSSI_PKT_DET_CONFIG_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_"
	  "i) = 6) then\n                    -- TRIG_IN_CONF_6 din/en\n                    sm_TRIG_IN_CONF_6_din_i <= S_AXI_WD"
	  "ATA;\n                    sm_TRIG_IN_CONF_6_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linea"
	  "r_addr_i) = 7) then\n                    -- TRIG_IN_CONF_5 din/en\n                    sm_TRIG_IN_CONF_5_din_i <= S"
	  "_AXI_WDATA;\n                    sm_TRIG_IN_CONF_5_en_i  <= write_addr_valid;\n                elsif (unsigned(writ"
	  "e_linear_addr_i) = 8) then\n                    -- TRIG_IN_CONF_4 din/en\n                    sm_TRIG_IN_CONF_4_din"
	  "_i <= S_AXI_WDATA;\n                    sm_TRIG_IN_CONF_4_en_i  <= write_addr_valid;\n                elsif (unsign"
	  "ed(write_linear_addr_i) = 9) then\n                    -- TRIG_IN_CONF_3 din/en\n                    sm_TRIG_IN_CON"
	  "F_3_din_i <= S_AXI_WDATA;\n                    sm_TRIG_IN_CONF_3_en_i  <= write_addr_valid;\n                elsif "
	  "(unsigned(write_linear_addr_i) = 10) then\n                    -- TRIG_IN_CONF_2 din/en\n                    sm_TRI"
	  "G_IN_CONF_2_din_i <= S_AXI_WDATA;\n                    sm_TRIG_IN_CONF_2_en_i  <= write_addr_valid;\n              "
	  "  elsif (unsigned(write_linear_addr_i) = 11) then\n                    -- TRIG_IN_CONF_0 din/en\n                  "
	  "  sm_TRIG_IN_CONF_0_din_i <= S_AXI_WDATA;\n                    sm_TRIG_IN_CONF_0_en_i  <= write_addr_valid;\n      "
	  "          elsif (unsigned(write_linear_addr_i) = 12) then\n                    -- TRIG_IN_CONF_8 din/en\n          "
	  "          sm_TRIG_IN_CONF_8_din_i <= S_AXI_WDATA;\n                    sm_TRIG_IN_CONF_8_en_i  <= write_addr_valid;"
	  "\n                elsif (unsigned(write_linear_addr_i) = 13) then\n                    -- TRIG_IN_CONF_7 din/en\n  "
	  "                  sm_TRIG_IN_CONF_7_din_i <= S_AXI_WDATA;\n                    sm_TRIG_IN_CONF_7_en_i  <= write_add"
	  "r_valid;\n                elsif (unsigned(write_linear_addr_i) = 14) then\n                    -- TRIG_OUT_5_CONF_0"
	  " din/en\n                    sm_TRIG_OUT_5_CONF_0_din_i <= S_AXI_WDATA;\n                    sm_TRIG_OUT_5_CONF_0_e"
	  "n_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 15) then\n                    -- "
	  "TRIG_OUT_5_CONF_1 din/en\n                    sm_TRIG_OUT_5_CONF_1_din_i <= S_AXI_WDATA;\n                    sm_TR"
	  "IG_OUT_5_CONF_1_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 16) then\n      "
	  "              -- TRIG_OUT_4_CONF_0 din/en\n                    sm_TRIG_OUT_4_CONF_0_din_i <= S_AXI_WDATA;\n        "
	  "            sm_TRIG_OUT_4_CONF_0_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) ="
	  " 17) then\n                    -- TRIG_OUT_0_CONF_0 din/en\n                    sm_TRIG_OUT_0_CONF_0_din_i <= S_AXI"
	  "_WDATA;\n                    sm_TRIG_OUT_0_CONF_0_en_i  <= write_addr_valid;\n                elsif (unsigned(write"
	  "_linear_addr_i) = 18) then\n                    -- TRIG_OUT_4_CONF_1 din/en\n                    sm_TRIG_OUT_4_CONF"
	  "_1_din_i <= S_AXI_WDATA;\n                    sm_TRIG_OUT_4_CONF_1_en_i  <= write_addr_valid;\n                elsi"
	  "f (unsigned(write_linear_addr_i) = 19) then\n                    -- TRIG_OUT_3_CONF_0 din/en\n                    s"
	  "m_TRIG_OUT_3_CONF_0_din_i <= S_AXI_WDATA;\n                    sm_TRIG_OUT_3_CONF_0_en_i  <= write_addr_valid;\n   "
	  "             elsif (unsigned(write_linear_addr_i) = 20) then\n                    -- TRIG_OUT_3_CONF_1 din/en\n    "
	  "                sm_TRIG_OUT_3_CONF_1_din_i <= S_AXI_WDATA;\n                    sm_TRIG_OUT_3_CONF_1_en_i  <= write"
	  "_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 21) then\n                    -- TRIG_OUT_2_CO"
	  "NF_0 din/en\n                    sm_TRIG_OUT_2_CONF_0_din_i <= S_AXI_WDATA;\n                    sm_TRIG_OUT_2_CONF"
	  "_0_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 22) then\n                   "
	  " -- TRIG_OUT_2_CONF_1 din/en\n                    sm_TRIG_OUT_2_CONF_1_din_i <= S_AXI_WDATA;\n                    s"
	  "m_TRIG_OUT_2_CONF_1_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 23) then\n  "
	  "                  -- TRIG_OUT_1_CONF_0 din/en\n                    sm_TRIG_OUT_1_CONF_0_din_i <= S_AXI_WDATA;\n    "
	  "                sm_TRIG_OUT_1_CONF_0_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_"
	  "i) = 24) then\n                    -- TRIG_OUT_1_CONF_1 din/en\n                    sm_TRIG_OUT_1_CONF_1_din_i <= S"
	  "_AXI_WDATA;\n                    sm_TRIG_OUT_1_CONF_1_en_i  <= write_addr_valid;\n                elsif (unsigned(w"
	  "rite_linear_addr_i) = 25) then\n                    -- TRIG_OUT_0_CONF_1 din/en\n                    sm_TRIG_OUT_0_"
	  "CONF_1_din_i <= S_AXI_WDATA;\n                    sm_TRIG_OUT_0_CONF_1_en_i  <= write_addr_valid;\n                "
	  "elsif (unsigned(write_linear_addr_i) = 26) then\n                    -- RSSI_PKT_DET_DURATIONS din/en\n            "
	  "        sm_RSSI_PKT_DET_DURATIONS_din_i <= S_AXI_WDATA;\n                    sm_RSSI_PKT_DET_DURATIONS_en_i  <= wri"
	  "te_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 27) then\n                    -- RSSI_PKT_DE"
	  "T_THRESHOLDS din/en\n                    sm_RSSI_PKT_DET_THRESHOLDS_din_i <= S_AXI_WDATA;\n                    sm_R"
	  "SSI_PKT_DET_THRESHOLDS_en_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i) = 28) then\n"
	  "                    -- TRIG_IN_CONF_1 din/en\n                    sm_TRIG_IN_CONF_1_din_i <= S_AXI_WDATA;\n        "
	  "            sm_TRIG_IN_CONF_1_en_i  <= write_addr_valid;\n                end if;\n            end if;        \n   "
	  "     \n            -- 'Shared Memory'\n            if unsigned(write_bank_addr_i) = 0 then\n                if (uns"
	  "igned(write_linear_addr_i(C_S_AXI_LINEAR_ADDR_LEN-1 downto 6)) = 0) then\n                    -- PktOps1 we\n      "
	  "              sm_PktOps1_we_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i(C_S_AXI_LI"
	  "NEAR_ADDR_LEN-1 downto 6)) = 1) then\n                    -- PktTemplate1 we\n                    sm_PktTemplate1_w"
	  "e_i  <= write_addr_valid;\n                elsif (unsigned(write_linear_addr_i(C_S_AXI_LINEAR_ADDR_LEN-1 downto 6))"
	  " = 2) then\n                    -- PktOps0 we\n                    sm_PktOps0_we_i  <= write_addr_valid;\n         "
	  "       elsif (unsigned(write_linear_addr_i(C_S_AXI_LINEAR_ADDR_LEN-1 downto 6)) = 3) then\n                    -- P"
	  "ktTemplate0 we\n                    sm_PktTemplate0_we_i  <= write_addr_valid;\n                end if;\n          "
	  "  end if;        \n        end if;\n    end if;\nend process Write_Linear_Addr_Decode;\n \n------------------------"
	  "-----------------------------------------------------\n-- READ Control\n-------------------------------------------"
	  "----------------------------------\n\nS_AXI_RDATA  <= S_AXI_RDATA_i;\nS_AXI_RVALID  <= S_AXI_RVALID_i;\nS_AXI_RLAST"
	  "   <= S_AXI_RLAST_i;\nS_AXI_RID     <= S_AXI_RID_i;\n-- TODO: no error checking\nS_AXI_RRESP <= (others=>'0');\n\nP"
	  "ROC_ARREADY_ACK: process(read_state, S_AXI_ARVALID, write_state, S_AXI_AWVALID) is begin\n    -- Note: WRITE has hi"
	  "gher priority than READ\n    if (read_state = IDLE and S_AXI_ARVALID = '1' and write_state = IDLE and S_AXI_AWVALID"
	  " /= '1') then\n        S_AXI_ARREADY <= S_AXI_ARVALID;\n    else\n        S_AXI_ARREADY <= '0';\n    end if;\nend p"
	  "rocess PROC_ARREADY_ACK;\n\nS_AXI_WREADY_i <= write_ready;\n\nProcess_Sideband: process(write_state, read_state) is"
	  " begin\n    if (read_state = READ_PREP) then\n        s_shram_en <= '1';\n    elsif (read_state = READ_DATA) then\n"
	  "        s_shram_en <= S_AXI_RREADY;\n    elsif (write_state = WRITE_DATA) then\n        s_shram_en <= S_AXI_WVALID;"
	  "\n    else\n        s_shram_en <= '0';\n    end if;\nend process Process_Sideband;\n\nCmd_Decode_Read: process(AXI_"
	  "AClk) is begin\n    if (AXI_AClk'event and AXI_AClk = '1') then\n        if (AXI_AResetN = '0') then\n            S"
	  "_AXI_RVALID_i <= '0';\n            read_bank_addr_i    <= (others => '0');\n            read_linear_addr_i  <= (oth"
	  "ers => '0');\n            S_AXI_ARLEN_i       <= (others => '0');\n            S_AXI_RLAST_i       <= '0';\n       "
	  "     S_AXI_RID_i         <= (others => '0');\n            read_state          <= IDLE;\n            read_prep_count"
	  "er   <= (others => '0');\n            read_addr_counter   <= (others => '0');\n            read_data_counter   <= ("
	  "others => '0');\n        else\n            -- default assignments\n            s_fifo_re <= '0';\n\n            if "
	  "(read_state = IDLE) then\n                -- Note WRITE has higher priority than READ\n                if (S_AXI_AR"
	  "VALID = '1' and write_state = IDLE and S_AXI_AWVALID /= '1') then\n                    -- extract bank and linear a"
	  "ddresses\n                    read_bank_addr_i    <= S_AXI_ARADDR(C_S_AXI_TOTAL_ADDR_LEN-1 downto C_S_AXI_LINEAR_AD"
	  "DR_LEN+2);\n                    read_linear_addr_i  <= S_AXI_ARADDR(C_S_AXI_LINEAR_ADDR_LEN+1 downto 2);\n         "
	  "           s_fifo_re <= '1';\n\n                    -- reflect arid\n                    S_AXI_RID_i <= S_AXI_ARID;"
	  "\n\n                    -- load read liner address and data counter\n                    read_addr_counter <= S_AXI"
	  "_ARLEN;\n                    read_data_counter <= S_AXI_ARLEN;\n\n                    -- load read preparation coun"
	  "ter\n                    read_prep_counter <= C_READ_PREP_DELAY;\n                    -- read state transition\n   "
	  "                 read_state <= READ_PREP;\n                end if;\n            elsif (read_state = READ_PREP) then"
	  "\n                if (unsigned(read_prep_counter) = 0) then\n                    if (unsigned(read_data_counter) = "
	  "0) then\n                        -- tag the last data generated by the slave\n                        S_AXI_RLAST_i"
	  " <= '1';\n                    end if;\n                    -- valid data appears\n                    S_AXI_RVALID_"
	  "i <= '1';\n                    -- read state transition\n                    read_state <= READ_DATA;\n            "
	  "    else\n                    -- decrease read preparation counter\n                    read_prep_counter <= Std_Lo"
	  "gic_Vector(unsigned(read_prep_counter) - 1);\n                end if;\n\n                if (unsigned(read_prep_cou"
	  "nter) /= 3 and unsigned(read_addr_counter) /= 0) then\n                    -- decrease address counter\n           "
	  "         read_addr_counter <= Std_Logic_Vector(unsigned(read_addr_counter) - 1);\n                    -- increase l"
	  "inear address (no band crossing)\n                    read_linear_addr_i <= Std_Logic_Vector(unsigned(read_linear_a"
	  "ddr_i) + 1);\n                end if;\n            elsif (read_state = READ_DATA) then\n                if (S_AXI_R"
	  "READY = '1') then\n                    if (unsigned(read_data_counter) = 1) then\n                        -- tag th"
	  "e last data generated by the slave\n                        S_AXI_RLAST_i <= '1';\n                    end if;\n\n "
	  "                   if (unsigned(read_data_counter) = 0) then\n                        -- arid\n                    "
	  "    S_AXI_RID_i <= (others => '0');\n                        -- rlast\n                        S_AXI_RLAST_i <= '0'"
	  ";\n                        -- no more valid data\n                        S_AXI_RVALID_i <= '0';\n                 "
	  "       -- read state transition\n                        read_state <= IDLE;\n                    else\n           "
	  "             -- decrease read preparation counter\n                        read_data_counter <= Std_Logic_Vector(un"
	  "signed(read_data_counter) - 1);\n\n                        if (unsigned(read_addr_counter) /= 0) then\n            "
	  "                -- decrease address counter\n                            read_addr_counter <= Std_Logic_Vector(unsi"
	  "gned(read_addr_counter) - 1);\n                            -- increase linear address (no band crossing)\n         "
	  "                   read_linear_addr_i <= Std_Logic_Vector(unsigned(read_linear_addr_i) + 1);\n                     "
	  "   end if;\n                    end if;\n                end if;\n            end if;\n\n        end if;\n    end i"
	  "f;\nend process Cmd_Decode_Read;\n\nRead_Linear_Addr_Decode : process(AXI_AClk) is begin\n    if (AXI_AClk'event an"
	  "d AXI_AClk = '1') then\n        if (AXI_AResetN = '0') then\n            reg_bank_out_i   <= (others => '0');\n    "
	  "        fifo_bank_out_i  <= (others => '0');\n            shmem_bank_out_i <= (others => '0');\n            S_AXI_R"
	  "DATA_i    <= (others => '0');\n        else\n            if (unsigned(read_bank_addr_i) = 2) then\n                "
	  "-- 'From Register'\n                if (unsigned(read_linear_addr_i) = 29) then\n                    -- 'CORE_INFO'"
	  " dout\n                    reg_bank_out_i <= sm_CORE_INFO_dout_i;\n                elsif (unsigned(read_linear_addr"
	  "_i) = 30) then\n                    -- 'TRIG_OUT' dout\n                    reg_bank_out_i <= sm_TRIG_OUT_dout_i;\n"
	  "                end if;\n                -- 'To Register' (with register readback)\n                if (unsigned(re"
	  "ad_linear_addr_i) = 0) then\n                    -- 'TRIG_ODELAY_CFG_CMPLL' dout\n                    reg_bank_out_"
	  "i <= sm_TRIG_ODELAY_CFG_CMPLL_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 1) then\n             "
	  "       -- 'TRIG_IDELAY_CFG_CMPLL' dout\n                    reg_bank_out_i <= sm_TRIG_IDELAY_CFG_CMPLL_dout_i;\n   "
	  "             elsif (unsigned(read_linear_addr_i) = 2) then\n                    -- 'TRIG_ODELAY_CFG_DEBUG_HDR' dout"
	  "\n                    reg_bank_out_i <= sm_TRIG_ODELAY_CFG_DEBUG_HDR_dout_i;\n                elsif (unsigned(read_"
	  "linear_addr_i) = 3) then\n                    -- 'TRIG_IDELAY_CFG_DEBUG_HDR' dout\n                    reg_bank_out"
	  "_i <= sm_TRIG_IDELAY_CFG_DEBUG_HDR_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 4) then\n        "
	  "            -- 'TRIG_IODELAYS_CONTROL' dout\n                    reg_bank_out_i <= sm_TRIG_IODELAYS_CONTROL_dout_i;"
	  "\n                elsif (unsigned(read_linear_addr_i) = 5) then\n                    -- 'RSSI_PKT_DET_CONFIG' dout\n"
	  "                    reg_bank_out_i <= sm_RSSI_PKT_DET_CONFIG_dout_i;\n                elsif (unsigned(read_linear_a"
	  "ddr_i) = 6) then\n                    -- 'TRIG_IN_CONF_6' dout\n                    reg_bank_out_i <= sm_TRIG_IN_CO"
	  "NF_6_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 7) then\n                    -- 'TRIG_IN_CONF_5"
	  "' dout\n                    reg_bank_out_i <= sm_TRIG_IN_CONF_5_dout_i;\n                elsif (unsigned(read_linea"
	  "r_addr_i) = 8) then\n                    -- 'TRIG_IN_CONF_4' dout\n                    reg_bank_out_i <= sm_TRIG_IN"
	  "_CONF_4_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 9) then\n                    -- 'TRIG_IN_CON"
	  "F_3' dout\n                    reg_bank_out_i <= sm_TRIG_IN_CONF_3_dout_i;\n                elsif (unsigned(read_li"
	  "near_addr_i) = 10) then\n                    -- 'TRIG_IN_CONF_2' dout\n                    reg_bank_out_i <= sm_TRI"
	  "G_IN_CONF_2_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 11) then\n                    -- 'TRIG_I"
	  "N_CONF_0' dout\n                    reg_bank_out_i <= sm_TRIG_IN_CONF_0_dout_i;\n                elsif (unsigned(re"
	  "ad_linear_addr_i) = 12) then\n                    -- 'TRIG_IN_CONF_8' dout\n                    reg_bank_out_i <= s"
	  "m_TRIG_IN_CONF_8_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 13) then\n                    -- 'T"
	  "RIG_IN_CONF_7' dout\n                    reg_bank_out_i <= sm_TRIG_IN_CONF_7_dout_i;\n                elsif (unsign"
	  "ed(read_linear_addr_i) = 14) then\n                    -- 'TRIG_OUT_5_CONF_0' dout\n                    reg_bank_ou"
	  "t_i <= sm_TRIG_OUT_5_CONF_0_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 15) then\n              "
	  "      -- 'TRIG_OUT_5_CONF_1' dout\n                    reg_bank_out_i <= sm_TRIG_OUT_5_CONF_1_dout_i;\n            "
	  "    elsif (unsigned(read_linear_addr_i) = 16) then\n                    -- 'TRIG_OUT_4_CONF_0' dout\n              "
	  "      reg_bank_out_i <= sm_TRIG_OUT_4_CONF_0_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 17) the"
	  "n\n                    -- 'TRIG_OUT_0_CONF_0' dout\n                    reg_bank_out_i <= sm_TRIG_OUT_0_CONF_0_dout"
	  "_i;\n                elsif (unsigned(read_linear_addr_i) = 18) then\n                    -- 'TRIG_OUT_4_CONF_1' dou"
	  "t\n                    reg_bank_out_i <= sm_TRIG_OUT_4_CONF_1_dout_i;\n                elsif (unsigned(read_linear_"
	  "addr_i) = 19) then\n                    -- 'TRIG_OUT_3_CONF_0' dout\n                    reg_bank_out_i <= sm_TRIG_"
	  "OUT_3_CONF_0_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 20) then\n                    -- 'TRIG_"
	  "OUT_3_CONF_1' dout\n                    reg_bank_out_i <= sm_TRIG_OUT_3_CONF_1_dout_i;\n                elsif (unsi"
	  "gned(read_linear_addr_i) = 21) then\n                    -- 'TRIG_OUT_2_CONF_0' dout\n                    reg_bank_"
	  "out_i <= sm_TRIG_OUT_2_CONF_0_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 22) then\n            "
	  "        -- 'TRIG_OUT_2_CONF_1' dout\n                    reg_bank_out_i <= sm_TRIG_OUT_2_CONF_1_dout_i;\n          "
	  "      elsif (unsigned(read_linear_addr_i) = 23) then\n                    -- 'TRIG_OUT_1_CONF_0' dout\n            "
	  "        reg_bank_out_i <= sm_TRIG_OUT_1_CONF_0_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 24) t"
	  "hen\n                    -- 'TRIG_OUT_1_CONF_1' dout\n                    reg_bank_out_i <= sm_TRIG_OUT_1_CONF_1_do"
	  "ut_i;\n                elsif (unsigned(read_linear_addr_i) = 25) then\n                    -- 'TRIG_OUT_0_CONF_1' d"
	  "out\n                    reg_bank_out_i <= sm_TRIG_OUT_0_CONF_1_dout_i;\n                elsif (unsigned(read_linea"
	  "r_addr_i) = 26) then\n                    -- 'RSSI_PKT_DET_DURATIONS' dout\n                    reg_bank_out_i <= s"
	  "m_RSSI_PKT_DET_DURATIONS_dout_i;\n                elsif (unsigned(read_linear_addr_i) = 27) then\n                 "
	  "   -- 'RSSI_PKT_DET_THRESHOLDS' dout\n                    reg_bank_out_i <= sm_RSSI_PKT_DET_THRESHOLDS_dout_i;\n   "
	  "             elsif (unsigned(read_linear_addr_i) = 28) then\n                    -- 'TRIG_IN_CONF_1' dout\n        "
	  "            reg_bank_out_i <= sm_TRIG_IN_CONF_1_dout_i;\n                end if;\n\n                S_AXI_RDATA_i <"
	  "= reg_bank_out_i;\n            elsif (unsigned(read_bank_addr_i) = 1) then\n                -- 'From FIFO'\n       "
	  "         -- 'To FIFO'\n\n                S_AXI_RDATA_i <= fifo_bank_out_i;\n            elsif (unsigned(read_bank_a"
	  "ddr_i) = 0 and s_shram_en = '1') then\n                -- 'Shared Memory'\n                if (unsigned(read_linear"
	  "_addr_i(C_S_AXI_LINEAR_ADDR_LEN-1 downto 6)) = 0) then\n                    -- 'PktOps1' dout\n                    "
	  "shmem_bank_out_i <= sm_PktOps1_dout_i;\n                elsif (unsigned(read_linear_addr_i(C_S_AXI_LINEAR_ADDR_LEN-"
	  "1 downto 6)) = 1) then\n                    -- 'PktTemplate1' dout\n                    shmem_bank_out_i <= sm_PktT"
	  "emplate1_dout_i;\n                elsif (unsigned(read_linear_addr_i(C_S_AXI_LINEAR_ADDR_LEN-1 downto 6)) = 2) then"
	  "\n                    -- 'PktOps0' dout\n                    shmem_bank_out_i <= sm_PktOps0_dout_i;\n              "
	  "  elsif (unsigned(read_linear_addr_i(C_S_AXI_LINEAR_ADDR_LEN-1 downto 6)) = 3) then\n                    -- 'PktTem"
	  "plate0' dout\n                    shmem_bank_out_i <= sm_PktTemplate0_dout_i;\n                end if;\n\n         "
	  "       S_AXI_RDATA_i <= shmem_bank_out_i;\n            end if;\n        end if;\n    end if;\nend process Read_Line"
	  "ar_Addr_Decode;\n\nend architecture IMP;\n"
	  config		  "{'inports'=>[{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'AXI_ARESETN','wid"
	  "th'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARADDR','width'=>32},{'arit"
	  "h_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARBURST','width'=>2},{'arith_type'=>2.000"
	  "00000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARCACHE','width'=>4},{'arith_type'=>2.00000000000000000"
	  ",'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000"
	  "0000000000000,'name'=>'S_AXI_ARLEN','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'n"
	  "ame'=>'S_AXI_ARLOCK','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AR"
	  "PROT','width'=>3},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARSIZE','width'=>"
	  "3},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARVALID','width'=>0},{'arith_typ"
	  "e'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWADDR','width'=>32},{'arith_type'=>2.00000000"
	  "000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWBURST','width'=>2},{'arith_type'=>2.00000000000000000,'bin"
	  "_pt'=>0.00000000000000000,'name'=>'S_AXI_AWCACHE','width'=>4},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.000000"
	  "00000000000,'name'=>'S_AXI_AWID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name"
	  "'=>'S_AXI_AWLEN','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWLOCK"
	  "','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWPROT','width'=>3},{"
	  "'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWSIZE','width'=>3},{'arith_type'=>2"
	  ".00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWVALID','width'=>0},{'arith_type'=>2.0000000000000"
	  "0000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>"
	  "0.00000000000000000,'name'=>'S_AXI_RREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000000000000"
	  "0000,'name'=>'S_AXI_WDATA','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S"
	  "_AXI_WLAST','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_WSTRB','wid"
	  "th'=>4},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_WVALID','width'=>0},{'arith"
	  "_type'=>2,'bin_pt'=>0,'name'=>'sm_CORE_INFO_dout','width'=>24},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_do"
	  "ut','width'=>6},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_ODELAY_CFG_CMPLL_dout','width'=>32},{'arith_type'=>2,"
	  "'bin_pt'=>0,'name'=>'sm_TRIG_IDELAY_CFG_CMPLL_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_ODEL"
	  "AY_CFG_DEBUG_HDR_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IDELAY_CFG_DEBUG_HDR_dout','width"
	  "'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IODELAYS_CONTROL_dout','width'=>32},{'arith_type'=>2,'bin_pt'="
	  ">0,'name'=>'sm_RSSI_PKT_DET_CONFIG_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_6_dout'"
	  ",'width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_5_dout','width'=>32},{'arith_type'=>2,'bin_pt'="
	  ">0,'name'=>'sm_TRIG_IN_CONF_4_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_3_dout','wid"
	  "th'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_2_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'n"
	  "ame'=>'sm_TRIG_IN_CONF_0_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_8_dout','width'=>"
	  "32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_7_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'="
	  ">'sm_TRIG_OUT_5_CONF_0_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_5_CONF_1_dout','width'="
	  ">32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_4_CONF_0_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'na"
	  "me'=>'sm_TRIG_OUT_0_CONF_0_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_4_CONF_1_dout','wid"
	  "th'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_3_CONF_0_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0"
	  ",'name'=>'sm_TRIG_OUT_3_CONF_1_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_2_CONF_0_dout',"
	  "'width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_2_CONF_1_dout','width'=>32},{'arith_type'=>2,'bin_pt"
	  "'=>0,'name'=>'sm_TRIG_OUT_1_CONF_0_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_1_CONF_1_do"
	  "ut','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_0_CONF_1_dout','width'=>32},{'arith_type'=>2,'bi"
	  "n_pt'=>0,'name'=>'sm_RSSI_PKT_DET_DURATIONS_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_RSSI_PKT_DE"
	  "T_THRESHOLDS_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_1_dout','width'=>32},{'arith_"
	  "type'=>2,'bin_pt'=>0,'name'=>'sm_PktOps1_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_PktTemplate1_d"
	  "out','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_PktOps0_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,"
	  "'name'=>'sm_PktTemplate0_dout','width'=>32}],'outports'=>[{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000000000"
	  "0000000,'name'=>'S_AXI_ARREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'"
	  "=>'S_AXI_AWREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BID',"
	  "'width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BRESP','width'=>2},{'ar"
	  "ith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BVALID','width'=>0},{'arith_type'=>2.00"
	  "000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_RDATA','width'=>32},{'arith_type'=>2.00000000000000000"
	  ",'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_RID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000"
	  "000000000000,'name'=>'S_AXI_RLAST','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'na"
	  "me'=>'S_AXI_RRESP','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_RVAL"
	  "ID','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_WREADY','width'=>0}"
	  ",{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_ODELAY_CFG_CMPLL_din','width'=>32},{'arith_type'=>2.0000000000000000"
	  "0,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_ODELAY_CFG_CMPLL_en','width'=>0.00000000000000000},{'arith_type'=>"
	  "2,'bin_pt'=>0,'name'=>'sm_TRIG_IDELAY_CFG_CMPLL_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00"
	  "000000000000000,'name'=>'sm_TRIG_IDELAY_CFG_CMPLL_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'n"
	  "ame'=>'sm_TRIG_ODELAY_CFG_DEBUG_HDR_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000"
	  "000,'name'=>'sm_TRIG_ODELAY_CFG_DEBUG_HDR_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'s"
	  "m_TRIG_IDELAY_CFG_DEBUG_HDR_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'nam"
	  "e'=>'sm_TRIG_IDELAY_CFG_DEBUG_HDR_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_I"
	  "ODELAYS_CONTROL_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG"
	  "_IODELAYS_CONTROL_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_RSSI_PKT_DET_CONFIG_di"
	  "n','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_RSSI_PKT_DET_CONFIG_en"
	  "','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_6_din','width'=>32},{'arith_t"
	  "ype'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_IN_CONF_6_en','width'=>0.00000000000000000"
	  "},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_5_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin"
	  "_pt'=>0.00000000000000000,'name'=>'sm_TRIG_IN_CONF_5_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0"
	  ",'name'=>'sm_TRIG_IN_CONF_4_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'nam"
	  "e'=>'sm_TRIG_IN_CONF_4_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_3_di"
	  "n','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_IN_CONF_3_en','wi"
	  "dth'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_2_din','width'=>32},{'arith_type'="
	  ">2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_IN_CONF_2_en','width'=>0.00000000000000000},{'a"
	  "rith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_0_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'="
	  ">0.00000000000000000,'name'=>'sm_TRIG_IN_CONF_0_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'nam"
	  "e'=>'sm_TRIG_IN_CONF_8_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'"
	  "sm_TRIG_IN_CONF_8_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_7_din','w"
	  "idth'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_IN_CONF_7_en','width'="
	  ">0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_5_CONF_0_din','width'=>32},{'arith_type'=>2"
	  ".00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_OUT_5_CONF_0_en','width'=>0.00000000000000000},{'"
	  "arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_5_CONF_1_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_"
	  "pt'=>0.00000000000000000,'name'=>'sm_TRIG_OUT_5_CONF_1_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'="
	  ">0,'name'=>'sm_TRIG_OUT_4_CONF_0_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000"
	  ",'name'=>'sm_TRIG_OUT_4_CONF_0_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_"
	  "0_CONF_0_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_OUT_0_"
	  "CONF_0_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_4_CONF_1_din','width'=>3"
	  "2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_OUT_4_CONF_1_en','width'=>0.00"
	  "000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_3_CONF_0_din','width'=>32},{'arith_type'=>2.0000"
	  "0000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_OUT_3_CONF_0_en','width'=>0.00000000000000000},{'arith"
	  "_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_3_CONF_1_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>"
	  "0.00000000000000000,'name'=>'sm_TRIG_OUT_3_CONF_1_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'n"
	  "ame'=>'sm_TRIG_OUT_2_CONF_0_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'nam"
	  "e'=>'sm_TRIG_OUT_2_CONF_0_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_2_CON"
	  "F_1_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_OUT_2_CONF_"
	  "1_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_1_CONF_0_din','width'=>32},{'"
	  "arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_OUT_1_CONF_0_en','width'=>0.0000000"
	  "0000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_1_CONF_1_din','width'=>32},{'arith_type'=>2.000000000"
	  "00000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_OUT_1_CONF_1_en','width'=>0.00000000000000000},{'arith_type"
	  "'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_OUT_0_CONF_1_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.000"
	  "00000000000000,'name'=>'sm_TRIG_OUT_0_CONF_1_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'="
	  ">'sm_RSSI_PKT_DET_DURATIONS_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'nam"
	  "e'=>'sm_RSSI_PKT_DET_DURATIONS_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_RSSI_PKT_"
	  "DET_THRESHOLDS_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_RSSI_"
	  "PKT_DET_THRESHOLDS_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TRIG_IN_CONF_1_din','"
	  "width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TRIG_IN_CONF_1_en','width'"
	  "=>0.00000000000000000},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_PktOps1_addr','"
	  "width'=>6.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_PktOps1_din','width'=>32},{'arith_type'=>2.00"
	  "000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_PktOps1_we','width'=>0.00000000000000000},{'arith_type'=>"
	  "2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_PktTemplate1_addr','width'=>6.00000000000000000},{'ar"
	  "ith_type'=>2,'bin_pt'=>0,'name'=>'sm_PktTemplate1_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0."
	  "00000000000000000,'name'=>'sm_PktTemplate1_we','width'=>0.00000000000000000},{'arith_type'=>2.00000000000000000,'bi"
	  "n_pt'=>0.00000000000000000,'name'=>'sm_PktOps0_addr','width'=>6.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'na"
	  "me'=>'sm_PktOps0_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_Pkt"
	  "Ops0_we','width'=>0.00000000000000000},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm"
	  "_PktTemplate0_addr','width'=>6.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_PktTemplate0_din','width"
	  "'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_PktTemplate0_we','width'=>0.000"
	  "00000000000000},{'arith_type'=>1.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'shram_en','width'=>0.0000"
	  "0000000000000}]}"
	  inheritDeviceType	  "inheritDeviceType"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "edkcore"
	  sg_icon_stat		  "250,2588,60,82,white,blue,0,ad385236,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 250 250 0 0 ],[0 0 2588 2588 0 ],[0.77 0.8"
	  "2 0.91 ]);\nplot([0 250 250 0 0 ],[0 0 2588 2588 0 ]);\npatch([47.125 97.7 132.7 167.7 202.7 132.7 82.125 47.125 ],"
	  "[1332.85 1332.85 1367.85 1332.85 1367.85 1367.85 1367.85 1332.85 ],[1 1 1 ]);\npatch([82.125 132.7 97.7 47.125 82.1"
	  "25 ],[1297.85 1297.85 1332.85 1332.85 1297.85 ],[0.931 0.946 0.973 ]);\npatch([47.125 97.7 132.7 82.125 47.125 ],[1"
	  "262.85 1262.85 1297.85 1297.85 1262.85 ],[1 1 1 ]);\npatch([82.125 202.7 167.7 132.7 97.7 47.125 82.125 ],[1227.85 "
	  "1227.85 1262.85 1227.85 1262.85 1262.85 1227.85 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');"
	  "\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'AXI_ARESETN');\ncolor('black');port"
	  "_label('input',2,'S_AXI_ARADDR');\ncolor('black');port_label('input',3,'S_AXI_ARBURST');\ncolor('black');port_label"
	  "('input',4,'S_AXI_ARCACHE');\ncolor('black');port_label('input',5,'S_AXI_ARID');\ncolor('black');port_label('input'"
	  ",6,'S_AXI_ARLEN');\ncolor('black');port_label('input',7,'S_AXI_ARLOCK');\ncolor('black');port_label('input',8,'S_AX"
	  "I_ARPROT');\ncolor('black');port_label('input',9,'S_AXI_ARSIZE');\ncolor('black');port_label('input',10,'S_AXI_ARVA"
	  "LID');\ncolor('black');port_label('input',11,'S_AXI_AWADDR');\ncolor('black');port_label('input',12,'S_AXI_AWBURST'"
	  ");\ncolor('black');port_label('input',13,'S_AXI_AWCACHE');\ncolor('black');port_label('input',14,'S_AXI_AWID');\nco"
	  "lor('black');port_label('input',15,'S_AXI_AWLEN');\ncolor('black');port_label('input',16,'S_AXI_AWLOCK');\ncolor('b"
	  "lack');port_label('input',17,'S_AXI_AWPROT');\ncolor('black');port_label('input',18,'S_AXI_AWSIZE');\ncolor('black'"
	  ");port_label('input',19,'S_AXI_AWVALID');\ncolor('black');port_label('input',20,'S_AXI_BREADY');\ncolor('black');po"
	  "rt_label('input',21,'S_AXI_RREADY');\ncolor('black');port_label('input',22,'S_AXI_WDATA');\ncolor('black');port_lab"
	  "el('input',23,'S_AXI_WLAST');\ncolor('black');port_label('input',24,'S_AXI_WSTRB');\ncolor('black');port_label('inp"
	  "ut',25,'S_AXI_WVALID');\ncolor('black');port_label('input',26,'sm_CORE_INFO_dout');\ncolor('black');port_label('inp"
	  "ut',27,'sm_TRIG_OUT_dout');\ncolor('black');port_label('input',28,'sm_TRIG_ODELAY_CFG_CMPLL_dout');\ncolor('black')"
	  ";port_label('input',29,'sm_TRIG_IDELAY_CFG_CMPLL_dout');\ncolor('black');port_label('input',30,'sm_TRIG_ODELAY_CFG_"
	  "DEBUG_HDR_dout');\ncolor('black');port_label('input',31,'sm_TRIG_IDELAY_CFG_DEBUG_HDR_dout');\ncolor('black');port_"
	  "label('input',32,'sm_TRIG_IODELAYS_CONTROL_dout');\ncolor('black');port_label('input',33,'sm_RSSI_PKT_DET_CONFIG_do"
	  "ut');\ncolor('black');port_label('input',34,'sm_TRIG_IN_CONF_6_dout');\ncolor('black');port_label('input',35,'sm_TR"
	  "IG_IN_CONF_5_dout');\ncolor('black');port_label('input',36,'sm_TRIG_IN_CONF_4_dout');\ncolor('black');port_label('i"
	  "nput',37,'sm_TRIG_IN_CONF_3_dout');\ncolor('black');port_label('input',38,'sm_TRIG_IN_CONF_2_dout');\ncolor('black'"
	  ");port_label('input',39,'sm_TRIG_IN_CONF_0_dout');\ncolor('black');port_label('input',40,'sm_TRIG_IN_CONF_8_dout');"
	  "\ncolor('black');port_label('input',41,'sm_TRIG_IN_CONF_7_dout');\ncolor('black');port_label('input',42,'sm_TRIG_OU"
	  "T_5_CONF_0_dout');\ncolor('black');port_label('input',43,'sm_TRIG_OUT_5_CONF_1_dout');\ncolor('black');port_label('"
	  "input',44,'sm_TRIG_OUT_4_CONF_0_dout');\ncolor('black');port_label('input',45,'sm_TRIG_OUT_0_CONF_0_dout');\ncolor("
	  "'black');port_label('input',46,'sm_TRIG_OUT_4_CONF_1_dout');\ncolor('black');port_label('input',47,'sm_TRIG_OUT_3_C"
	  "ONF_0_dout');\ncolor('black');port_label('input',48,'sm_TRIG_OUT_3_CONF_1_dout');\ncolor('black');port_label('input"
	  "',49,'sm_TRIG_OUT_2_CONF_0_dout');\ncolor('black');port_label('input',50,'sm_TRIG_OUT_2_CONF_1_dout');\ncolor('blac"
	  "k');port_label('input',51,'sm_TRIG_OUT_1_CONF_0_dout');\ncolor('black');port_label('input',52,'sm_TRIG_OUT_1_CONF_1"
	  "_dout');\ncolor('black');port_label('input',53,'sm_TRIG_OUT_0_CONF_1_dout');\ncolor('black');port_label('input',54,"
	  "'sm_RSSI_PKT_DET_DURATIONS_dout');\ncolor('black');port_label('input',55,'sm_RSSI_PKT_DET_THRESHOLDS_dout');\ncolor"
	  "('black');port_label('input',56,'sm_TRIG_IN_CONF_1_dout');\ncolor('black');port_label('input',57,'sm_PktOps1_dout')"
	  ";\ncolor('black');port_label('input',58,'sm_PktTemplate1_dout');\ncolor('black');port_label('input',59,'sm_PktOps0_"
	  "dout');\ncolor('black');port_label('input',60,'sm_PktTemplate0_dout');\ncolor('black');port_label('output',1,'S_AXI"
	  "_ARREADY');\ncolor('black');port_label('output',2,'S_AXI_AWREADY');\ncolor('black');port_label('output',3,'S_AXI_BI"
	  "D');\ncolor('black');port_label('output',4,'S_AXI_BRESP');\ncolor('black');port_label('output',5,'S_AXI_BVALID');\n"
	  "color('black');port_label('output',6,'S_AXI_RDATA');\ncolor('black');port_label('output',7,'S_AXI_RID');\ncolor('bl"
	  "ack');port_label('output',8,'S_AXI_RLAST');\ncolor('black');port_label('output',9,'S_AXI_RRESP');\ncolor('black');p"
	  "ort_label('output',10,'S_AXI_RVALID');\ncolor('black');port_label('output',11,'S_AXI_WREADY');\ncolor('black');port"
	  "_label('output',12,'sm_TRIG_ODELAY_CFG_CMPLL_din');\ncolor('black');port_label('output',13,'sm_TRIG_ODELAY_CFG_CMPL"
	  "L_en');\ncolor('black');port_label('output',14,'sm_TRIG_IDELAY_CFG_CMPLL_din');\ncolor('black');port_label('output'"
	  ",15,'sm_TRIG_IDELAY_CFG_CMPLL_en');\ncolor('black');port_label('output',16,'sm_TRIG_ODELAY_CFG_DEBUG_HDR_din');\nco"
	  "lor('black');port_label('output',17,'sm_TRIG_ODELAY_CFG_DEBUG_HDR_en');\ncolor('black');port_label('output',18,'sm_"
	  "TRIG_IDELAY_CFG_DEBUG_HDR_din');\ncolor('black');port_label('output',19,'sm_TRIG_IDELAY_CFG_DEBUG_HDR_en');\ncolor("
	  "'black');port_label('output',20,'sm_TRIG_IODELAYS_CONTROL_din');\ncolor('black');port_label('output',21,'sm_TRIG_IO"
	  "DELAYS_CONTROL_en');\ncolor('black');port_label('output',22,'sm_RSSI_PKT_DET_CONFIG_din');\ncolor('black');port_lab"
	  "el('output',23,'sm_RSSI_PKT_DET_CONFIG_en');\ncolor('black');port_label('output',24,'sm_TRIG_IN_CONF_6_din');\ncolo"
	  "r('black');port_label('output',25,'sm_TRIG_IN_CONF_6_en');\ncolor('black');port_label('output',26,'sm_TRIG_IN_CONF_"
	  "5_din');\ncolor('black');port_label('output',27,'sm_TRIG_IN_CONF_5_en');\ncolor('black');port_label('output',28,'sm"
	  "_TRIG_IN_CONF_4_din');\ncolor('black');port_label('output',29,'sm_TRIG_IN_CONF_4_en');\ncolor('black');port_label('"
	  "output',30,'sm_TRIG_IN_CONF_3_din');\ncolor('black');port_label('output',31,'sm_TRIG_IN_CONF_3_en');\ncolor('black'"
	  ");port_label('output',32,'sm_TRIG_IN_CONF_2_din');\ncolor('black');port_label('output',33,'sm_TRIG_IN_CONF_2_en');\n"
	  "color('black');port_label('output',34,'sm_TRIG_IN_CONF_0_din');\ncolor('black');port_label('output',35,'sm_TRIG_IN_"
	  "CONF_0_en');\ncolor('black');port_label('output',36,'sm_TRIG_IN_CONF_8_din');\ncolor('black');port_label('output',3"
	  "7,'sm_TRIG_IN_CONF_8_en');\ncolor('black');port_label('output',38,'sm_TRIG_IN_CONF_7_din');\ncolor('black');port_la"
	  "bel('output',39,'sm_TRIG_IN_CONF_7_en');\ncolor('black');port_label('output',40,'sm_TRIG_OUT_5_CONF_0_din');\ncolor"
	  "('black');port_label('output',41,'sm_TRIG_OUT_5_CONF_0_en');\ncolor('black');port_label('output',42,'sm_TRIG_OUT_5_"
	  "CONF_1_din');\ncolor('black');port_label('output',43,'sm_TRIG_OUT_5_CONF_1_en');\ncolor('black');port_label('output"
	  "',44,'sm_TRIG_OUT_4_CONF_0_din');\ncolor('black');port_label('output',45,'sm_TRIG_OUT_4_CONF_0_en');\ncolor('black'"
	  ");port_label('output',46,'sm_TRIG_OUT_0_CONF_0_din');\ncolor('black');port_label('output',47,'sm_TRIG_OUT_0_CONF_0_"
	  "en');\ncolor('black');port_label('output',48,'sm_TRIG_OUT_4_CONF_1_din');\ncolor('black');port_label('output',49,'s"
	  "m_TRIG_OUT_4_CONF_1_en');\ncolor('black');port_label('output',50,'sm_TRIG_OUT_3_CONF_0_din');\ncolor('black');port_"
	  "label('output',51,'sm_TRIG_OUT_3_CONF_0_en');\ncolor('black');port_label('output',52,'sm_TRIG_OUT_3_CONF_1_din');\n"
	  "color('black');port_label('output',53,'sm_TRIG_OUT_3_CONF_1_en');\ncolor('black');port_label('output',54,'sm_TRIG_O"
	  "UT_2_CONF_0_din');\ncolor('black');port_label('output',55,'sm_TRIG_OUT_2_CONF_0_en');\ncolor('black');port_label('o"
	  "utput',56,'sm_TRIG_OUT_2_CONF_1_din');\ncolor('black');port_label('output',57,'sm_TRIG_OUT_2_CONF_1_en');\ncolor('b"
	  "lack');port_label('output',58,'sm_TRIG_OUT_1_CONF_0_din');\ncolor('black');port_label('output',59,'sm_TRIG_OUT_1_CO"
	  "NF_0_en');\ncolor('black');port_label('output',60,'sm_TRIG_OUT_1_CONF_1_din');\ncolor('black');port_label('output',"
	  "61,'sm_TRIG_OUT_1_CONF_1_en');\ncolor('black');port_label('output',62,'sm_TRIG_OUT_0_CONF_1_din');\ncolor('black');"
	  "port_label('output',63,'sm_TRIG_OUT_0_CONF_1_en');\ncolor('black');port_label('output',64,'sm_RSSI_PKT_DET_DURATION"
	  "S_din');\ncolor('black');port_label('output',65,'sm_RSSI_PKT_DET_DURATIONS_en');\ncolor('black');port_label('output"
	  "',66,'sm_RSSI_PKT_DET_THRESHOLDS_din');\ncolor('black');port_label('output',67,'sm_RSSI_PKT_DET_THRESHOLDS_en');\nc"
	  "olor('black');port_label('output',68,'sm_TRIG_IN_CONF_1_din');\ncolor('black');port_label('output',69,'sm_TRIG_IN_C"
	  "ONF_1_en');\ncolor('black');port_label('output',70,'sm_PktOps1_addr');\ncolor('black');port_label('output',71,'sm_P"
	  "ktOps1_din');\ncolor('black');port_label('output',72,'sm_PktOps1_we');\ncolor('black');port_label('output',73,'sm_P"
	  "ktTemplate1_addr');\ncolor('black');port_label('output',74,'sm_PktTemplate1_din');\ncolor('black');port_label('outp"
	  "ut',75,'sm_PktTemplate1_we');\ncolor('black');port_label('output',76,'sm_PktOps0_addr');\ncolor('black');port_label"
	  "('output',77,'sm_PktOps0_din');\ncolor('black');port_label('output',78,'sm_PktOps0_we');\ncolor('black');port_label"
	  "('output',79,'sm_PktTemplate0_addr');\ncolor('black');port_label('output',80,'sm_PktTemplate0_din');\ncolor('black'"
	  ");port_label('output',81,'sm_PktTemplate0_we');\ncolor('black');port_label('output',82,'shram_en');\nfprintf('','CO"
	  "MMENT: end icon text');"
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  82
	  Points		  [0, 0]
	  Branch {
	    DstBlock		    "Shared Memory3"
	    DstPort		    4
	  }
	  Branch {
	    DstBlock		    "Shared Memory2"
	    DstPort		    4
	  }
	  Branch {
	    DstBlock		    "Shared Memory1"
	    DstPort		    4
	  }
	  Branch {
	    DstBlock		    "Shared Memory"
	    DstPort		    4
	  }
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  43
	  DstBlock		  "To Register15"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  42
	  DstBlock		  "To Register15"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  41
	  DstBlock		  "To Register14"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  40
	  DstBlock		  "To Register14"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  49
	  DstBlock		  "To Register18"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  48
	  DstBlock		  "To Register18"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  45
	  DstBlock		  "To Register16"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  44
	  DstBlock		  "To Register16"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  53
	  DstBlock		  "To Register20"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  52
	  DstBlock		  "To Register20"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  51
	  DstBlock		  "To Register19"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  50
	  DstBlock		  "To Register19"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  57
	  DstBlock		  "To Register22"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  56
	  DstBlock		  "To Register22"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  55
	  DstBlock		  "To Register21"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  54
	  DstBlock		  "To Register21"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  61
	  DstBlock		  "To Register24"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  60
	  DstBlock		  "To Register24"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  59
	  DstBlock		  "To Register23"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  58
	  DstBlock		  "To Register23"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  63
	  DstBlock		  "To Register25"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  62
	  DstBlock		  "To Register25"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  47
	  DstBlock		  "To Register17"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  46
	  DstBlock		  "To Register17"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  17
	  DstBlock		  "To Register2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  16
	  DstBlock		  "To Register2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  13
	  DstBlock		  "To Register"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  12
	  DstBlock		  "To Register"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  21
	  DstBlock		  "To Register4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  20
	  DstBlock		  "To Register4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  37
	  DstBlock		  "To Register12"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  36
	  DstBlock		  "To Register12"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  39
	  DstBlock		  "To Register13"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  38
	  DstBlock		  "To Register13"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  25
	  DstBlock		  "To Register6"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  24
	  DstBlock		  "To Register6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  27
	  DstBlock		  "To Register7"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  26
	  DstBlock		  "To Register7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  29
	  DstBlock		  "To Register8"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  28
	  DstBlock		  "To Register8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  31
	  DstBlock		  "To Register9"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  30
	  DstBlock		  "To Register9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  33
	  DstBlock		  "To Register10"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  32
	  DstBlock		  "To Register10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  69
	  DstBlock		  "To Register28"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  68
	  DstBlock		  "To Register28"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  35
	  DstBlock		  "To Register11"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  34
	  DstBlock		  "To Register11"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  19
	  DstBlock		  "To Register3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  18
	  DstBlock		  "To Register3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  15
	  DstBlock		  "To Register1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  14
	  DstBlock		  "To Register1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  67
	  DstBlock		  "To Register27"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  66
	  DstBlock		  "To Register27"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  65
	  DstBlock		  "To Register26"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  64
	  DstBlock		  "To Register26"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  23
	  DstBlock		  "To Register5"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  22
	  DstBlock		  "To Register5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  75
	  DstBlock		  "Shared Memory1"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  74
	  DstBlock		  "Shared Memory1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  73
	  DstBlock		  "Shared Memory1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  81
	  DstBlock		  "Shared Memory3"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  80
	  DstBlock		  "Shared Memory3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  79
	  DstBlock		  "Shared Memory3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  72
	  DstBlock		  "Shared Memory"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  71
	  DstBlock		  "Shared Memory"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  70
	  DstBlock		  "Shared Memory"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  78
	  DstBlock		  "Shared Memory2"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  77
	  DstBlock		  "Shared Memory2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  76
	  DstBlock		  "Shared Memory2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  11
	  DstBlock		  "S_AXI_WREADY"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  10
	  DstBlock		  "S_AXI_RVALID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  9
	  DstBlock		  "S_AXI_RRESP"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  8
	  DstBlock		  "S_AXI_RLAST"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  7
	  DstBlock		  "S_AXI_RID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  6
	  DstBlock		  "S_AXI_RDATA"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  5
	  DstBlock		  "S_AXI_BVALID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  4
	  DstBlock		  "S_AXI_BRESP"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  3
	  DstBlock		  "S_AXI_BID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  2
	  DstBlock		  "S_AXI_AWREADY"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "memmap"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARREADY"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_WVALID"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  25
	}
	Line {
	  SrcBlock		  "S_AXI_WSTRB"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  24
	}
	Line {
	  SrcBlock		  "S_AXI_WLAST"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  23
	}
	Line {
	  SrcBlock		  "S_AXI_WDATA"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  22
	}
	Line {
	  SrcBlock		  "S_AXI_RREADY"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  21
	}
	Line {
	  SrcBlock		  "S_AXI_BREADY"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  20
	}
	Line {
	  SrcBlock		  "S_AXI_AWVALID"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  19
	}
	Line {
	  SrcBlock		  "S_AXI_AWSIZE"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  18
	}
	Line {
	  SrcBlock		  "S_AXI_AWPROT"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  17
	}
	Line {
	  SrcBlock		  "S_AXI_AWLOCK"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  16
	}
	Line {
	  SrcBlock		  "S_AXI_AWLEN"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  15
	}
	Line {
	  SrcBlock		  "S_AXI_AWID"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  14
	}
	Line {
	  SrcBlock		  "S_AXI_AWCACHE"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  13
	}
	Line {
	  SrcBlock		  "S_AXI_AWBURST"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  12
	}
	Line {
	  SrcBlock		  "S_AXI_AWADDR"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  11
	}
	Line {
	  SrcBlock		  "S_AXI_ARVALID"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  10
	}
	Line {
	  SrcBlock		  "S_AXI_ARSIZE"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  9
	}
	Line {
	  SrcBlock		  "S_AXI_ARPROT"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  8
	}
	Line {
	  SrcBlock		  "S_AXI_ARLOCK"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  7
	}
	Line {
	  SrcBlock		  "S_AXI_ARLEN"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  6
	}
	Line {
	  SrcBlock		  "S_AXI_ARID"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  5
	}
	Line {
	  SrcBlock		  "S_AXI_ARCACHE"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "S_AXI_ARBURST"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "S_AXI_ARADDR"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "AXI_ARESETN"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "From Register1"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  27
	}
	Line {
	  SrcBlock		  "To Register15"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  43
	}
	Line {
	  SrcBlock		  "To Register14"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  42
	}
	Line {
	  SrcBlock		  "To Register18"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  46
	}
	Line {
	  SrcBlock		  "To Register16"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  44
	}
	Line {
	  SrcBlock		  "To Register20"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  48
	}
	Line {
	  SrcBlock		  "To Register19"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  47
	}
	Line {
	  SrcBlock		  "To Register22"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  50
	}
	Line {
	  SrcBlock		  "To Register21"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  49
	}
	Line {
	  SrcBlock		  "To Register24"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  52
	}
	Line {
	  SrcBlock		  "To Register23"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  51
	}
	Line {
	  SrcBlock		  "To Register25"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  53
	}
	Line {
	  SrcBlock		  "To Register17"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  45
	}
	Line {
	  SrcBlock		  "To Register2"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  30
	}
	Line {
	  SrcBlock		  "To Register"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  28
	}
	Line {
	  SrcBlock		  "To Register4"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  32
	}
	Line {
	  SrcBlock		  "To Register12"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  40
	}
	Line {
	  SrcBlock		  "To Register13"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  41
	}
	Line {
	  SrcBlock		  "To Register6"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  34
	}
	Line {
	  SrcBlock		  "To Register7"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  35
	}
	Line {
	  SrcBlock		  "To Register8"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  36
	}
	Line {
	  SrcBlock		  "To Register9"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  37
	}
	Line {
	  SrcBlock		  "To Register10"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  38
	}
	Line {
	  SrcBlock		  "To Register28"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  56
	}
	Line {
	  SrcBlock		  "To Register11"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  39
	}
	Line {
	  SrcBlock		  "To Register3"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  31
	}
	Line {
	  SrcBlock		  "To Register1"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  29
	}
	Line {
	  SrcBlock		  "To Register27"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  55
	}
	Line {
	  SrcBlock		  "To Register26"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  54
	}
	Line {
	  SrcBlock		  "To Register5"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  33
	}
	Line {
	  SrcBlock		  "Shared Memory1"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  58
	}
	Line {
	  SrcBlock		  "Shared Memory3"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  60
	}
	Line {
	  SrcBlock		  "Shared Memory"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  57
	}
	Line {
	  SrcBlock		  "Shared Memory2"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  59
	}
	Line {
	  SrcBlock		  "From Register"
	  SrcPort		  1
	  DstBlock		  "memmap"
	  DstPort		  26
	}
	Line {
	  SrcBlock		  "S_AXI_WREADY"
	  SrcPort		  1
	  DstBlock		  "Terminator10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_RVALID"
	  SrcPort		  1
	  DstBlock		  "Terminator9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_RRESP"
	  SrcPort		  1
	  DstBlock		  "Terminator8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_RLAST"
	  SrcPort		  1
	  DstBlock		  "Terminator7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_RID"
	  SrcPort		  1
	  DstBlock		  "Terminator6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_RDATA"
	  SrcPort		  1
	  DstBlock		  "Terminator5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_BVALID"
	  SrcPort		  1
	  DstBlock		  "Terminator4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_BRESP"
	  SrcPort		  1
	  DstBlock		  "Terminator3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_BID"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_AWREADY"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S_AXI_ARREADY"
	  SrcPort		  1
	  DstBlock		  "Terminator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant24"
	  SrcPort		  1
	  DstBlock		  "S_AXI_WVALID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant23"
	  SrcPort		  1
	  DstBlock		  "S_AXI_WSTRB"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant22"
	  SrcPort		  1
	  DstBlock		  "S_AXI_WLAST"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant21"
	  SrcPort		  1
	  DstBlock		  "S_AXI_WDATA"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant20"
	  SrcPort		  1
	  DstBlock		  "S_AXI_RREADY"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant19"
	  SrcPort		  1
	  DstBlock		  "S_AXI_BREADY"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant18"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWVALID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant17"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWSIZE"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant16"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWPROT"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant15"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWLOCK"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant14"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWLEN"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant13"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant12"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWCACHE"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant11"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWBURST"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant10"
	  SrcPort		  1
	  DstBlock		  "S_AXI_AWADDR"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant9"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARVALID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant8"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARSIZE"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant7"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARPROT"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant6"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARLOCK"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant5"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARLEN"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant4"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARID"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant3"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARCACHE"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant2"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARBURST"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "S_AXI_ARADDR"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "AXI_ARESETN"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      From
      Name		      "From1"
      SID		      "10402"
      Position		      [685, 441, 835, 459]
      ShowName		      off
      GotoTag		      "OUT1_PE_BYPASS"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From10"
      SID		      "10531"
      Position		      [685, 811, 835, 829]
      ShowName		      off
      GotoTag		      "OUT3_TRIG_DELAY"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From11"
      SID		      "10532"
      Position		      [685, 871, 835, 889]
      ShowName		      off
      GotoTag		      "OUT3_HM_DISABLE"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From12"
      SID		      "10594"
      Position		      [685, 1041, 835, 1059]
      ShowName		      off
      GotoTag		      "OUT4_PE_BYPASS"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From13"
      SID		      "9763"
      Position		      [685, 241, 835, 259]
      ShowName		      off
      GotoTag		      "OUT0_PE_BYPASS"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From14"
      SID		      "10595"
      Position		      [685, 1011, 835, 1029]
      ShowName		      off
      GotoTag		      "OUT4_TRIG_DELAY"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From15"
      SID		      "10596"
      Position		      [685, 1071, 835, 1089]
      ShowName		      off
      GotoTag		      "OUT4_HM_DISABLE"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From16"
      SID		      "10658"
      Position		      [685, 1241, 835, 1259]
      ShowName		      off
      GotoTag		      "OUT5_PE_BYPASS"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From17"
      SID		      "10659"
      Position		      [685, 1211, 835, 1229]
      ShowName		      off
      GotoTag		      "OUT5_TRIG_DELAY"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From18"
      SID		      "10660"
      Position		      [685, 1271, 835, 1289]
      ShowName		      off
      GotoTag		      "OUT5_HM_DISABLE"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From2"
      SID		      "10403"
      Position		      [685, 411, 835, 429]
      ShowName		      off
      GotoTag		      "OUT1_TRIG_DELAY"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From3"
      SID		      "10404"
      Position		      [685, 471, 835, 489]
      ShowName		      off
      GotoTag		      "OUT1_HM_DISABLE"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From4"
      SID		      "10466"
      Position		      [685, 641, 835, 659]
      ShowName		      off
      GotoTag		      "OUT2_PE_BYPASS"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From5"
      SID		      "10467"
      Position		      [685, 611, 835, 629]
      ShowName		      off
      GotoTag		      "OUT2_TRIG_DELAY"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From6"
      SID		      "8535"
      Position		      [685, 211, 835, 229]
      ShowName		      off
      GotoTag		      "OUT0_TRIG_DELAY"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From7"
      SID		      "9379"
      Position		      [685, 271, 835, 289]
      ShowName		      off
      GotoTag		      "OUT0_HM_DISABLE"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From8"
      SID		      "10468"
      Position		      [685, 671, 835, 689]
      ShowName		      off
      GotoTag		      "OUT2_HM_DISABLE"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      From
      Name		      "From9"
      SID		      "10530"
      Position		      [685, 841, 835, 859]
      ShowName		      off
      GotoTag		      "OUT3_PE_BYPASS"
      TagVisibility	      "global"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Hold Mode 0"
      SID		      "10070"
      Ports		      [2, 1]
      Position		      [1415, 205, 1495, 245]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Hold Mode 0"
	Location		[65, 111, 2389, 1363]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10071"
	  Position		  [175, 108, 205, 122]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "disable"
	  SID			  "10072"
	  Position		  [175, 158, 205, 172]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical11"
	  SID			  "10096"
	  Ports			  [2, 1]
	  Position		  [620, 100, 705, 155]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10097"
	  Ports			  [2, 1]
	  Position		  [410, 90, 445, 190]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [2, 70, 2558, 1376]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10098"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10099"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10100"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10101"
	      Ports		      [1, 1]
	      Position		      [240, 86, 270, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10102"
	      Ports		      [1, 1]
	      Position		      [240, 101, 270, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10103"
	      Ports		      [3, 1]
	      Position		      [305, 71, 350, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10104"
	      Position		      [375, 88, 405, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "bool2"
	  SID			  "10105"
	  Ports			  [1, 1]
	  Position		  [515, 131, 555, 149]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca"
	  "st');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10079"
	  Position		  [795, 123, 825, 137]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [135, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -55; 160, 0; 0, 55]
	    DstBlock		    "Logical11"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "disable"
	  SrcPort		  1
	  DstBlock		  "S-R Latch"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "bool2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "bool2"
	  SrcPort		  1
	  DstBlock		  "Logical11"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical11"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Hold Mode 1"
      SID		      "10405"
      Ports		      [2, 1]
      Position		      [1415, 405, 1495, 445]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Hold Mode 1"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10406"
	  Position		  [175, 108, 205, 122]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "disable"
	  SID			  "10407"
	  Position		  [175, 158, 205, 172]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical11"
	  SID			  "10408"
	  Ports			  [2, 1]
	  Position		  [620, 100, 705, 155]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10409"
	  Ports			  [2, 1]
	  Position		  [410, 90, 445, 190]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [2, 74, 2496, 1419]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10410"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10411"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10412"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10413"
	      Ports		      [1, 1]
	      Position		      [240, 86, 270, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10414"
	      Ports		      [1, 1]
	      Position		      [240, 101, 270, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10415"
	      Ports		      [3, 1]
	      Position		      [305, 71, 350, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10416"
	      Position		      [375, 88, 405, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "bool2"
	  SID			  "10417"
	  Ports			  [1, 1]
	  Position		  [515, 131, 555, 149]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca"
	  "st');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10418"
	  Position		  [795, 123, 825, 137]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [135, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -55; 160, 0; 0, 55]
	    DstBlock		    "Logical11"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "disable"
	  SrcPort		  1
	  DstBlock		  "S-R Latch"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "bool2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "bool2"
	  SrcPort		  1
	  DstBlock		  "Logical11"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical11"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Hold Mode 2"
      SID		      "10469"
      Ports		      [2, 1]
      Position		      [1415, 605, 1495, 645]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Hold Mode 2"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10470"
	  Position		  [175, 108, 205, 122]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "disable"
	  SID			  "10471"
	  Position		  [175, 158, 205, 172]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical11"
	  SID			  "10472"
	  Ports			  [2, 1]
	  Position		  [620, 100, 705, 155]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10473"
	  Ports			  [2, 1]
	  Position		  [410, 90, 445, 190]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [2, 74, 2496, 1419]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10474"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10475"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10476"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10477"
	      Ports		      [1, 1]
	      Position		      [240, 86, 270, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10478"
	      Ports		      [1, 1]
	      Position		      [240, 101, 270, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10479"
	      Ports		      [3, 1]
	      Position		      [305, 71, 350, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10480"
	      Position		      [375, 88, 405, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "bool2"
	  SID			  "10481"
	  Ports			  [1, 1]
	  Position		  [515, 131, 555, 149]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca"
	  "st');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10482"
	  Position		  [795, 123, 825, 137]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [135, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -55; 160, 0; 0, 55]
	    DstBlock		    "Logical11"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "disable"
	  SrcPort		  1
	  DstBlock		  "S-R Latch"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "bool2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "bool2"
	  SrcPort		  1
	  DstBlock		  "Logical11"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical11"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Hold Mode 3"
      SID		      "10533"
      Ports		      [2, 1]
      Position		      [1415, 805, 1495, 845]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Hold Mode 3"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10534"
	  Position		  [175, 108, 205, 122]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "disable"
	  SID			  "10535"
	  Position		  [175, 158, 205, 172]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical11"
	  SID			  "10536"
	  Ports			  [2, 1]
	  Position		  [620, 100, 705, 155]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10537"
	  Ports			  [2, 1]
	  Position		  [410, 90, 445, 190]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [2, 74, 2496, 1419]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10538"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10539"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10540"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10541"
	      Ports		      [1, 1]
	      Position		      [240, 86, 270, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10542"
	      Ports		      [1, 1]
	      Position		      [240, 101, 270, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10543"
	      Ports		      [3, 1]
	      Position		      [305, 71, 350, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10544"
	      Position		      [375, 88, 405, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "bool2"
	  SID			  "10545"
	  Ports			  [1, 1]
	  Position		  [515, 131, 555, 149]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca"
	  "st');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10546"
	  Position		  [795, 123, 825, 137]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [135, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -55; 160, 0; 0, 55]
	    DstBlock		    "Logical11"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "disable"
	  SrcPort		  1
	  DstBlock		  "S-R Latch"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "bool2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "bool2"
	  SrcPort		  1
	  DstBlock		  "Logical11"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical11"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Hold Mode 4"
      SID		      "10597"
      Ports		      [2, 1]
      Position		      [1415, 1005, 1495, 1045]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Hold Mode 4"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10598"
	  Position		  [175, 108, 205, 122]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "disable"
	  SID			  "10599"
	  Position		  [175, 158, 205, 172]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical11"
	  SID			  "10600"
	  Ports			  [2, 1]
	  Position		  [620, 100, 705, 155]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10601"
	  Ports			  [2, 1]
	  Position		  [410, 90, 445, 190]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [2, 74, 2496, 1419]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10602"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10603"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10604"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10605"
	      Ports		      [1, 1]
	      Position		      [240, 86, 270, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10606"
	      Ports		      [1, 1]
	      Position		      [240, 101, 270, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10607"
	      Ports		      [3, 1]
	      Position		      [305, 71, 350, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10608"
	      Position		      [375, 88, 405, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "bool2"
	  SID			  "10609"
	  Ports			  [1, 1]
	  Position		  [515, 131, 555, 149]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca"
	  "st');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10610"
	  Position		  [795, 123, 825, 137]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [135, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -55; 160, 0; 0, 55]
	    DstBlock		    "Logical11"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "disable"
	  SrcPort		  1
	  DstBlock		  "S-R Latch"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "bool2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "bool2"
	  SrcPort		  1
	  DstBlock		  "Logical11"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical11"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Hold Mode 5"
      SID		      "10661"
      Ports		      [2, 1]
      Position		      [1415, 1205, 1495, 1245]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Hold Mode 5"
	Location		[2, 74, 2496, 1419]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"156"
	Block {
	  BlockType		  Inport
	  Name			  "input "
	  SID			  "10662"
	  Position		  [175, 108, 205, 122]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "disable"
	  SID			  "10663"
	  Position		  [175, 158, 205, 172]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical11"
	  SID			  "10664"
	  Ports			  [2, 1]
	  Position		  [620, 100, 705, 155]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  sg_icon_stat		  "85,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 85 85 0 0 ],[0 0 55 55 0 ]);\npatch([26.425 36.54 43.54 50.54 57.54 43.54 33.425 26.425 ],[34.77 34.7"
	  "7 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([33.425 43.54 36.54 26.425 33.425 ],[27.77 27.77 34.77 34"
	  ".77 27.77 ],[0.931 0.946 0.973 ]);\npatch([26.425 36.54 43.54 33.425 26.425 ],[20.77 20.77 27.77 27.77 20.77 ],[1 1"
	  " 1 ]);\npatch([33.425 57.54 50.54 43.54 36.54 26.425 33.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77 ],[0.931 0"
	  ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl"
	  "ack');disp('or');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R Latch"
	  SID			  "10665"
	  Ports			  [2, 1]
	  Position		  [410, 90, 445, 190]
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R Latch"
	    Location		    [2, 74, 2496, 1419]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      SID		      "10666"
	      Position		      [140, 103, 170, 117]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      SID		      "10667"
	      Position		      [140, 88, 170, 102]
	      NamePlacement	      "alternate"
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Constant1"
	      SID		      "10668"
	      Ports		      [0, 1]
	      Position		      [195, 71, 210, 89]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Constant"
	      SourceType	      "Xilinx Constant Block Block"
	      const		      "1"
	      gui_display_data_type   "Fixed-point"
	      arith_type	      "Unsigned"
	      n_bits		      "1"
	      bin_pt		      "0"
	      preci_type	      "Single"
	      exp_width		      "8"
	      frac_width	      "24"
	      explicit_period	      off
	      period		      "1"
	      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	      equ		      "P=C"
	      opselect		      "C"
	      inp2		      "PCIN>>17"
	      opr		      "+"
	      inp1		      "P"
	      carry		      "CIN"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "constant"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11"
	      ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 "
	      "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch("
	      "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''"
	      ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,"
	      "'1');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert1"
	      SID		      "10669"
	      Ports		      [1, 1]
	      Position		      [240, 86, 270, 104]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Convert2"
	      SID		      "10670"
	      Ports		      [1, 1]
	      Position		      [240, 101, 270, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register2"
	      SID		      "10671"
	      Ports		      [3, 1]
	      Position		      [305, 71, 350, 119]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      on
	      en		      on
	      dbl_ovrd		      off
	      xl_use_area	      off
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30."
	      "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3"
	      "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 "
	      "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0"
	      ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor"
	      "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i"
	      "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri"
	      "ntf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      SID		      "10672"
	      Position		      [375, 88, 405, 102]
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Convert2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Register2"
	      SrcPort		      1
	      DstBlock		      "Q"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Convert1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Constant1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Convert1"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Convert2"
	      SrcPort		      1
	      DstBlock		      "Register2"
	      DstPort		      3
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "bool2"
	  SID			  "10673"
	  Ports			  [1, 1]
	  Position		  [515, 131, 555, 149]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  float_type		  "Single"
	  exp_bits		  "8"
	  fraction_bits		  "24"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "convert"
	  sg_icon_stat		  "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22 1"
	  "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9.22"
	  " ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([17"
	  ".55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('',"
	  "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca"
	  "st');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Outport
	  Name			  "output"
	  SID			  "10674"
	  Position		  [795, 123, 825, 137]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "input "
	  SrcPort		  1
	  Points		  [135, 0]
	  Branch {
	    DstBlock		    "S-R Latch"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -55; 160, 0; 0, 55]
	    DstBlock		    "Logical11"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "disable"
	  SrcPort		  1
	  DstBlock		  "S-R Latch"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R Latch"
	  SrcPort		  1
	  DstBlock		  "bool2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "bool2"
	  SrcPort		  1
	  DstBlock		  "Logical11"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical11"
	  SrcPort		  1
	  DstBlock		  "output"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "Number of Input Triggers"
      SID		      "6729"
      Ports		      [0, 1]
      Position		      [90, 252, 145, 278]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      const		      "9"
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "8"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      explicit_period	      on
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "constant"
      sg_icon_stat	      "55,26,0,1,white,blue,0,350ae870,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 1"
      "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13"
      ".33 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 "
      "7.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
      ";\ncolor('black');port_label('output',1,'9');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Number of Output Triggers"
      SID		      "6730"
      Ports		      [0, 1]
      Position		      [90, 297, 145, 323]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      const		      "6"
      gui_display_data_type   "Fixed-point"
      arith_type	      "Unsigned"
      n_bits		      "8"
      bin_pt		      "0"
      preci_type	      "Single"
      exp_width		      "8"
      frac_width	      "24"
      explicit_period	      on
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "constant"
      sg_icon_stat	      "55,26,0,1,white,blue,0,f0403ad7,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],["
      "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 1"
      "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13"
      ".33 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 "
      "7.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')"
      ";\ncolor('black');port_label('output',1,'6');\nfprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Register 0"
      SID		      "8689"
      Ports		      [1, 1]
      Position		      [1860, 210, 1910, 240]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 "
      "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1"
      "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1"
      " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97"
      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n"
      "fprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      Reference
      Name		      "Register 1"
      SID		      "8696"
      Ports		      [1, 1]
      Position		      [1860, 410, 1910, 440]
      LibraryVersion	      "1.2"
      SourceBlock	      "xbsIndex_r4/Register"
      SourceType	      "Xilinx Register Block"
      init		      "0"
      rst		      off
      en		      off
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "register"
      sg_icon_stat	      "50,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 30 30 0 ],[0.77 0."
      "82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 30 30 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 "
      "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 1"
      "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1"
      " ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.97"
      "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l"
      "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\n"
      "fprintf('','COMMENT: end icon text');"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Registers"
      SID		      "2192"
      Ports		      []
      Position		      [190, 25, 254, 87]
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      Opaque		      off
      RequestExecContextInheritance off
      MaskHideContents	      off
      System {
	Name			"Registers"
	Location		[321, 154, 2188, 1328]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Goto
	  Name			  " "
	  SID			  "8748"
	  Position		  [480, 527, 595, 543]
	  ShowName		  off
	  GotoTag		  "Debug_0_Delay"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 1"
	  SID			  "8749"
	  Position		  [480, 87, 595, 103]
	  ShowName		  off
	  GotoTag		  "Eth_A_Delay"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 10"
	  SID			  "4994"
	  Position		  [955, 206, 1120, 224]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 105"
	  SID			  "8750"
	  Position		  [485, 947, 600, 963]
	  ShowName		  off
	  GotoTag		  "Eth_B_Delay"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 106"
	  SID			  "8751"
	  Position		  [480, 317, 595, 333]
	  ShowName		  off
	  GotoTag		  "AGC_Delay"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 107"
	  SID			  "7183"
	  Position		  [955, 427, 1120, 443]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 108"
	  SID			  "7184"
	  Position		  [955, 756, 1120, 774]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 109"
	  SID			  "7185"
	  Position		  [955, 977, 1120, 993]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 11"
	  SID			  "4995"
	  Position		  [955, 227, 1120, 243]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 110"
	  SID			  "7186"
	  Position		  [955, 777, 1120, 793]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 111"
	  SID			  "7187"
	  Position		  [955, 1026, 1115, 1044]
	  ShowName		  off
	  GotoTag		  "OUT1_TRIG_DELAY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 112"
	  SID			  "7188"
	  Position		  [955, 817, 1120, 833]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 113"
	  SID			  "7189"
	  Position		  [955, 837, 1120, 853]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 114"
	  SID			  "7190"
	  Position		  [955, 857, 1120, 873]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 115"
	  SID			  "7191"
	  Position		  [955, 877, 1120, 893]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 116"
	  SID			  "7192"
	  Position		  [955, 896, 1120, 914]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 117"
	  SID			  "7112"
	  Position		  [955, 476, 1115, 494]
	  ShowName		  off
	  GotoTag		  "OUT0_TRIG_DELAY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 118"
	  SID			  "7193"
	  Position		  [955, 917, 1120, 933]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 119"
	  SID			  "7194"
	  Position		  [955, 937, 1120, 953]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 12"
	  SID			  "4996"
	  Position		  [955, 267, 1120, 283]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 120"
	  SID			  "7195"
	  Position		  [955, 957, 1120, 973]
	  ShowName		  off
	  GotoTag		  "OUT1_OR_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 121"
	  SID			  "7196"
	  Position		  [955, 797, 1120, 813]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 122"
	  SID			  "7197"
	  Position		  [955, 637, 1120, 653]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 123"
	  SID			  "7198"
	  Position		  [955, 657, 1120, 673]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 124"
	  SID			  "7199"
	  Position		  [955, 677, 1120, 693]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 125"
	  SID			  "7200"
	  Position		  [955, 697, 1120, 713]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 126"
	  SID			  "7201"
	  Position		  [955, 717, 1120, 733]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 127"
	  SID			  "7202"
	  Position		  [955, 737, 1120, 753]
	  ShowName		  off
	  GotoTag		  "OUT1_AND_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 128"
	  SID			  "7269"
	  Position		  [955, 1306, 1120, 1324]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 129"
	  SID			  "7270"
	  Position		  [955, 1527, 1120, 1543]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 13"
	  SID			  "4997"
	  Position		  [955, 287, 1120, 303]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 130"
	  SID			  "7271"
	  Position		  [955, 1327, 1120, 1343]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 131"
	  SID			  "7272"
	  Position		  [955, 1576, 1115, 1594]
	  ShowName		  off
	  GotoTag		  "OUT2_TRIG_DELAY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 132"
	  SID			  "7273"
	  Position		  [955, 1367, 1120, 1383]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 133"
	  SID			  "7274"
	  Position		  [955, 1387, 1120, 1403]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 134"
	  SID			  "7275"
	  Position		  [955, 1407, 1120, 1423]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 135"
	  SID			  "7276"
	  Position		  [955, 1427, 1120, 1443]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 136"
	  SID			  "7277"
	  Position		  [955, 1446, 1120, 1464]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 137"
	  SID			  "7278"
	  Position		  [955, 1467, 1120, 1483]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 138"
	  SID			  "7279"
	  Position		  [955, 1487, 1120, 1503]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 139"
	  SID			  "7280"
	  Position		  [955, 1507, 1120, 1523]
	  ShowName		  off
	  GotoTag		  "OUT2_OR_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 14"
	  SID			  "4998"
	  Position		  [955, 307, 1120, 323]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 140"
	  SID			  "7281"
	  Position		  [955, 1347, 1120, 1363]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 141"
	  SID			  "7282"
	  Position		  [955, 1187, 1120, 1203]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 142"
	  SID			  "7283"
	  Position		  [955, 1207, 1120, 1223]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 143"
	  SID			  "7284"
	  Position		  [955, 1227, 1120, 1243]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 144"
	  SID			  "7285"
	  Position		  [955, 1247, 1120, 1263]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 145"
	  SID			  "7286"
	  Position		  [955, 1267, 1120, 1283]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 146"
	  SID			  "7287"
	  Position		  [955, 1287, 1120, 1303]
	  ShowName		  off
	  GotoTag		  "OUT2_AND_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 147"
	  SID			  "7354"
	  Position		  [1490, 206, 1655, 224]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 148"
	  SID			  "7355"
	  Position		  [1490, 427, 1655, 443]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 149"
	  SID			  "7356"
	  Position		  [1490, 227, 1655, 243]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 15"
	  SID			  "4999"
	  Position		  [955, 327, 1120, 343]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 150"
	  SID			  "7357"
	  Position		  [1490, 476, 1650, 494]
	  ShowName		  off
	  GotoTag		  "OUT3_TRIG_DELAY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 151"
	  SID			  "7358"
	  Position		  [1490, 267, 1655, 283]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 152"
	  SID			  "7359"
	  Position		  [1490, 287, 1655, 303]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 153"
	  SID			  "7360"
	  Position		  [1490, 307, 1655, 323]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 154"
	  SID			  "7361"
	  Position		  [1490, 327, 1655, 343]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 155"
	  SID			  "7362"
	  Position		  [1490, 346, 1655, 364]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 156"
	  SID			  "7363"
	  Position		  [1490, 367, 1655, 383]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 157"
	  SID			  "7364"
	  Position		  [1490, 387, 1655, 403]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 158"
	  SID			  "7365"
	  Position		  [1490, 407, 1655, 423]
	  ShowName		  off
	  GotoTag		  "OUT3_OR_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 159"
	  SID			  "7366"
	  Position		  [1490, 247, 1655, 263]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 16"
	  SID			  "5000"
	  Position		  [955, 346, 1120, 364]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 160"
	  SID			  "7367"
	  Position		  [1490, 87, 1655, 103]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 161"
	  SID			  "7368"
	  Position		  [1490, 107, 1655, 123]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 162"
	  SID			  "7369"
	  Position		  [1490, 127, 1655, 143]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 163"
	  SID			  "7370"
	  Position		  [1490, 147, 1655, 163]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 164"
	  SID			  "7371"
	  Position		  [1490, 167, 1655, 183]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 165"
	  SID			  "7372"
	  Position		  [1490, 187, 1655, 203]
	  ShowName		  off
	  GotoTag		  "OUT3_AND_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 166"
	  SID			  "7439"
	  Position		  [1490, 751, 1655, 769]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 167"
	  SID			  "7440"
	  Position		  [1490, 972, 1655, 988]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 168"
	  SID			  "7441"
	  Position		  [1490, 772, 1655, 788]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 169"
	  SID			  "7442"
	  Position		  [1490, 1021, 1650, 1039]
	  ShowName		  off
	  GotoTag		  "OUT4_TRIG_DELAY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 17"
	  SID			  "5001"
	  Position		  [955, 367, 1120, 383]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 170"
	  SID			  "7443"
	  Position		  [1490, 812, 1655, 828]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 171"
	  SID			  "7444"
	  Position		  [1490, 832, 1655, 848]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 172"
	  SID			  "7445"
	  Position		  [1490, 852, 1655, 868]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 173"
	  SID			  "7446"
	  Position		  [1490, 872, 1655, 888]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 174"
	  SID			  "7447"
	  Position		  [1490, 891, 1655, 909]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 175"
	  SID			  "7448"
	  Position		  [1490, 912, 1655, 928]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 176"
	  SID			  "7449"
	  Position		  [1490, 932, 1655, 948]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 177"
	  SID			  "7450"
	  Position		  [1490, 952, 1655, 968]
	  ShowName		  off
	  GotoTag		  "OUT4_OR_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 178"
	  SID			  "7451"
	  Position		  [1490, 792, 1655, 808]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 179"
	  SID			  "7452"
	  Position		  [1490, 632, 1655, 648]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 18"
	  SID			  "5002"
	  Position		  [955, 387, 1120, 403]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 180"
	  SID			  "7453"
	  Position		  [1490, 652, 1655, 668]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 181"
	  SID			  "7454"
	  Position		  [1490, 672, 1655, 688]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 182"
	  SID			  "7455"
	  Position		  [1490, 692, 1655, 708]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 183"
	  SID			  "7456"
	  Position		  [1490, 712, 1655, 728]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 184"
	  SID			  "7457"
	  Position		  [1490, 732, 1655, 748]
	  ShowName		  off
	  GotoTag		  "OUT4_AND_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 185"
	  SID			  "7524"
	  Position		  [1490, 1301, 1655, 1319]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 186"
	  SID			  "7525"
	  Position		  [1490, 1522, 1655, 1538]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 187"
	  SID			  "7526"
	  Position		  [1490, 1322, 1655, 1338]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 188"
	  SID			  "7527"
	  Position		  [1490, 1571, 1650, 1589]
	  ShowName		  off
	  GotoTag		  "OUT5_TRIG_DELAY"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 189"
	  SID			  "7528"
	  Position		  [1490, 1362, 1655, 1378]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 19"
	  SID			  "5003"
	  Position		  [955, 407, 1120, 423]
	  ShowName		  off
	  GotoTag		  "OUT0_OR_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 190"
	  SID			  "7529"
	  Position		  [1490, 1382, 1655, 1398]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 191"
	  SID			  "7530"
	  Position		  [1490, 1402, 1655, 1418]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 192"
	  SID			  "7531"
	  Position		  [1490, 1422, 1655, 1438]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 193"
	  SID			  "7532"
	  Position		  [1490, 1441, 1655, 1459]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 194"
	  SID			  "7533"
	  Position		  [1490, 1462, 1655, 1478]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 195"
	  SID			  "7534"
	  Position		  [1490, 1482, 1655, 1498]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN6"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 196"
	  SID			  "7535"
	  Position		  [1490, 1502, 1655, 1518]
	  ShowName		  off
	  GotoTag		  "OUT5_OR_USE_IN7"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 197"
	  SID			  "7536"
	  Position		  [1490, 1342, 1655, 1358]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 198"
	  SID			  "7537"
	  Position		  [1490, 1182, 1655, 1198]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 199"
	  SID			  "7538"
	  Position		  [1490, 1202, 1655, 1218]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 2"
	  SID			  "8752"
	  Position		  [480, 547, 595, 563]
	  ShowName		  off
	  GotoTag		  "Debug_0_Debounce"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 20"
	  SID			  "8753"
	  Position		  [480, 127, 595, 143]
	  ShowName		  off
	  GotoTag		  "Eth_A_SW_Trig"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 200"
	  SID			  "7539"
	  Position		  [1490, 1222, 1655, 1238]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 201"
	  SID			  "7540"
	  Position		  [1490, 1242, 1655, 1258]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 202"
	  SID			  "7541"
	  Position		  [1490, 1262, 1655, 1278]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 203"
	  SID			  "7542"
	  Position		  [1490, 1282, 1655, 1298]
	  ShowName		  off
	  GotoTag		  "OUT5_AND_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 21"
	  SID			  "8754"
	  Position		  [480, 107, 595, 123]
	  ShowName		  off
	  GotoTag		  "Eth_A_HW_SW_Sel"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 22"
	  SID			  "8755"
	  Position		  [485, 967, 600, 983]
	  ShowName		  off
	  GotoTag		  "Eth_B_HW_SW_Sel"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 23"
	  SID			  "8756"
	  Position		  [485, 987, 600, 1003]
	  ShowName		  off
	  GotoTag		  "Eth_B_SW_Trig"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 3"
	  SID			  "7182"
	  Position		  [955, 247, 1120, 263]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN8"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 4"
	  SID			  "4988"
	  Position		  [955, 87, 1120, 103]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 5"
	  SID			  "4989"
	  Position		  [955, 107, 1120, 123]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 6"
	  SID			  "4990"
	  Position		  [955, 127, 1120, 143]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 7"
	  SID			  "4991"
	  Position		  [955, 147, 1120, 163]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 8"
	  SID			  "4992"
	  Position		  [955, 167, 1120, 183]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  " 9"
	  SID			  "4993"
	  Position		  [955, 187, 1120, 203]
	  ShowName		  off
	  GotoTag		  "OUT0_AND_USE_IN5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat"
	  SID			  "5289"
	  Ports			  [6, 1]
	  Position		  [2050, 92, 2090, 228]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "6"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "40,136,6,1,white,blue,0,c44eeefa,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 136 136 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 40 40 0 0 ],[0 0 136 136 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[73.55 73.55 7"
	  "8.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[68.55 68.55 73.55 73.55 68"
	  ".55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[63.55 63.55 68.55 68.55 63.55 ],[1 1 1 ]);\npa"
	  "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\n\n\n\n\ncolor('black');port_label('input',6,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode"
	  "','on');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Concat1"
	  SID			  "6732"
	  Ports			  [3, 1]
	  Position		  [290, 1337, 330, 1443]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Concat"
	  SourceType		  "Xilinx Bus Concatenator Block"
	  infoedit		  "Concatenates two or more inputs.  Output will be cast to an unsigned value with the binary point at ze"
	  "ro."
	  num_inputs		  "3"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "concat"
	  sg_icon_stat		  "40,106,3,1,white,blue,0,61ef8218,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 106 106 0 ],[0.77 0.82 0."
	  "91 ]);\nplot([0 40 40 0 0 ],[0 0 106 106 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[58.55 58.55 6"
	  "3.55 58.55 63.55 63.55 63.55 58.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[53.55 53.55 58.55 58.55 53"
	  ".55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[48.55 48.55 53.55 53.55 48.55 ],[1 1 1 ]);\npa"
	  "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[43.55 43.55 48.55 43.55 48.55 48.55 43.55 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu"
	  "t',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  SID			  "5291"
	  Ports			  [0, 1]
	  Position		  [2110, 178, 2140, 202]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "1"
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "30,24,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.33 "
	  "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15.33"
	  " 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n"
	  "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp"
	  "ut',1,'1');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant1"
	  SID			  "6733"
	  Ports			  [0, 1]
	  Position		  [350, 1408, 380, 1432]
	  ShowName		  off
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  const			  "1"
	  gui_display_data_type	  "Boolean"
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  preci_type		  "Single"
	  exp_width		  "8"
	  frac_width		  "24"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instructions is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  sg_icon_stat		  "30,24,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.33 "
	  "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15.33"
	  " 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n"
	  "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\n"
	  "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp"
	  "ut',1,'1');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register1"
	  SID			  "8757"
	  Ports			  [0, 1]
	  Position		  [75, 212, 135, 268]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_1'"
	  init			  "TRIG_IN_CONF_1"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register10"
	  SID			  "4167"
	  Ports			  [0, 1]
	  Position		  [100, 1175, 145, 1205]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RSSI_PKT_DET_THRESHOLDS'"
	  init			  "RSSI_PKT_DET_THRESHOLDS"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register11"
	  SID			  "4168"
	  Ports			  [0, 1]
	  Position		  [100, 1225, 145, 1255]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RSSI_PKT_DET_DURATIONS'"
	  init			  "RSSI_PKT_DET_DURATIONS"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register12"
	  SID			  "7119"
	  Ports			  [0, 1]
	  Position		  [710, 482, 770, 538]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_0_CONF_1'"
	  init			  "TRIG_OUT_0_CONF_1"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register13"
	  SID			  "7203"
	  Ports			  [0, 1]
	  Position		  [710, 1032, 770, 1088]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_1_CONF_1'"
	  init			  "TRIG_OUT_1_CONF_1"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register14"
	  SID			  "7204"
	  Ports			  [0, 1]
	  Position		  [710, 787, 770, 843]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_1_CONF_0'"
	  init			  "TRIG_OUT_1_CONF_0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register15"
	  SID			  "7288"
	  Ports			  [0, 1]
	  Position		  [710, 1582, 770, 1638]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_2_CONF_1'"
	  init			  "TRIG_OUT_2_CONF_1"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register16"
	  SID			  "7289"
	  Ports			  [0, 1]
	  Position		  [710, 1337, 770, 1393]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_2_CONF_0'"
	  init			  "TRIG_OUT_2_CONF_0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register17"
	  SID			  "7373"
	  Ports			  [0, 1]
	  Position		  [1245, 482, 1305, 538]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_3_CONF_1'"
	  init			  "TRIG_OUT_3_CONF_1"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register18"
	  SID			  "7374"
	  Ports			  [0, 1]
	  Position		  [1245, 237, 1305, 293]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_3_CONF_0'"
	  init			  "TRIG_OUT_3_CONF_0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register19"
	  SID			  "7458"
	  Ports			  [0, 1]
	  Position		  [1245, 1027, 1305, 1083]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_4_CONF_1'"
	  init			  "TRIG_OUT_4_CONF_1"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register2"
	  SID			  "5007"
	  Ports			  [0, 1]
	  Position		  [710, 237, 770, 293]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_0_CONF_0'"
	  init			  "TRIG_OUT_0_CONF_0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register20"
	  SID			  "7459"
	  Ports			  [0, 1]
	  Position		  [1245, 782, 1305, 838]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_4_CONF_0'"
	  init			  "TRIG_OUT_4_CONF_0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register21"
	  SID			  "7543"
	  Ports			  [0, 1]
	  Position		  [1245, 1577, 1305, 1633]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_5_CONF_1'"
	  init			  "TRIG_OUT_5_CONF_1"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register22"
	  SID			  "7544"
	  Ports			  [0, 1]
	  Position		  [1245, 1332, 1305, 1388]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_OUT_5_CONF_0'"
	  init			  "TRIG_OUT_5_CONF_0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register23"
	  SID			  "8758"
	  Ports			  [0, 1]
	  Position		  [75, 842, 135, 898]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_7'"
	  init			  "TRIG_IN_CONF_7"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register24"
	  SID			  "8759"
	  Ports			  [0, 1]
	  Position		  [75, 957, 135, 1013]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_8'"
	  init			  "TRIG_IN_CONF_8"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register3"
	  SID			  "8760"
	  Ports			  [0, 1]
	  Position		  [75, 97, 135, 153]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_0'"
	  init			  "TRIG_IN_CONF_0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register4"
	  SID			  "8761"
	  Ports			  [0, 1]
	  Position		  [75, 317, 135, 373]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_2'"
	  init			  "TRIG_IN_CONF_2"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register5"
	  SID			  "8762"
	  Ports			  [0, 1]
	  Position		  [75, 422, 135, 478]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_3'"
	  init			  "TRIG_IN_CONF_3"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register6"
	  SID			  "8763"
	  Ports			  [0, 1]
	  Position		  [75, 527, 135, 583]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_4'"
	  init			  "TRIG_IN_CONF_4"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register7"
	  SID			  "8764"
	  Ports			  [0, 1]
	  Position		  [75, 632, 135, 688]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_5'"
	  init			  "TRIG_IN_CONF_5"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register8"
	  SID			  "8765"
	  Ports			  [0, 1]
	  Position		  [75, 737, 135, 793]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'TRIG_IN_CONF_6'"
	  init			  "TRIG_IN_CONF_6"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  sg_icon_stat		  "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
	  "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
	  "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
	  "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
	  "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
	  "out');\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register9"
	  SID			  "4169"
	  Ports			  [0, 1]
	  Position		  [100, 1125, 145, 1155]
	  ShowName		  off
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  LibraryVersion	  "1.2"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Block"
	  infoedit		  "Register block that reads data to a shared memory register.  Delay of one sample period."
	  shared_memory_name	  "'RSSI_PKT_DET_CONFIG'"
	  init			  "RSSI_PKT_DET_CONFIG"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  gui_display_data_type	  "Fixed-point"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  preci_type		  "Single"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
	  " ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
	  "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
	  "[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
	  "1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
	  "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
	  ");\nfprintf('','COMMENT: end icon text');"
	}
	Block {
	  BlockType		  From
	  Name			  "From1"
	  SID			  "4971"
	  Position		  [1835, 202, 1960, 218]
	  ShowName		  off
	  GotoTag		  "OUT0"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From2"
	  SID			  "5069"
	  Position		  [1835, 182, 1960, 198]
	  ShowName		  off
	  GotoTag		  "OUT1"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From3"
	  SID			  "5070"
	  Position		  [1835, 162, 1960, 178]
	  ShowName		  off
	  GotoTag		  "OUT2"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From4"
	  SID			  "5071"
	  Position		  [1835, 142, 1960, 158]
	  ShowName		  off
	  GotoTag		  "OUT3"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From5"
	  SID			  "5072"
	  Position		  [1835, 122, 1960, 138]
	  ShowName		  off
	  GotoTag		  "OUT4"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From6"
	  SID			  "6735"
	  Position		  [75, 1417, 200, 1433]
	  ShowName		  off
	  GotoTag		  "Num_Inputs"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From7"
	  SID			  "6745"
	  Position		  [75, 1382, 200, 1398]
	  ShowName		  off
	  GotoTag		  "Num_Outputs"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From8"
	  SID			  "6746"
	  Position		  [75, 1347, 200, 1363]
	  ShowName		  off
	  GotoTag		  "Core_ID"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  From
	  Name			  "From9"
	  SID			  "8625"
	  Position		  [1835, 102, 1960, 118]
	  ShowName		  off
	  GotoTag		  "OUT5"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto"
	  SID			  "8766"
	  Position		  [480, 567, 595, 583]
	  ShowName		  off
	  GotoTag		  "Debug_0_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto1"
	  SID			  "8767"
	  Position		  [480, 147, 595, 163]
	  ShowName		  off
	  GotoTag		  "Eth_A_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto10"
	  SID			  "8768"
	  Position		  [485, 862, 600, 878]
	  ShowName		  off
	  GotoTag		  "Debug_3_Debounce"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto11"
	  SID			  "8769"
	  Position		  [485, 842, 600, 858]
	  ShowName		  off
	  GotoTag		  "Debug_3_Delay"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto12"
	  SID			  "7205"
	  Position		  [955, 1076, 1115, 1094]
	  ShowName		  off
	  GotoTag		  "OUT1_HM_DISABLE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto13"
	  SID			  "8770"
	  Position		  [480, 252, 595, 268]
	  ShowName		  off
	  GotoTag		  "Energy_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto14"
	  SID			  "9757"
	  Position		  [955, 501, 1115, 519]
	  ShowName		  off
	  GotoTag		  "OUT0_PE_BYPASS"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto15"
	  SID			  "9758"
	  Position		  [955, 1051, 1115, 1069]
	  ShowName		  off
	  GotoTag		  "OUT1_PE_BYPASS"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto16"
	  SID			  "8771"
	  Position		  [480, 357, 595, 373]
	  ShowName		  off
	  GotoTag		  "AGC_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto17"
	  SID			  "9759"
	  Position		  [1490, 501, 1650, 519]
	  ShowName		  off
	  GotoTag		  "OUT3_PE_BYPASS"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto18"
	  SID			  "9760"
	  Position		  [955, 1601, 1115, 1619]
	  ShowName		  off
	  GotoTag		  "OUT2_PE_BYPASS"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto19"
	  SID			  "8772"
	  Position		  [480, 462, 595, 478]
	  ShowName		  off
	  GotoTag		  "Software_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto2"
	  SID			  "8773"
	  Position		  [480, 442, 595, 458]
	  ShowName		  off
	  GotoTag		  "Software_Trig"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto20"
	  SID			  "4170"
	  Position		  [220, 1132, 330, 1148]
	  ShowName		  off
	  GotoTag		  "reg_pkt_det_config"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto21"
	  SID			  "9761"
	  Position		  [1490, 1046, 1650, 1064]
	  ShowName		  off
	  GotoTag		  "OUT4_PE_BYPASS"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto22"
	  SID			  "8774"
	  Position		  [485, 1007, 600, 1023]
	  ShowName		  off
	  GotoTag		  "Eth_B_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto23"
	  SID			  "4171"
	  Position		  [220, 1182, 330, 1198]
	  ShowName		  off
	  GotoTag		  "reg_pkt_det_thresh"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto24"
	  SID			  "4172"
	  Position		  [220, 1232, 335, 1248]
	  ShowName		  off
	  GotoTag		  "reg_pkt_det_duration"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto25"
	  SID			  "7120"
	  Position		  [955, 526, 1115, 544]
	  ShowName		  off
	  GotoTag		  "OUT0_HM_DISABLE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto26"
	  SID			  "7290"
	  Position		  [955, 1626, 1115, 1644]
	  ShowName		  off
	  GotoTag		  "OUT2_HM_DISABLE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto27"
	  SID			  "7375"
	  Position		  [1490, 526, 1650, 544]
	  ShowName		  off
	  GotoTag		  "OUT3_HM_DISABLE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto28"
	  SID			  "7460"
	  Position		  [1490, 1071, 1650, 1089]
	  ShowName		  off
	  GotoTag		  "OUT4_HM_DISABLE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto29"
	  SID			  "7545"
	  Position		  [1490, 1621, 1650, 1639]
	  ShowName		  off
	  GotoTag		  "OUT5_HM_DISABLE"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto3"
	  SID			  "8775"
	  Position		  [480, 672, 595, 688]
	  ShowName		  off
	  GotoTag		  "Debug_1_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto30"
	  SID			  "9762"
	  Position		  [1490, 1596, 1650, 1614]
	  ShowName		  off
	  GotoTag		  "OUT5_PE_BYPASS"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto4"
	  SID			  "8776"
	  Position		  [480, 652, 595, 668]
	  ShowName		  off
	  GotoTag		  "Debug_1_Debounce"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto5"
	  SID			  "8777"
	  Position		  [480, 632, 595, 648]
	  ShowName		  off
	  GotoTag		  "Debug_1_Delay"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto6"
	  SID			  "8778"
	  Position		  [480, 777, 595, 793]
	  ShowName		  off
	  GotoTag		  "Debug_2_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto7"
	  SID			  "8779"
	  Position		  [480, 757, 595, 773]
	  ShowName		  off
	  GotoTag		  "Debug_2_Debounce"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto8"
	  SID			  "8780"
	  Position		  [480, 737, 595, 753]
	  ShowName		  off
	  GotoTag		  "Debug_2_Delay"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  Goto
	  Name			  "Goto9"
	  SID			  "8781"
	  Position		  [485, 882, 600, 898]
	  ShowName		  off
	  GotoTag		  "Debug_3_Disable"
	  TagVisibility		  "global"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice0"
	  SID			  "8782"
	  Ports			  [1, 4]
	  Position		  [220, 83, 300, 167]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice0"
	    Location		    [2, 70, 2558, 1376]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8783"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b29"
	      SID		      "8784"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "29"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8785"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8786"
	      Ports		      [1, 1]
	      Position		      [150, 227, 195, 243]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8787"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8788"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "HW_SW_Sel"
	      SID		      "8789"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8790"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8791"
	      Position		      [265, 228, 295, 242]
	      Port		      "4"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  DstBlock		  "b29"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 50]
		  Branch {
		    DstBlock		    "b30"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 50]
		    DstBlock		    "b31"
		    DstPort		    1
		  }
		}
	      }
	    }
	    Line {
	      SrcBlock		      "b29"
	      SrcPort		      1
	      DstBlock		      "HW_SW_Sel"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice1"
	  SID			  "8792"
	  Ports			  [1, 3]
	  Position		  [220, 207, 300, 273]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice1"
	    Location		    [132, 109, 2467, 1391]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8793"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8794"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8795"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8796"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8797"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8798"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8799"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  DstBlock		  "b30"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 50]
		  DstBlock		  "b31"
		  DstPort		  1
		}
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice2"
	  SID			  "8800"
	  Ports			  [1, 3]
	  Position		  [220, 312, 300, 378]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice2"
	    Location		    [132, 109, 2467, 1391]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8801"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8802"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8803"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8804"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8805"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8806"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8807"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  DstBlock		  "b30"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 50]
		  DstBlock		  "b31"
		  DstPort		  1
		}
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice3"
	  SID			  "8808"
	  Ports			  [1, 3]
	  Position		  [220, 417, 300, 483]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice3"
	    Location		    [132, 109, 2467, 1391]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8809"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8810"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8811"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8812"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8813"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8814"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8815"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  DstBlock		  "b30"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 50]
		  DstBlock		  "b31"
		  DstPort		  1
		}
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice4"
	  SID			  "8816"
	  Ports			  [1, 3]
	  Position		  [220, 522, 300, 588]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice4"
	    Location		    [132, 109, 2467, 1391]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8817"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8818"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8819"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8820"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8821"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8822"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8823"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  DstBlock		  "b30"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 50]
		  DstBlock		  "b31"
		  DstPort		  1
		}
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice5"
	  SID			  "8824"
	  Ports			  [1, 3]
	  Position		  [220, 627, 300, 693]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice5"
	    Location		    [132, 109, 2467, 1391]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8825"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8826"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8827"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8828"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8829"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8830"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8831"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  DstBlock		  "b30"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 50]
		  DstBlock		  "b31"
		  DstPort		  1
		}
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice6"
	  SID			  "8832"
	  Ports			  [1, 3]
	  Position		  [220, 732, 300, 798]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice6"
	    Location		    [132, 109, 2467, 1391]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8833"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8834"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8835"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8836"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8837"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8838"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8839"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  DstBlock		  "b30"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 50]
		  DstBlock		  "b31"
		  DstPort		  1
		}
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice7"
	  SID			  "8840"
	  Ports			  [1, 3]
	  Position		  [220, 837, 300, 903]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice7"
	    Location		    [132, 109, 2467, 1391]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8841"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8842"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8843"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8844"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8845"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8846"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8847"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  DstBlock		  "b30"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 50]
		  DstBlock		  "b31"
		  DstPort		  1
		}
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Input Configuration\nSlice8"
	  SID			  "8848"
	  Ports			  [1, 4]
	  Position		  [220, 942, 300, 1028]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Input Configuration\nSlice8"
	    Location		    [2, 70, 2558, 1376]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "8849"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b29"
	      SID		      "8850"
	      Ports		      [1, 1]
	      Position		      [150, 127, 195, 143]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "29"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b30"
	      SID		      "8851"
	      Ports		      [1, 1]
	      Position		      [150, 177, 195, 193]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "30"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b31"
	      SID		      "8852"
	      Ports		      [1, 1]
	      Position		      [150, 227, 195, 243]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "31"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b[0:4]"
	      SID		      "8853"
	      Ports		      [1, 1]
	      Position		      [150, 27, 195, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "5"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Delay"
	      SID		      "8854"
	      Position		      [265, 28, 295, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "HW_SW_Sel"
	      SID		      "8855"
	      Position		      [265, 128, 295, 142]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Debounce"
	      SID		      "8856"
	      Position		      [265, 178, 295, 192]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Disable"
	      SID		      "8857"
	      Position		      [265, 228, 295, 242]
	      Port		      "4"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "b31"
	      SrcPort		      1
	      DstBlock		      "Disable"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b30"
	      SrcPort		      1
	      DstBlock		      "Debounce"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b[0:4]"
	      SrcPort		      1
	      DstBlock		      "Delay"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [55, 0]
	      Branch {
		DstBlock		"b[0:4]"
		DstPort			1
	      }
	      Branch {
		Points			[0, 100]
		Branch {
		  Points		  [0, 50]
		  Branch {
		    DstBlock		    "b30"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 50]
		    DstBlock		    "b31"
		    DstPort		    1
		  }
		}
		Branch {
		  DstBlock		  "b29"
		  DstPort		  1
		}
	      }
	    }
	    Line {
	      SrcBlock		      "b29"
	      SrcPort		      1
	      DstBlock		      "HW_SW_Sel"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "Output Configuration\nSlice"
	  SID			  "5008"
	  Ports			  [1, 18]
	  Position		  [840, 69, 910, 461]
	  ShowName		  off
	  MinAlgLoopOccurrences	  off
	  PropExecContextOutsideSubsystem off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  Opaque		  off
	  RequestExecContextInheritance	off
	  MaskHideContents	  off
	  System {
	    Name		    "Output Configuration\nSlice"
	    Location		    [2, 70, 2558, 1376]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "32b"
	      SID		      "5009"
	      Position		      [25, 28, 55, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b0"
	      SID		      "5034"
	      Ports		      [1, 1]
	      Position		      [95, 27, 140, 43]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "0"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b1"
	      SID		      "5035"
	      Ports		      [1, 1]
	      Position		      [95, 62, 140, 78]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "1"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b16"
	      SID		      "5049"
	      Ports		      [1, 1]
	      Position		      [95, 552, 140, 568]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "16"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b17"
	      SID		      "5051"
	      Ports		      [1, 1]
	      Position		      [95, 587, 140, 603]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "17"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b18"
	      SID		      "5052"
	      Ports		      [1, 1]
	      Position		      [95, 622, 140, 638]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "18"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b19"
	      SID		      "5053"
	      Ports		      [1, 1]
	      Position		      [95, 657, 140, 673]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "19"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b2"
	      SID		      "5037"
	      Ports		      [1, 1]
	      Position		      [95, 97, 140, 113]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "2"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b20"
	      SID		      "5054"
	      Ports		      [1, 1]
	      Position		      [95, 692, 140, 708]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "20"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b21"
	      SID		      "5055"
	      Ports		      [1, 1]
	      Position		      [95, 727, 140, 743]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "21"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b22"
	      SID		      "5056"
	      Ports		      [1, 1]
	      Position		      [95, 762, 140, 778]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "22"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b23"
	      SID		      "5067"
	      Ports		      [1, 1]
	      Position		      [95, 797, 140, 813]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "23"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b24"
	      SID		      "7179"
	      Ports		      [1, 1]
	      Position		      [95, 832, 140, 848]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "24"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b3"
	      SID		      "5038"
	      Ports		      [1, 1]
	      Position		      [95, 132, 140, 148]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "3"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b4"
	      SID		      "5041"
	      Ports		      [1, 1]
	      Position		      [95, 167, 140, 183]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "4"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b5"
	      SID		      "5042"
	      Ports		      [1, 1]
	      Position		      [95, 202, 140, 218]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "5"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b6"
	      SID		      "5043"
	      Ports		      [1, 1]
	      Position		      [95, 237, 140, 253]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "6"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b7"
	      SID		      "5044"
	      Ports		      [1, 1]
	      Position		      [95, 272, 140, 288]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "7"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "b8"
	      SID		      "7176"
	      Ports		      [1, 1]
	      Position		      [95, 307, 140, 323]
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Slice"
	      SourceType	      "Xilinx Bit Slice Extractor Block"
	      infoedit		      "Extracts a given range of bits from each input sample and presents it at the output.  The outp"
	      "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
	      "><br>Hardware notes: In hardware this block costs nothing."
	      nbits		      "1"
	      boolean_output	      off
	      mode		      "Lower Bit Location + Width"
	      bit1		      "0"
	      base1		      "MSB of Input"
	      bit0		      "8"
	      base0		      "LSB of Input"
	      dbl_ovrd		      off
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "slice"
	      sg_icon_stat	      "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1"
	      "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 "
	      "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],["
	      "1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool1"
	      SID		      "5304"
	      Ports		      [1, 1]
	      Position		      [160, 61, 200, 79]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool10"
	      SID		      "5312"
	      Ports		      [1, 1]
	      Position		      [160, 586, 200, 604]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool11"
	      SID		      "5313"
	      Ports		      [1, 1]
	      Position		      [160, 621, 200, 639]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool12"
	      SID		      "5314"
	      Ports		      [1, 1]
	      Position		      [160, 656, 200, 674]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool13"
	      SID		      "5315"
	      Ports		      [1, 1]
	      Position		      [160, 691, 200, 709]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool14"
	      SID		      "5316"
	      Ports		      [1, 1]
	      Position		      [160, 726, 200, 744]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool15"
	      SID		      "5317"
	      Ports		      [1, 1]
	      Position		      [160, 761, 200, 779]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool16"
	      SID		      "5318"
	      Ports		      [1, 1]
	      Position		      [160, 796, 200, 814]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool17"
	      SID		      "7177"
	      Ports		      [1, 1]
	      Position		      [160, 306, 200, 324]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool18"
	      SID		      "7180"
	      Ports		      [1, 1]
	      Position		      [160, 831, 200, 849]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool2"
	      SID		      "5303"
	      Ports		      [1, 1]
	      Position		      [160, 26, 200, 44]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool3"
	      SID		      "5305"
	      Ports		      [1, 1]
	      Position		      [160, 96, 200, 114]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool4"
	      SID		      "5306"
	      Ports		      [1, 1]
	      Position		      [160, 131, 200, 149]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool5"
	      SID		      "5307"
	      Ports		      [1, 1]
	      Position		      [160, 166, 200, 184]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool6"
	      SID		      "5308"
	      Ports		      [1, 1]
	      Position		      [160, 201, 200, 219]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool7"
	      SID		      "5309"
	      Ports		      [1, 1]
	      Position		      [160, 236, 200, 254]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool8"
	      SID		      "5310"
	      Ports		      [1, 1]
	      Position		      [160, 271, 200, 289]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "bool9"
	      SID		      "5311"
	      Ports		      [1, 1]
	      Position		      [160, 551, 200, 569]
	      ShowName		      off
	      LibraryVersion	      "1.2"
	      SourceBlock	      "xbsIndex_r4/Convert"
	      SourceType	      "Xilinx Type Converter Block"
	      infoedit		      "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do"
	      " not."
	      gui_display_data_type   "Boolean"
	      arith_type	      "Boolean"
	      n_bits		      "16"
	      bin_pt		      "14"
	      float_type	      "Single"
	      exp_bits		      "8"
	      fraction_bits	      "24"
	      quantization	      "Truncate"
	      overflow		      "Wrap"
	      en		      off
	      latency		      "0"
	      dbl_ovrd		      off
	      pipeline		      off
	      xl_use_area	      off
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "convert"
	      sg_icon_stat	      "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0"
	      ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1"
	      "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 "
	      "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],["
	      "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94"
	      "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black"
	      "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 0"
	      SID		      "5022"
	      Position		      [230, 28, 260, 42]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 1"
	      SID		      "5036"
	      Position		      [230, 63, 260, 77]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 2"
	      SID		      "5039"
	      Position		      [230, 98, 260, 112]
	      Port		      "3"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 3"
	      SID		      "5040"
	      Position		      [230, 133, 260, 147]
	      Port		      "4"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 4"
	      SID		      "5045"
	      Position		      [230, 168, 260, 182]
	      Port		      "5"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 5"
	      SID		      "5046"
	      Position		      [230, 203, 260, 217]
	      Port		      "6"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 6"
	      SID		      "5047"
	      Position		      [230, 238, 260, 252]
	      Port		      "7"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 7"
	      SID		      "5048"
	      Position		      [230, 273, 260, 287]
	      Port		      "8"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "AND 8"
	      SID		      "7178"
	      Position		      [230, 308, 260, 322]
	      Port		      "9"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 0"
	      SID		      "5050"
	      Position		      [230, 553, 260, 567]
	      Port		      "10"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 1"
	      SID		      "5059"
	      Position		      [230, 588, 260, 602]
	      Port		      "11"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 2"
	      SID		      "5060"
	      Position		      [230, 623, 260, 637]
	      Port		      "12"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 3"
	      SID		      "5061"
	      Position		      [230, 658, 260, 672]
	      Port		      "13"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 4"
	      SID		      "5062"
	      Position		      [230, 693, 260, 707]
	      Port		      "14"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 5"
	      SID		      "5063"
	      Position		      [230, 728, 260, 742]
	      Port		      "15"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 6"
	      SID		      "5064"
	      Position		      [230, 763, 260, 777]
	      Port		      "16"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 7"
	      SID		      "5068"
	      Position		      [230, 798, 260, 812]
	      Port		      "17"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "OR 8"
	      SID		      "7181"
	      Position		      [230, 833, 260, 847]
	      Port		      "18"
	      IconDisplay	      "Port number"
	    }
	    Line {
	      SrcBlock		      "32b"
	      SrcPort		      1
	      Points		      [15, 0]
	      Branch {
		DstBlock		"b0"
		DstPort			1
	      }
	      Branch {
		Points			[0, 35]
		Branch {
		  DstBlock		  "b1"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, 35]
		  Branch {
		    DstBlock		    "b2"
		    DstPort		    1
		  }
		  Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b3"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b4"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b5"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b6"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b7"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    Points		    [0, 245]
		    Branch {
		    DstBlock		    "b16"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b17"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b18"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b19"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b20"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b21"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b22"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    Branch {
		    DstBlock		    "b23"
		    DstPort		    1
		    }
		    Branch {
		    Points		    [0, 35]
		    DstBlock		    "b24"
		    DstPort		    1
		    }
		    }
		    }
		    }
		    }
		    }
		    }
		    }
		    }
		    Branch {
		    DstBlock		    "b8"
		    DstPort		    1
		    }
		    }
		    }
		    }
		    }
		    }
		  }
		}
	      }
	    }
	    Line {
	      SrcBlock		      "b0"
	      SrcPort		      1
	      DstBlock		      "bool2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b1"
	      SrcPort		      1
	      DstBlock		      "bool1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b2"
	      SrcPort		      1
	      DstBlock		      "bool3"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b3"
	      SrcPort		      1
	      DstBlock		      "bool4"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b4"
	      SrcPort		      1
	      DstBlock		      "bool5"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b5"
	      SrcPort		      1
	      DstBlock		      "bool6"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b6"
	      SrcPort		      1
	      DstBlock		      "bool7"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b7"
	      SrcPort		      1
	      DstBlock		      "bool8"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b16"
	      SrcPort		      1
	      DstBlock		      "bool9"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b17"
	      SrcPort		      1
	      DstBlock		      "bool10"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b18"
	      SrcPort		      1
	      DstBlock		      "bool11"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b19"
	      SrcPort		      1
	      DstBlock		      "bool12"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b20"
	      SrcPort		      1
	      DstBlock		      "bool13"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b21"
	      SrcPort		      1
	      DstBlock		      "bool14"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b22"
	      SrcPort		      1
	      DstBlock		      "bool15"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "b23"
	      SrcPort		      1
	      DstBlock		      "bool16"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "bool2"
	      SrcPort		      1
	      DstBlock		      "AND 0"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "bool1"
	      SrcPort		      1
	      DstBlock		      "AND 1"
	      DstPort		      1