Changes between Version 86 and Version 87 of 802.11/Changelog


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Timestamp:
Oct 24, 2014, 4:38:29 PM (5 years ago)
Author:
murphpo
Comment:

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  • 802.11/Changelog

    v86 v87  
    1313
    1414'''PHY/MAC Hardware Changes:'''
    15  * Updated w3_clock_controller to [browser:/PlatformSupport/CustomPeripherals/pcores/w3_clock_controller_axi_v3_01_b version 3.01.b]
    1615 * Increased maximum number of backoff slots to 65k (was 2047 in previous releases)
    1716 * Reduced the size of the Tx and Rx packet buffers. There are now 8 4KB Tx buffers and 8 4KB Rx buffers (previously 16 each). The reference code only uses 3 Tx buffers; the remaining Tx buffers are free for customizations. The reference code cycles through all Rx buffers, though only 2 contain unprocessed packets at any given (assuming CPU High keeps pace with receptions by CPU Low).
     17 * Updated w3_clock_controller to [browser:/PlatformSupport/CustomPeripherals/pcores/w3_clock_controller_axi_v3_01_b version 3.01.b]
    1818 * Cleaned Tx and Rx PHY init scripts. Updated Tx init script simplifies creation of new waveform files for Rx simulation.
    1919 * Added new waveform files for simulating the Rx PHY (in [browser:/ReferenceDesigns/w3_802.11/sysgen/wlan_phy_rx_pmd/rx_sigs /wlan_phy_rx_pmd/rx_sigs]). Each waveform represents a valid 802.11 frame with various packet contents and modulation/coding rates.