Changes between Version 43 and Version 44 of 802.11/ResourceUsage
- Timestamp:
- Apr 27, 2018, 11:05:49 AM (6 years ago)
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802.11/ResourceUsage
v43 v44 5 5 [[TracNav(802.11/TOC)]] 6 6 7 = 802.11 Reference Design v1.7. 5: Resource Usage =7 = 802.11 Reference Design v1.7.6: Resource Usage = 8 8 9 9 The 802.11 Reference Design targets the Virtex-6 LX240T FPGA on WARP v3 hardware. The FPGA resources used by the design change with each revision. The resource usage for the current release is listed below. … … 13 13 14 14 ||= Resource =||= Used =|| 15 || Slice Registers || 80,59 0out of 301,440 (26%) ||16 || LUTs || 69,847 out of 150,720 (46%) ||15 || Slice Registers || 80,597 out of 301,440 (26%) || 16 || LUTs || 71,768 out of 150,720 (47%) || 17 17 || Block RAMs (see note 1) || 272 of 416 (65%) || 18 18 || DSP48 (multipliers) || 194 of 768 (23%) || … … 48 48 Number of warnings: 354 49 49 Slice Logic Utilization: 50 Number of Slice Registers: 80,59 0out of 301,440 26%51 Number used as Flip Flops: 80,4 2850 Number of Slice Registers: 80,597 out of 301,440 26% 51 Number used as Flip Flops: 80,435 52 52 Number used as Latches: 4 53 53 Number used as Latch-thrus: 0 54 54 Number used as AND/OR logics: 158 55 Number of Slice LUTs: 69,847 out of 150,720 46%56 Number used as logic: 57,5 21out of 150,720 38%57 Number using O6 output only: 43,4 6358 Number using O5 output only: 1,5 3659 Number using O5 and O6: 12,5 2255 Number of Slice LUTs: 71,768 out of 150,720 47% 56 Number used as logic: 57,549 out of 150,720 38% 57 Number using O6 output only: 43,489 58 Number using O5 output only: 1,544 59 Number using O5 and O6: 12,516 60 60 Number used as ROM: 0 61 Number used as Memory: 8,3 48out of 58,400 14%61 Number used as Memory: 8,350 out of 58,400 14% 62 62 Number used as Dual Port RAM: 2,522 63 63 Number using O6 output only: 1,546 … … 68 68 Number using O5 output only: 0 69 69 Number using O5 and O6: 12 70 Number used as Shift Register: 5,79 571 Number using O6 output only: 5,0 7772 Number using O5 output only: 2073 Number using O5 and O6: 69 874 Number used exclusively as route-thrus: 3,97875 Number with same-slice register load: 3,01376 Number with same-slice carry load: 48977 Number with other load: 47 670 Number used as Shift Register: 5,797 71 Number using O6 output only: 5,085 72 Number using O5 output only: 17 73 Number using O5 and O6: 695 74 Number used exclusively as route-thrus: 5,869 75 Number with same-slice register load: 4,887 76 Number with same-slice carry load: 504 77 Number with other load: 478 78 78 79 79 Slice Logic Distribution: 80 Number of occupied Slices: 30,018 out of 37,680 79%81 Number of LUT Flip Flop pairs used: 9 3,25882 Number with an unused Flip Flop: 22, 164 out of 93,258 23%83 Number with an unused LUT: 23,411 out of 93,258 25%84 Number of fully used LUT-FF pairs: 4 7,683 out of 93,258 51%85 Number of unique control sets: 2,8 4780 Number of occupied Slices: 28,383 out of 37,680 75% 81 Number of LUT Flip Flop pairs used: 90,842 82 Number with an unused Flip Flop: 22,064 out of 90,842 24% 83 Number with an unused LUT: 19,074 out of 90,842 20% 84 Number of fully used LUT-FF pairs: 49,704 out of 90,842 54% 85 Number of unique control sets: 2,861 86 86 Number of slice register sites lost 87 to control set restrictions: 10,6 33out of 301,440 3%87 to control set restrictions: 10,651 out of 301,440 3% 88 88 89 89 A LUT Flip Flop pair for this architecture represents one LUT paired with
