Changes between Version 7 and Version 8 of DaughtercardSpec

Timestamp:

Feb 10, 2007, 10:01:22 PM (17 years ago)

Author:

murphpo

Comment:

--

DaughtercardSpec

@@ -7 +7 @@
 Each daughtercard slot consists of two 80-pin connectors on the FPGA board. 124 pins are routed to dedicated I/O on the FPGA. The remaining 36 signals are used for power and ground connections. On the Virtex-II Pro WARP FPGA board, each daughtercard slot is routed to a dedicated I/O bank on the FPGA. These I/O banks are configured for 3.3v single-eneded I/O and support 50Ω digitallly controlled impedence. The 36 power pins are split between ground (20 pins), +5v (12 pins) and -5v (4 pins). The ground pins are connected directly to the ground planes on the FPGA board. The +5v pins are connected to a dedicated 18A switching supply on the FPGA board. The -5v pins are connected to a header on the FPGA board which can be populated with an isolated supply when needed. The power pins on the four daughtercard slots are all connected together on the FPGA board.
 
-See the [source:"/Hardware/FPGA Board" WARP FPGA Board Schematics] for the actual circuits implemented on the FPGA board.
+See the [source:"/Hardware/FPGA_Board" WARP FPGA Board Schematics] for the actual circuits implemented on the FPGA board.
 
 === Schematic ===