Changes between Version 25 and Version 26 of Exercises/13_4/IntroToXPS

Timestamp:

Aug 20, 2012, 2:21:25 PM (12 years ago)

Author:

chunter

Comment:

--

Exercises/13_4/IntroToXPS

@@ -65 +65 @@
 }}}
 
-This chunk of code will instantiate the prng_useriosrc core in the design.
+This chunk of code will instantiate the prng_useriosrc core in the design and attaches it to the bus (here, the plb_secondary_80MHz bus). Additionally, it attaches the input/output ports of core to some unique net names (LeftHexDisplay, RightHexDisplay, GreenLEDs, RedLEDs, and UpPushbutton). These net names are arbitrary; the important thing is that the names match on the corresponding ports to whatever the core is connected to.
 
+7. Find the chunk of code that starts with "BEGIN w3_userio." Before the "END" line, add the following port connections:
+
+{{{
+ PORT usr_hexdisp_left = LeftHexDisplay
+ PORT usr_hexdisp_right = RightHexDisplay
+ PORT usr_leds_green = GreenLEDs
+ PORT usr_leds_red = RedLEDs
+ PORT usr_pb_u = UpPushbutton
+}}}
+
+This connects the ports from the prng_useriosrc_plbw to the appropriate ports on the User I/O core. At this point, you may wonder how you are supposed to know the names of ports themselves. Unfortunately, ports that are floating (i.e. disconnected) do not show up in the system.mhs file. The best way to find a full list of all ports a pcore has is by looking at its entry in the "System Assembly View" tab. In the next step, we'll be looking at this view to verify that the prng_useriosrc pcore is correctly hooked up to the system.
+
+8. 
 
 == Testing the Design ==