= Getting Started with WARP v1 and v2= Welcome to WARP. We have several resources for new users. * [wiki:Tools Tools] - Installation of tools needed for development on WARP * [wiki:repositoryAccess Repository Access] - Learn about the open-access repository * [source:/ Repository] - Browse the repository itself * [wiki:SupportResources Support Resources] - Links to more resources relating to WARP support == Exercises == We have designed the exercises below to introduce the Xilinx tools we use for building designs on WARP v2. We recommend working through the exercises in order. '''[wiki:Exercises/13_4/IntroToSDK/w2 Introduction to the Software Development Kit:]''' This is the classic "hello world" project for WARP v2 using the Xilinx SDK. This exercise show: * How to create a Xilinx SDK workspace and import existing hardware, bsp and software projects * How to update C code and compile the software project * How to download and execute a software project on WARP v2 '''[wiki:Exercises/13_4/IntroToXPS/w2 Introduction to Xilinx Platform Studio:]''' This exercise introduces Xilinx Platform Studio (XPS). This exercise shows: * How to open and navigate one of the WARP v2 template projects * How to instantiate a custom peripheral core in XPS * How to access the custom core's registers from a software project in the SDK '''[wiki:Exercises/13_4/SysGenExport Exporting a Peripheral Core from System Generator:]''' In this exercise, you will create a custom peripheral using Xilinx System Generator (an FPGA design tool integrated with MATLAB/Simulink). This custom peripheral can then be used in an XPS project, using the procedure introduced in the XPS Intro exercise above. == Reference Designs == Once you're comfortable with the design flows introduced by the exercises above, we recommend getting started with one of our reference designs. * [wiki:WARPLab WARPLab]: A framework for rapid prototyping of physical layer algorithms in MATLAB, using real signals transmitted/received via WARP hardware. * [wiki:OFDMReferenceDesign OFDM Reference Design]: Implements an OFDM physical layer transceiver and CSMA MAC protocol, both of which operate in real-time in the FPGA {{{ #!div class=important style="border: 1pt solid; text-align: center;" '''WARP Hardware is sensitive to Electrostatic Discharge (ESD)! Use proper ESD prevention measures when using WARP Hardware.''' '''End user assumes all repair costs incurred as a result of electrostatic discharge.''' }}}