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= CM-PLL Clock Module: Configuration =

The CM-PLL board includes a 6-position DIP switch to configure various functions.

== Reference Clock Source ==

Switches 2 and 3 control the reference clock mux:

||= Switches =||= Configuration =||
|| [[Image(wiki:HardwareUsersGuides/CM-PLL/files:dipsw_refclk_00.png, nolink)]] || Selects the '''MMCX Jack''' reference clock input. Use this configuration when driving the reference clock from external equipment or from a CM-MMCX clock module on another WARP v3 kit. ||
|| [[Image(wiki:HardwareUsersGuides/CM-PLL/files:dipsw_refclk_01.png, nolink)]] || Selects the '''External Header''' reference clock input. Use this configuration when driving the reference clock from another CM-PLL clock module on another WARP v3 kit via the board-to-board headers. ||
|| [[Image(wiki:HardwareUsersGuides/CM-PLL/files:dipsw_refclk_10.png, nolink)]] || Selects the '''Local WARP v3 Oscillator''' reference clock input. Use this configuration when no external reference clock is required. This configuration should be used at the first node in a daisy chain of WARP v3 kits with CM-PLL modules. ||