Changes between Version 2 and Version 3 of HardwareUsersGuides/FMC-RF-2X245/Clocking
- Timestamp:
- Dec 11, 2012, 2:50:03 PM (11 years ago)
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HardwareUsersGuides/FMC-RF-2X245/Clocking
v2 v3 42 42 43 43 The divider for OUT0/OUT1 can be configured to 1, 2 or 4 via the DIP switch: 44 ||= Divider =||= SW ~[x] =||= SW![y]=||44 ||= Divider =||= SW1.x =||= SW1.y =|| 45 45 || 1 || x || x || 46 46 || 2 || x || x || … … 48 48 49 49 The output to the FMC header (OUT2) can be en/disabled via the DIP switch: 50 ||= OUT2 =||= SW [x]=||50 ||= OUT2 =||= SW1.x =|| 51 51 || Off || x || 52 52 || On || x || … … 59 59 The divider should be chosen to comply with the MAX2829 reference clock frequency requirements. Typically the MAX2829 requires a 20MHz or 40MHz reference clock input. 60 60 61 ||= Divider =||= SW [1] =||= SW[2]=||61 ||= Divider =||= SW1.1 =||= SW1.2 =|| 62 62 || 1 || x || x || 63 63 || 2 || x || x ||
