Changes between Initial Version and Version 1 of HardwareUsersGuides/FPGABoard_v1.2/FPGAConfig


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Timestamp:
Feb 25, 2007, 12:19:08 AM (17 years ago)
Author:
murphpo
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  • HardwareUsersGuides/FPGABoard_v1.2/FPGAConfig

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     1[[TracNav(HardwareUsersGuides/FPGABoard_v1.2/TOC)]]
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     3[[Image(wiki:HardwareUsersGuides/FPGABoard_v1.2/Images:FPGA_Board_Configuration.jpg, align=right)]]
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     5== WARP FPGA FPGA Configuration Options ==
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     7=== USB Configuration ===
     8The easiest way to configure the FPGA is to use the on-board USB configuration circuit. This circuit emulates a Xilinx Platform USB Cable, the drivers for which are included with Xilinx ISE 8.2 and newer. To use this interface, connect the WARP FPGA Board's USB port directly to your PC using a standard USB cable. The first time you connect a board to your PC, Windows will prompt you to search for and install drivers. Allow Windows to complete this process before attempting to configure the FPGA.
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     10The WARP FPGA board's USB connector is on the back of the board and is highlighted in the image above.
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     12=== External JTAG Cable ===
     13Some PCs do not support the USB configuration circuit on the FPGA board. Windows Server 2003, for example, is incompatible with Xilinx's USB drivers. In these situations, you can configure the FPGA using an external Xiilnx JTAG cable. The WARP FPGA board has a standard JTAG connector which is compatible with both the Xilinx [http://www.xilinx.com/bvdocs/publications/ds097.pdf Parallel IV] and [http://direct.xilinx.com/bvdocs/publications/ds300.pdf Platform USB] cables.
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     15The WARP FPGA board's JTAG connector is on the back of the board and is highlighted in the image above. On the board this connector component J51 labaled 'SysACE'. There is a second, identical connector (J49) on the board used to configure a CPLD in the USB configuration circuit. Do not use this connector.
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     17=== SystemACE !CompactFlash ===
     18The WARP FPGA board also includes Xilinx's SystemACE !CompactFlash chip for managing the configuration process of the FPGA. The SystemACE chip acts as an interface between the FPGA and a standard !CompactFlash slot. The SystemACE automatically configures the FPGA on powerup or when the manual reset button is pushed. Multiple configuration files can be stored on the CF card. The SystemACE chip reads a 3-bit address from a DIP switch  to choose one of eight configuration files. The fourth position on the DIP switch, labeled CFGMODE, should generally be set to 1 (slid to the right).
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     20=== Other References ===
     21 * [http://www.xilinx.com/bvdocs/publications/ds080.pdf Xilinx SystemACE CF datasheet]
     22 * [wiki:FAQ/Hardware#HowdoIformatCompactFlashcardsforusewiththeSystemACEcontroller WARP FAQ]: How to format !CompactFlash cards
     23 * [source:/Hardware/FPGA_Board/Rev1.2/Schematics_FPGABoard_1.2.pdf WARP FPGA Board Schematics] (pgs. 7 and 14)