== WARP FPGA Board Multi-Gigabit Transceivers ==
[[TracNav(HardwareUsersGuides/FPGABoard_v1.2/TOC)]]

[[Image(HardwareUsersGuides/FPGABoard_v1.2/Images:FPGA_Board_MGTs.jpg)]]

=== VTRX Configuration ===
Short bottom pins for 2.5v (required for WARP board-to-board links), top pins for 1.8v (for connections to AC-coupled transmitters).

[[Image(HardwareUsersGuides/FPGABoard_v1.2/Images:FPGA_Board_MGTVTRX.jpg)]]

=== Clocking ===

Left-oscillator connects to BREFCLK, right-oscillator connects to BREFCLK2, mount shunts to disable oscillators

[[Image(HardwareUsersGuides/FPGABoard_v1.2/Images:FPGA_Board_MGTCLK1.jpg)]]

[[Image(HardwareUsersGuides/FPGABoard_v1.2/Images:FPGA_Board_MGTCLK2.jpg)]]

=== Cables ===
[http://www.molex.com/cgi-bin/bv/molex/jsp/products/datasheet.jsp?productid=83666 Molex HSSDC2 Jack]
[[BR]]
[http://www.molex.com/cgi-bin/bv/molex/jsp/products/datasheet.jsp?productid=35277 Molex HSDDC2 Cables]