[[TracNav(HardwareUsersGuides/FPGABoard_v2.2/TOC)]]

== WARP FPGA Board Memory Resources ==

=== On-Chip Memory ===
The V4 FX100 FPGA provides 376 18kb RAM blocks (6.7Mb total). Logic slices can also be used as RAM (what XIlinx calls ''distributed memory''); the FX100 provides up to 659kb of distributed memory.

=== DDR2 SO-DIMM ===
The WARP FPGA Board v2.2 includes a DDR2 SO-DIMM slot. This connector is routed to dedicated FPGA I/O and clocking resources and supports up to 2GB modules.

In order to use a SO-DIMM, the user FPGA design must include a DDR2 memory controller. Thankfully, Xilinx provides (and maintains) a high performance controller as part of their Multi-Port Memory Controller (MPMC).

[[Image(HardwareUsersGuides/FPGABoard_v1.2/Images:FPGA_Board_SRAM.jpg, align=right)]]


=== More Resources ===
 * [http://www.xilinx.com/products/ipcenter/mpmc.htm Xilinx MPMC IP]
 * [http://www.xilinx.com/support/documentation/ip_documentation/mpmc.pdf Xilinx MPMC Datasheet]