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== WARP Radio Board Antenna Ports ==

[[Image(HardwareUsersGuides/RadioBoard_v1.4/Images:Radio_Board_AntPorts.jpg, 500)]]

The radio board has two antenna ports. Both are fitted with SMA jacks (standard polarity female connectors). The two ports are connected to a DPDT RF switch. The other side of the switch is connected to the transmit and receive paths leading back to the RF transceiver. The antenna switch is controlled by a 2-bit digital signal, driven by the FPGA. The switch has two valid states, illustrated below.

|| '''AntSw![1:0] = [1 0]''' ||  '''AntSw![1:0] = [0 1]''' || 
|| [[Image(HardwareUsersGuides/RadioBoard_v1.4/Images:Radio_Board_AntPorts_State0.jpg, 300)]] || [[Image(HardwareUsersGuides/RadioBoard_v1.4/Images:Radio_Board_AntPorts_State1.jpg, 300)]] ||

In the default configuration, Port 1 is used for both transmit and receive and Port 2 is unused. This configuration requires the antenna switch's state be changed every time the radio changes between receive and transmit modes. This behavior is implemented in the radio controller driver and hardware ([source:/PlatformSupport/CustomPeripherals/pcores/radio_controller_v1_30_a/hdl/verilog/user_logic.v#L392 user_logic.v] and [source:/PlatformSupport/CustomPeripherals/pcores/radio_controller_v1_30_a/src/radio_controller_basic.c#L112 radio_controller_basic.c]).