Changes between Version 9 and Version 10 of HardwareUsersGuides/RadioBoard_v1.4/Usage/TxDCOffset
- Timestamp:
- Apr 10, 2007, 1:55:49 PM (17 years ago)
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HardwareUsersGuides/RadioBoard_v1.4/Usage/TxDCOffset
v9 v10 11 11 The residual DC offset due to component variations can be estimated using a special calibration mode of the radio board. During calibration, the algorithm estimates DC offsets for the I and Q channels on a given radio board. These values are then stored to the radio board's EEPROM. Once stored, the DC calibration values can be read by user applications each time the board is used. 12 12 13 The calibration algorithm is not publically available. However, we do distribute an FPGA configuration file which executes the calibration process automatically. 13 ==== EEPROM Initialization ==== 14 14 15 1. Download a copy of this configuraiton file - [attachment:wiki:HardwareUsersGuides/RadioBoard_v1.4/Usage/TxDCOffset/Files:TxDCO_Calibrate.bit?format=raw TxDCO_Calibrate.bit] 15 Before performing this calibration process, the EEPROM on your radio board must be initialized. This process only needs to be completed once and is something we generally complete before shipping boards. Follow these steps to check your EEPROM: 16 17 1. Downoad this configuration file: [attachment:wiki:HardwareUsersGuides/RadioBoard_v1.4/Usage/TxDCOffset/Files:EEPROM_Initialize.bit?format=raw EEPROM_Initialize.bit] 18 1. Connect a serial cable to the FPGA board and set your terminal emulator to 57600bps 19 1. Power on the FPGA board 20 1. Configure the FPGA using EEPROM_Initialize.bit 21 1. Follow the directions printed on your terminal to initialize your radio board's EEPROM 22 23 ==== Radio Calibration ==== 24 25 The Tx DCO calibration algorithm is not publically available. However, we do distribute an FPGA configuration file which executes the calibration process automatically. 26 27 1. Download a copy of this configuraiton file: [attachment:wiki:HardwareUsersGuides/RadioBoard_v1.4/Usage/TxDCOffset/Files:TxDCO_Calibrate.bit?format=raw TxDCO_Calibrate.bit] 16 28 1. Use the DIP switch on the WARP FPGA Board to select which radios should be calibrated. Each switch position corresponds to a radio. The LSB (Radio !#1) is the bottom switch; MSB (Radio !#4) is the top. 17 29 1. Connect a serial cable to the FPGA board and set your terminal emulator to 57600bps … … 20 32 1. The terminal will display the status as it runs. Wait for the calibration of each radio to complete. 21 33 34 Here's what the terminal output should look like. This example calibrated just radio #2. 22 35 {{{ 23 36 *************Tx DC Offset Calibration*************