Changes between Version 8 and Version 9 of HardwareUsersGuides/WARPv3/RF
- Timestamp:
- Dec 11, 2012, 11:39:23 AM (11 years ago)
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HardwareUsersGuides/WARPv3/RF
v8 v9 50 50 51 51 === Clocking === 52 The clocking configuration of the AD9963 is flexible and, as a result, complicated. There are t o main clock domains in the AD9963: data clocks, connected to the FPGA, and converter clocks, used by the ADC/DAC cores.52 The clocking configuration of the AD9963 is flexible and, as a result, complicated. There are two main clock domains in the AD9963: data clocks, connected to the FPGA, and converter clocks, used by the ADC/DAC cores. 53 53 54 54 The converter clocks are illustrated below.
