Changes between Version 1 and Version 2 of Interrupt Reference Design


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Timestamp:
Jan 26, 2007, 12:33:54 PM (17 years ago)
Author:
chunter
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  • Interrupt Reference Design

    v1 v2  
    11= Description =
    2 The ACKMAC is a modified ALOHA MAC that serves as the framework for all other MACs. In this scheme, nodes have no knowledge of any other nodes; there is no carrier sensing (CSMA/CA), and there is no request-to-send/clear-to-send (RTS/CTS). Instead, nodes transmit whenever they have information to transmit, and only move on to the next packet once the original transmit is acknowledged (ACKed). If no ACK is received, a collision is inferred and the packet is re-transmitted.
     2The [source:/Documentation/ReferenceDesigns/InterruptRef_xps_8_2 interrupt reference design] serves as an example of the proper way to handle multiple interrupts with a PowerPC. The base system is configured as shown by the figure on the right.
    33
    4 This behavioral description can be transformed to a state-machine, which in turn can be transformed to C-code.
     4[[Image(interrupt_system_diagram.jpg, align=right, 300)]]
    55
    6 [[Image(ALOHAflowchart.jpg, align=center, 600)]]
    7 
    8 We bridge that state machine to a source and a sink (ethernet and OFDM physical layer respectively for a transmitter, and vice versa for a receiver). In that way, we have a project that creates a virtual wire between two WARP nodes. Any ethernet and higher layer traffic will be forwarded across the wireless medium.
     6When executed, the code will periodically start a timer. By default, this timer will expire every 6 seconds. Before the timer expires, the user can depress push buttons and see confirmation of those interrupt events on a terminal connected to the board via the RS232 serial port. Upon the expiration of the timer, the [source:/Documentation/ReferenceDesigns/InterruptRef_xps_8_2/src/interruptTester.c@485#L85 timer_a_int_handler] ISR is called by the interrupt controller driver. In this ISR, the program will block for three seconds. This effectively simulates a long operation. During this time, users will not be able to trigger interrupts with push buttons. When the ISR returns, push buttons become operation again. Pressing the left button will disable the periodic timer at the interrupt controller level (i.e. the timer itself is still generating interrupt signals). Pressing the right button will re-enable the interrupts, returning the system to its normal state.
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    108Note: Further detail regarding the interrupt system can be found in [http://direct.xilinx.com/bvdocs/appnotes/xapp778.pdf XAPP778]
    … …  
    1210= Code =
    1311
    14 Latest Revision: [source:/ResearchApps/MAC/ACKMAC/ackmac.c@L ackmac.c], [source:/PlatformSupport/WARPMAC/warpmac.c@L warpmac.c], [source:/PlatformSupport/WARPMAC/warpmac.h@L warpmac.h]
    15 
    16 Note: This code relies on many external dependencies and will not compile on traditional architectures.
    17 
    18 = Documentation =
    19 
    20 To be released soon.
     12Latest Revision: [source:/Documentation/ReferenceDesigns/InterruptRef_xps_8_2/src/interruptTester.c@L interruptTester.c]