Changes between Version 46 and Version 47 of WARPLab/Downloads


Ignore:
Timestamp:
Jul 10, 2013, 10:52:17 PM (11 years ago)
Author:
murphpo
Comment:

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  • WARPLab/Downloads

    v46 v47  
    1717   * Updated Ethernet A interface from AXI FIFO to AXI DMA
    1818 * Updated [wiki:WARPLab/FPGAArchitecture/WARPLAB_7_2_0 FPGA HW design]
    19    * Added support for 1GB of DDR to reference design
     19   * Added axi_v6_ddrx core to WARP v3 ref design for access to DDR3 SO-DIMM (limited to 1GB address space)
    2020   * Updated bus architecture to improve performance
    2121 * Updated Trigger Manager to reduce input delay jitter.  '''Adds 1 additional cycle of latency to all Trigger Manager debug inputs.'''
    22    * Updated [wiki:WARPlab/Examples/8x2Array 8x2 Multi-node Array] example to reflect additional latency
     22   * Updated [wiki:../Examples/8x2Array 8x2 Multi-node Array] example to reflect additional latency
    2323 * Added additional mode to wl_ver:
    2424   * Ability to pass a string as an argument to wl_ver.  Will issue a warning if the current framework is newer than the version.  Will issue an error if the current framework is older than the version.