wiki:WARPLab/Downloads

Version 36 (modified by murphpo, 11 years ago) (diff)

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Downloads

Download Latest Reference Design: WARPLab_Reference_Design_7.1.0.zip

Release Details:

Hardware Release Date Posted SVN Rev. ISE Ver. Arch MATLAB Ver. RF Interface Support
WARP v3 7.1.0 6-May-2013 2033 14.4 MB/AXI 2009b or later 1-2: WARP v3 on-board interfaces
3-4: Requires FMC-RF-2X245
WARP v2 7.1.0 6-May-2013 2033 14.4 PPC/PLB 2009b or later 1-2: Radios in slots 2 & 3
3-4: Radios in slots 1 & 4

What's New in v7.1.0:

  • Added new trigger processor core to handle a variety of kinds of triggers: Ethernet, External Port, Energy Detection
  • Added support for text file configuration of node IDs based on serial number. This configuration option is a replacement of the usual DIP switch configuration (more info)
  • Added support for WARP v2 hardware

View full change log.


What's in the Reference Design archive?

Bitstreams_Reference

Bitstreams are fully-built designs that are ready to be downloaded onto WARP hardware. Files ending with the extension '.bit' may be downloaded using the Xilinx tool iMPACT. Files ending with the extension .bin may loaded onto an SD card so that the board will automatically be programmed whenever it is powered on and has the SD card inserted. Details on how to configure an SD card with a '.bin' file are provided here.

  • w3: WARP v3 FPGA bitstreams (see SD config howto for help using the .bin file)
  • w2: WARP v2 FPGA bitstreams

EDK_Projects

This folder contains EDK projects for various hardware configurations. The WARPLab FPGA design is built with the Xilinx Embedded Development Kit (EDK) software. The hardware design is constructed and implemented in EDK Xilinx Platform Studio (XPS). The software design, running in the MicroBlaze processor, is built in the Xilinx SDK. Opening these EDK projects requires a copy of the WARP edk_user_repository at the SVN revision in the table above.

If you want to use (but not modify) the reference FPGA design, you only need a bitstream and the reference M code. If you want to modify the MicroBlaze C code, you can download an EDK project in this folder, but only modify the SDK project contained therein. To modify the FPGA hardware design, you will need to modify the XPS project. The WARPLab FPGA design uses custom peripherals designed in Xilinx System Generator, including the warplab_buffers core. You will need MATLAB, Simulink and System Generator to modify these cores.

Each of these EDK projects are a combination of an XPS project along with Eclipse software projects that can be imported into an SDK workspace. These software projects are present in the 'SDK_Workspace' subfolder of every XPS project -- we recommend using this folder as the location of the SDK Workspace. These projects can then be imported "in place" and will not need to be copied.

  • w3: WARP v3 EDK projects for the 2-radio (2RF) and 4-radio (4RF) WARPLab Reference Designs
  • w2: WARP v2 EDK projects for the 2-radio (2RF) and 4-radio (4RF) WARPLab Reference Designs

M_Code_Examples

This folder contains example WARPLab scripts that are compatible with this release of WARPLab. Explanations of these scripts are available here.

M_Code_Reference

This folder contains all of the supporting files needed for WARPLab to run on a host PC with MATLAB. When downloading a new Reference Design Release, users will need to run the wl_setup.m script in this folder.