Changes between Version 1 and Version 2 of WARPLab/FPGAArchitecture/WARPLAB_7_5_0


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Timestamp:
Mar 12, 2015, 5:18:34 PM (6 years ago)
Author:
welsh
Comment:

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  • WARPLab/FPGAArchitecture/WARPLAB_7_5_0

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    11[[TracNav(WARPLab/TOC)]]
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    3 = WARPLab 7.5.0 FPGA Architecture for WARP v3 Hardware =
     3= WARPLab 7.5.x FPGA Architecture for WARP v3 Hardware =
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    5 The WARPLab 7.5.0 design for WARP v3 makes changes to the underlying FPGA architecture in order to increase the buffer sizes for Read / Write IQ.  This includes:
     5The WARPLab 7.5.x design for WARP v3 makes changes to the underlying FPGA architecture in order to increase the buffer sizes for Read / Write IQ.  This includes:
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    77  * Updates to the WARPLab Buffers core to allow for larger Read / Write IQ indexing