Changes between Version 1 and Version 2 of WARPLab/FPGAArchitecture/WARPLAB_7_5_0
- Timestamp:
- Mar 12, 2015, 5:18:34 PM (9 years ago)
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WARPLab/FPGAArchitecture/WARPLAB_7_5_0
v1 v2 1 1 [[TracNav(WARPLab/TOC)]] 2 2 3 = WARPLab 7.5. 0FPGA Architecture for WARP v3 Hardware =3 = WARPLab 7.5.x FPGA Architecture for WARP v3 Hardware = 4 4 5 The WARPLab 7.5. 0design for WARP v3 makes changes to the underlying FPGA architecture in order to increase the buffer sizes for Read / Write IQ. This includes:5 The WARPLab 7.5.x design for WARP v3 makes changes to the underlying FPGA architecture in order to increase the buffer sizes for Read / Write IQ. This includes: 6 6 7 7 * Updates to the WARPLab Buffers core to allow for larger Read / Write IQ indexing