Changes between Version 7 and Version 8 of WARPLab/HardwareConfiguration/WARPv2


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Timestamp:
Mar 13, 2015, 11:33:05 AM (9 years ago)
Author:
welsh
Comment:

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  • WARPLab/HardwareConfiguration/WARPv2

    v7 v8  
    1313
    1414=== Debug Header ===
     15
     16''Updated for WARPLab 7.5.1'''
    1517
    1618The [wiki:HardwareUsersGuides/FPGABoard_v2.2/OtherIO#DigitalIO debug header] is configured by default to map to the following pins:
    … …  
    3739
    3840  * Only one Ethernet connection (Eth A) on the board
     41    * Please note that due to hardware limitations within Xilinx peripherals, WARP v2 only supports non-jumbo Ethernet frames up to 1514 bytes.