14 | | |
15 | | = Transport Commands Technical Reference = |
16 | | |
17 | | Transport commands are selected as string inputs to the {{{wl_transportCmd}}} method in [browser:ResearchApps/PHY/WARPLAB/WARPLab7/M_Code_Reference/classes/wl_node.m wl_node.m]. These strings are each individual cases of the switch statement in {{{procCmd}}} method of [browser:ResearchApps/PHY/WARPLAB/WARPLab7/M_Code_Reference/classes/wl_transport_eth_udp_java.m wl_transport_eth_udp_java.m] or [browser:ResearchApps/PHY/WARPLAB/WARPLab7/M_Code_Reference/classes/wl_transport_eth_udp_java.m wl_transport_eth_udp_pnet.m]. |
| 14 | = User Guide = |
| 15 | |
| 16 | == System Requirements == |
| 17 | * Review the [wiki:../../Requirements WARPLab 7 System Requirements] |
| 18 | |
| 19 | == Overview == |
| 20 | |
| 21 | The Trigger Manager was designed to allow flexible coordination and communication between nodes. Each trigger is assigned an ID and then all configuration of the trigger manager is based on these IDs. By default, WARPLab has the following triggers: |
| 22 | |
| 23 | * Input Triggers |
| 24 | * External Pins (For example: D0 - D3, pins 12 - 15 on the [wiki:WARPLab/HardwareConfiguration#DebugHeader debug header] in the WARPLab reference design) |
| 25 | * Ethernet Packets |
| 26 | * Register writes (used for WARP v2 compatibility) |
| 27 | * Input Energy |
| 28 | * Automatic Gain Control (AGC) Done |
| 29 | |
| 30 | [[Image(Trigger_Input_Configuration.png)]] |
| 31 | |
| 32 | '''NOTE:''' Each input has configuration options that can be found in the [wiki:WARPLab/Reference/Commands/TriggerManager Trigger Manager Command Reference]. |
| 33 | |
| 34 | |
| 35 | * Output Triggers |
| 36 | * External Pins (For example: D0 - D3, pins 8 - 11 on the [wiki:WARPLab/HardwareConfiguration#DebugHeader debug header] in the WARPLab reference design) |
| 37 | * Baseband |
| 38 | * Automatic Gain Control (AGC) Start |
| 39 | |
| 40 | [[Image(Trigger_Output_Configuration.png)]] |
| 41 | |
| 42 | '''NOTE:''' Each output can be based on a configurable set of inputs as well as a logical combination of inputs. The above diagram is replicated per trigger output, so that each one can have its own, independent configuration. |
| 43 | |
| 44 | |
| 45 | == Hardware Setup == |
| 46 | |
| 47 | The Trigger Manager consists of both a hardware block that runs within the FPGA and a [wiki:WARPLab/Reference/Commands/TriggerManager software framework] to configure and use the Trigger Manager. You can see the instantiation of the Trigger Manager block as well as the default connections within the system.mhs file: |
| 48 | |
| 49 | {{{ |
| 50 | # Default configuration of the Trigger Manager in system.mhs |
| 51 | |
| 52 | BEGIN w3_warplab_trigger_proc_axiw |
| 53 | PARAMETER INSTANCE = warplab_trigger_proc |
| 54 | PARAMETER HW_VER = 1.01.a |
| 55 | PARAMETER C_BASEADDR = 0x77800000 |
| 56 | PARAMETER C_HIGHADDR = 0x7780ffff |
| 57 | BUS_INTERFACE S_AXI = axi4lite_1 |
| 58 | BUS_INTERFACE AXI_STR_ETH_RXD = ETH_A_AXI_STR_RXD |
| 59 | PORT axi_aclk = clk_160MHz |
| 60 | PORT sysgen_clk = clk_160MHz |
| 61 | # Triggers |
| 62 | PORT agc_done_in = agc_is_done |
| 63 | PORT debug_0_in = trig_0_in |
| 64 | PORT debug_1_in = trig_1_in |
| 65 | PORT debug_2_in = trig_2_in |
| 66 | PORT debug_3_in = trig_3_in |
| 67 | PORT rfa_rssi = warplab_rfa_rssi |
| 68 | PORT rfb_rssi = warplab_rfb_rssi |
| 69 | PORT rfc_rssi = net_gnd |
| 70 | PORT rfd_rssi = net_gnd |
| 71 | PORT rssi_clk = warplab_rssi_clk |
| 72 | PORT trig_0_out = baseband_trigger |
| 73 | PORT trig_1_out = agc_start |
| 74 | PORT trig_2_out = trig_2_out |
| 75 | PORT trig_3_out = trig_3_out |
| 76 | PORT trig_4_out = trig_4_out |
| 77 | PORT trig_5_out = trig_5_out |
| 78 | END |
| 79 | }}} |
| 80 | |
| 81 | The ''trig_*_in'' and ''trig_*_out'' signals are connected to the [wiki:WARPLab/HardwareConfiguration#DebugHeader debug header] and can be used to externally trigger events. |
| 82 | |
| 83 | |
| 84 | |
| 85 | == Examples == |
| 86 | |
| 87 | In our examples, we have two nodes, a transmitter ( nodes(1) ) and a receiver ( nodes(2) ): |
| 88 | |
| 89 | * Create a UDP broadcast trigger and trigger the transmitting node with the Ethernet packet |
| 90 | {{{ |
| 91 | eth_trig = wl_trigger_eth_udp_broadcast; |
| 92 | nodes(1).wl_triggerManagerCmd('add_ethernet_trigger',[eth_trig]); |
| 93 | }}} |
| 94 | '''NOTE:''' This will allow a host, like Matlab, to create an Ethernet packet to begin transmission |
| 95 | |
| 96 | * Read Trigger IDs into workspace |
| 97 | {{{ |
| 98 | [T_IN_ETH,T_IN_ENERGY,T_IN_AGCDONE,T_IN_REG,T_IN_D0,T_IN_D1,T_IN_D2,T_IN_D3] = wl_getTriggerInputIDs(nodes(1)); |
| 99 | [T_OUT_BASEBAND, T_OUT_AGC, T_OUT_D0, T_OUT_D1, T_OUT_D2, T_OUT_D3] = wl_getTriggerOutputIDs(nodes(1)); |
| 100 | }}} |
| 101 | '''NOTE:''' These trigger IDs will be the same for all nodes in the system and should not be modified by the user. |
| 102 | |
| 103 | * For the transmit node, allow Ethernet to trigger the buffer baseband, the AGC, and Trigger output 0 (which is mapped by default in the WARPLab reference design to pin 8 on the [wiki:WARPLab/HardwareConfiguration#DebugHeader debug header]) |
| 104 | {{{ |
| 105 | nodes(1).wl_triggerManagerCmd('output_config_input_selection',[T_OUT_BASEBAND,T_OUT_AGC,T_OUT_D0],[T_IN_ETH,T_IN_REG]); |
| 106 | }}} |
| 107 | '''NOTE:''' We use both {{{T_IN_ETH}}} and {{{T_IN_REG}}} so this example is compatible with both WARP v2 and WARP v3 hardware. If using WARP v3 hardware, only {{{T_IN_ETH}}} is needed as the source of the trigger. |
| 108 | |
| 109 | |
| 110 | * For the receive node, allow the energy detector to trigger the buffer baseband and AGC core: |
| 111 | {{{ |
| 112 | nodes(2).wl_triggerManagerCmd('output_config_input_selection',[T_OUT_BASEBAND,T_OUT_AGC],[T_IN_ENERGY]); |
| 113 | }}} |
| 114 | Then enable the hold mode for the triggers driven by energy detection. This will prevent the buffer from being overwritten before we have a chance to read it: |
| 115 | {{{ |
| 116 | nodes(2).wl_triggerManagerCmd('output_config_hold_mode',[T_OUT_BASEBAND,T_OUT_AGC],'enable'); |
| 117 | }}} |
| 118 | Then get the IDs for the interfaces on the board and setup the configuration of the energy monitoring: |
| 119 | {{{ |
| 120 | [RFA,RFB] = wl_getInterfaceIDs(nodes(2)); |
| 121 | |
| 122 | rssi_sum_len = 15; |
| 123 | |
| 124 | nodes(2).wl_triggerManagerCmd('energy_config_average_length',rssi_sum_len); |
| 125 | nodes(2).wl_triggerManagerCmd('energy_config_busy_threshold',rssi_sum_len*500); |
| 126 | nodes(2).wl_triggerManagerCmd('energy_config_busy_minlength',10); |
| 127 | nodes(2).wl_triggerManagerCmd('energy_config_interface_selection',RFA+RFB); |
| 128 | }}} |
| 129 | Finally, when done processing, we can clear the energy detection trigger since it is holding the output due to setting the {{{'output_config_hold_mode'}}} |
| 130 | {{{ |
| 131 | nodes(2).wl_triggerManagerCmd('output_state_clear',[T_OUT_BASEBAND,T_OUT_AGC]); |
| 132 | }}} |
| 133 | |
| 134 | * For the receive node, allow trigger input to trigger the buffer baseband and the AGC (this example assumes the WARPLab reference design configuration where we should connect trigger output 0, pin 8 of the [wiki:WARPLab/HardwareConfiguration#DebugHeader debug header], of the transmit node to trigger input 3, pin 15 of the [wiki:WARPLab/HardwareConfiguration#DebugHeader debug header], of the receive node): |
| 135 | {{{ |
| 136 | nodes(2).wl_triggerManagerCmd('output_config_input_selection',[T_OUT_BASEBAND,T_OUT_AGC],[T_IN_D3]); |
| 137 | }}} |
| 138 | We will also enable the debounce circuitry on the trigger input to help with noise on the signal line: |
| 139 | {{{ |
| 140 | nodes(2).wl_triggerManagerCmd('input_config_debounce_mode',[T_IN_D3],'enable'); |
| 141 | }}} |
| 142 | Since the debounce circuitry is enabled, there will be a delay at the receiver node for its input trigger. To better align the transmitter and receiver, we can artifically delay the transmitters trigger outputs that drive the buffer baseband and the AGC: |
| 143 | {{{ |
| 144 | nodes(1).wl_triggerManagerCmd('output_config_delay',[T_OUT_BASEBAND,T_OUT_AGC],[50]); %50ns delay |
| 145 | }}} |
| 146 | '''NOTE:''' The 50 ns delay was measured using the oscilloscope. The procedure can be found here (Coming soon ...). |
| 147 | |
| 148 | |
| 149 | == Getting Help == |
| 150 | |
| 151 | If you have any additional questions, please post to the [http://warp.rice.edu/forums/ WARP Forums]. |
| 152 | |
| 153 | = Trigger Manager Commands = |
| 154 | |
| 155 | Trigger Manager commands are selected as string inputs to the {{{wl_triggerManagerCmd}}} method in [browser:ResearchApps/PHY/WARPLAB/WARPLab7/M_Code_Reference/classes/wl_node.m wl_node.m]. These strings are each individual cases of the switch statement in {{{procCmd}}} method of [browser:/ResearchApps/PHY/WARPLAB/WARPLab7/M_Code_Reference/classes/wl_trigger_manager.m wl_trigger_manager.m]. |
41 | | '''Returns:''' true if board responds; raises error otherwise |
42 | | |
43 | | |
44 | | === {{{payload_size_test}}} === |
45 | | Determine's objects maxPayload parameter[[BR]] |
| 196 | '''Returns:''' none |
| 197 | |
| 198 | |
| 199 | === {{{get_ethernet_trigger}}} === |
| 200 | Reads current trigger association from node[[BR]] |
| 201 | |
| 202 | |
| 203 | '''Arguments:''' node |
| 204 | |
| 205 | '''Returns:''' (uint32 TRIGGER_ASSOCIATION) |
| 206 | TRIGGER_ASSOCIATION: bit-wise AND of associated[[BR]] |
| 207 | trigger IDs[[BR]] |
| 208 | |
| 209 | |
| 210 | === {{{output_config_input_selection}}} === |
| 211 | Selects which trigger inputs drive the selected outputs[[BR]] |
| 212 | |
| 213 | '''Arguments:''' (uint32 OUTPUTS), (uint32 OR_INPUTS), ![optional] (uint32 AND_INPUTS) |
| 214 | |
| 215 | '''Returns:''' none |
| 216 | |
| 217 | OUTPUTS: vector of output trigger IDs, provided by[[BR]] |
| 218 | wl_getTriggerOutputIDs[[BR]] |
| 219 | |
| 220 | OR_INPUTS: vector of input trigger IDs, provided by[[BR]] |
| 221 | wl_getTriggerInputIDs. Any triggers in[[BR]] |
| 222 | this vector that assert will cause the[[BR]] |
| 223 | output trigger to assert.[[BR]] |
| 224 | |
| 225 | AND_INPUTS: vector of input trigger IDs, provided by[[BR]] |
| 226 | wl_getTriggerInputIDs. Only if all triggers[[BR]] |
| 227 | in this vector assert will the output [[BR]] |
| 228 | trigger assert. [[BR]] |
| 229 | |
| 230 | Usage note: This command replaces the current input[[BR]] |
| 231 | selection on the board. Previous state is not saved.[[BR]] |
| 232 | |
| 233 | |
| 234 | === {{{output_config_delay}}} === |
| 235 | Configures specified output triggers to be have an[[BR]] |
| 236 | additional delay relative to their inputs[[BR]] |
| 237 | |
| 238 | |
| 239 | '''Arguments:''' (uint32 OUTPUTS), (double DELAY_NS) |
| 240 | |
| 241 | '''Returns:''' none |
| 242 | |
| 243 | OUTPUTS: vector of output trigger IDs, provided by[[BR]] |
| 244 | wl_getTriggerOutputIDs[[BR]] |
| 245 | |
| 246 | DELAY_NS: scalar value of the intended delay,[[BR]] |
| 247 | specified in nanoseconds (1e-9 seconds)[[BR]] |
| 248 | |
| 249 | |
| 250 | === {{{output_config_hold_mode}}} === |
| 251 | Configures whether specified output triggers should[[BR]] |
| 252 | hold their outputs once triggered[[BR]] |
| 253 | |
| 254 | |
| 255 | '''Arguments:''' (uint32 OUTPUTS), (string MODE) |
| 256 | |
| 257 | '''Returns:''' none |
| 258 | |
| 259 | OUTPUTS: vector of output trigger IDs, provided by[[BR]] |
| 260 | wl_getTriggerOutputIDs[[BR]] |
| 261 | |
| 262 | MODE: 'enable' or 'disable'[[BR]] |
| 263 | |
| 264 | |
| 265 | === {{{output_state_read}}} === |
| 266 | Reads current state of output triggers. Note: this[[BR]] |
| 267 | command is intended to be used on output triggers[[BR]] |
| 268 | that have enabled their hold mode.[[BR]] |
| 269 | |
| 270 | |
| 271 | '''Arguments:''' (uint32 OUTPUTS) |
| 272 | |
| 273 | '''Returns:''' (bool STATES) |
| 274 | |
| 275 | OUTPUTS: vector of output trigger IDs, provided by[[BR]] |
| 276 | wl_getTriggerOutputIDs[[BR]] |
| 277 | |
| 278 | STATES: vector of (true, false) trigger states[[BR]] |
| 279 | corresponding to state of OUTPUTS vector[[BR]] |
| 280 | |
| 281 | |
| 282 | === {{{output_state_clear}}} === |
| 283 | Clears current state of output triggers. [[BR]] |
| 284 | |
| 285 | |
| 286 | '''Arguments:''' (uint32 OUTPUTS) |
| 287 | |
| 288 | '''Returns:''' none |
| 289 | |
| 290 | OUTPUTS: vector of output trigger IDs, provided by[[BR]] |
| 291 | wl_getTriggerOutputIDs[[BR]] |
| 292 | |
| 293 | |
| 294 | |
| 295 | === {{{input_config_enable_selection}}} === |
| 296 | Configures specified input triggers to be enabled[[BR]] |
| 297 | as inputs that feed the trigger manager core.[[BR]] |
| 298 | Note: This command disables all inputs before[[BR]] |
| 299 | enabling the selected inputs -- no previous state is[[BR]] |
| 300 | stored in the node.[[BR]] |
| 301 | |
| 302 | |
| 303 | '''Arguments:''' (uint32 INPUTS) |
| 304 | |
| 305 | '''Returns:''' none |
| 306 | |
| 307 | INPUTS: vector of output trigger IDs, provided by[[BR]] |
| 308 | wl_getTriggerInputIDs[[BR]] |
| 309 | |
| 310 | |
| 311 | === {{{input_config_debounce_mode}}} === |
| 312 | Configures specified input triggers to enable or[[BR]] |
| 313 | disable debounce circuit. Note: debounce circuit adds[[BR]] |
| 314 | delay of 4 cycles, where each cycle is a duration[[BR]] |
| 315 | specified in the delayStep_ns property of the[[BR]] |
| 316 | wl_manager_proc.m class.[[BR]] |
| 317 | |
| 318 | |
| 319 | '''Arguments:''' (uint32 INPUTS), (string MODE) |
| 320 | |
| 321 | '''Returns:''' none |
| 322 | |
| 323 | INPUTS: vector of output trigger IDs, provided by[[BR]] |
| 324 | wl_getTriggerInputIDs[[BR]] |
| 325 | |
| 326 | MODE: 'enable' or 'disable'[[BR]] |
| 327 | |
| 328 | |
| 329 | === {{{energy_config_busy_threshold}}} === |
| 330 | Configures the threshold above which RSSI is[[BR]] |
| 331 | considered as a "busy" medium.[[BR]] |
| 332 | |
| 333 | |
| 334 | '''Arguments:''' (uint32 THRESH) |
| 335 | |
| 336 | '''Returns:''' none |
| 337 | |
| 338 | THRESH: busy threshold. For the MAX2829-based[[BR]] |
| 339 | interfaces, WARP uses a 10-bit ADC for[[BR]] |
| 340 | RSSI (range of ![0,1023]).[[BR]] |
| 341 | |
| 342 | Note: RSSI averaging in the core does NOT divide by[[BR]] |
| 343 | the number of samples that are summed together.[[BR]] |
| 344 | Averaging by N cycles means that the maximum possible[[BR]] |
| 345 | RSSI post-averaging is N*1023.[[BR]] |
| 346 | |
| 347 | |
| 348 | === {{{energy_config_average_length}}} === |
| 349 | Configures the number of samples over which RSSI is[[BR]] |
| 350 | averaged before it is compared to any threshold.[[BR]] |
| 351 | |
| 352 | |
| 353 | '''Arguments:''' (uint32 LENGTH) |
| 354 | |
| 355 | '''Returns:''' none |
| 356 | |
| 357 | LENGTH: Number of samples over which RSSI is[[BR]] |
| 358 | averaged.[[BR]] |
| 359 | |
| 360 | Note: For all hardware versions, RSSI is sampled at[[BR]] |
| 361 | 10 MHz. Each sample is, therefore, 100 ns.[[BR]] |
| 362 | |
| 363 | |
| 364 | === {{{energy_config_busy_minlength}}} === |
| 365 | Average RSSI samples must exceed the busy threshold[[BR]] |
| 366 | for a minimum number of samples before the trigger is[[BR]] |
| 367 | activated. This command sets this minimum value.[[BR]] |
| 368 | |
| 369 | |
| 370 | '''Arguments:''' (uint32 LENGTH) |
| 371 | |
| 372 | '''Returns:''' none |
| 373 | |
| 374 | LENGTH: Minimum number of samples that RSSI must[[BR]] |
| 375 | be busy before trigger is raised.[[BR]] |
| 376 | |
| 377 | |
| 378 | === {{{energy_config_interface_selection}}} === |
| 379 | Selects the interfaces from which energy detection[[BR]] |
| 380 | should base its decision[[BR]] |
| 381 | |
| 382 | |
| 383 | '''Arguments:''' (uint32 IFCSELECTION) |
| 384 | |
| 385 | '''Returns:''' none |
| 386 | |
| 387 | IFCSELECTION: One or more interfaces that the[[BR]] |
| 388 | energy detector system should[[BR]] |
| 389 | monitor[[BR]] |
| 390 | |
| 391 | Note: IFCSELECTION is intended to be used with the[[BR]] |
| 392 | return values from the wl_getInterfaceIDs method.[[BR]] |
| 393 | |
| 394 | |
| 395 | === {{{test_trigger}}} === |
| 396 | Sends a test trigger[[BR]] |