Trigger Manager

System Requirements

• Review the WARPLab 7 System Requirements?

Overview

The Trigger Manager was designed to allow flexible coordination and communication between nodes. Each trigger is assigned an ID and then all configuration of the trigger manager is based on these IDs. By default, WARPLab has the following triggers:

• Input
  • Ethernet
  • Input Energy
  • Automatic Gain Control (AGC) Done
  • Register writes (for WARP v2 compatibility)
  • External Pins (D0 - D3, pins 12 - 15 on the debug header).

• Output
  • Baseband
  • Automatic Gain Control (AGC) Start
  • External Pins (D0 - D3, pins 8 - 11 on the debug header).

The Trigger Manager allows a node to output triggers based on a logical combination of events on the node as well as perform operations based on a logical combination of input triggers to the node.

TODO: BLOCK DIAGRAM

Hardware Setup

The Trigger Manager consists of both a hardware block that runs within the FPGA and a software framework to configure and use the Trigger Manager. You can see the instantiation of the Trigger Manager block as well as the default connections within the system.mhs file:

# Default configuration of the Trigger Manager in system.mhs

BEGIN w3_warplab_trigger_proc_axiw
 PARAMETER INSTANCE   = warplab_trigger_proc
 PARAMETER HW_VER     = 1.01.a
 PARAMETER C_BASEADDR = 0x77800000
 PARAMETER C_HIGHADDR = 0x7780ffff
 BUS_INTERFACE S_AXI  = axi4lite_1
 BUS_INTERFACE AXI_STR_ETH_RXD = ETH_A_AXI_STR_RXD
 PORT axi_aclk        = clk_160MHz
 PORT sysgen_clk      = clk_160MHz
 # Triggers
 PORT agc_done_in = agc_is_done
 PORT debug_0_in  = trig_0_in
 PORT debug_1_in  = trig_1_in
 PORT debug_2_in  = trig_2_in
 PORT debug_3_in  = trig_3_in
 PORT rfa_rssi    = warplab_rfa_rssi
 PORT rfb_rssi    = warplab_rfb_rssi
 PORT rfc_rssi    = net_gnd
 PORT rfd_rssi    = net_gnd
 PORT rssi_clk    = warplab_rssi_clk
 PORT trig_0_out  = baseband_trigger
 PORT trig_1_out  = agc_start
 PORT trig_2_out  = trig_2_out
 PORT trig_3_out  = trig_3_out
 PORT trig_4_out  = trig_4_out
 PORT trig_5_out  = trig_5_out
END

The trig_*_in and trig_*_out signals are connected to the debug header and can be used to externally trigger events.

Examples

In our example, we have two nodes, a transmitter ( nodes(1) ) and a receiver ( nodes(2) ):

• Create a UDP broadcast trigger and primary node to be ready for it

  eth_trig = wl_trigger_eth_udp_broadcast;
  

• Trigger the transmitting node with an Ethernet trigger

  nodes(1).wl_triggerManagerCmd('add_ethernet_trigger',[eth_trig]);
  

  NOTE: This will allow a host, like Matlab, to create an Ethernet packet to begin transmission

• Read Trigger IDs into workspace

  [T_IN_ETH,T_IN_ENERGY,T_IN_AGCDONE,T_IN_REG,T_IN_D0,T_IN_D1,T_IN_D2,T_IN_D3] =  wl_getTriggerInputIDs(nodes(1));
  [T_OUT_BASEBAND, T_OUT_AGC, T_OUT_D0, T_OUT_D1, T_OUT_D2, T_OUT_D3] = wl_getTriggerOutputIDs(nodes(1));
  

  NOTE: These trigger IDs will be the same for all nodes in the system unless modified by the user.

• For the transmit node, we will allow Ethernet to trigger the buffer baseband, the AGC, and Trigger output 0 (which is mapped to pin 8 on the debug header)

  nodes(1).wl_triggerManagerCmd('output_config_input_selection',[T_OUT_BASEBAND,T_OUT_AGC,T_OUT_D0],[T_IN_ETH,T_IN_REG]);
  

  NOTE: We use both T_IN_ETH and T_IN_REG so this example is compatible with both WARP v2 and WARP v3 hardware. If using WARP v3 hardware, only T_IN_ETH is needed as the source of the trigger.

• For the receive node, if we want to allow the energy detector to trigger the buffer baseband and AGC core:

  nodes(2).wl_triggerManagerCmd('output_config_input_selection',[T_OUT_BASEBAND,T_OUT_AGC],[T_IN_ENERGY]);
  

  and then setup the configuration of the energy monitoring:

  rssi_sum_len = 15;
  
  nodes(2).wl_triggerManagerCmd('energy_config_average_length',rssi_sum_len);
  nodes(2).wl_triggerManagerCmd('energy_config_busy_threshold',rssi_sum_len*500);
  nodes(2).wl_triggerManagerCmd('energy_config_busy_minlength',10);
  nodes(2).wl_triggerManagerCmd('energy_config_interface_selection',RFA+RFB);
  

• For the receive node, if we connect trigger output 0 (pin 8 of the debug header) of the transmit node to trigger input 3 (pin 15 of the debug header) of the receive node, then we can allow trigger input 3 to trigger the buffer baseband and the AGC:

  nodes(2).wl_triggerManagerCmd('output_config_input_selection',[T_OUT_BASEBAND,T_OUT_AGC],[T_IN_D3]);
  

  We will also enable the debounce circuitry on the trigger input to help with noise on the signal line:

  nodes(2).wl_triggerManagerCmd('input_config_debounce_mode',[T_IN_D3],'enable'); 
  

  Since the debounce circuitry is enabled, there will be a delay at the receiver node for its input trigger. To better align the transmitter and receiver, we can artifically delay the transmitters trigger outputs that drive the buffer baseband and the AGC:

  nodes(1).wl_triggerManagerCmd('output_config_delay',[T_OUT_BASEBAND,T_OUT_AGC],[50]); %50ns delay
  

  NOTE: The 50 ns delay was measured using the oscilloscope. The procedure can be found here (Coming soon ...).

• If we want to clear the triggers on the receiver, we can:

  nodes(2).wl_triggerManagerCmd('output_state_clear',[T_OUT_BASEBAND,T_OUT_AGC]);
  

Getting Help

If you have any additional questions, please post to the ​WARP Forums.

Tips

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