Extending WARPLab 6

The WARPLab framework facilitates experimental evaluation of PHYsical (PHY) layer algorithms. However, some novel algorithms may require features not provided in the WARPLab framework. Users are encouraged to modify the WARPLab XPS Reference Design and WARPLab Reference M-Code if this is required in order to meet experiment requirements. For example, if part of the signal processing cannot be done offline in MATLAB but must be done in real-time, then this signal processing can be implemented in FPGA logic by modifying the WARPLab XPS Reference Design. Depending on the experiment, the users may also have to modify the WARPLab Reference M-Code.

WARPLab Design Flow - Sysgen to XPS

  • WARPLab uses a System Generator model for its logic design and XPS to integrate the Sysgen core with the processor and code for interacting with MATLAB.
  • To modify the WARPLab Sysgen model or add a custom peripheral created using Sysgen, the design flow is the following.
    • Change WARPLab Sysgen model or create your custom peripheral in Sysgen --> Export to XPS project --> Change C code (If required based on your changes) --> Change M-Code (If required based on your changes).
  • If changes are only in C Code or M-Code then there is no need to change Sysgen model and there is no need to Export Sysgen Model to XPS.
  • The tutorials on "Designing Custom Peripherals" and "Using a Custom Peripheral in XPS" available here cover the XPS and Sygen design flows. The materials from our latest workshops are also a good starting point, we recommend looking at "Lab 3 Building a Simple Transmitter".
  • Before exporting as a peripheral core:
    • The register map must be created by clicking 'Add' in the EDK Processor block. Before clicking 'Add' remember to go to the EDK Processor block/ Implementation tab and select 'Dual Clocks' and 'Register Read-Back' (Dual clocks must be selected for WARPLab but the tutorials may not show this option selected).
    • Remember to click the 'Settings' button (inside the System Generator block and next to Compilation/Export as a pcore to EDK) and in the 'EDK project' section click the folder icon and navigate to the .xmp file in the WARPLab reference design, then click Open, then click OK.
    • You can choose to export your modified WARPLab with a new compatibility revision by clicking on 'Settings' button (inside the System Generator block and next to Compilation/Export as a pcore to EDK) and changing in the 'Pcore options' the 'Major', 'Minor', 'HW/SW' compatibility revision fields. If you do this you will notice that after export is completed the 'pcores' folder contains a a folder for warplab that corresponds to the revision you specified. You must change the 'PARAMETER HW_VER' in the system.mhs file and the 'PARAMETER DRIVER_VER' in the system.mss file in order to match the revision number you specified before the export.

WARPLab Design Flow - C code and M-Code

  • Commands or actions to be executed by the WARP nodes are sent from MATLAB using the warplab_ functions provided in the WARPLab Reference M-Code. The possible commands/actions that can be executed are identified by an ID (or opcode) in the warplab_defines.m and warplab_defines.h files. The warplab_defines.m is part of the WARPLab Reference M-Code and the warplab_defines.h is part of the WARPLab XPS Reference Design (src folder).
  • The WARPLab C code (warplab_mimo.c) implements an infinite loop that is listening to Ethernet packets. When an Ethernet packet is received the ID (or opcode) of the command/action to be executed is read from the received packet, based on the ID the C code enters a specific case statement, when the case statement is executed the code returns to its initial state of listening to Ethernet packets.
Last modified 7 years ago Last modified on May 6, 2013, 4:20:05 PM