| 2 | |
| 3 | Version 5.1 |
| 4 | * The following are the WARPLab XPS Reference Designs used to generate the bitstreams that work with version 5.1 of the WARPLab Reference M code. These xps projects were generated with version 10.1.03 of the Xilinx tools. |
| 5 | * [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v05_01_FPGAv1.zip WARPLab_ReferenceDesign_2x2_v05_01_FPGAv1.zip] |
| 6 | * [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v05_01_FPGAv1.zip WARPLab_ReferenceDesign_4x4_v05_01_FPGAv1.zip] |
| 7 | * [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v05_01_FPGAv2.zip WARPLab_ReferenceDesign_2x2_v05_01_FPGAv2.zip] |
| 8 | * [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v05_01_FPGAv2.zip WARPLab_ReferenceDesign_4x4_v05_01_FPGAv2.zip] |
| 9 | * For access to version 5.1 of the WARPLab Reference M Code and Getting Started on WARPLab please click [wiki:WARPLab here]. |