Changes between Version 7 and Version 8 of XilinxSDK
- Timestamp:
- Nov 7, 2013, 12:40:20 PM (11 years ago)
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XilinxSDK
v7 v8 8 8 Before using a WARP reference design XPS or SDK project you must install the Xilinx tools and configure repository settings: 9 9 10 * Install Xilinx ISE 13.4 System Edition (includes ISE, EDK, System Generator) 10 * Install Xilinx ISE 11 * To simulate or modify the FPGA design you need System Edition (includes ISE, EDK, System Generator) 12 * To only change C code you can use the SDK-only editions of ISE 11 13 * Checkout a copy of the WARP edk_user_repository to a local directory 12 14 * Add the WARP edk_user_repository to the global repositories in XPS (Edit->Preferences->Application) and SDK (Xilinx Tools->Repositories->Global Repositories). Close both XPS and SDK. 13 15 14 16 === Project Files === 15 Download either reference design .zip file from the [wiki:OFDMReferenceDesign/Changelog OFDM Reference Design download page] or the [wiki:WARPLab/Releases WARPLab OFDM Reference Design download page].17 Download the reference design .zip file. 16 18 17 19 The ref design archive includes both the XPS project (i.e. the hardware design) and SDK projects (i.e. the software designs). The archive folder structure is: … … 19 21 SDK/ 20 22 |- SDK_Export/ 21 SDK_ PROJECTS_IMPORT/23 SDK_Workspace/ 22 24 data/ 23 25 etc/ 24 26 pcores/ 25 workspace/ *this folder is intentionally empty for the user to create his or her workspace in*26 platgen.opt27 system.make28 27 system.mhs 29 28 system.xmp 30 system_incl.make31 29 }}} 32 30 … … 38 36 * The hardware specification (auto-generated by XPS) 39 37 * The board support package (auto-geneated by SDK, derived from the hardware spec) 40 * Software projects (user code in an SDK-generated template)38 * One ore more software projects (user code in an SDK-generated template) 41 39 42 40 We have chosen the approach of having one SDK workspace per XPS project, so the SDK workspace always contains exactly one _hw_platform project and one _bsp project, both referenced to the parent XPS project. … … 44 42 A workspace always maps to a folder on your hard drive. That folder will contain workspace settings (in a {{{.metadata}}} directory) and subdirectories for each project in the workspace. 45 43 46 Unfortunately workspaces are not portable. The ref design .zip file contains all the necessary project files to populate a workspace, but you must initialize your workspace first and import these project files manually. We recommend using the blank workspace folder in the root directory of the XPS project.44 Unfortunately workspaces are not portable. The ref design .zip file contains all the necessary project files to populate a workspace, but you must initialize your workspace first and import these project files manually. We recommend using the SDK_Workspace folder inside the XPS project folder as your SDK workspace. 47 45 48 In the instructions below we use {{{<xps_proj>}}} to represent the path where you expanded the ref design .zip. If the XPS project file is in {{{C:\work\WARP\OFDM_RefDesign_FPGAv2_v1 7.0\system.xmp}}}, then you should use {{{C:\work\WARP\OFDM_RefDesign_FPGAv2_v17.0\}}} in place of {{{<xps_proj>}}} below.46 In the instructions below we use {{{<xps_proj>}}} to represent the path where you expanded the ref design .zip. If the XPS project file is in {{{C:\work\WARP\OFDM_RefDesign_FPGAv2_v18.1\system.xmp}}}, then you should use {{{C:\work\WARP\OFDM_RefDesign_FPGAv2_v18.1\}}} in place of {{{<xps_proj>}}} below. 49 47 50 48 '''Creating the workspace''' 51 49 * Launch the Xilinx SDK 52 * If prompted to select a workspace, choose {{{<xps_proj>/ workspace}}}53 * If not, choose File->Switch Workspace, then choose {{{<xps_proj>/ workspace}}}50 * If prompted to select a workspace, choose {{{<xps_proj>/SDK_Workspace}}} 51 * If not, choose File->Switch Workspace, then choose {{{<xps_proj>/SDK_Workspace}}} 54 52 * Choose Xilinx Tools->Repositories 55 53 * Verify the WARP edk_user_repository is listed in the Global Repositories section … … 57 55 * Click OK 58 56 * Choose File->Import, expand General, choose Existing Projects into Workspace, click Next 59 * For 'Select root directory:', click Browse and navigate to {{{<xps_proj>/SDK /SDK_PROJECTS_IMPORT}}}57 * For 'Select root directory:', click Browse and navigate to {{{<xps_proj>/SDK_Workspace}}} 60 58 * Make sure all projects are selected 61 * Make sure "Copy projects into workspace" is checked... this will move them out of the temporary import folder into your workspace59 * Make sure "Copy projects into workspace" is not checked 62 60 * Click Finish 63 61 * SDK will begin building the software projects. If everything works, this process will finish with a log message {{{'elfcheck passed'}}}. 64 * In the Project Explorer tab right-click the user software project and choose Generate Linker Script65 * On WARP v2, assign Code Sections to iocm, Data sections to docm, Heap/Stack to xps_bram_if_cntlr_1. On WARP v3, assign Code Sections to xps_bram_if_cntlr_0, Data to xps_bram_if_cntlr_1 and Heap/Stack to to ilmb_cntlr_dlmb_cntlr. It is critical no sections be assigned to xps_bram_if_cntlr_2 (this BRAM is the PHY pkt buffers).66 * Change Heap/Stack sizes to 4096 (4K)67 * Click Generate; click Yes to overwrite existing linker script68 62 69 70 '''Running the design''' ''Brief instructions, to be elaborated soon''[[BR]] 71 Program the FPGA: 72 * Connect the JTAG cable 73 * Xilinx Tools->Program FPGA 74 * Choose bootloop 63 '''Running the design''' 64 Program the FPGA from SDK: 65 * Connect the JTAG cable to your FPGA board 66 * In the SDK select Xilinx Tools->Program FPGA 67 * In the Software Configuration section, select the ELF file corresponding to your top-level software application 75 68 * Click Program 76 * Wait ~20 seconds; FPGA Board should now be configured (green DONE LED on, red Radio Board PLL unlocked LEDs on) 77 78 79 Download the software program: 80 * Click on the user software project in Project Explorer 81 * Choose Run->Run 82 * Software should now be running (FPGA Board hex displays on, Radio Board Rx LEDs on, PLL unlocked LEDs off) 83 * Connect serial cable (57600bps) to monitor STDOUT 84 85 '''Iterating on software''' ''Brief instructions, to be elaborated soon''[[BR]] 86 FPGA only needs to be configured once; software iterations only require re-running the code[[BR]] 87 * Make desired changes to source code 88 * Verify compilation succeeds (watch for {{{'elfcheck passed'}}}) 89 * Click on the desired project, Run->Run; if prompted "Target processor is currently in use", click Yes. 90 91 '''Debugging software''' ''Brief instructions, to be elaborated soon''[[BR]] 92 * Same preparation as running software 93 * Choose Run->Debug (instead of Run->Run) to enter debug mode 69 * Wait ~20 seconds; the FPGA should now be configured (green DONE LED on) 94 70 95 71 ---- … … 98 74 Some helpful things we've figured out: 99 75 100 * Do not power cycle the FPGA Board or disconnect the JTAG/USB cable while SDKis running. Always quit SDK first.76 * Do not power cycle the FPGA Board or disconnect the JTAG/USB cable while the SDK debugger is running. Always quit SDK first. 101 77 * If an active SDK session loses the JTAG connection, the JTAG cable will get locked and will fail to function for the current or future SDK sessions. The SDK may freeze in this state. Use Task Manager to kill eclipse.exe and xmd.exe. Then run iMPACT (Programs->Xilinx Design Suite 13.4->ISE Design Tools->32/64-bit Tools->iMPACT), double-click Boundary Scan, choose Output->Cable Reset. Then re-launch SDK to reestablish the JTAG connection. 102 78 … … 122 98 }}} 123 99 124 Here, {{{'old_project_name'}}} will be the name of the hardware project that you imported from-- not necessarily the name of the hardware project in your current workspace. This name is populated in the properties for your software project under C/C++ Build->Settings->Tool Settings Tab->Xilinx ELF Check->Options->Hardware Specifications. You can manually update that string, or you can simply right click on your software project and {{{'Change Referenced BSP'}}} then simply hit {{{'OK'}}}. That's enough for the SDK to reach into the BSP and update that field with the proper string.100 This usually indicates the software project is referencing an old BSP, which was based on a different hardware project. Right click on your software project and {{{'Change Referenced BSP'}}} and double-click the correct BSP to re-associate the software project.