Changes between Version 11 and Version 12 of cores/w3_clock_controller
- Timestamp:
- Jan 29, 2015, 2:54:35 PM (9 years ago)
Legend:
- Unmodified
- Added
- Removed
- Modified
-
cores/w3_clock_controller
v11 v12 126 126 }}} 127 127 {{{#!td style="background: #fff" 128 * Select clock module (MMCX Jack"Samp In") as sampling clock source128 * Select clock module (MMCX connector "Samp In") as sampling clock source 129 129 * Set output to FPGA as LVDS, bypass divider 130 130 }}} … … 132 132 133 133 == Custom Configurations == 134 The default configurations described above are implemented in the program ROM of the PicoBlaze microcontroller in the w3_clock_controller_axi core. These defaults can be overridden by programing new register address/data values in the WARP v3 EEPROM. The PicoBlaze program checks the EEPROM for valid clock configuration values on boot. If valid configuration options are found the program loads these from the EEPROM, bypassing the defaults entirely. 134 The default configurations described above are implemented in the program ROM of the PicoBlaze microcontroller in the w3_clock_controller_axi core. These defaults can be overridden by programing new register address/data values in the WARP v3 EEPROM. The PicoBlaze program checks the EEPROM for valid clock configuration values on boot. If valid configuration options are found in the EEPROM the program loads these instead of the internal defaults. 135 136 The configuration values are stored in the WARP v3 EEPROM starting at byte address 15000. Configuration values are stored as 2-byte address/data pairs, with each pair corresponding to a 1-byte register write via SPI to a single device. There are separate configuration values for the 3 SPI slave devices (the RF reference clock buffer, the sampling clock buffer and the PLL on the CM-PLL clock module). Multiple configurations can be defined for each device to support run-time selection of the active configuration via the clock module switches. 137 138 The EEPROM addresses for the various clock configuration values are listed in the table below. 135 139 136 140 ||= EEPROM Bytes =||= Byte Values =||= Description =|| … … 175 179 176 180 if(no_clock_module_mounted) { 177 load_configuration(CFG_NOCM) 178 config_complete() 181 load_configuration(DEV_RF_REF, CFG_NOCM) 182 load_configuration(DEV_SAMP, CFG_NOCM) 183 load_configuration(DEV_PLL, CFG_NOCM) 184 config_complete() 179 185 } 180 186 … … 184 190 if(sw == off_off) { 185 191 //Up-Up switches -> ignore clock module 186 load_configuration(CFG_NOCM) 192 load_configuration(DEV_RF_REF, CFG_NOCM) 193 load_configuration(DEV_SAMP, CFG_NOCM) 194 load_configuration(DEV_PLL, CFG_NOCM) 187 195 } else if(sw == off_on) { 188 196 //Up-Down switches -> Config A 189 load_configuration(CFG_CMMMCX_A) 197 load_configuration(DEV_RF_REF, CFG_CMMMCX_A) 198 load_configuration(DEV_SAMP, CFG_CMMMCX_A) 190 199 } else if(sw == on_off) { 191 200 //Down-Up switches -> Config B 192 load_configuration(CFG_CMMMCX_B) 201 load_configuration(DEV_RF_REF, CFG_CMMMCX_B) 202 load_configuration(DEV_SAMP, CFG_CMMMCX_B) 193 203 } else if(sw == on_on) { 194 204 //Down-Up switches -> Config C 195 load_configuration(CFG_CMMMCX_C) 205 load_configuration(DEV_RF_REF, CFG_CMMMCX_C) 206 load_configuration(DEV_SAMP, CFG_CMMMCX_C) 196 207 } 197 208 … … 204 215 if(sw == off_off) { 205 216 //Down-Down switches -> ignore clock module 206 load_configuration(CFG_NOCM) 217 load_configuration(DEV_RF_REF, CFG_NOCM) 218 load_configuration(DEV_SAMP, CFG_NOCM) 219 load_configuration(DEV_PLL, CFG_NOCM) 207 220 config_complete() 208 221 } … … 212 225 if(sw == off_on) { 213 226 //Down-Up switches -> Config A 214 load_configuration(CFG_CMPLL_A) 227 load_configuration(DEV_RF_REF, CFG_CMPLL_A) 228 load_configuration(DEV_SAMP, CFG_CMPLL_A) 229 load_configuration(DEV_PLL, CFG_CMPLL_A) 215 230 } else if(sw == on_off) { 216 231 //Up-Down switches -> Config B 217 load_configuration(CFG_CMPLL_B) 232 load_configuration(DEV_RF_REF, CFG_CMPLL_B) 233 load_configuration(DEV_SAMP, CFG_CMPLL_B) 234 load_configuration(DEV_PLL, CFG_CMPLL_B) 218 235 } else if(sw == on_on) { 219 236 //Up-Up switches -> Config C 220 load_configuration(CFG_CMPLL_C) 237 load_configuration(DEV_RF_REF, CFG_CMPLL_C) 238 load_configuration(DEV_SAMP, CFG_CMPLL_C) 239 load_configuration(DEV_PLL, CFG_CMPLL_C) 221 240 } 222 241 … … 225 244 config_complete() 226 245 } 246 } 247 248 load_configuration(req_device, req_cfg) { 249 if(eeprom[15000] == 0xA5 && eeprom[15001] == 0xCD) { 250 cfg_data = copy_cfg_from_eeprom(req_device, req_cfg) 251 } else { 252 cfg_data = copy_cfg_from_rom(req_device, req_cfg) 253 } 254 255 write_cfg_to_device(req_device, cfg_data) 227 256 } 228 257