Changes between Version 16 and Version 17 of cores/w3_clock_controller

Timestamp:

Jan 29, 2015, 11:01:59 PM (9 years ago)

Author:

murphpo

Comment:

--

cores/w3_clock_controller

@@ -293 +293 @@
 The w3_clock_controller_axi is packaged as a standard pcore, ready for instantiation in an XPS project. The core's AXI interface can be connected to an AXI lite or AXI interconnect. The must be assigned a memory address which is accessible by a MicroBlaze processor on the same interconnect.
 
-The w3_clock_controller_axi core ports are described in the table below. Some ports must be connected to top-level FPGA pins. Other ports must be connected to other cores in the XPS project. A typical system is illustrated in the block diagram below. Refer to the WARPLab Reference Design or 802.11 Reference Design for good examples of XPS projects integrating the w3_clock_controller_axi core.
+Some w3_clock_controller_axi ports must be connected to top-level FPGA pins. Other ports must be connected to other cores in the XPS project. A typical system is illustrated in the block diagram below. Refer to the WARPLab Reference Design or 802.11 Reference Design for good examples of XPS projects integrating the w3_clock_controller_axi core.
+
+[[Image(w3_clock_controller_block_diagram.png, width=500)]]
+
+The w3_clock_controller_axi core ports are described in the table below.
 
 ||= Port =||= Description =||
@@ -309 +313 @@
 || cm_pll_status          || Status signal from the CM-PLL clock module PLL/buffer. Connect directly to corresponding FPGA IOB  ||
 || pll_ref_clk  || Reference clock for the CM-PLL clock module PLL. Connect to the clock signal driven by the CM-PLL on pins 35/36 of the clock module header  ||
-
-[[Image(w3_clock_controller_block_diagram.png, width=500)]]
+|| uart_tx  || Output from PicoBlaze UART. Connect directly to USB UART Tx or w3_boot_io_mux instance  ||
+|| iic_eeprom_scl_*  || Tri-state buffer I/O/T for IIC clock signal. Connect directly to EEPROM SCL IOBUF instance or via w3_boot_io_mux instance  ||
+|| iic_eeprom_sda_*  || Tri-state buffer I/O/T for IIC data signal. Connect directly to EEPROM SDA IOBUF instance or via w3_boot_io_mux instance  ||
 
 == Source ==