Changes between Version 5 and Version 6 of cores/w3_userio
- Timestamp:
- Jun 29, 2016, 4:09:37 PM (8 years ago)
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cores/w3_userio
v5 v6 73 73 PORT USERIO_pb_m_pin = USERIO_pb_m_pin, DIR = I 74 74 PORT USERIO_pb_d_pin = USERIO_pb_d_pin, DIR = I 75 PORT dbg_hdr_gpio = dbg_hdr_gpio, DIR = IO, VEC = [15:0] 75 76 ... 76 BEGIN w3_userio 77 PARAMETER INSTANCE = w3_userio_0 78 PARAMETER HW_VER = 1.00.a 77 BEGIN w3_userio_axi 78 PARAMETER INSTANCE = w3_userio 79 PARAMETER HW_VER = 1.01.a 80 PARAMETER INCLUDE_DNA_READ_LOGIC = 0 79 81 PARAMETER C_BASEADDR = 0xFFFFFFFF 80 82 PARAMETER C_HIGHADDR = 0x00000000 81 BUS_INTERFACE SPLB = plb_primary 82 PORT hexdisp_left = USERIO_hexdisp_left_pin 83 PORT hexdisp_right = USERIO_hexdisp_right_pin 84 PORT hexdisp_left_dp = USERIO_hexdisp_left_dp_pin 85 PORT hexdisp_right_dp = USERIO_hexdisp_right_dp_pin 86 PORT leds_red = USERIO_leds_red_pin 87 PORT leds_green = USERIO_leds_green_pin 88 PORT rfa_led_red = USERIO_rfa_led_red_pin 89 PORT rfa_led_green = USERIO_rfa_led_green_pin 90 PORT rfb_led_red = USERIO_rfb_led_red_pin 91 PORT rfb_led_green = USERIO_rfb_led_green_pin 92 PORT dipsw = USERIO_dipsw_pin 93 PORT pb_u = USERIO_pb_u_pin 94 PORT pb_m = USERIO_pb_m_pin 95 PORT pb_d = USERIO_pb_d_pin 83 BUS_INTERFACE S_AXI = mb_shared_axi_periph 84 PORT S_AXI_ACLK = clk_160MHz 85 PORT leds_red = userio_leds_red 86 PORT leds_green = userio_leds_green 87 PORT hexdisp_left = userio_hexdisp_left 88 PORT hexdisp_right = userio_hexdisp_right 89 PORT hexdisp_left_dp = userio_hexdisp_left_dp 90 PORT hexdisp_right_dp = userio_hexdisp_right_dp 91 PORT rfa_led_red = userio_rfa_led_red 92 PORT rfa_led_green = userio_rfa_led_green 93 PORT rfb_led_red = userio_rfb_led_red 94 PORT rfb_led_green = userio_rfb_led_green 95 PORT dipsw = userio_dipsw_b0 & userio_dipsw_b1 & userio_dipsw_b2 & userio_dipsw_b3 96 PORT pb_u = userio_pb_u 97 PORT pb_m = userio_pb_m 98 PORT pb_d = userio_pb_d 96 99 PORT usr_rfa_led_red = RFA_statLED_Rx 97 100 PORT usr_rfa_led_green = RFA_statLED_Tx 98 101 PORT usr_rfb_led_red = RFB_statLED_Rx 99 102 PORT usr_rfb_led_green = RFB_statLED_Tx 100 PORT DNA_Port_Clk = clk_40MHz103 PORT usr_leds_red = dbg_signal_err_disp 101 104 END 102 105 ... … … 105 108 == Driver == 106 109 107 The w3_userio pcore includes a C driver to access user I/O devices from user code. Refer to the [//svn/WARP/PlatformSupport/CustomPeripherals/pcores/w3_userio_axi_v1_0 1_a/doc/html/api/index.html w3_userio API documentation] for full details.110 The w3_userio pcore includes a C driver to access user I/O devices from user code. Refer to the [//svn/WARP/PlatformSupport/CustomPeripherals/pcores/w3_userio_axi_v1_02_a/doc/html/api/index.html w3_userio API documentation] for full details. 108 111 109 112 All driver functions require the base memory address of the w3_userio pcore. This address is set in your XPS project. The EDK tools copy this address into a macro in the {{{xparameters.h}}} file when you generate a BSP. The auto-generated macro should be named {{{XPAR_W3_USERIO_0_BASEADDR}}} (assuming your pcore instance is named {{{w3_userio_0}}}, as in the example above).
