| | 1 | = WARP FPGA Cores = |
| | 2 | |
| | 3 | |
| | 4 | The cores listed below are provided to facilitate use of the various hardware resources on the WARP hardware. |
| | 5 | |
| | 6 | == WARP v3 Cores == |
| | 7 | * [wiki:./w3_iic_eeprom w3_iic_eeprom]: IIC master for reading/writing EEPROM |
| | 8 | * [wiki:./w3_userio w3_userio]: Controller for all user I/O resources (LEDs, buttons, etc.) |
| | 9 | * [wiki:./w3_ad_controller w3_ad_controller]: Controller for managing RF interface analog converters |
| | 10 | * [wiki:./w3_clock_controller w3_clock_controller]: Controller for managing RF interface clock buffers |
| | 11 | * [wiki:./radio_controller radio_controller]: Controller for managing RF interface transceivers and front-ends |
| | 12 | |
| | 13 | == WARP v2 Cores == |
| | 14 | * [wiki:./warp_v4_userio warp_v4_userio]: Controller for all user I/O resources (LEDs, buttons, etc.) |
| | 15 | |
| | 16 | == WARP v1 & v2 Cores == |
| | 17 | * [wiki:./radio_controller radio_controller]: Controller for managing RF interface transceivers and front-ends |
| | 18 | * [wiki:./radio_bridge radio_bridge]: Connects radio_controller to top-level ports for one Radio Board |
| | 19 | * [wiki:./eeprom_onewire eeprom_onewire]: OneWire master for reading/writing FPGA Board and Radio Board EEPROMs |
| | 20 | * [wiki:./clock_board_config clock_board_config]: Configures Clock Board buffers on power up |
