Changes between Version 5 and Version 6 of cores


Ignore:
Timestamp:
Feb 26, 2013, 10:18:29 AM (11 years ago)
Author:
murphpo
Comment:

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  • cores

    v5 v6  
    1414
    1515== WARP v2 Cores ==
    16  * [wiki:./warp_v4_userio warp_v4_userio]: Controller for all user I/O resources (LEDs, buttons, etc.)
     16 * [source:/PlatformSupport/CustomPeripherals/pcores/warp_v4_userio_v1_00_a warp_v4_userio]: Controller for all user I/O resources (LEDs, buttons, etc.)
    1717
    1818== WARP v1 & v2 Cores ==
     
    2020 * [wiki:HardwareUsersGuides/RadioBoard_v1.4/RadioBridge radio_bridge]: Connects radio_controller to top-level ports for one Radio Board
    2121 * [wiki:EEPROM_onewire eeprom_onewire]: OneWire master for reading/writing FPGA Board and Radio Board EEPROMs
    22  * [wiki:./clock_board_config clock_board_config]: Configures Clock Board buffers on power up
     22 * [source:/PlatformSupport/CustomPeripherals/pcores/clock_board_config_v1_05_a clock_board_config]: Configures Clock Board buffers on power up