Changes between Version 7 and Version 8 of cores


Ignore:
Timestamp:
Mar 3, 2014, 7:00:59 PM (4 years ago)
Author:
murphpo
Comment:

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  • cores

    v7 v8  
    1 = Reference Design APIs =
    2 
    3 For details about the APIs integrated in our various reference designs please refer to the individual design user guides:
    4  * [wiki:802.11 802.11 Reference Design]
    5  * [wiki:WARPLab WARPLab Reference Design]
    6 
    71= WARP FPGA Cores =
    82
     
    2620 * [wiki:EEPROM_onewire eeprom_onewire]: OneWire master for reading/writing FPGA Board and Radio Board EEPROMs
    2721 * [source:/PlatformSupport/CustomPeripherals/pcores/clock_board_config_v1_05_a clock_board_config]: Configures Clock Board buffers on power up
     22
     23----
     24
     25= Reference Design APIs =
     26
     27For details about the APIs integrated in our various reference designs please refer to the individual design user guides:
     28 * [wiki:802.11 802.11 Reference Design]
     29 * [wiki:WARPLab WARPLab Reference Design]
     30